Commit | Line | Data |
---|---|---|
a66098da | 1 | /* |
ce9e2e1b LB |
2 | * drivers/net/wireless/mwl8k.c |
3 | * Driver for Marvell TOPDOG 802.11 Wireless cards | |
a66098da | 4 | * |
a5fb297d | 5 | * Copyright (C) 2008, 2009, 2010 Marvell Semiconductor Inc. |
a66098da LB |
6 | * |
7 | * This file is licensed under the terms of the GNU General Public | |
8 | * License version 2. This program is licensed "as is" without any | |
9 | * warranty of any kind, whether express or implied. | |
10 | */ | |
11 | ||
12 | #include <linux/init.h> | |
a6b7a407 | 13 | #include <linux/interrupt.h> |
a66098da LB |
14 | #include <linux/module.h> |
15 | #include <linux/kernel.h> | |
3d76e82c | 16 | #include <linux/sched.h> |
a66098da LB |
17 | #include <linux/spinlock.h> |
18 | #include <linux/list.h> | |
19 | #include <linux/pci.h> | |
20 | #include <linux/delay.h> | |
21 | #include <linux/completion.h> | |
22 | #include <linux/etherdevice.h> | |
5a0e3ad6 | 23 | #include <linux/slab.h> |
a66098da LB |
24 | #include <net/mac80211.h> |
25 | #include <linux/moduleparam.h> | |
26 | #include <linux/firmware.h> | |
27 | #include <linux/workqueue.h> | |
28 | ||
29 | #define MWL8K_DESC "Marvell TOPDOG(R) 802.11 Wireless Network Driver" | |
30 | #define MWL8K_NAME KBUILD_MODNAME | |
00e8e692 | 31 | #define MWL8K_VERSION "0.13" |
a66098da | 32 | |
0863ade8 | 33 | /* Module parameters */ |
eb939922 | 34 | static bool ap_mode_default; |
0863ade8 BC |
35 | module_param(ap_mode_default, bool, 0); |
36 | MODULE_PARM_DESC(ap_mode_default, | |
37 | "Set to 1 to make ap mode the default instead of sta mode"); | |
38 | ||
a66098da LB |
39 | /* Register definitions */ |
40 | #define MWL8K_HIU_GEN_PTR 0x00000c10 | |
ce9e2e1b LB |
41 | #define MWL8K_MODE_STA 0x0000005a |
42 | #define MWL8K_MODE_AP 0x000000a5 | |
a66098da | 43 | #define MWL8K_HIU_INT_CODE 0x00000c14 |
ce9e2e1b LB |
44 | #define MWL8K_FWSTA_READY 0xf0f1f2f4 |
45 | #define MWL8K_FWAP_READY 0xf1f2f4a5 | |
46 | #define MWL8K_INT_CODE_CMD_FINISHED 0x00000005 | |
a66098da LB |
47 | #define MWL8K_HIU_SCRATCH 0x00000c40 |
48 | ||
49 | /* Host->device communications */ | |
50 | #define MWL8K_HIU_H2A_INTERRUPT_EVENTS 0x00000c18 | |
51 | #define MWL8K_HIU_H2A_INTERRUPT_STATUS 0x00000c1c | |
52 | #define MWL8K_HIU_H2A_INTERRUPT_MASK 0x00000c20 | |
53 | #define MWL8K_HIU_H2A_INTERRUPT_CLEAR_SEL 0x00000c24 | |
54 | #define MWL8K_HIU_H2A_INTERRUPT_STATUS_MASK 0x00000c28 | |
ce9e2e1b LB |
55 | #define MWL8K_H2A_INT_DUMMY (1 << 20) |
56 | #define MWL8K_H2A_INT_RESET (1 << 15) | |
57 | #define MWL8K_H2A_INT_DOORBELL (1 << 1) | |
58 | #define MWL8K_H2A_INT_PPA_READY (1 << 0) | |
a66098da LB |
59 | |
60 | /* Device->host communications */ | |
61 | #define MWL8K_HIU_A2H_INTERRUPT_EVENTS 0x00000c2c | |
62 | #define MWL8K_HIU_A2H_INTERRUPT_STATUS 0x00000c30 | |
63 | #define MWL8K_HIU_A2H_INTERRUPT_MASK 0x00000c34 | |
64 | #define MWL8K_HIU_A2H_INTERRUPT_CLEAR_SEL 0x00000c38 | |
65 | #define MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK 0x00000c3c | |
ce9e2e1b | 66 | #define MWL8K_A2H_INT_DUMMY (1 << 20) |
3aefc37e | 67 | #define MWL8K_A2H_INT_BA_WATCHDOG (1 << 14) |
ce9e2e1b LB |
68 | #define MWL8K_A2H_INT_CHNL_SWITCHED (1 << 11) |
69 | #define MWL8K_A2H_INT_QUEUE_EMPTY (1 << 10) | |
70 | #define MWL8K_A2H_INT_RADAR_DETECT (1 << 7) | |
71 | #define MWL8K_A2H_INT_RADIO_ON (1 << 6) | |
72 | #define MWL8K_A2H_INT_RADIO_OFF (1 << 5) | |
73 | #define MWL8K_A2H_INT_MAC_EVENT (1 << 3) | |
74 | #define MWL8K_A2H_INT_OPC_DONE (1 << 2) | |
75 | #define MWL8K_A2H_INT_RX_READY (1 << 1) | |
76 | #define MWL8K_A2H_INT_TX_DONE (1 << 0) | |
a66098da | 77 | |
566875db PN |
78 | /* HW micro second timer register |
79 | * located at offset 0xA600. This | |
80 | * will be used to timestamp tx | |
81 | * packets. | |
82 | */ | |
83 | ||
84 | #define MWL8K_HW_TIMER_REGISTER 0x0000a600 | |
85 | ||
a66098da LB |
86 | #define MWL8K_A2H_EVENTS (MWL8K_A2H_INT_DUMMY | \ |
87 | MWL8K_A2H_INT_CHNL_SWITCHED | \ | |
88 | MWL8K_A2H_INT_QUEUE_EMPTY | \ | |
89 | MWL8K_A2H_INT_RADAR_DETECT | \ | |
90 | MWL8K_A2H_INT_RADIO_ON | \ | |
91 | MWL8K_A2H_INT_RADIO_OFF | \ | |
92 | MWL8K_A2H_INT_MAC_EVENT | \ | |
93 | MWL8K_A2H_INT_OPC_DONE | \ | |
94 | MWL8K_A2H_INT_RX_READY | \ | |
3aefc37e NS |
95 | MWL8K_A2H_INT_TX_DONE | \ |
96 | MWL8K_A2H_INT_BA_WATCHDOG) | |
a66098da | 97 | |
a66098da | 98 | #define MWL8K_RX_QUEUES 1 |
e600707b | 99 | #define MWL8K_TX_WMM_QUEUES 4 |
8a7a578c | 100 | #define MWL8K_MAX_AMPDU_QUEUES 8 |
e600707b BC |
101 | #define MWL8K_MAX_TX_QUEUES (MWL8K_TX_WMM_QUEUES + MWL8K_MAX_AMPDU_QUEUES) |
102 | #define mwl8k_tx_queues(priv) (MWL8K_TX_WMM_QUEUES + (priv)->num_ampdu_queues) | |
a66098da | 103 | |
7fb978b7 YAP |
104 | /* txpriorities are mapped with hw queues. |
105 | * Each hw queue has a txpriority. | |
106 | */ | |
107 | #define TOTAL_HW_TX_QUEUES 8 | |
108 | ||
109 | /* Each HW queue can have one AMPDU stream. | |
110 | * But, because one of the hw queue is reserved, | |
111 | * maximum AMPDU queues that can be created are | |
112 | * one short of total tx queues. | |
113 | */ | |
114 | #define MWL8K_NUM_AMPDU_STREAMS (TOTAL_HW_TX_QUEUES - 1) | |
115 | ||
54bc3a0d LB |
116 | struct rxd_ops { |
117 | int rxd_size; | |
118 | void (*rxd_init)(void *rxd, dma_addr_t next_dma_addr); | |
119 | void (*rxd_refill)(void *rxd, dma_addr_t addr, int len); | |
20f09c3d | 120 | int (*rxd_process)(void *rxd, struct ieee80211_rx_status *status, |
0d462bbb | 121 | __le16 *qos, s8 *noise); |
54bc3a0d LB |
122 | }; |
123 | ||
45a390dd | 124 | struct mwl8k_device_info { |
a74b295e LB |
125 | char *part_name; |
126 | char *helper_image; | |
0863ade8 BC |
127 | char *fw_image_sta; |
128 | char *fw_image_ap; | |
89a91f4f | 129 | struct rxd_ops *ap_rxd_ops; |
952a0e96 | 130 | u32 fw_api_ap; |
45a390dd LB |
131 | }; |
132 | ||
a66098da | 133 | struct mwl8k_rx_queue { |
45eb400d | 134 | int rxd_count; |
a66098da LB |
135 | |
136 | /* hw receives here */ | |
45eb400d | 137 | int head; |
a66098da LB |
138 | |
139 | /* refill descs here */ | |
45eb400d | 140 | int tail; |
a66098da | 141 | |
54bc3a0d | 142 | void *rxd; |
45eb400d | 143 | dma_addr_t rxd_dma; |
788838eb LB |
144 | struct { |
145 | struct sk_buff *skb; | |
53b1b3e1 | 146 | DEFINE_DMA_UNMAP_ADDR(dma); |
788838eb | 147 | } *buf; |
a66098da LB |
148 | }; |
149 | ||
a66098da LB |
150 | struct mwl8k_tx_queue { |
151 | /* hw transmits here */ | |
45eb400d | 152 | int head; |
a66098da LB |
153 | |
154 | /* sw appends here */ | |
45eb400d | 155 | int tail; |
a66098da | 156 | |
8ccbc3b8 | 157 | unsigned int len; |
45eb400d LB |
158 | struct mwl8k_tx_desc *txd; |
159 | dma_addr_t txd_dma; | |
160 | struct sk_buff **skb; | |
a66098da LB |
161 | }; |
162 | ||
ac109fd0 BC |
163 | enum { |
164 | AMPDU_NO_STREAM, | |
165 | AMPDU_STREAM_NEW, | |
166 | AMPDU_STREAM_IN_PROGRESS, | |
167 | AMPDU_STREAM_ACTIVE, | |
168 | }; | |
169 | ||
5faa1aff NS |
170 | struct mwl8k_ampdu_stream { |
171 | struct ieee80211_sta *sta; | |
172 | u8 tid; | |
173 | u8 state; | |
174 | u8 idx; | |
5faa1aff NS |
175 | }; |
176 | ||
a66098da | 177 | struct mwl8k_priv { |
a66098da | 178 | struct ieee80211_hw *hw; |
a66098da | 179 | struct pci_dev *pdev; |
bf3ca7f7 | 180 | int irq; |
a66098da | 181 | |
45a390dd LB |
182 | struct mwl8k_device_info *device_info; |
183 | ||
be695fc4 LB |
184 | void __iomem *sram; |
185 | void __iomem *regs; | |
186 | ||
187 | /* firmware */ | |
d1f9e41d BC |
188 | const struct firmware *fw_helper; |
189 | const struct firmware *fw_ucode; | |
a66098da | 190 | |
be695fc4 LB |
191 | /* hardware/firmware parameters */ |
192 | bool ap_fw; | |
193 | struct rxd_ops *rxd_ops; | |
777ad375 LB |
194 | struct ieee80211_supported_band band_24; |
195 | struct ieee80211_channel channels_24[14]; | |
196 | struct ieee80211_rate rates_24[14]; | |
4eae9edd LB |
197 | struct ieee80211_supported_band band_50; |
198 | struct ieee80211_channel channels_50[4]; | |
199 | struct ieee80211_rate rates_50[9]; | |
ee0ddf18 LB |
200 | u32 ap_macids_supported; |
201 | u32 sta_macids_supported; | |
be695fc4 | 202 | |
8a7a578c BC |
203 | /* Ampdu stream information */ |
204 | u8 num_ampdu_queues; | |
ac109fd0 BC |
205 | spinlock_t stream_lock; |
206 | struct mwl8k_ampdu_stream ampdu[MWL8K_MAX_AMPDU_QUEUES]; | |
3aefc37e | 207 | struct work_struct watchdog_ba_handle; |
8a7a578c | 208 | |
618952a7 LB |
209 | /* firmware access */ |
210 | struct mutex fw_mutex; | |
211 | struct task_struct *fw_mutex_owner; | |
6b6accc3 | 212 | struct task_struct *hw_restart_owner; |
618952a7 | 213 | int fw_mutex_depth; |
618952a7 LB |
214 | struct completion *hostcmd_wait; |
215 | ||
c27a54d3 YAP |
216 | atomic_t watchdog_event_pending; |
217 | ||
a66098da LB |
218 | /* lock held over TX and TX reap */ |
219 | spinlock_t tx_lock; | |
a66098da | 220 | |
88de754a LB |
221 | /* TX quiesce completion, protected by fw_mutex and tx_lock */ |
222 | struct completion *tx_wait; | |
223 | ||
f5bb87cf | 224 | /* List of interfaces. */ |
ee0ddf18 | 225 | u32 macids_used; |
f5bb87cf | 226 | struct list_head vif_list; |
a66098da | 227 | |
a66098da LB |
228 | /* power management status cookie from firmware */ |
229 | u32 *cookie; | |
230 | dma_addr_t cookie_dma; | |
231 | ||
232 | u16 num_mcaddrs; | |
a66098da | 233 | u8 hw_rev; |
2aa7b01f | 234 | u32 fw_rev; |
a66098da LB |
235 | |
236 | /* | |
237 | * Running count of TX packets in flight, to avoid | |
238 | * iterating over the transmit rings each time. | |
239 | */ | |
240 | int pending_tx_pkts; | |
241 | ||
242 | struct mwl8k_rx_queue rxq[MWL8K_RX_QUEUES]; | |
e600707b BC |
243 | struct mwl8k_tx_queue txq[MWL8K_MAX_TX_QUEUES]; |
244 | u32 txq_offset[MWL8K_MAX_TX_QUEUES]; | |
a66098da | 245 | |
c46563b7 | 246 | bool radio_on; |
68ce3884 | 247 | bool radio_short_preamble; |
a43c49a8 | 248 | bool sniffer_enabled; |
0439b1f5 | 249 | bool wmm_enabled; |
a66098da | 250 | |
a66098da LB |
251 | /* XXX need to convert this to handle multiple interfaces */ |
252 | bool capture_beacon; | |
d89173f2 | 253 | u8 capture_bssid[ETH_ALEN]; |
a66098da LB |
254 | struct sk_buff *beacon_skb; |
255 | ||
256 | /* | |
257 | * This FJ worker has to be global as it is scheduled from the | |
258 | * RX handler. At this point we don't know which interface it | |
259 | * belongs to until the list of bssids waiting to complete join | |
260 | * is checked. | |
261 | */ | |
262 | struct work_struct finalize_join_worker; | |
263 | ||
1e9f9de3 LB |
264 | /* Tasklet to perform TX reclaim. */ |
265 | struct tasklet_struct poll_tx_task; | |
67e2eb27 LB |
266 | |
267 | /* Tasklet to perform RX. */ | |
268 | struct tasklet_struct poll_rx_task; | |
0d462bbb JL |
269 | |
270 | /* Most recently reported noise in dBm */ | |
271 | s8 noise; | |
0863ade8 BC |
272 | |
273 | /* | |
274 | * preserve the queue configurations so they can be restored if/when | |
275 | * the firmware image is swapped. | |
276 | */ | |
e600707b | 277 | struct ieee80211_tx_queue_params wmm_params[MWL8K_TX_WMM_QUEUES]; |
99020471 | 278 | |
6b6accc3 YAP |
279 | /* To perform the task of reloading the firmware */ |
280 | struct work_struct fw_reload; | |
281 | bool hw_restart_in_progress; | |
282 | ||
99020471 BC |
283 | /* async firmware loading state */ |
284 | unsigned fw_state; | |
285 | char *fw_pref; | |
286 | char *fw_alt; | |
287 | struct completion firmware_loading_complete; | |
a66098da LB |
288 | }; |
289 | ||
e53d9b96 NS |
290 | #define MAX_WEP_KEY_LEN 13 |
291 | #define NUM_WEP_KEYS 4 | |
292 | ||
a66098da LB |
293 | /* Per interface specific private data */ |
294 | struct mwl8k_vif { | |
f5bb87cf LB |
295 | struct list_head list; |
296 | struct ieee80211_vif *vif; | |
297 | ||
f57ca9c1 LB |
298 | /* Firmware macid for this vif. */ |
299 | int macid; | |
300 | ||
c2c2b12a | 301 | /* Non AMPDU sequence number assigned by driver. */ |
a680400e | 302 | u16 seqno; |
e53d9b96 NS |
303 | |
304 | /* Saved WEP keys */ | |
305 | struct { | |
306 | u8 enabled; | |
307 | u8 key[sizeof(struct ieee80211_key_conf) + MAX_WEP_KEY_LEN]; | |
308 | } wep_key_conf[NUM_WEP_KEYS]; | |
d9a07d49 NS |
309 | |
310 | /* BSSID */ | |
311 | u8 bssid[ETH_ALEN]; | |
312 | ||
313 | /* A flag to indicate is HW crypto is enabled for this bssid */ | |
314 | bool is_hw_crypto_enabled; | |
a66098da | 315 | }; |
a94cc97e | 316 | #define MWL8K_VIF(_vif) ((struct mwl8k_vif *)&((_vif)->drv_priv)) |
fcdc403c | 317 | #define IEEE80211_KEY_CONF(_u8) ((struct ieee80211_key_conf *)(_u8)) |
a66098da | 318 | |
d0805c1c BC |
319 | struct tx_traffic_info { |
320 | u32 start_time; | |
321 | u32 pkts; | |
322 | }; | |
323 | ||
324 | #define MWL8K_MAX_TID 8 | |
a680400e LB |
325 | struct mwl8k_sta { |
326 | /* Index into station database. Returned by UPDATE_STADB. */ | |
327 | u8 peer_id; | |
17033543 | 328 | u8 is_ampdu_allowed; |
d0805c1c | 329 | struct tx_traffic_info tx_stats[MWL8K_MAX_TID]; |
a680400e LB |
330 | }; |
331 | #define MWL8K_STA(_sta) ((struct mwl8k_sta *)&((_sta)->drv_priv)) | |
332 | ||
777ad375 | 333 | static const struct ieee80211_channel mwl8k_channels_24[] = { |
a66098da LB |
334 | { .center_freq = 2412, .hw_value = 1, }, |
335 | { .center_freq = 2417, .hw_value = 2, }, | |
336 | { .center_freq = 2422, .hw_value = 3, }, | |
337 | { .center_freq = 2427, .hw_value = 4, }, | |
338 | { .center_freq = 2432, .hw_value = 5, }, | |
339 | { .center_freq = 2437, .hw_value = 6, }, | |
340 | { .center_freq = 2442, .hw_value = 7, }, | |
341 | { .center_freq = 2447, .hw_value = 8, }, | |
342 | { .center_freq = 2452, .hw_value = 9, }, | |
343 | { .center_freq = 2457, .hw_value = 10, }, | |
344 | { .center_freq = 2462, .hw_value = 11, }, | |
647ca6b0 LB |
345 | { .center_freq = 2467, .hw_value = 12, }, |
346 | { .center_freq = 2472, .hw_value = 13, }, | |
347 | { .center_freq = 2484, .hw_value = 14, }, | |
a66098da LB |
348 | }; |
349 | ||
777ad375 | 350 | static const struct ieee80211_rate mwl8k_rates_24[] = { |
a66098da LB |
351 | { .bitrate = 10, .hw_value = 2, }, |
352 | { .bitrate = 20, .hw_value = 4, }, | |
353 | { .bitrate = 55, .hw_value = 11, }, | |
5dfd3e2c LB |
354 | { .bitrate = 110, .hw_value = 22, }, |
355 | { .bitrate = 220, .hw_value = 44, }, | |
a66098da LB |
356 | { .bitrate = 60, .hw_value = 12, }, |
357 | { .bitrate = 90, .hw_value = 18, }, | |
a66098da LB |
358 | { .bitrate = 120, .hw_value = 24, }, |
359 | { .bitrate = 180, .hw_value = 36, }, | |
360 | { .bitrate = 240, .hw_value = 48, }, | |
361 | { .bitrate = 360, .hw_value = 72, }, | |
362 | { .bitrate = 480, .hw_value = 96, }, | |
363 | { .bitrate = 540, .hw_value = 108, }, | |
140eb5e2 LB |
364 | { .bitrate = 720, .hw_value = 144, }, |
365 | }; | |
366 | ||
4eae9edd LB |
367 | static const struct ieee80211_channel mwl8k_channels_50[] = { |
368 | { .center_freq = 5180, .hw_value = 36, }, | |
369 | { .center_freq = 5200, .hw_value = 40, }, | |
370 | { .center_freq = 5220, .hw_value = 44, }, | |
371 | { .center_freq = 5240, .hw_value = 48, }, | |
372 | }; | |
373 | ||
374 | static const struct ieee80211_rate mwl8k_rates_50[] = { | |
375 | { .bitrate = 60, .hw_value = 12, }, | |
376 | { .bitrate = 90, .hw_value = 18, }, | |
377 | { .bitrate = 120, .hw_value = 24, }, | |
378 | { .bitrate = 180, .hw_value = 36, }, | |
379 | { .bitrate = 240, .hw_value = 48, }, | |
380 | { .bitrate = 360, .hw_value = 72, }, | |
381 | { .bitrate = 480, .hw_value = 96, }, | |
382 | { .bitrate = 540, .hw_value = 108, }, | |
383 | { .bitrate = 720, .hw_value = 144, }, | |
384 | }; | |
385 | ||
a66098da | 386 | /* Set or get info from Firmware */ |
a66098da | 387 | #define MWL8K_CMD_GET 0x0000 |
41fdf097 NS |
388 | #define MWL8K_CMD_SET 0x0001 |
389 | #define MWL8K_CMD_SET_LIST 0x0002 | |
a66098da LB |
390 | |
391 | /* Firmware command codes */ | |
392 | #define MWL8K_CMD_CODE_DNLD 0x0001 | |
393 | #define MWL8K_CMD_GET_HW_SPEC 0x0003 | |
42fba21d | 394 | #define MWL8K_CMD_SET_HW_SPEC 0x0004 |
a66098da LB |
395 | #define MWL8K_CMD_MAC_MULTICAST_ADR 0x0010 |
396 | #define MWL8K_CMD_GET_STAT 0x0014 | |
ff45fc60 LB |
397 | #define MWL8K_CMD_RADIO_CONTROL 0x001c |
398 | #define MWL8K_CMD_RF_TX_POWER 0x001e | |
41fdf097 | 399 | #define MWL8K_CMD_TX_POWER 0x001f |
08b06347 | 400 | #define MWL8K_CMD_RF_ANTENNA 0x0020 |
aa21d0f6 | 401 | #define MWL8K_CMD_SET_BEACON 0x0100 /* per-vif */ |
a66098da LB |
402 | #define MWL8K_CMD_SET_PRE_SCAN 0x0107 |
403 | #define MWL8K_CMD_SET_POST_SCAN 0x0108 | |
ff45fc60 LB |
404 | #define MWL8K_CMD_SET_RF_CHANNEL 0x010a |
405 | #define MWL8K_CMD_SET_AID 0x010d | |
406 | #define MWL8K_CMD_SET_RATE 0x0110 | |
407 | #define MWL8K_CMD_SET_FINALIZE_JOIN 0x0111 | |
408 | #define MWL8K_CMD_RTS_THRESHOLD 0x0113 | |
a66098da | 409 | #define MWL8K_CMD_SET_SLOT 0x0114 |
ff45fc60 LB |
410 | #define MWL8K_CMD_SET_EDCA_PARAMS 0x0115 |
411 | #define MWL8K_CMD_SET_WMM_MODE 0x0123 | |
a66098da | 412 | #define MWL8K_CMD_MIMO_CONFIG 0x0125 |
ff45fc60 | 413 | #define MWL8K_CMD_USE_FIXED_RATE 0x0126 |
a66098da | 414 | #define MWL8K_CMD_ENABLE_SNIFFER 0x0150 |
aa21d0f6 | 415 | #define MWL8K_CMD_SET_MAC_ADDR 0x0202 /* per-vif */ |
a66098da | 416 | #define MWL8K_CMD_SET_RATEADAPT_MODE 0x0203 |
3aefc37e | 417 | #define MWL8K_CMD_GET_WATCHDOG_BITMAP 0x0205 |
197a4e4e | 418 | #define MWL8K_CMD_DEL_MAC_ADDR 0x0206 /* per-vif */ |
aa21d0f6 LB |
419 | #define MWL8K_CMD_BSS_START 0x1100 /* per-vif */ |
420 | #define MWL8K_CMD_SET_NEW_STN 0x1111 /* per-vif */ | |
fcdc403c | 421 | #define MWL8K_CMD_UPDATE_ENCRYPTION 0x1122 /* per-vif */ |
ff45fc60 | 422 | #define MWL8K_CMD_UPDATE_STADB 0x1123 |
5faa1aff | 423 | #define MWL8K_CMD_BASTREAM 0x1125 |
a66098da | 424 | |
b603742f | 425 | static const char *mwl8k_cmd_name(__le16 cmd, char *buf, int bufsize) |
a66098da | 426 | { |
b603742f JL |
427 | u16 command = le16_to_cpu(cmd); |
428 | ||
a66098da LB |
429 | #define MWL8K_CMDNAME(x) case MWL8K_CMD_##x: do {\ |
430 | snprintf(buf, bufsize, "%s", #x);\ | |
431 | return buf;\ | |
432 | } while (0) | |
b603742f | 433 | switch (command & ~0x8000) { |
a66098da LB |
434 | MWL8K_CMDNAME(CODE_DNLD); |
435 | MWL8K_CMDNAME(GET_HW_SPEC); | |
42fba21d | 436 | MWL8K_CMDNAME(SET_HW_SPEC); |
a66098da LB |
437 | MWL8K_CMDNAME(MAC_MULTICAST_ADR); |
438 | MWL8K_CMDNAME(GET_STAT); | |
439 | MWL8K_CMDNAME(RADIO_CONTROL); | |
440 | MWL8K_CMDNAME(RF_TX_POWER); | |
41fdf097 | 441 | MWL8K_CMDNAME(TX_POWER); |
08b06347 | 442 | MWL8K_CMDNAME(RF_ANTENNA); |
b64fe619 | 443 | MWL8K_CMDNAME(SET_BEACON); |
a66098da LB |
444 | MWL8K_CMDNAME(SET_PRE_SCAN); |
445 | MWL8K_CMDNAME(SET_POST_SCAN); | |
446 | MWL8K_CMDNAME(SET_RF_CHANNEL); | |
ff45fc60 LB |
447 | MWL8K_CMDNAME(SET_AID); |
448 | MWL8K_CMDNAME(SET_RATE); | |
449 | MWL8K_CMDNAME(SET_FINALIZE_JOIN); | |
450 | MWL8K_CMDNAME(RTS_THRESHOLD); | |
a66098da | 451 | MWL8K_CMDNAME(SET_SLOT); |
ff45fc60 LB |
452 | MWL8K_CMDNAME(SET_EDCA_PARAMS); |
453 | MWL8K_CMDNAME(SET_WMM_MODE); | |
a66098da | 454 | MWL8K_CMDNAME(MIMO_CONFIG); |
ff45fc60 | 455 | MWL8K_CMDNAME(USE_FIXED_RATE); |
a66098da | 456 | MWL8K_CMDNAME(ENABLE_SNIFFER); |
32060e1b | 457 | MWL8K_CMDNAME(SET_MAC_ADDR); |
a66098da | 458 | MWL8K_CMDNAME(SET_RATEADAPT_MODE); |
b64fe619 | 459 | MWL8K_CMDNAME(BSS_START); |
3f5610ff | 460 | MWL8K_CMDNAME(SET_NEW_STN); |
fcdc403c | 461 | MWL8K_CMDNAME(UPDATE_ENCRYPTION); |
ff45fc60 | 462 | MWL8K_CMDNAME(UPDATE_STADB); |
5faa1aff | 463 | MWL8K_CMDNAME(BASTREAM); |
3aefc37e | 464 | MWL8K_CMDNAME(GET_WATCHDOG_BITMAP); |
a66098da LB |
465 | default: |
466 | snprintf(buf, bufsize, "0x%x", cmd); | |
467 | } | |
468 | #undef MWL8K_CMDNAME | |
469 | ||
470 | return buf; | |
471 | } | |
472 | ||
473 | /* Hardware and firmware reset */ | |
474 | static void mwl8k_hw_reset(struct mwl8k_priv *priv) | |
475 | { | |
476 | iowrite32(MWL8K_H2A_INT_RESET, | |
477 | priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS); | |
478 | iowrite32(MWL8K_H2A_INT_RESET, | |
479 | priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS); | |
480 | msleep(20); | |
481 | } | |
482 | ||
483 | /* Release fw image */ | |
d1f9e41d | 484 | static void mwl8k_release_fw(const struct firmware **fw) |
a66098da LB |
485 | { |
486 | if (*fw == NULL) | |
487 | return; | |
488 | release_firmware(*fw); | |
489 | *fw = NULL; | |
490 | } | |
491 | ||
492 | static void mwl8k_release_firmware(struct mwl8k_priv *priv) | |
493 | { | |
22be40d9 LB |
494 | mwl8k_release_fw(&priv->fw_ucode); |
495 | mwl8k_release_fw(&priv->fw_helper); | |
a66098da LB |
496 | } |
497 | ||
99020471 BC |
498 | /* states for asynchronous f/w loading */ |
499 | static void mwl8k_fw_state_machine(const struct firmware *fw, void *context); | |
500 | enum { | |
501 | FW_STATE_INIT = 0, | |
502 | FW_STATE_LOADING_PREF, | |
503 | FW_STATE_LOADING_ALT, | |
504 | FW_STATE_ERROR, | |
505 | }; | |
506 | ||
a66098da LB |
507 | /* Request fw image */ |
508 | static int mwl8k_request_fw(struct mwl8k_priv *priv, | |
d1f9e41d | 509 | const char *fname, const struct firmware **fw, |
99020471 | 510 | bool nowait) |
a66098da LB |
511 | { |
512 | /* release current image */ | |
513 | if (*fw != NULL) | |
514 | mwl8k_release_fw(fw); | |
515 | ||
99020471 BC |
516 | if (nowait) |
517 | return request_firmware_nowait(THIS_MODULE, 1, fname, | |
518 | &priv->pdev->dev, GFP_KERNEL, | |
519 | priv, mwl8k_fw_state_machine); | |
520 | else | |
d1f9e41d | 521 | return request_firmware(fw, fname, &priv->pdev->dev); |
a66098da LB |
522 | } |
523 | ||
99020471 BC |
524 | static int mwl8k_request_firmware(struct mwl8k_priv *priv, char *fw_image, |
525 | bool nowait) | |
a66098da | 526 | { |
a74b295e | 527 | struct mwl8k_device_info *di = priv->device_info; |
a66098da LB |
528 | int rc; |
529 | ||
a74b295e | 530 | if (di->helper_image != NULL) { |
99020471 BC |
531 | if (nowait) |
532 | rc = mwl8k_request_fw(priv, di->helper_image, | |
533 | &priv->fw_helper, true); | |
534 | else | |
535 | rc = mwl8k_request_fw(priv, di->helper_image, | |
536 | &priv->fw_helper, false); | |
537 | if (rc) | |
538 | printk(KERN_ERR "%s: Error requesting helper fw %s\n", | |
539 | pci_name(priv->pdev), di->helper_image); | |
540 | ||
541 | if (rc || nowait) | |
a74b295e | 542 | return rc; |
a66098da LB |
543 | } |
544 | ||
99020471 BC |
545 | if (nowait) { |
546 | /* | |
547 | * if we get here, no helper image is needed. Skip the | |
548 | * FW_STATE_INIT state. | |
549 | */ | |
550 | priv->fw_state = FW_STATE_LOADING_PREF; | |
551 | rc = mwl8k_request_fw(priv, fw_image, | |
552 | &priv->fw_ucode, | |
553 | true); | |
554 | } else | |
555 | rc = mwl8k_request_fw(priv, fw_image, | |
556 | &priv->fw_ucode, false); | |
a66098da | 557 | if (rc) { |
c2c357ce | 558 | printk(KERN_ERR "%s: Error requesting firmware file %s\n", |
0863ade8 | 559 | pci_name(priv->pdev), fw_image); |
22be40d9 | 560 | mwl8k_release_fw(&priv->fw_helper); |
a66098da LB |
561 | return rc; |
562 | } | |
563 | ||
564 | return 0; | |
565 | } | |
566 | ||
567 | struct mwl8k_cmd_pkt { | |
568 | __le16 code; | |
569 | __le16 length; | |
f57ca9c1 LB |
570 | __u8 seq_num; |
571 | __u8 macid; | |
a66098da LB |
572 | __le16 result; |
573 | char payload[0]; | |
ba2d3587 | 574 | } __packed; |
a66098da LB |
575 | |
576 | /* | |
577 | * Firmware loading. | |
578 | */ | |
579 | static int | |
580 | mwl8k_send_fw_load_cmd(struct mwl8k_priv *priv, void *data, int length) | |
581 | { | |
582 | void __iomem *regs = priv->regs; | |
583 | dma_addr_t dma_addr; | |
a66098da LB |
584 | int loops; |
585 | ||
586 | dma_addr = pci_map_single(priv->pdev, data, length, PCI_DMA_TODEVICE); | |
587 | if (pci_dma_mapping_error(priv->pdev, dma_addr)) | |
588 | return -ENOMEM; | |
589 | ||
590 | iowrite32(dma_addr, regs + MWL8K_HIU_GEN_PTR); | |
591 | iowrite32(0, regs + MWL8K_HIU_INT_CODE); | |
592 | iowrite32(MWL8K_H2A_INT_DOORBELL, | |
593 | regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS); | |
594 | iowrite32(MWL8K_H2A_INT_DUMMY, | |
595 | regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS); | |
596 | ||
a66098da LB |
597 | loops = 1000; |
598 | do { | |
599 | u32 int_code; | |
600 | ||
601 | int_code = ioread32(regs + MWL8K_HIU_INT_CODE); | |
602 | if (int_code == MWL8K_INT_CODE_CMD_FINISHED) { | |
603 | iowrite32(0, regs + MWL8K_HIU_INT_CODE); | |
a66098da LB |
604 | break; |
605 | } | |
606 | ||
3d76e82c | 607 | cond_resched(); |
a66098da LB |
608 | udelay(1); |
609 | } while (--loops); | |
610 | ||
611 | pci_unmap_single(priv->pdev, dma_addr, length, PCI_DMA_TODEVICE); | |
612 | ||
d4b70570 | 613 | return loops ? 0 : -ETIMEDOUT; |
a66098da LB |
614 | } |
615 | ||
616 | static int mwl8k_load_fw_image(struct mwl8k_priv *priv, | |
617 | const u8 *data, size_t length) | |
618 | { | |
619 | struct mwl8k_cmd_pkt *cmd; | |
620 | int done; | |
621 | int rc = 0; | |
622 | ||
623 | cmd = kmalloc(sizeof(*cmd) + 256, GFP_KERNEL); | |
624 | if (cmd == NULL) | |
625 | return -ENOMEM; | |
626 | ||
627 | cmd->code = cpu_to_le16(MWL8K_CMD_CODE_DNLD); | |
628 | cmd->seq_num = 0; | |
f57ca9c1 | 629 | cmd->macid = 0; |
a66098da LB |
630 | cmd->result = 0; |
631 | ||
632 | done = 0; | |
633 | while (length) { | |
634 | int block_size = length > 256 ? 256 : length; | |
635 | ||
636 | memcpy(cmd->payload, data + done, block_size); | |
637 | cmd->length = cpu_to_le16(block_size); | |
638 | ||
639 | rc = mwl8k_send_fw_load_cmd(priv, cmd, | |
640 | sizeof(*cmd) + block_size); | |
641 | if (rc) | |
642 | break; | |
643 | ||
644 | done += block_size; | |
645 | length -= block_size; | |
646 | } | |
647 | ||
648 | if (!rc) { | |
649 | cmd->length = 0; | |
650 | rc = mwl8k_send_fw_load_cmd(priv, cmd, sizeof(*cmd)); | |
651 | } | |
652 | ||
653 | kfree(cmd); | |
654 | ||
655 | return rc; | |
656 | } | |
657 | ||
658 | static int mwl8k_feed_fw_image(struct mwl8k_priv *priv, | |
659 | const u8 *data, size_t length) | |
660 | { | |
661 | unsigned char *buffer; | |
662 | int may_continue, rc = 0; | |
663 | u32 done, prev_block_size; | |
664 | ||
665 | buffer = kmalloc(1024, GFP_KERNEL); | |
666 | if (buffer == NULL) | |
667 | return -ENOMEM; | |
668 | ||
669 | done = 0; | |
670 | prev_block_size = 0; | |
671 | may_continue = 1000; | |
672 | while (may_continue > 0) { | |
673 | u32 block_size; | |
674 | ||
675 | block_size = ioread32(priv->regs + MWL8K_HIU_SCRATCH); | |
676 | if (block_size & 1) { | |
677 | block_size &= ~1; | |
678 | may_continue--; | |
679 | } else { | |
680 | done += prev_block_size; | |
681 | length -= prev_block_size; | |
682 | } | |
683 | ||
684 | if (block_size > 1024 || block_size > length) { | |
685 | rc = -EOVERFLOW; | |
686 | break; | |
687 | } | |
688 | ||
689 | if (length == 0) { | |
690 | rc = 0; | |
691 | break; | |
692 | } | |
693 | ||
694 | if (block_size == 0) { | |
695 | rc = -EPROTO; | |
696 | may_continue--; | |
697 | udelay(1); | |
698 | continue; | |
699 | } | |
700 | ||
701 | prev_block_size = block_size; | |
702 | memcpy(buffer, data + done, block_size); | |
703 | ||
704 | rc = mwl8k_send_fw_load_cmd(priv, buffer, block_size); | |
705 | if (rc) | |
706 | break; | |
707 | } | |
708 | ||
709 | if (!rc && length != 0) | |
710 | rc = -EREMOTEIO; | |
711 | ||
712 | kfree(buffer); | |
713 | ||
714 | return rc; | |
715 | } | |
716 | ||
c2c357ce | 717 | static int mwl8k_load_firmware(struct ieee80211_hw *hw) |
a66098da | 718 | { |
c2c357ce | 719 | struct mwl8k_priv *priv = hw->priv; |
d1f9e41d | 720 | const struct firmware *fw = priv->fw_ucode; |
c2c357ce LB |
721 | int rc; |
722 | int loops; | |
723 | ||
724 | if (!memcmp(fw->data, "\x01\x00\x00\x00", 4)) { | |
d1f9e41d | 725 | const struct firmware *helper = priv->fw_helper; |
a66098da | 726 | |
c2c357ce LB |
727 | if (helper == NULL) { |
728 | printk(KERN_ERR "%s: helper image needed but none " | |
729 | "given\n", pci_name(priv->pdev)); | |
730 | return -EINVAL; | |
731 | } | |
a66098da | 732 | |
c2c357ce | 733 | rc = mwl8k_load_fw_image(priv, helper->data, helper->size); |
a66098da LB |
734 | if (rc) { |
735 | printk(KERN_ERR "%s: unable to load firmware " | |
c2c357ce | 736 | "helper image\n", pci_name(priv->pdev)); |
a66098da LB |
737 | return rc; |
738 | } | |
ba30c4a5 | 739 | msleep(20); |
a66098da | 740 | |
c2c357ce | 741 | rc = mwl8k_feed_fw_image(priv, fw->data, fw->size); |
a66098da | 742 | } else { |
c2c357ce | 743 | rc = mwl8k_load_fw_image(priv, fw->data, fw->size); |
a66098da LB |
744 | } |
745 | ||
746 | if (rc) { | |
c2c357ce LB |
747 | printk(KERN_ERR "%s: unable to load firmware image\n", |
748 | pci_name(priv->pdev)); | |
a66098da LB |
749 | return rc; |
750 | } | |
751 | ||
89a91f4f | 752 | iowrite32(MWL8K_MODE_STA, priv->regs + MWL8K_HIU_GEN_PTR); |
a66098da | 753 | |
89b872e2 | 754 | loops = 500000; |
a66098da | 755 | do { |
eae74e65 LB |
756 | u32 ready_code; |
757 | ||
758 | ready_code = ioread32(priv->regs + MWL8K_HIU_INT_CODE); | |
759 | if (ready_code == MWL8K_FWAP_READY) { | |
3db1cd5c | 760 | priv->ap_fw = true; |
eae74e65 LB |
761 | break; |
762 | } else if (ready_code == MWL8K_FWSTA_READY) { | |
3db1cd5c | 763 | priv->ap_fw = false; |
a66098da | 764 | break; |
eae74e65 LB |
765 | } |
766 | ||
767 | cond_resched(); | |
a66098da LB |
768 | udelay(1); |
769 | } while (--loops); | |
770 | ||
771 | return loops ? 0 : -ETIMEDOUT; | |
772 | } | |
773 | ||
774 | ||
a66098da LB |
775 | /* DMA header used by firmware and hardware. */ |
776 | struct mwl8k_dma_data { | |
777 | __le16 fwlen; | |
778 | struct ieee80211_hdr wh; | |
20f09c3d | 779 | char data[0]; |
ba2d3587 | 780 | } __packed; |
a66098da LB |
781 | |
782 | /* Routines to add/remove DMA header from skb. */ | |
20f09c3d | 783 | static inline void mwl8k_remove_dma_header(struct sk_buff *skb, __le16 qos) |
a66098da | 784 | { |
20f09c3d LB |
785 | struct mwl8k_dma_data *tr; |
786 | int hdrlen; | |
787 | ||
788 | tr = (struct mwl8k_dma_data *)skb->data; | |
789 | hdrlen = ieee80211_hdrlen(tr->wh.frame_control); | |
790 | ||
791 | if (hdrlen != sizeof(tr->wh)) { | |
792 | if (ieee80211_is_data_qos(tr->wh.frame_control)) { | |
793 | memmove(tr->data - hdrlen, &tr->wh, hdrlen - 2); | |
794 | *((__le16 *)(tr->data - 2)) = qos; | |
795 | } else { | |
796 | memmove(tr->data - hdrlen, &tr->wh, hdrlen); | |
797 | } | |
a66098da | 798 | } |
20f09c3d LB |
799 | |
800 | if (hdrlen != sizeof(*tr)) | |
801 | skb_pull(skb, sizeof(*tr) - hdrlen); | |
a66098da LB |
802 | } |
803 | ||
ff776cec YAP |
804 | #define REDUCED_TX_HEADROOM 8 |
805 | ||
252486a1 | 806 | static void |
e4eefec7 YAP |
807 | mwl8k_add_dma_header(struct mwl8k_priv *priv, struct sk_buff *skb, |
808 | int head_pad, int tail_pad) | |
a66098da LB |
809 | { |
810 | struct ieee80211_hdr *wh; | |
ca009301 | 811 | int hdrlen; |
252486a1 | 812 | int reqd_hdrlen; |
a66098da LB |
813 | struct mwl8k_dma_data *tr; |
814 | ||
ca009301 LB |
815 | /* |
816 | * Add a firmware DMA header; the firmware requires that we | |
817 | * present a 2-byte payload length followed by a 4-address | |
818 | * header (without QoS field), followed (optionally) by any | |
819 | * WEP/ExtIV header (but only filled in for CCMP). | |
820 | */ | |
a66098da | 821 | wh = (struct ieee80211_hdr *)skb->data; |
ca009301 | 822 | |
a66098da | 823 | hdrlen = ieee80211_hdrlen(wh->frame_control); |
ff776cec YAP |
824 | |
825 | /* | |
826 | * Check if skb_resize is required because of | |
827 | * tx_headroom adjustment. | |
828 | */ | |
829 | if (priv->ap_fw && (hdrlen < (sizeof(struct ieee80211_cts) | |
830 | + REDUCED_TX_HEADROOM))) { | |
831 | if (pskb_expand_head(skb, REDUCED_TX_HEADROOM, 0, GFP_ATOMIC)) { | |
832 | ||
833 | wiphy_err(priv->hw->wiphy, | |
834 | "Failed to reallocate TX buffer\n"); | |
835 | return; | |
836 | } | |
837 | skb->truesize += REDUCED_TX_HEADROOM; | |
838 | } | |
839 | ||
e4eefec7 | 840 | reqd_hdrlen = sizeof(*tr) + head_pad; |
252486a1 NS |
841 | |
842 | if (hdrlen != reqd_hdrlen) | |
843 | skb_push(skb, reqd_hdrlen - hdrlen); | |
a66098da | 844 | |
ca009301 | 845 | if (ieee80211_is_data_qos(wh->frame_control)) |
252486a1 | 846 | hdrlen -= IEEE80211_QOS_CTL_LEN; |
a66098da LB |
847 | |
848 | tr = (struct mwl8k_dma_data *)skb->data; | |
849 | if (wh != &tr->wh) | |
850 | memmove(&tr->wh, wh, hdrlen); | |
ca009301 LB |
851 | if (hdrlen != sizeof(tr->wh)) |
852 | memset(((void *)&tr->wh) + hdrlen, 0, sizeof(tr->wh) - hdrlen); | |
a66098da LB |
853 | |
854 | /* | |
855 | * Firmware length is the length of the fully formed "802.11 | |
856 | * payload". That is, everything except for the 802.11 header. | |
857 | * This includes all crypto material including the MIC. | |
858 | */ | |
252486a1 | 859 | tr->fwlen = cpu_to_le16(skb->len - sizeof(*tr) + tail_pad); |
a66098da LB |
860 | } |
861 | ||
ff776cec YAP |
862 | static void mwl8k_encapsulate_tx_frame(struct mwl8k_priv *priv, |
863 | struct sk_buff *skb) | |
e53d9b96 NS |
864 | { |
865 | struct ieee80211_hdr *wh; | |
866 | struct ieee80211_tx_info *tx_info; | |
867 | struct ieee80211_key_conf *key_conf; | |
868 | int data_pad; | |
e4eefec7 | 869 | int head_pad = 0; |
e53d9b96 NS |
870 | |
871 | wh = (struct ieee80211_hdr *)skb->data; | |
872 | ||
873 | tx_info = IEEE80211_SKB_CB(skb); | |
874 | ||
875 | key_conf = NULL; | |
876 | if (ieee80211_is_data(wh->frame_control)) | |
877 | key_conf = tx_info->control.hw_key; | |
878 | ||
879 | /* | |
880 | * Make sure the packet header is in the DMA header format (4-address | |
e4eefec7 | 881 | * without QoS), and add head & tail padding when HW crypto is enabled. |
e53d9b96 NS |
882 | * |
883 | * We have the following trailer padding requirements: | |
884 | * - WEP: 4 trailer bytes (ICV) | |
885 | * - TKIP: 12 trailer bytes (8 MIC + 4 ICV) | |
886 | * - CCMP: 8 trailer bytes (MIC) | |
887 | */ | |
888 | data_pad = 0; | |
889 | if (key_conf != NULL) { | |
e4eefec7 | 890 | head_pad = key_conf->iv_len; |
e53d9b96 NS |
891 | switch (key_conf->cipher) { |
892 | case WLAN_CIPHER_SUITE_WEP40: | |
893 | case WLAN_CIPHER_SUITE_WEP104: | |
894 | data_pad = 4; | |
895 | break; | |
896 | case WLAN_CIPHER_SUITE_TKIP: | |
897 | data_pad = 12; | |
898 | break; | |
899 | case WLAN_CIPHER_SUITE_CCMP: | |
900 | data_pad = 8; | |
901 | break; | |
902 | } | |
903 | } | |
e4eefec7 | 904 | mwl8k_add_dma_header(priv, skb, head_pad, data_pad); |
e53d9b96 | 905 | } |
a66098da LB |
906 | |
907 | /* | |
89a91f4f | 908 | * Packet reception for 88w8366 AP firmware. |
6f6d1e9a | 909 | */ |
89a91f4f | 910 | struct mwl8k_rxd_8366_ap { |
6f6d1e9a LB |
911 | __le16 pkt_len; |
912 | __u8 sq2; | |
913 | __u8 rate; | |
914 | __le32 pkt_phys_addr; | |
915 | __le32 next_rxd_phys_addr; | |
916 | __le16 qos_control; | |
917 | __le16 htsig2; | |
918 | __le32 hw_rssi_info; | |
919 | __le32 hw_noise_floor_info; | |
920 | __u8 noise_floor; | |
921 | __u8 pad0[3]; | |
922 | __u8 rssi; | |
923 | __u8 rx_status; | |
924 | __u8 channel; | |
925 | __u8 rx_ctrl; | |
ba2d3587 | 926 | } __packed; |
6f6d1e9a | 927 | |
89a91f4f LB |
928 | #define MWL8K_8366_AP_RATE_INFO_MCS_FORMAT 0x80 |
929 | #define MWL8K_8366_AP_RATE_INFO_40MHZ 0x40 | |
930 | #define MWL8K_8366_AP_RATE_INFO_RATEID(x) ((x) & 0x3f) | |
8e9f33f0 | 931 | |
89a91f4f | 932 | #define MWL8K_8366_AP_RX_CTRL_OWNED_BY_HOST 0x80 |
6f6d1e9a | 933 | |
d9a07d49 NS |
934 | /* 8366 AP rx_status bits */ |
935 | #define MWL8K_8366_AP_RXSTAT_DECRYPT_ERR_MASK 0x80 | |
936 | #define MWL8K_8366_AP_RXSTAT_GENERAL_DECRYPT_ERR 0xFF | |
937 | #define MWL8K_8366_AP_RXSTAT_TKIP_DECRYPT_MIC_ERR 0x02 | |
938 | #define MWL8K_8366_AP_RXSTAT_WEP_DECRYPT_ICV_ERR 0x04 | |
939 | #define MWL8K_8366_AP_RXSTAT_TKIP_DECRYPT_ICV_ERR 0x08 | |
940 | ||
89a91f4f | 941 | static void mwl8k_rxd_8366_ap_init(void *_rxd, dma_addr_t next_dma_addr) |
6f6d1e9a | 942 | { |
89a91f4f | 943 | struct mwl8k_rxd_8366_ap *rxd = _rxd; |
6f6d1e9a LB |
944 | |
945 | rxd->next_rxd_phys_addr = cpu_to_le32(next_dma_addr); | |
89a91f4f | 946 | rxd->rx_ctrl = MWL8K_8366_AP_RX_CTRL_OWNED_BY_HOST; |
6f6d1e9a LB |
947 | } |
948 | ||
89a91f4f | 949 | static void mwl8k_rxd_8366_ap_refill(void *_rxd, dma_addr_t addr, int len) |
6f6d1e9a | 950 | { |
89a91f4f | 951 | struct mwl8k_rxd_8366_ap *rxd = _rxd; |
6f6d1e9a LB |
952 | |
953 | rxd->pkt_len = cpu_to_le16(len); | |
954 | rxd->pkt_phys_addr = cpu_to_le32(addr); | |
955 | wmb(); | |
956 | rxd->rx_ctrl = 0; | |
957 | } | |
958 | ||
959 | static int | |
89a91f4f | 960 | mwl8k_rxd_8366_ap_process(void *_rxd, struct ieee80211_rx_status *status, |
0d462bbb | 961 | __le16 *qos, s8 *noise) |
6f6d1e9a | 962 | { |
89a91f4f | 963 | struct mwl8k_rxd_8366_ap *rxd = _rxd; |
6f6d1e9a | 964 | |
89a91f4f | 965 | if (!(rxd->rx_ctrl & MWL8K_8366_AP_RX_CTRL_OWNED_BY_HOST)) |
6f6d1e9a LB |
966 | return -1; |
967 | rmb(); | |
968 | ||
969 | memset(status, 0, sizeof(*status)); | |
970 | ||
971 | status->signal = -rxd->rssi; | |
0d462bbb | 972 | *noise = -rxd->noise_floor; |
6f6d1e9a | 973 | |
89a91f4f | 974 | if (rxd->rate & MWL8K_8366_AP_RATE_INFO_MCS_FORMAT) { |
6f6d1e9a | 975 | status->flag |= RX_FLAG_HT; |
89a91f4f | 976 | if (rxd->rate & MWL8K_8366_AP_RATE_INFO_40MHZ) |
8e9f33f0 | 977 | status->flag |= RX_FLAG_40MHZ; |
89a91f4f | 978 | status->rate_idx = MWL8K_8366_AP_RATE_INFO_RATEID(rxd->rate); |
6f6d1e9a LB |
979 | } else { |
980 | int i; | |
981 | ||
777ad375 LB |
982 | for (i = 0; i < ARRAY_SIZE(mwl8k_rates_24); i++) { |
983 | if (mwl8k_rates_24[i].hw_value == rxd->rate) { | |
6f6d1e9a LB |
984 | status->rate_idx = i; |
985 | break; | |
986 | } | |
987 | } | |
988 | } | |
989 | ||
85478344 LB |
990 | if (rxd->channel > 14) { |
991 | status->band = IEEE80211_BAND_5GHZ; | |
992 | if (!(status->flag & RX_FLAG_HT)) | |
993 | status->rate_idx -= 5; | |
994 | } else { | |
995 | status->band = IEEE80211_BAND_2GHZ; | |
996 | } | |
59eb21a6 BR |
997 | status->freq = ieee80211_channel_to_frequency(rxd->channel, |
998 | status->band); | |
6f6d1e9a | 999 | |
20f09c3d LB |
1000 | *qos = rxd->qos_control; |
1001 | ||
d9a07d49 NS |
1002 | if ((rxd->rx_status != MWL8K_8366_AP_RXSTAT_GENERAL_DECRYPT_ERR) && |
1003 | (rxd->rx_status & MWL8K_8366_AP_RXSTAT_DECRYPT_ERR_MASK) && | |
1004 | (rxd->rx_status & MWL8K_8366_AP_RXSTAT_TKIP_DECRYPT_MIC_ERR)) | |
1005 | status->flag |= RX_FLAG_MMIC_ERROR; | |
1006 | ||
6f6d1e9a LB |
1007 | return le16_to_cpu(rxd->pkt_len); |
1008 | } | |
1009 | ||
89a91f4f LB |
1010 | static struct rxd_ops rxd_8366_ap_ops = { |
1011 | .rxd_size = sizeof(struct mwl8k_rxd_8366_ap), | |
1012 | .rxd_init = mwl8k_rxd_8366_ap_init, | |
1013 | .rxd_refill = mwl8k_rxd_8366_ap_refill, | |
1014 | .rxd_process = mwl8k_rxd_8366_ap_process, | |
6f6d1e9a LB |
1015 | }; |
1016 | ||
1017 | /* | |
89a91f4f | 1018 | * Packet reception for STA firmware. |
a66098da | 1019 | */ |
89a91f4f | 1020 | struct mwl8k_rxd_sta { |
a66098da LB |
1021 | __le16 pkt_len; |
1022 | __u8 link_quality; | |
1023 | __u8 noise_level; | |
1024 | __le32 pkt_phys_addr; | |
45eb400d | 1025 | __le32 next_rxd_phys_addr; |
a66098da LB |
1026 | __le16 qos_control; |
1027 | __le16 rate_info; | |
1028 | __le32 pad0[4]; | |
1029 | __u8 rssi; | |
1030 | __u8 channel; | |
1031 | __le16 pad1; | |
1032 | __u8 rx_ctrl; | |
1033 | __u8 rx_status; | |
1034 | __u8 pad2[2]; | |
ba2d3587 | 1035 | } __packed; |
a66098da | 1036 | |
89a91f4f LB |
1037 | #define MWL8K_STA_RATE_INFO_SHORTPRE 0x8000 |
1038 | #define MWL8K_STA_RATE_INFO_ANTSELECT(x) (((x) >> 11) & 0x3) | |
1039 | #define MWL8K_STA_RATE_INFO_RATEID(x) (((x) >> 3) & 0x3f) | |
1040 | #define MWL8K_STA_RATE_INFO_40MHZ 0x0004 | |
1041 | #define MWL8K_STA_RATE_INFO_SHORTGI 0x0002 | |
1042 | #define MWL8K_STA_RATE_INFO_MCS_FORMAT 0x0001 | |
54bc3a0d | 1043 | |
89a91f4f | 1044 | #define MWL8K_STA_RX_CTRL_OWNED_BY_HOST 0x02 |
d9a07d49 NS |
1045 | #define MWL8K_STA_RX_CTRL_DECRYPT_ERROR 0x04 |
1046 | /* ICV=0 or MIC=1 */ | |
1047 | #define MWL8K_STA_RX_CTRL_DEC_ERR_TYPE 0x08 | |
1048 | /* Key is uploaded only in failure case */ | |
1049 | #define MWL8K_STA_RX_CTRL_KEY_INDEX 0x30 | |
54bc3a0d | 1050 | |
89a91f4f | 1051 | static void mwl8k_rxd_sta_init(void *_rxd, dma_addr_t next_dma_addr) |
54bc3a0d | 1052 | { |
89a91f4f | 1053 | struct mwl8k_rxd_sta *rxd = _rxd; |
54bc3a0d LB |
1054 | |
1055 | rxd->next_rxd_phys_addr = cpu_to_le32(next_dma_addr); | |
89a91f4f | 1056 | rxd->rx_ctrl = MWL8K_STA_RX_CTRL_OWNED_BY_HOST; |
54bc3a0d LB |
1057 | } |
1058 | ||
89a91f4f | 1059 | static void mwl8k_rxd_sta_refill(void *_rxd, dma_addr_t addr, int len) |
54bc3a0d | 1060 | { |
89a91f4f | 1061 | struct mwl8k_rxd_sta *rxd = _rxd; |
54bc3a0d LB |
1062 | |
1063 | rxd->pkt_len = cpu_to_le16(len); | |
1064 | rxd->pkt_phys_addr = cpu_to_le32(addr); | |
1065 | wmb(); | |
1066 | rxd->rx_ctrl = 0; | |
1067 | } | |
1068 | ||
1069 | static int | |
89a91f4f | 1070 | mwl8k_rxd_sta_process(void *_rxd, struct ieee80211_rx_status *status, |
0d462bbb | 1071 | __le16 *qos, s8 *noise) |
54bc3a0d | 1072 | { |
89a91f4f | 1073 | struct mwl8k_rxd_sta *rxd = _rxd; |
54bc3a0d LB |
1074 | u16 rate_info; |
1075 | ||
89a91f4f | 1076 | if (!(rxd->rx_ctrl & MWL8K_STA_RX_CTRL_OWNED_BY_HOST)) |
54bc3a0d LB |
1077 | return -1; |
1078 | rmb(); | |
1079 | ||
1080 | rate_info = le16_to_cpu(rxd->rate_info); | |
1081 | ||
1082 | memset(status, 0, sizeof(*status)); | |
1083 | ||
1084 | status->signal = -rxd->rssi; | |
0d462bbb | 1085 | *noise = -rxd->noise_level; |
89a91f4f LB |
1086 | status->antenna = MWL8K_STA_RATE_INFO_ANTSELECT(rate_info); |
1087 | status->rate_idx = MWL8K_STA_RATE_INFO_RATEID(rate_info); | |
54bc3a0d | 1088 | |
89a91f4f | 1089 | if (rate_info & MWL8K_STA_RATE_INFO_SHORTPRE) |
54bc3a0d | 1090 | status->flag |= RX_FLAG_SHORTPRE; |
89a91f4f | 1091 | if (rate_info & MWL8K_STA_RATE_INFO_40MHZ) |
54bc3a0d | 1092 | status->flag |= RX_FLAG_40MHZ; |
89a91f4f | 1093 | if (rate_info & MWL8K_STA_RATE_INFO_SHORTGI) |
54bc3a0d | 1094 | status->flag |= RX_FLAG_SHORT_GI; |
89a91f4f | 1095 | if (rate_info & MWL8K_STA_RATE_INFO_MCS_FORMAT) |
54bc3a0d LB |
1096 | status->flag |= RX_FLAG_HT; |
1097 | ||
85478344 LB |
1098 | if (rxd->channel > 14) { |
1099 | status->band = IEEE80211_BAND_5GHZ; | |
1100 | if (!(status->flag & RX_FLAG_HT)) | |
1101 | status->rate_idx -= 5; | |
1102 | } else { | |
1103 | status->band = IEEE80211_BAND_2GHZ; | |
1104 | } | |
59eb21a6 BR |
1105 | status->freq = ieee80211_channel_to_frequency(rxd->channel, |
1106 | status->band); | |
54bc3a0d | 1107 | |
20f09c3d | 1108 | *qos = rxd->qos_control; |
d9a07d49 NS |
1109 | if ((rxd->rx_ctrl & MWL8K_STA_RX_CTRL_DECRYPT_ERROR) && |
1110 | (rxd->rx_ctrl & MWL8K_STA_RX_CTRL_DEC_ERR_TYPE)) | |
1111 | status->flag |= RX_FLAG_MMIC_ERROR; | |
20f09c3d | 1112 | |
54bc3a0d LB |
1113 | return le16_to_cpu(rxd->pkt_len); |
1114 | } | |
1115 | ||
89a91f4f LB |
1116 | static struct rxd_ops rxd_sta_ops = { |
1117 | .rxd_size = sizeof(struct mwl8k_rxd_sta), | |
1118 | .rxd_init = mwl8k_rxd_sta_init, | |
1119 | .rxd_refill = mwl8k_rxd_sta_refill, | |
1120 | .rxd_process = mwl8k_rxd_sta_process, | |
54bc3a0d LB |
1121 | }; |
1122 | ||
1123 | ||
a66098da LB |
1124 | #define MWL8K_RX_DESCS 256 |
1125 | #define MWL8K_RX_MAXSZ 3800 | |
1126 | ||
1127 | static int mwl8k_rxq_init(struct ieee80211_hw *hw, int index) | |
1128 | { | |
1129 | struct mwl8k_priv *priv = hw->priv; | |
1130 | struct mwl8k_rx_queue *rxq = priv->rxq + index; | |
1131 | int size; | |
1132 | int i; | |
1133 | ||
45eb400d LB |
1134 | rxq->rxd_count = 0; |
1135 | rxq->head = 0; | |
1136 | rxq->tail = 0; | |
a66098da | 1137 | |
54bc3a0d | 1138 | size = MWL8K_RX_DESCS * priv->rxd_ops->rxd_size; |
a66098da | 1139 | |
45eb400d LB |
1140 | rxq->rxd = pci_alloc_consistent(priv->pdev, size, &rxq->rxd_dma); |
1141 | if (rxq->rxd == NULL) { | |
5db55844 | 1142 | wiphy_err(hw->wiphy, "failed to alloc RX descriptors\n"); |
a66098da LB |
1143 | return -ENOMEM; |
1144 | } | |
45eb400d | 1145 | memset(rxq->rxd, 0, size); |
a66098da | 1146 | |
b9ede5f1 | 1147 | rxq->buf = kcalloc(MWL8K_RX_DESCS, sizeof(*rxq->buf), GFP_KERNEL); |
788838eb | 1148 | if (rxq->buf == NULL) { |
5db55844 | 1149 | wiphy_err(hw->wiphy, "failed to alloc RX skbuff list\n"); |
45eb400d | 1150 | pci_free_consistent(priv->pdev, size, rxq->rxd, rxq->rxd_dma); |
a66098da LB |
1151 | return -ENOMEM; |
1152 | } | |
a66098da LB |
1153 | |
1154 | for (i = 0; i < MWL8K_RX_DESCS; i++) { | |
54bc3a0d LB |
1155 | int desc_size; |
1156 | void *rxd; | |
a66098da | 1157 | int nexti; |
54bc3a0d LB |
1158 | dma_addr_t next_dma_addr; |
1159 | ||
1160 | desc_size = priv->rxd_ops->rxd_size; | |
1161 | rxd = rxq->rxd + (i * priv->rxd_ops->rxd_size); | |
a66098da | 1162 | |
54bc3a0d LB |
1163 | nexti = i + 1; |
1164 | if (nexti == MWL8K_RX_DESCS) | |
1165 | nexti = 0; | |
1166 | next_dma_addr = rxq->rxd_dma + (nexti * desc_size); | |
a66098da | 1167 | |
54bc3a0d | 1168 | priv->rxd_ops->rxd_init(rxd, next_dma_addr); |
a66098da LB |
1169 | } |
1170 | ||
1171 | return 0; | |
1172 | } | |
1173 | ||
1174 | static int rxq_refill(struct ieee80211_hw *hw, int index, int limit) | |
1175 | { | |
1176 | struct mwl8k_priv *priv = hw->priv; | |
1177 | struct mwl8k_rx_queue *rxq = priv->rxq + index; | |
1178 | int refilled; | |
1179 | ||
1180 | refilled = 0; | |
45eb400d | 1181 | while (rxq->rxd_count < MWL8K_RX_DESCS && limit--) { |
a66098da | 1182 | struct sk_buff *skb; |
788838eb | 1183 | dma_addr_t addr; |
a66098da | 1184 | int rx; |
54bc3a0d | 1185 | void *rxd; |
a66098da LB |
1186 | |
1187 | skb = dev_alloc_skb(MWL8K_RX_MAXSZ); | |
1188 | if (skb == NULL) | |
1189 | break; | |
1190 | ||
788838eb LB |
1191 | addr = pci_map_single(priv->pdev, skb->data, |
1192 | MWL8K_RX_MAXSZ, DMA_FROM_DEVICE); | |
a66098da | 1193 | |
54bc3a0d LB |
1194 | rxq->rxd_count++; |
1195 | rx = rxq->tail++; | |
1196 | if (rxq->tail == MWL8K_RX_DESCS) | |
1197 | rxq->tail = 0; | |
788838eb | 1198 | rxq->buf[rx].skb = skb; |
53b1b3e1 | 1199 | dma_unmap_addr_set(&rxq->buf[rx], dma, addr); |
54bc3a0d LB |
1200 | |
1201 | rxd = rxq->rxd + (rx * priv->rxd_ops->rxd_size); | |
1202 | priv->rxd_ops->rxd_refill(rxd, addr, MWL8K_RX_MAXSZ); | |
a66098da LB |
1203 | |
1204 | refilled++; | |
1205 | } | |
1206 | ||
1207 | return refilled; | |
1208 | } | |
1209 | ||
1210 | /* Must be called only when the card's reception is completely halted */ | |
1211 | static void mwl8k_rxq_deinit(struct ieee80211_hw *hw, int index) | |
1212 | { | |
1213 | struct mwl8k_priv *priv = hw->priv; | |
1214 | struct mwl8k_rx_queue *rxq = priv->rxq + index; | |
1215 | int i; | |
1216 | ||
73b46320 BC |
1217 | if (rxq->rxd == NULL) |
1218 | return; | |
1219 | ||
a66098da | 1220 | for (i = 0; i < MWL8K_RX_DESCS; i++) { |
788838eb LB |
1221 | if (rxq->buf[i].skb != NULL) { |
1222 | pci_unmap_single(priv->pdev, | |
53b1b3e1 | 1223 | dma_unmap_addr(&rxq->buf[i], dma), |
788838eb | 1224 | MWL8K_RX_MAXSZ, PCI_DMA_FROMDEVICE); |
53b1b3e1 | 1225 | dma_unmap_addr_set(&rxq->buf[i], dma, 0); |
788838eb LB |
1226 | |
1227 | kfree_skb(rxq->buf[i].skb); | |
1228 | rxq->buf[i].skb = NULL; | |
a66098da LB |
1229 | } |
1230 | } | |
1231 | ||
788838eb LB |
1232 | kfree(rxq->buf); |
1233 | rxq->buf = NULL; | |
a66098da LB |
1234 | |
1235 | pci_free_consistent(priv->pdev, | |
54bc3a0d | 1236 | MWL8K_RX_DESCS * priv->rxd_ops->rxd_size, |
45eb400d LB |
1237 | rxq->rxd, rxq->rxd_dma); |
1238 | rxq->rxd = NULL; | |
a66098da LB |
1239 | } |
1240 | ||
1241 | ||
1242 | /* | |
1243 | * Scan a list of BSSIDs to process for finalize join. | |
1244 | * Allows for extension to process multiple BSSIDs. | |
1245 | */ | |
1246 | static inline int | |
1247 | mwl8k_capture_bssid(struct mwl8k_priv *priv, struct ieee80211_hdr *wh) | |
1248 | { | |
1249 | return priv->capture_beacon && | |
1250 | ieee80211_is_beacon(wh->frame_control) && | |
2e42e474 | 1251 | ether_addr_equal(wh->addr3, priv->capture_bssid); |
a66098da LB |
1252 | } |
1253 | ||
3779752d LB |
1254 | static inline void mwl8k_save_beacon(struct ieee80211_hw *hw, |
1255 | struct sk_buff *skb) | |
a66098da | 1256 | { |
3779752d LB |
1257 | struct mwl8k_priv *priv = hw->priv; |
1258 | ||
a66098da | 1259 | priv->capture_beacon = false; |
d89173f2 | 1260 | memset(priv->capture_bssid, 0, ETH_ALEN); |
a66098da LB |
1261 | |
1262 | /* | |
1263 | * Use GFP_ATOMIC as rxq_process is called from | |
1264 | * the primary interrupt handler, memory allocation call | |
1265 | * must not sleep. | |
1266 | */ | |
1267 | priv->beacon_skb = skb_copy(skb, GFP_ATOMIC); | |
1268 | if (priv->beacon_skb != NULL) | |
3779752d | 1269 | ieee80211_queue_work(hw, &priv->finalize_join_worker); |
a66098da LB |
1270 | } |
1271 | ||
d9a07d49 NS |
1272 | static inline struct mwl8k_vif *mwl8k_find_vif_bss(struct list_head *vif_list, |
1273 | u8 *bssid) | |
1274 | { | |
1275 | struct mwl8k_vif *mwl8k_vif; | |
1276 | ||
1277 | list_for_each_entry(mwl8k_vif, | |
1278 | vif_list, list) { | |
1279 | if (memcmp(bssid, mwl8k_vif->bssid, | |
1280 | ETH_ALEN) == 0) | |
1281 | return mwl8k_vif; | |
1282 | } | |
1283 | ||
1284 | return NULL; | |
1285 | } | |
1286 | ||
a66098da LB |
1287 | static int rxq_process(struct ieee80211_hw *hw, int index, int limit) |
1288 | { | |
1289 | struct mwl8k_priv *priv = hw->priv; | |
d9a07d49 | 1290 | struct mwl8k_vif *mwl8k_vif = NULL; |
a66098da LB |
1291 | struct mwl8k_rx_queue *rxq = priv->rxq + index; |
1292 | int processed; | |
1293 | ||
1294 | processed = 0; | |
45eb400d | 1295 | while (rxq->rxd_count && limit--) { |
a66098da | 1296 | struct sk_buff *skb; |
54bc3a0d LB |
1297 | void *rxd; |
1298 | int pkt_len; | |
a66098da | 1299 | struct ieee80211_rx_status status; |
d9a07d49 | 1300 | struct ieee80211_hdr *wh; |
20f09c3d | 1301 | __le16 qos; |
a66098da | 1302 | |
788838eb | 1303 | skb = rxq->buf[rxq->head].skb; |
d25f9f13 LB |
1304 | if (skb == NULL) |
1305 | break; | |
54bc3a0d LB |
1306 | |
1307 | rxd = rxq->rxd + (rxq->head * priv->rxd_ops->rxd_size); | |
1308 | ||
0d462bbb JL |
1309 | pkt_len = priv->rxd_ops->rxd_process(rxd, &status, &qos, |
1310 | &priv->noise); | |
54bc3a0d LB |
1311 | if (pkt_len < 0) |
1312 | break; | |
1313 | ||
788838eb LB |
1314 | rxq->buf[rxq->head].skb = NULL; |
1315 | ||
1316 | pci_unmap_single(priv->pdev, | |
53b1b3e1 | 1317 | dma_unmap_addr(&rxq->buf[rxq->head], dma), |
788838eb | 1318 | MWL8K_RX_MAXSZ, PCI_DMA_FROMDEVICE); |
53b1b3e1 | 1319 | dma_unmap_addr_set(&rxq->buf[rxq->head], dma, 0); |
a66098da | 1320 | |
54bc3a0d LB |
1321 | rxq->head++; |
1322 | if (rxq->head == MWL8K_RX_DESCS) | |
1323 | rxq->head = 0; | |
1324 | ||
45eb400d | 1325 | rxq->rxd_count--; |
a66098da | 1326 | |
d9a07d49 | 1327 | wh = &((struct mwl8k_dma_data *)skb->data)->wh; |
a66098da | 1328 | |
a66098da | 1329 | /* |
c2c357ce LB |
1330 | * Check for a pending join operation. Save a |
1331 | * copy of the beacon and schedule a tasklet to | |
1332 | * send a FINALIZE_JOIN command to the firmware. | |
a66098da | 1333 | */ |
54bc3a0d | 1334 | if (mwl8k_capture_bssid(priv, (void *)skb->data)) |
3779752d | 1335 | mwl8k_save_beacon(hw, skb); |
a66098da | 1336 | |
d9a07d49 NS |
1337 | if (ieee80211_has_protected(wh->frame_control)) { |
1338 | ||
1339 | /* Check if hw crypto has been enabled for | |
1340 | * this bss. If yes, set the status flags | |
1341 | * accordingly | |
1342 | */ | |
1343 | mwl8k_vif = mwl8k_find_vif_bss(&priv->vif_list, | |
1344 | wh->addr1); | |
1345 | ||
1346 | if (mwl8k_vif != NULL && | |
23677ce3 | 1347 | mwl8k_vif->is_hw_crypto_enabled) { |
d9a07d49 NS |
1348 | /* |
1349 | * When MMIC ERROR is encountered | |
1350 | * by the firmware, payload is | |
1351 | * dropped and only 32 bytes of | |
1352 | * mwl8k Firmware header is sent | |
1353 | * to the host. | |
1354 | * | |
1355 | * We need to add four bytes of | |
1356 | * key information. In it | |
1357 | * MAC80211 expects keyidx set to | |
1358 | * 0 for triggering Counter | |
1359 | * Measure of MMIC failure. | |
1360 | */ | |
1361 | if (status.flag & RX_FLAG_MMIC_ERROR) { | |
1362 | struct mwl8k_dma_data *tr; | |
1363 | tr = (struct mwl8k_dma_data *)skb->data; | |
1364 | memset((void *)&(tr->data), 0, 4); | |
1365 | pkt_len += 4; | |
1366 | } | |
1367 | ||
1368 | if (!ieee80211_is_auth(wh->frame_control)) | |
1369 | status.flag |= RX_FLAG_IV_STRIPPED | | |
1370 | RX_FLAG_DECRYPTED | | |
1371 | RX_FLAG_MMIC_STRIPPED; | |
1372 | } | |
1373 | } | |
1374 | ||
1375 | skb_put(skb, pkt_len); | |
1376 | mwl8k_remove_dma_header(skb, qos); | |
f1d58c25 JB |
1377 | memcpy(IEEE80211_SKB_RXCB(skb), &status, sizeof(status)); |
1378 | ieee80211_rx_irqsafe(hw, skb); | |
a66098da LB |
1379 | |
1380 | processed++; | |
1381 | } | |
1382 | ||
1383 | return processed; | |
1384 | } | |
1385 | ||
1386 | ||
1387 | /* | |
1388 | * Packet transmission. | |
1389 | */ | |
1390 | ||
a66098da LB |
1391 | #define MWL8K_TXD_STATUS_OK 0x00000001 |
1392 | #define MWL8K_TXD_STATUS_OK_RETRY 0x00000002 | |
1393 | #define MWL8K_TXD_STATUS_OK_MORE_RETRY 0x00000004 | |
1394 | #define MWL8K_TXD_STATUS_MULTICAST_TX 0x00000008 | |
a66098da | 1395 | #define MWL8K_TXD_STATUS_FW_OWNED 0x80000000 |
a66098da | 1396 | |
e0493a8d LB |
1397 | #define MWL8K_QOS_QLEN_UNSPEC 0xff00 |
1398 | #define MWL8K_QOS_ACK_POLICY_MASK 0x0060 | |
1399 | #define MWL8K_QOS_ACK_POLICY_NORMAL 0x0000 | |
1400 | #define MWL8K_QOS_ACK_POLICY_BLOCKACK 0x0060 | |
1401 | #define MWL8K_QOS_EOSP 0x0010 | |
1402 | ||
a66098da LB |
1403 | struct mwl8k_tx_desc { |
1404 | __le32 status; | |
1405 | __u8 data_rate; | |
1406 | __u8 tx_priority; | |
1407 | __le16 qos_control; | |
1408 | __le32 pkt_phys_addr; | |
1409 | __le16 pkt_len; | |
d89173f2 | 1410 | __u8 dest_MAC_addr[ETH_ALEN]; |
45eb400d | 1411 | __le32 next_txd_phys_addr; |
8a7a578c | 1412 | __le32 timestamp; |
a66098da LB |
1413 | __le16 rate_info; |
1414 | __u8 peer_id; | |
a1fe24b0 | 1415 | __u8 tx_frag_cnt; |
ba2d3587 | 1416 | } __packed; |
a66098da LB |
1417 | |
1418 | #define MWL8K_TX_DESCS 128 | |
1419 | ||
1420 | static int mwl8k_txq_init(struct ieee80211_hw *hw, int index) | |
1421 | { | |
1422 | struct mwl8k_priv *priv = hw->priv; | |
1423 | struct mwl8k_tx_queue *txq = priv->txq + index; | |
1424 | int size; | |
1425 | int i; | |
1426 | ||
8ccbc3b8 | 1427 | txq->len = 0; |
45eb400d LB |
1428 | txq->head = 0; |
1429 | txq->tail = 0; | |
a66098da LB |
1430 | |
1431 | size = MWL8K_TX_DESCS * sizeof(struct mwl8k_tx_desc); | |
1432 | ||
45eb400d LB |
1433 | txq->txd = pci_alloc_consistent(priv->pdev, size, &txq->txd_dma); |
1434 | if (txq->txd == NULL) { | |
5db55844 | 1435 | wiphy_err(hw->wiphy, "failed to alloc TX descriptors\n"); |
a66098da LB |
1436 | return -ENOMEM; |
1437 | } | |
45eb400d | 1438 | memset(txq->txd, 0, size); |
a66098da | 1439 | |
b9ede5f1 | 1440 | txq->skb = kcalloc(MWL8K_TX_DESCS, sizeof(*txq->skb), GFP_KERNEL); |
45eb400d | 1441 | if (txq->skb == NULL) { |
5db55844 | 1442 | wiphy_err(hw->wiphy, "failed to alloc TX skbuff list\n"); |
45eb400d | 1443 | pci_free_consistent(priv->pdev, size, txq->txd, txq->txd_dma); |
a66098da LB |
1444 | return -ENOMEM; |
1445 | } | |
a66098da LB |
1446 | |
1447 | for (i = 0; i < MWL8K_TX_DESCS; i++) { | |
1448 | struct mwl8k_tx_desc *tx_desc; | |
1449 | int nexti; | |
1450 | ||
45eb400d | 1451 | tx_desc = txq->txd + i; |
a66098da LB |
1452 | nexti = (i + 1) % MWL8K_TX_DESCS; |
1453 | ||
1454 | tx_desc->status = 0; | |
45eb400d LB |
1455 | tx_desc->next_txd_phys_addr = |
1456 | cpu_to_le32(txq->txd_dma + nexti * sizeof(*tx_desc)); | |
a66098da LB |
1457 | } |
1458 | ||
1459 | return 0; | |
1460 | } | |
1461 | ||
1462 | static inline void mwl8k_tx_start(struct mwl8k_priv *priv) | |
1463 | { | |
1464 | iowrite32(MWL8K_H2A_INT_PPA_READY, | |
1465 | priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS); | |
1466 | iowrite32(MWL8K_H2A_INT_DUMMY, | |
1467 | priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS); | |
1468 | ioread32(priv->regs + MWL8K_HIU_INT_CODE); | |
1469 | } | |
1470 | ||
7e1112d3 | 1471 | static void mwl8k_dump_tx_rings(struct ieee80211_hw *hw) |
a66098da | 1472 | { |
7e1112d3 LB |
1473 | struct mwl8k_priv *priv = hw->priv; |
1474 | int i; | |
1475 | ||
e600707b | 1476 | for (i = 0; i < mwl8k_tx_queues(priv); i++) { |
7e1112d3 LB |
1477 | struct mwl8k_tx_queue *txq = priv->txq + i; |
1478 | int fw_owned = 0; | |
1479 | int drv_owned = 0; | |
1480 | int unused = 0; | |
1481 | int desc; | |
1482 | ||
a66098da | 1483 | for (desc = 0; desc < MWL8K_TX_DESCS; desc++) { |
7e1112d3 LB |
1484 | struct mwl8k_tx_desc *tx_desc = txq->txd + desc; |
1485 | u32 status; | |
a66098da | 1486 | |
7e1112d3 | 1487 | status = le32_to_cpu(tx_desc->status); |
a66098da | 1488 | if (status & MWL8K_TXD_STATUS_FW_OWNED) |
7e1112d3 | 1489 | fw_owned++; |
a66098da | 1490 | else |
7e1112d3 | 1491 | drv_owned++; |
a66098da LB |
1492 | |
1493 | if (tx_desc->pkt_len == 0) | |
7e1112d3 | 1494 | unused++; |
a66098da | 1495 | } |
a66098da | 1496 | |
c96c31e4 JP |
1497 | wiphy_err(hw->wiphy, |
1498 | "txq[%d] len=%d head=%d tail=%d " | |
1499 | "fw_owned=%d drv_owned=%d unused=%d\n", | |
1500 | i, | |
1501 | txq->len, txq->head, txq->tail, | |
1502 | fw_owned, drv_owned, unused); | |
7e1112d3 | 1503 | } |
a66098da LB |
1504 | } |
1505 | ||
618952a7 | 1506 | /* |
88de754a | 1507 | * Must be called with priv->fw_mutex held and tx queues stopped. |
618952a7 | 1508 | */ |
62abd3cf | 1509 | #define MWL8K_TX_WAIT_TIMEOUT_MS 5000 |
7e1112d3 | 1510 | |
950d5b01 | 1511 | static int mwl8k_tx_wait_empty(struct ieee80211_hw *hw) |
a66098da | 1512 | { |
a66098da | 1513 | struct mwl8k_priv *priv = hw->priv; |
88de754a | 1514 | DECLARE_COMPLETION_ONSTACK(tx_wait); |
7e1112d3 LB |
1515 | int retry; |
1516 | int rc; | |
a66098da LB |
1517 | |
1518 | might_sleep(); | |
1519 | ||
6b6accc3 YAP |
1520 | /* Since fw restart is in progress, allow only the firmware |
1521 | * commands from the restart code and block the other | |
1522 | * commands since they are going to fail in any case since | |
1523 | * the firmware has crashed | |
1524 | */ | |
1525 | if (priv->hw_restart_in_progress) { | |
1526 | if (priv->hw_restart_owner == current) | |
1527 | return 0; | |
1528 | else | |
1529 | return -EBUSY; | |
1530 | } | |
1531 | ||
c27a54d3 YAP |
1532 | if (atomic_read(&priv->watchdog_event_pending)) |
1533 | return 0; | |
1534 | ||
7e1112d3 LB |
1535 | /* |
1536 | * The TX queues are stopped at this point, so this test | |
1537 | * doesn't need to take ->tx_lock. | |
1538 | */ | |
1539 | if (!priv->pending_tx_pkts) | |
1540 | return 0; | |
1541 | ||
1542 | retry = 0; | |
1543 | rc = 0; | |
1544 | ||
a66098da | 1545 | spin_lock_bh(&priv->tx_lock); |
7e1112d3 LB |
1546 | priv->tx_wait = &tx_wait; |
1547 | while (!rc) { | |
1548 | int oldcount; | |
1549 | unsigned long timeout; | |
a66098da | 1550 | |
7e1112d3 | 1551 | oldcount = priv->pending_tx_pkts; |
a66098da | 1552 | |
7e1112d3 | 1553 | spin_unlock_bh(&priv->tx_lock); |
88de754a | 1554 | timeout = wait_for_completion_timeout(&tx_wait, |
7e1112d3 | 1555 | msecs_to_jiffies(MWL8K_TX_WAIT_TIMEOUT_MS)); |
c27a54d3 YAP |
1556 | |
1557 | if (atomic_read(&priv->watchdog_event_pending)) { | |
1558 | spin_lock_bh(&priv->tx_lock); | |
1559 | priv->tx_wait = NULL; | |
1560 | spin_unlock_bh(&priv->tx_lock); | |
1561 | return 0; | |
1562 | } | |
1563 | ||
a66098da | 1564 | spin_lock_bh(&priv->tx_lock); |
7e1112d3 LB |
1565 | |
1566 | if (timeout) { | |
1567 | WARN_ON(priv->pending_tx_pkts); | |
ba30c4a5 | 1568 | if (retry) |
c96c31e4 | 1569 | wiphy_notice(hw->wiphy, "tx rings drained\n"); |
7e1112d3 LB |
1570 | break; |
1571 | } | |
1572 | ||
1573 | if (priv->pending_tx_pkts < oldcount) { | |
c96c31e4 JP |
1574 | wiphy_notice(hw->wiphy, |
1575 | "waiting for tx rings to drain (%d -> %d pkts)\n", | |
1576 | oldcount, priv->pending_tx_pkts); | |
7e1112d3 LB |
1577 | retry = 1; |
1578 | continue; | |
1579 | } | |
1580 | ||
a66098da | 1581 | priv->tx_wait = NULL; |
a66098da | 1582 | |
c96c31e4 JP |
1583 | wiphy_err(hw->wiphy, "tx rings stuck for %d ms\n", |
1584 | MWL8K_TX_WAIT_TIMEOUT_MS); | |
7e1112d3 | 1585 | mwl8k_dump_tx_rings(hw); |
6b6accc3 YAP |
1586 | priv->hw_restart_in_progress = true; |
1587 | ieee80211_queue_work(hw, &priv->fw_reload); | |
7e1112d3 LB |
1588 | |
1589 | rc = -ETIMEDOUT; | |
a66098da | 1590 | } |
9b0b11fb | 1591 | priv->tx_wait = NULL; |
7e1112d3 | 1592 | spin_unlock_bh(&priv->tx_lock); |
a66098da | 1593 | |
7e1112d3 | 1594 | return rc; |
a66098da LB |
1595 | } |
1596 | ||
c23b5a69 LB |
1597 | #define MWL8K_TXD_SUCCESS(status) \ |
1598 | ((status) & (MWL8K_TXD_STATUS_OK | \ | |
1599 | MWL8K_TXD_STATUS_OK_RETRY | \ | |
1600 | MWL8K_TXD_STATUS_OK_MORE_RETRY)) | |
a66098da | 1601 | |
a0e7c6cf NS |
1602 | static int mwl8k_tid_queue_mapping(u8 tid) |
1603 | { | |
1604 | BUG_ON(tid > 7); | |
1605 | ||
1606 | switch (tid) { | |
1607 | case 0: | |
1608 | case 3: | |
1609 | return IEEE80211_AC_BE; | |
1610 | break; | |
1611 | case 1: | |
1612 | case 2: | |
1613 | return IEEE80211_AC_BK; | |
1614 | break; | |
1615 | case 4: | |
1616 | case 5: | |
1617 | return IEEE80211_AC_VI; | |
1618 | break; | |
1619 | case 6: | |
1620 | case 7: | |
1621 | return IEEE80211_AC_VO; | |
1622 | break; | |
1623 | default: | |
1624 | return -1; | |
1625 | break; | |
1626 | } | |
1627 | } | |
1628 | ||
17033543 NS |
1629 | /* The firmware will fill in the rate information |
1630 | * for each packet that gets queued in the hardware | |
49adc5ce | 1631 | * and these macros will interpret that info. |
17033543 NS |
1632 | */ |
1633 | ||
49adc5ce JL |
1634 | #define RI_FORMAT(a) (a & 0x0001) |
1635 | #define RI_RATE_ID_MCS(a) ((a & 0x01f8) >> 3) | |
17033543 | 1636 | |
efb7c49a LB |
1637 | static int |
1638 | mwl8k_txq_reclaim(struct ieee80211_hw *hw, int index, int limit, int force) | |
a66098da LB |
1639 | { |
1640 | struct mwl8k_priv *priv = hw->priv; | |
1641 | struct mwl8k_tx_queue *txq = priv->txq + index; | |
efb7c49a | 1642 | int processed; |
a66098da | 1643 | |
efb7c49a | 1644 | processed = 0; |
8ccbc3b8 | 1645 | while (txq->len > 0 && limit--) { |
a66098da | 1646 | int tx; |
a66098da LB |
1647 | struct mwl8k_tx_desc *tx_desc; |
1648 | unsigned long addr; | |
ce9e2e1b | 1649 | int size; |
a66098da LB |
1650 | struct sk_buff *skb; |
1651 | struct ieee80211_tx_info *info; | |
1652 | u32 status; | |
17033543 NS |
1653 | struct ieee80211_sta *sta; |
1654 | struct mwl8k_sta *sta_info = NULL; | |
1655 | u16 rate_info; | |
17033543 | 1656 | struct ieee80211_hdr *wh; |
a66098da | 1657 | |
45eb400d LB |
1658 | tx = txq->head; |
1659 | tx_desc = txq->txd + tx; | |
a66098da LB |
1660 | |
1661 | status = le32_to_cpu(tx_desc->status); | |
1662 | ||
1663 | if (status & MWL8K_TXD_STATUS_FW_OWNED) { | |
1664 | if (!force) | |
1665 | break; | |
1666 | tx_desc->status &= | |
1667 | ~cpu_to_le32(MWL8K_TXD_STATUS_FW_OWNED); | |
1668 | } | |
1669 | ||
45eb400d | 1670 | txq->head = (tx + 1) % MWL8K_TX_DESCS; |
8ccbc3b8 KV |
1671 | BUG_ON(txq->len == 0); |
1672 | txq->len--; | |
a66098da LB |
1673 | priv->pending_tx_pkts--; |
1674 | ||
1675 | addr = le32_to_cpu(tx_desc->pkt_phys_addr); | |
ce9e2e1b | 1676 | size = le16_to_cpu(tx_desc->pkt_len); |
45eb400d LB |
1677 | skb = txq->skb[tx]; |
1678 | txq->skb[tx] = NULL; | |
a66098da LB |
1679 | |
1680 | BUG_ON(skb == NULL); | |
1681 | pci_unmap_single(priv->pdev, addr, size, PCI_DMA_TODEVICE); | |
1682 | ||
20f09c3d | 1683 | mwl8k_remove_dma_header(skb, tx_desc->qos_control); |
a66098da | 1684 | |
17033543 NS |
1685 | wh = (struct ieee80211_hdr *) skb->data; |
1686 | ||
a66098da LB |
1687 | /* Mark descriptor as unused */ |
1688 | tx_desc->pkt_phys_addr = 0; | |
1689 | tx_desc->pkt_len = 0; | |
1690 | ||
a66098da | 1691 | info = IEEE80211_SKB_CB(skb); |
17033543 | 1692 | if (ieee80211_is_data(wh->frame_control)) { |
89e11801 TH |
1693 | rcu_read_lock(); |
1694 | sta = ieee80211_find_sta_by_ifaddr(hw, wh->addr1, | |
1695 | wh->addr2); | |
17033543 NS |
1696 | if (sta) { |
1697 | sta_info = MWL8K_STA(sta); | |
1698 | BUG_ON(sta_info == NULL); | |
1699 | rate_info = le16_to_cpu(tx_desc->rate_info); | |
17033543 NS |
1700 | /* If rate is < 6.5 Mpbs for an ht station |
1701 | * do not form an ampdu. If the station is a | |
1702 | * legacy station (format = 0), do not form an | |
1703 | * ampdu | |
1704 | */ | |
49adc5ce JL |
1705 | if (RI_RATE_ID_MCS(rate_info) < 1 || |
1706 | RI_FORMAT(rate_info) == 0) { | |
17033543 NS |
1707 | sta_info->is_ampdu_allowed = false; |
1708 | } else { | |
1709 | sta_info->is_ampdu_allowed = true; | |
1710 | } | |
1711 | } | |
89e11801 | 1712 | rcu_read_unlock(); |
17033543 NS |
1713 | } |
1714 | ||
a66098da | 1715 | ieee80211_tx_info_clear_status(info); |
0bf22c37 NS |
1716 | |
1717 | /* Rate control is happening in the firmware. | |
1718 | * Ensure no tx rate is being reported. | |
1719 | */ | |
ba30c4a5 YAP |
1720 | info->status.rates[0].idx = -1; |
1721 | info->status.rates[0].count = 1; | |
0bf22c37 | 1722 | |
ce9e2e1b | 1723 | if (MWL8K_TXD_SUCCESS(status)) |
a66098da | 1724 | info->flags |= IEEE80211_TX_STAT_ACK; |
a66098da LB |
1725 | |
1726 | ieee80211_tx_status_irqsafe(hw, skb); | |
1727 | ||
efb7c49a | 1728 | processed++; |
a66098da LB |
1729 | } |
1730 | ||
efb7c49a | 1731 | return processed; |
a66098da LB |
1732 | } |
1733 | ||
1734 | /* must be called only when the card's transmit is completely halted */ | |
1735 | static void mwl8k_txq_deinit(struct ieee80211_hw *hw, int index) | |
1736 | { | |
1737 | struct mwl8k_priv *priv = hw->priv; | |
1738 | struct mwl8k_tx_queue *txq = priv->txq + index; | |
1739 | ||
73b46320 BC |
1740 | if (txq->txd == NULL) |
1741 | return; | |
1742 | ||
efb7c49a | 1743 | mwl8k_txq_reclaim(hw, index, INT_MAX, 1); |
a66098da | 1744 | |
45eb400d LB |
1745 | kfree(txq->skb); |
1746 | txq->skb = NULL; | |
a66098da LB |
1747 | |
1748 | pci_free_consistent(priv->pdev, | |
1749 | MWL8K_TX_DESCS * sizeof(struct mwl8k_tx_desc), | |
45eb400d LB |
1750 | txq->txd, txq->txd_dma); |
1751 | txq->txd = NULL; | |
a66098da LB |
1752 | } |
1753 | ||
ac109fd0 | 1754 | /* caller must hold priv->stream_lock when calling the stream functions */ |
ba30c4a5 | 1755 | static struct mwl8k_ampdu_stream * |
ac109fd0 BC |
1756 | mwl8k_add_stream(struct ieee80211_hw *hw, struct ieee80211_sta *sta, u8 tid) |
1757 | { | |
1758 | struct mwl8k_ampdu_stream *stream; | |
1759 | struct mwl8k_priv *priv = hw->priv; | |
1760 | int i; | |
1761 | ||
7fb978b7 | 1762 | for (i = 0; i < MWL8K_NUM_AMPDU_STREAMS; i++) { |
ac109fd0 BC |
1763 | stream = &priv->ampdu[i]; |
1764 | if (stream->state == AMPDU_NO_STREAM) { | |
1765 | stream->sta = sta; | |
1766 | stream->state = AMPDU_STREAM_NEW; | |
1767 | stream->tid = tid; | |
1768 | stream->idx = i; | |
ac109fd0 BC |
1769 | wiphy_debug(hw->wiphy, "Added a new stream for %pM %d", |
1770 | sta->addr, tid); | |
1771 | return stream; | |
1772 | } | |
1773 | } | |
1774 | return NULL; | |
1775 | } | |
1776 | ||
1777 | static int | |
1778 | mwl8k_start_stream(struct ieee80211_hw *hw, struct mwl8k_ampdu_stream *stream) | |
1779 | { | |
1780 | int ret; | |
1781 | ||
1782 | /* if the stream has already been started, don't start it again */ | |
1783 | if (stream->state != AMPDU_STREAM_NEW) | |
1784 | return 0; | |
1785 | ret = ieee80211_start_tx_ba_session(stream->sta, stream->tid, 0); | |
1786 | if (ret) | |
1787 | wiphy_debug(hw->wiphy, "Failed to start stream for %pM %d: " | |
1788 | "%d\n", stream->sta->addr, stream->tid, ret); | |
1789 | else | |
1790 | wiphy_debug(hw->wiphy, "Started stream for %pM %d\n", | |
1791 | stream->sta->addr, stream->tid); | |
1792 | return ret; | |
1793 | } | |
1794 | ||
1795 | static void | |
1796 | mwl8k_remove_stream(struct ieee80211_hw *hw, struct mwl8k_ampdu_stream *stream) | |
1797 | { | |
1798 | wiphy_debug(hw->wiphy, "Remove stream for %pM %d\n", stream->sta->addr, | |
1799 | stream->tid); | |
1800 | memset(stream, 0, sizeof(*stream)); | |
1801 | } | |
1802 | ||
1803 | static struct mwl8k_ampdu_stream * | |
1804 | mwl8k_lookup_stream(struct ieee80211_hw *hw, u8 *addr, u8 tid) | |
1805 | { | |
1806 | struct mwl8k_priv *priv = hw->priv; | |
1807 | int i; | |
1808 | ||
7fb978b7 | 1809 | for (i = 0; i < MWL8K_NUM_AMPDU_STREAMS; i++) { |
ac109fd0 BC |
1810 | struct mwl8k_ampdu_stream *stream; |
1811 | stream = &priv->ampdu[i]; | |
1812 | if (stream->state == AMPDU_NO_STREAM) | |
1813 | continue; | |
1814 | if (!memcmp(stream->sta->addr, addr, ETH_ALEN) && | |
1815 | stream->tid == tid) | |
1816 | return stream; | |
1817 | } | |
1818 | return NULL; | |
1819 | } | |
1820 | ||
d0805c1c BC |
1821 | #define MWL8K_AMPDU_PACKET_THRESHOLD 64 |
1822 | static inline bool mwl8k_ampdu_allowed(struct ieee80211_sta *sta, u8 tid) | |
1823 | { | |
1824 | struct mwl8k_sta *sta_info = MWL8K_STA(sta); | |
1825 | struct tx_traffic_info *tx_stats; | |
1826 | ||
1827 | BUG_ON(tid >= MWL8K_MAX_TID); | |
1828 | tx_stats = &sta_info->tx_stats[tid]; | |
1829 | ||
1830 | return sta_info->is_ampdu_allowed && | |
1831 | tx_stats->pkts > MWL8K_AMPDU_PACKET_THRESHOLD; | |
1832 | } | |
1833 | ||
1834 | static inline void mwl8k_tx_count_packet(struct ieee80211_sta *sta, u8 tid) | |
1835 | { | |
1836 | struct mwl8k_sta *sta_info = MWL8K_STA(sta); | |
1837 | struct tx_traffic_info *tx_stats; | |
1838 | ||
1839 | BUG_ON(tid >= MWL8K_MAX_TID); | |
1840 | tx_stats = &sta_info->tx_stats[tid]; | |
1841 | ||
1842 | if (tx_stats->start_time == 0) | |
1843 | tx_stats->start_time = jiffies; | |
1844 | ||
1845 | /* reset the packet count after each second elapses. If the number of | |
1846 | * packets ever exceeds the ampdu_min_traffic threshold, we will allow | |
1847 | * an ampdu stream to be started. | |
1848 | */ | |
1849 | if (jiffies - tx_stats->start_time > HZ) { | |
1850 | tx_stats->pkts = 0; | |
1851 | tx_stats->start_time = 0; | |
1852 | } else | |
1853 | tx_stats->pkts++; | |
1854 | } | |
1855 | ||
7fb978b7 YAP |
1856 | /* The hardware ampdu queues start from 5. |
1857 | * txpriorities for ampdu queues are | |
1858 | * 5 6 7 0 1 2 3 4 ie., queue 5 is highest | |
1859 | * and queue 3 is lowest (queue 4 is reserved) | |
1860 | */ | |
1861 | #define BA_QUEUE 5 | |
1862 | ||
7bb45683 | 1863 | static void |
36323f81 TH |
1864 | mwl8k_txq_xmit(struct ieee80211_hw *hw, |
1865 | int index, | |
1866 | struct ieee80211_sta *sta, | |
1867 | struct sk_buff *skb) | |
a66098da LB |
1868 | { |
1869 | struct mwl8k_priv *priv = hw->priv; | |
1870 | struct ieee80211_tx_info *tx_info; | |
23b33906 | 1871 | struct mwl8k_vif *mwl8k_vif; |
a66098da LB |
1872 | struct ieee80211_hdr *wh; |
1873 | struct mwl8k_tx_queue *txq; | |
1874 | struct mwl8k_tx_desc *tx; | |
a66098da | 1875 | dma_addr_t dma; |
23b33906 LB |
1876 | u32 txstatus; |
1877 | u8 txdatarate; | |
1878 | u16 qos; | |
65f3ddcd NS |
1879 | int txpriority; |
1880 | u8 tid = 0; | |
1881 | struct mwl8k_ampdu_stream *stream = NULL; | |
1882 | bool start_ba_session = false; | |
3a769888 | 1883 | bool mgmtframe = false; |
a0e7c6cf | 1884 | struct ieee80211_mgmt *mgmt = (struct ieee80211_mgmt *)skb->data; |
e1f4d69b | 1885 | bool eapol_frame = false; |
a66098da | 1886 | |
23b33906 LB |
1887 | wh = (struct ieee80211_hdr *)skb->data; |
1888 | if (ieee80211_is_data_qos(wh->frame_control)) | |
1889 | qos = le16_to_cpu(*((__le16 *)ieee80211_get_qos_ctl(wh))); | |
1890 | else | |
1891 | qos = 0; | |
a66098da | 1892 | |
e1f4d69b NS |
1893 | if (skb->protocol == cpu_to_be16(ETH_P_PAE)) |
1894 | eapol_frame = true; | |
1895 | ||
3a769888 NS |
1896 | if (ieee80211_is_mgmt(wh->frame_control)) |
1897 | mgmtframe = true; | |
1898 | ||
d9a07d49 | 1899 | if (priv->ap_fw) |
ff776cec | 1900 | mwl8k_encapsulate_tx_frame(priv, skb); |
d9a07d49 | 1901 | else |
e4eefec7 | 1902 | mwl8k_add_dma_header(priv, skb, 0, 0); |
d9a07d49 | 1903 | |
23b33906 | 1904 | wh = &((struct mwl8k_dma_data *)skb->data)->wh; |
a66098da LB |
1905 | |
1906 | tx_info = IEEE80211_SKB_CB(skb); | |
1907 | mwl8k_vif = MWL8K_VIF(tx_info->control.vif); | |
a66098da LB |
1908 | |
1909 | if (tx_info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) { | |
a66098da | 1910 | wh->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG); |
657232b6 LB |
1911 | wh->seq_ctrl |= cpu_to_le16(mwl8k_vif->seqno); |
1912 | mwl8k_vif->seqno += 0x10; | |
a66098da LB |
1913 | } |
1914 | ||
23b33906 LB |
1915 | /* Setup firmware control bit fields for each frame type. */ |
1916 | txstatus = 0; | |
1917 | txdatarate = 0; | |
1918 | if (ieee80211_is_mgmt(wh->frame_control) || | |
1919 | ieee80211_is_ctl(wh->frame_control)) { | |
1920 | txdatarate = 0; | |
e0493a8d | 1921 | qos |= MWL8K_QOS_QLEN_UNSPEC | MWL8K_QOS_EOSP; |
23b33906 LB |
1922 | } else if (ieee80211_is_data(wh->frame_control)) { |
1923 | txdatarate = 1; | |
1924 | if (is_multicast_ether_addr(wh->addr1)) | |
1925 | txstatus |= MWL8K_TXD_STATUS_MULTICAST_TX; | |
1926 | ||
e0493a8d | 1927 | qos &= ~MWL8K_QOS_ACK_POLICY_MASK; |
23b33906 | 1928 | if (tx_info->flags & IEEE80211_TX_CTL_AMPDU) |
e0493a8d | 1929 | qos |= MWL8K_QOS_ACK_POLICY_BLOCKACK; |
23b33906 | 1930 | else |
e0493a8d | 1931 | qos |= MWL8K_QOS_ACK_POLICY_NORMAL; |
23b33906 | 1932 | } |
a66098da | 1933 | |
a0e7c6cf NS |
1934 | /* Queue ADDBA request in the respective data queue. While setting up |
1935 | * the ampdu stream, mac80211 queues further packets for that | |
1936 | * particular ra/tid pair. However, packets piled up in the hardware | |
1937 | * for that ra/tid pair will still go out. ADDBA request and the | |
1938 | * related data packets going out from different queues asynchronously | |
1939 | * will cause a shift in the receiver window which might result in | |
1940 | * ampdu packets getting dropped at the receiver after the stream has | |
1941 | * been setup. | |
1942 | */ | |
1943 | if (unlikely(ieee80211_is_action(wh->frame_control) && | |
1944 | mgmt->u.action.category == WLAN_CATEGORY_BACK && | |
1945 | mgmt->u.action.u.addba_req.action_code == WLAN_ACTION_ADDBA_REQ && | |
1946 | priv->ap_fw)) { | |
1947 | u16 capab = le16_to_cpu(mgmt->u.action.u.addba_req.capab); | |
1948 | tid = (capab & IEEE80211_ADDBA_PARAM_TID_MASK) >> 2; | |
1949 | index = mwl8k_tid_queue_mapping(tid); | |
1950 | } | |
1951 | ||
65f3ddcd NS |
1952 | txpriority = index; |
1953 | ||
e1f4d69b NS |
1954 | if (priv->ap_fw && sta && sta->ht_cap.ht_supported && !eapol_frame && |
1955 | ieee80211_is_data_qos(wh->frame_control)) { | |
65f3ddcd | 1956 | tid = qos & 0xf; |
d0805c1c | 1957 | mwl8k_tx_count_packet(sta, tid); |
65f3ddcd NS |
1958 | spin_lock(&priv->stream_lock); |
1959 | stream = mwl8k_lookup_stream(hw, sta->addr, tid); | |
1960 | if (stream != NULL) { | |
1961 | if (stream->state == AMPDU_STREAM_ACTIVE) { | |
5f2a1494 | 1962 | WARN_ON(!(qos & MWL8K_QOS_ACK_POLICY_BLOCKACK)); |
7fb978b7 YAP |
1963 | txpriority = (BA_QUEUE + stream->idx) % |
1964 | TOTAL_HW_TX_QUEUES; | |
1965 | if (stream->idx <= 1) | |
1966 | index = stream->idx + | |
1967 | MWL8K_TX_WMM_QUEUES; | |
1968 | ||
65f3ddcd NS |
1969 | } else if (stream->state == AMPDU_STREAM_NEW) { |
1970 | /* We get here if the driver sends us packets | |
1971 | * after we've initiated a stream, but before | |
1972 | * our ampdu_action routine has been called | |
1973 | * with IEEE80211_AMPDU_TX_START to get the SSN | |
1974 | * for the ADDBA request. So this packet can | |
1975 | * go out with no risk of sequence number | |
1976 | * mismatch. No special handling is required. | |
1977 | */ | |
1978 | } else { | |
1979 | /* Drop packets that would go out after the | |
1980 | * ADDBA request was sent but before the ADDBA | |
1981 | * response is received. If we don't do this, | |
1982 | * the recipient would probably receive it | |
1983 | * after the ADDBA request with SSN 0. This | |
1984 | * will cause the recipient's BA receive window | |
1985 | * to shift, which would cause the subsequent | |
1986 | * packets in the BA stream to be discarded. | |
1987 | * mac80211 queues our packets for us in this | |
1988 | * case, so this is really just a safety check. | |
1989 | */ | |
1990 | wiphy_warn(hw->wiphy, | |
1991 | "Cannot send packet while ADDBA " | |
1992 | "dialog is underway.\n"); | |
1993 | spin_unlock(&priv->stream_lock); | |
1994 | dev_kfree_skb(skb); | |
1995 | return; | |
1996 | } | |
1997 | } else { | |
1998 | /* Defer calling mwl8k_start_stream so that the current | |
1999 | * skb can go out before the ADDBA request. This | |
2000 | * prevents sequence number mismatch at the recepient | |
2001 | * as described above. | |
2002 | */ | |
d0805c1c | 2003 | if (mwl8k_ampdu_allowed(sta, tid)) { |
17033543 NS |
2004 | stream = mwl8k_add_stream(hw, sta, tid); |
2005 | if (stream != NULL) | |
2006 | start_ba_session = true; | |
2007 | } | |
65f3ddcd NS |
2008 | } |
2009 | spin_unlock(&priv->stream_lock); | |
5f2a1494 YAP |
2010 | } else { |
2011 | qos &= ~MWL8K_QOS_ACK_POLICY_MASK; | |
2012 | qos |= MWL8K_QOS_ACK_POLICY_NORMAL; | |
65f3ddcd NS |
2013 | } |
2014 | ||
a66098da LB |
2015 | dma = pci_map_single(priv->pdev, skb->data, |
2016 | skb->len, PCI_DMA_TODEVICE); | |
2017 | ||
2018 | if (pci_dma_mapping_error(priv->pdev, dma)) { | |
c96c31e4 JP |
2019 | wiphy_debug(hw->wiphy, |
2020 | "failed to dma map skb, dropping TX frame.\n"); | |
65f3ddcd NS |
2021 | if (start_ba_session) { |
2022 | spin_lock(&priv->stream_lock); | |
2023 | mwl8k_remove_stream(hw, stream); | |
2024 | spin_unlock(&priv->stream_lock); | |
2025 | } | |
23b33906 | 2026 | dev_kfree_skb(skb); |
7bb45683 | 2027 | return; |
a66098da LB |
2028 | } |
2029 | ||
23b33906 | 2030 | spin_lock_bh(&priv->tx_lock); |
a66098da | 2031 | |
23b33906 | 2032 | txq = priv->txq + index; |
a66098da | 2033 | |
3a769888 NS |
2034 | /* Mgmt frames that go out frequently are probe |
2035 | * responses. Other mgmt frames got out relatively | |
2036 | * infrequently. Hence reserve 2 buffers so that | |
2037 | * other mgmt frames do not get dropped due to an | |
2038 | * already queued probe response in one of the | |
2039 | * reserved buffers. | |
2040 | */ | |
2041 | ||
2042 | if (txq->len >= MWL8K_TX_DESCS - 2) { | |
23677ce3 | 2043 | if (!mgmtframe || txq->len == MWL8K_TX_DESCS) { |
3a769888 NS |
2044 | if (start_ba_session) { |
2045 | spin_lock(&priv->stream_lock); | |
2046 | mwl8k_remove_stream(hw, stream); | |
2047 | spin_unlock(&priv->stream_lock); | |
2048 | } | |
2049 | spin_unlock_bh(&priv->tx_lock); | |
ff7aa96f NS |
2050 | pci_unmap_single(priv->pdev, dma, skb->len, |
2051 | PCI_DMA_TODEVICE); | |
3a769888 NS |
2052 | dev_kfree_skb(skb); |
2053 | return; | |
3a7dbc3b | 2054 | } |
65f3ddcd NS |
2055 | } |
2056 | ||
45eb400d LB |
2057 | BUG_ON(txq->skb[txq->tail] != NULL); |
2058 | txq->skb[txq->tail] = skb; | |
a66098da | 2059 | |
45eb400d | 2060 | tx = txq->txd + txq->tail; |
23b33906 | 2061 | tx->data_rate = txdatarate; |
65f3ddcd | 2062 | tx->tx_priority = txpriority; |
a66098da | 2063 | tx->qos_control = cpu_to_le16(qos); |
a66098da LB |
2064 | tx->pkt_phys_addr = cpu_to_le32(dma); |
2065 | tx->pkt_len = cpu_to_le16(skb->len); | |
23b33906 | 2066 | tx->rate_info = 0; |
36323f81 TH |
2067 | if (!priv->ap_fw && sta != NULL) |
2068 | tx->peer_id = MWL8K_STA(sta)->peer_id; | |
a680400e LB |
2069 | else |
2070 | tx->peer_id = 0; | |
566875db | 2071 | |
e1f4d69b | 2072 | if (priv->ap_fw && ieee80211_is_data(wh->frame_control) && !eapol_frame) |
566875db PN |
2073 | tx->timestamp = cpu_to_le32(ioread32(priv->regs + |
2074 | MWL8K_HW_TIMER_REGISTER)); | |
b8d9e572 NS |
2075 | else |
2076 | tx->timestamp = 0; | |
566875db | 2077 | |
a66098da | 2078 | wmb(); |
23b33906 LB |
2079 | tx->status = cpu_to_le32(MWL8K_TXD_STATUS_FW_OWNED | txstatus); |
2080 | ||
8ccbc3b8 | 2081 | txq->len++; |
a66098da | 2082 | priv->pending_tx_pkts++; |
a66098da | 2083 | |
45eb400d LB |
2084 | txq->tail++; |
2085 | if (txq->tail == MWL8K_TX_DESCS) | |
2086 | txq->tail = 0; | |
23b33906 | 2087 | |
23b33906 | 2088 | mwl8k_tx_start(priv); |
a66098da LB |
2089 | |
2090 | spin_unlock_bh(&priv->tx_lock); | |
65f3ddcd NS |
2091 | |
2092 | /* Initiate the ampdu session here */ | |
2093 | if (start_ba_session) { | |
2094 | spin_lock(&priv->stream_lock); | |
2095 | if (mwl8k_start_stream(hw, stream)) | |
2096 | mwl8k_remove_stream(hw, stream); | |
2097 | spin_unlock(&priv->stream_lock); | |
2098 | } | |
a66098da LB |
2099 | } |
2100 | ||
2101 | ||
618952a7 LB |
2102 | /* |
2103 | * Firmware access. | |
2104 | * | |
2105 | * We have the following requirements for issuing firmware commands: | |
2106 | * - Some commands require that the packet transmit path is idle when | |
2107 | * the command is issued. (For simplicity, we'll just quiesce the | |
2108 | * transmit path for every command.) | |
2109 | * - There are certain sequences of commands that need to be issued to | |
2110 | * the hardware sequentially, with no other intervening commands. | |
2111 | * | |
2112 | * This leads to an implementation of a "firmware lock" as a mutex that | |
2113 | * can be taken recursively, and which is taken by both the low-level | |
2114 | * command submission function (mwl8k_post_cmd) as well as any users of | |
2115 | * that function that require issuing of an atomic sequence of commands, | |
2116 | * and quiesces the transmit path whenever it's taken. | |
2117 | */ | |
2118 | static int mwl8k_fw_lock(struct ieee80211_hw *hw) | |
2119 | { | |
2120 | struct mwl8k_priv *priv = hw->priv; | |
2121 | ||
2122 | if (priv->fw_mutex_owner != current) { | |
2123 | int rc; | |
2124 | ||
2125 | mutex_lock(&priv->fw_mutex); | |
2126 | ieee80211_stop_queues(hw); | |
2127 | ||
2128 | rc = mwl8k_tx_wait_empty(hw); | |
2129 | if (rc) { | |
6b6accc3 YAP |
2130 | if (!priv->hw_restart_in_progress) |
2131 | ieee80211_wake_queues(hw); | |
2132 | ||
618952a7 LB |
2133 | mutex_unlock(&priv->fw_mutex); |
2134 | ||
2135 | return rc; | |
2136 | } | |
2137 | ||
2138 | priv->fw_mutex_owner = current; | |
2139 | } | |
2140 | ||
2141 | priv->fw_mutex_depth++; | |
2142 | ||
2143 | return 0; | |
2144 | } | |
2145 | ||
2146 | static void mwl8k_fw_unlock(struct ieee80211_hw *hw) | |
2147 | { | |
2148 | struct mwl8k_priv *priv = hw->priv; | |
2149 | ||
2150 | if (!--priv->fw_mutex_depth) { | |
6b6accc3 YAP |
2151 | if (!priv->hw_restart_in_progress) |
2152 | ieee80211_wake_queues(hw); | |
2153 | ||
618952a7 LB |
2154 | priv->fw_mutex_owner = NULL; |
2155 | mutex_unlock(&priv->fw_mutex); | |
2156 | } | |
2157 | } | |
2158 | ||
2159 | ||
a66098da LB |
2160 | /* |
2161 | * Command processing. | |
2162 | */ | |
2163 | ||
0c9cc640 LB |
2164 | /* Timeout firmware commands after 10s */ |
2165 | #define MWL8K_CMD_TIMEOUT_MS 10000 | |
a66098da LB |
2166 | |
2167 | static int mwl8k_post_cmd(struct ieee80211_hw *hw, struct mwl8k_cmd_pkt *cmd) | |
2168 | { | |
2169 | DECLARE_COMPLETION_ONSTACK(cmd_wait); | |
2170 | struct mwl8k_priv *priv = hw->priv; | |
2171 | void __iomem *regs = priv->regs; | |
2172 | dma_addr_t dma_addr; | |
2173 | unsigned int dma_size; | |
2174 | int rc; | |
a66098da LB |
2175 | unsigned long timeout = 0; |
2176 | u8 buf[32]; | |
2177 | ||
b603742f | 2178 | cmd->result = (__force __le16) 0xffff; |
a66098da LB |
2179 | dma_size = le16_to_cpu(cmd->length); |
2180 | dma_addr = pci_map_single(priv->pdev, cmd, dma_size, | |
2181 | PCI_DMA_BIDIRECTIONAL); | |
2182 | if (pci_dma_mapping_error(priv->pdev, dma_addr)) | |
2183 | return -ENOMEM; | |
2184 | ||
618952a7 | 2185 | rc = mwl8k_fw_lock(hw); |
39a1e42e LB |
2186 | if (rc) { |
2187 | pci_unmap_single(priv->pdev, dma_addr, dma_size, | |
2188 | PCI_DMA_BIDIRECTIONAL); | |
618952a7 | 2189 | return rc; |
39a1e42e | 2190 | } |
a66098da | 2191 | |
a66098da LB |
2192 | priv->hostcmd_wait = &cmd_wait; |
2193 | iowrite32(dma_addr, regs + MWL8K_HIU_GEN_PTR); | |
2194 | iowrite32(MWL8K_H2A_INT_DOORBELL, | |
2195 | regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS); | |
2196 | iowrite32(MWL8K_H2A_INT_DUMMY, | |
2197 | regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS); | |
a66098da LB |
2198 | |
2199 | timeout = wait_for_completion_timeout(&cmd_wait, | |
2200 | msecs_to_jiffies(MWL8K_CMD_TIMEOUT_MS)); | |
2201 | ||
618952a7 LB |
2202 | priv->hostcmd_wait = NULL; |
2203 | ||
2204 | mwl8k_fw_unlock(hw); | |
2205 | ||
37055bd4 LB |
2206 | pci_unmap_single(priv->pdev, dma_addr, dma_size, |
2207 | PCI_DMA_BIDIRECTIONAL); | |
2208 | ||
a66098da | 2209 | if (!timeout) { |
5db55844 | 2210 | wiphy_err(hw->wiphy, "Command %s timeout after %u ms\n", |
c96c31e4 JP |
2211 | mwl8k_cmd_name(cmd->code, buf, sizeof(buf)), |
2212 | MWL8K_CMD_TIMEOUT_MS); | |
a66098da LB |
2213 | rc = -ETIMEDOUT; |
2214 | } else { | |
0c9cc640 LB |
2215 | int ms; |
2216 | ||
2217 | ms = MWL8K_CMD_TIMEOUT_MS - jiffies_to_msecs(timeout); | |
2218 | ||
ce9e2e1b | 2219 | rc = cmd->result ? -EINVAL : 0; |
a66098da | 2220 | if (rc) |
5db55844 | 2221 | wiphy_err(hw->wiphy, "Command %s error 0x%x\n", |
c96c31e4 JP |
2222 | mwl8k_cmd_name(cmd->code, buf, sizeof(buf)), |
2223 | le16_to_cpu(cmd->result)); | |
0c9cc640 | 2224 | else if (ms > 2000) |
5db55844 | 2225 | wiphy_notice(hw->wiphy, "Command %s took %d ms\n", |
c96c31e4 JP |
2226 | mwl8k_cmd_name(cmd->code, |
2227 | buf, sizeof(buf)), | |
2228 | ms); | |
a66098da LB |
2229 | } |
2230 | ||
a66098da LB |
2231 | return rc; |
2232 | } | |
2233 | ||
f57ca9c1 LB |
2234 | static int mwl8k_post_pervif_cmd(struct ieee80211_hw *hw, |
2235 | struct ieee80211_vif *vif, | |
2236 | struct mwl8k_cmd_pkt *cmd) | |
2237 | { | |
2238 | if (vif != NULL) | |
2239 | cmd->macid = MWL8K_VIF(vif)->macid; | |
2240 | return mwl8k_post_cmd(hw, cmd); | |
2241 | } | |
2242 | ||
1349ad2f LB |
2243 | /* |
2244 | * Setup code shared between STA and AP firmware images. | |
2245 | */ | |
2246 | static void mwl8k_setup_2ghz_band(struct ieee80211_hw *hw) | |
2247 | { | |
2248 | struct mwl8k_priv *priv = hw->priv; | |
2249 | ||
2250 | BUILD_BUG_ON(sizeof(priv->channels_24) != sizeof(mwl8k_channels_24)); | |
2251 | memcpy(priv->channels_24, mwl8k_channels_24, sizeof(mwl8k_channels_24)); | |
2252 | ||
2253 | BUILD_BUG_ON(sizeof(priv->rates_24) != sizeof(mwl8k_rates_24)); | |
2254 | memcpy(priv->rates_24, mwl8k_rates_24, sizeof(mwl8k_rates_24)); | |
2255 | ||
2256 | priv->band_24.band = IEEE80211_BAND_2GHZ; | |
2257 | priv->band_24.channels = priv->channels_24; | |
2258 | priv->band_24.n_channels = ARRAY_SIZE(mwl8k_channels_24); | |
2259 | priv->band_24.bitrates = priv->rates_24; | |
2260 | priv->band_24.n_bitrates = ARRAY_SIZE(mwl8k_rates_24); | |
2261 | ||
2262 | hw->wiphy->bands[IEEE80211_BAND_2GHZ] = &priv->band_24; | |
2263 | } | |
2264 | ||
4eae9edd LB |
2265 | static void mwl8k_setup_5ghz_band(struct ieee80211_hw *hw) |
2266 | { | |
2267 | struct mwl8k_priv *priv = hw->priv; | |
2268 | ||
2269 | BUILD_BUG_ON(sizeof(priv->channels_50) != sizeof(mwl8k_channels_50)); | |
2270 | memcpy(priv->channels_50, mwl8k_channels_50, sizeof(mwl8k_channels_50)); | |
2271 | ||
2272 | BUILD_BUG_ON(sizeof(priv->rates_50) != sizeof(mwl8k_rates_50)); | |
2273 | memcpy(priv->rates_50, mwl8k_rates_50, sizeof(mwl8k_rates_50)); | |
2274 | ||
2275 | priv->band_50.band = IEEE80211_BAND_5GHZ; | |
2276 | priv->band_50.channels = priv->channels_50; | |
2277 | priv->band_50.n_channels = ARRAY_SIZE(mwl8k_channels_50); | |
2278 | priv->band_50.bitrates = priv->rates_50; | |
2279 | priv->band_50.n_bitrates = ARRAY_SIZE(mwl8k_rates_50); | |
2280 | ||
2281 | hw->wiphy->bands[IEEE80211_BAND_5GHZ] = &priv->band_50; | |
2282 | } | |
2283 | ||
a66098da | 2284 | /* |
04b147b1 | 2285 | * CMD_GET_HW_SPEC (STA version). |
a66098da | 2286 | */ |
04b147b1 | 2287 | struct mwl8k_cmd_get_hw_spec_sta { |
a66098da LB |
2288 | struct mwl8k_cmd_pkt header; |
2289 | __u8 hw_rev; | |
2290 | __u8 host_interface; | |
2291 | __le16 num_mcaddrs; | |
d89173f2 | 2292 | __u8 perm_addr[ETH_ALEN]; |
a66098da LB |
2293 | __le16 region_code; |
2294 | __le32 fw_rev; | |
2295 | __le32 ps_cookie; | |
2296 | __le32 caps; | |
2297 | __u8 mcs_bitmap[16]; | |
2298 | __le32 rx_queue_ptr; | |
2299 | __le32 num_tx_queues; | |
e600707b | 2300 | __le32 tx_queue_ptrs[MWL8K_TX_WMM_QUEUES]; |
a66098da LB |
2301 | __le32 caps2; |
2302 | __le32 num_tx_desc_per_queue; | |
45eb400d | 2303 | __le32 total_rxd; |
ba2d3587 | 2304 | } __packed; |
a66098da | 2305 | |
341c9791 LB |
2306 | #define MWL8K_CAP_MAX_AMSDU 0x20000000 |
2307 | #define MWL8K_CAP_GREENFIELD 0x08000000 | |
2308 | #define MWL8K_CAP_AMPDU 0x04000000 | |
2309 | #define MWL8K_CAP_RX_STBC 0x01000000 | |
2310 | #define MWL8K_CAP_TX_STBC 0x00800000 | |
2311 | #define MWL8K_CAP_SHORTGI_40MHZ 0x00400000 | |
2312 | #define MWL8K_CAP_SHORTGI_20MHZ 0x00200000 | |
2313 | #define MWL8K_CAP_RX_ANTENNA_MASK 0x000e0000 | |
2314 | #define MWL8K_CAP_TX_ANTENNA_MASK 0x0001c000 | |
2315 | #define MWL8K_CAP_DELAY_BA 0x00003000 | |
2316 | #define MWL8K_CAP_MIMO 0x00000200 | |
2317 | #define MWL8K_CAP_40MHZ 0x00000100 | |
06953235 LB |
2318 | #define MWL8K_CAP_BAND_MASK 0x00000007 |
2319 | #define MWL8K_CAP_5GHZ 0x00000004 | |
2320 | #define MWL8K_CAP_2GHZ4 0x00000001 | |
341c9791 | 2321 | |
06953235 LB |
2322 | static void |
2323 | mwl8k_set_ht_caps(struct ieee80211_hw *hw, | |
2324 | struct ieee80211_supported_band *band, u32 cap) | |
341c9791 | 2325 | { |
341c9791 LB |
2326 | int rx_streams; |
2327 | int tx_streams; | |
2328 | ||
777ad375 | 2329 | band->ht_cap.ht_supported = 1; |
341c9791 LB |
2330 | |
2331 | if (cap & MWL8K_CAP_MAX_AMSDU) | |
777ad375 | 2332 | band->ht_cap.cap |= IEEE80211_HT_CAP_MAX_AMSDU; |
341c9791 | 2333 | if (cap & MWL8K_CAP_GREENFIELD) |
777ad375 | 2334 | band->ht_cap.cap |= IEEE80211_HT_CAP_GRN_FLD; |
341c9791 LB |
2335 | if (cap & MWL8K_CAP_AMPDU) { |
2336 | hw->flags |= IEEE80211_HW_AMPDU_AGGREGATION; | |
777ad375 LB |
2337 | band->ht_cap.ampdu_factor = IEEE80211_HT_MAX_AMPDU_64K; |
2338 | band->ht_cap.ampdu_density = IEEE80211_HT_MPDU_DENSITY_NONE; | |
341c9791 LB |
2339 | } |
2340 | if (cap & MWL8K_CAP_RX_STBC) | |
777ad375 | 2341 | band->ht_cap.cap |= IEEE80211_HT_CAP_RX_STBC; |
341c9791 | 2342 | if (cap & MWL8K_CAP_TX_STBC) |
777ad375 | 2343 | band->ht_cap.cap |= IEEE80211_HT_CAP_TX_STBC; |
341c9791 | 2344 | if (cap & MWL8K_CAP_SHORTGI_40MHZ) |
777ad375 | 2345 | band->ht_cap.cap |= IEEE80211_HT_CAP_SGI_40; |
341c9791 | 2346 | if (cap & MWL8K_CAP_SHORTGI_20MHZ) |
777ad375 | 2347 | band->ht_cap.cap |= IEEE80211_HT_CAP_SGI_20; |
341c9791 | 2348 | if (cap & MWL8K_CAP_DELAY_BA) |
777ad375 | 2349 | band->ht_cap.cap |= IEEE80211_HT_CAP_DELAY_BA; |
341c9791 | 2350 | if (cap & MWL8K_CAP_40MHZ) |
777ad375 | 2351 | band->ht_cap.cap |= IEEE80211_HT_CAP_SUP_WIDTH_20_40; |
341c9791 LB |
2352 | |
2353 | rx_streams = hweight32(cap & MWL8K_CAP_RX_ANTENNA_MASK); | |
2354 | tx_streams = hweight32(cap & MWL8K_CAP_TX_ANTENNA_MASK); | |
2355 | ||
777ad375 | 2356 | band->ht_cap.mcs.rx_mask[0] = 0xff; |
341c9791 | 2357 | if (rx_streams >= 2) |
777ad375 | 2358 | band->ht_cap.mcs.rx_mask[1] = 0xff; |
341c9791 | 2359 | if (rx_streams >= 3) |
777ad375 LB |
2360 | band->ht_cap.mcs.rx_mask[2] = 0xff; |
2361 | band->ht_cap.mcs.rx_mask[4] = 0x01; | |
2362 | band->ht_cap.mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED; | |
341c9791 LB |
2363 | |
2364 | if (rx_streams != tx_streams) { | |
777ad375 LB |
2365 | band->ht_cap.mcs.tx_params |= IEEE80211_HT_MCS_TX_RX_DIFF; |
2366 | band->ht_cap.mcs.tx_params |= (tx_streams - 1) << | |
341c9791 LB |
2367 | IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT; |
2368 | } | |
2369 | } | |
2370 | ||
06953235 LB |
2371 | static void |
2372 | mwl8k_set_caps(struct ieee80211_hw *hw, u32 caps) | |
2373 | { | |
2374 | struct mwl8k_priv *priv = hw->priv; | |
2375 | ||
2376 | if ((caps & MWL8K_CAP_2GHZ4) || !(caps & MWL8K_CAP_BAND_MASK)) { | |
2377 | mwl8k_setup_2ghz_band(hw); | |
2378 | if (caps & MWL8K_CAP_MIMO) | |
2379 | mwl8k_set_ht_caps(hw, &priv->band_24, caps); | |
2380 | } | |
2381 | ||
2382 | if (caps & MWL8K_CAP_5GHZ) { | |
2383 | mwl8k_setup_5ghz_band(hw); | |
2384 | if (caps & MWL8K_CAP_MIMO) | |
2385 | mwl8k_set_ht_caps(hw, &priv->band_50, caps); | |
2386 | } | |
2387 | } | |
2388 | ||
04b147b1 | 2389 | static int mwl8k_cmd_get_hw_spec_sta(struct ieee80211_hw *hw) |
a66098da LB |
2390 | { |
2391 | struct mwl8k_priv *priv = hw->priv; | |
04b147b1 | 2392 | struct mwl8k_cmd_get_hw_spec_sta *cmd; |
a66098da LB |
2393 | int rc; |
2394 | int i; | |
2395 | ||
2396 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
2397 | if (cmd == NULL) | |
2398 | return -ENOMEM; | |
2399 | ||
2400 | cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_HW_SPEC); | |
2401 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
2402 | ||
2403 | memset(cmd->perm_addr, 0xff, sizeof(cmd->perm_addr)); | |
2404 | cmd->ps_cookie = cpu_to_le32(priv->cookie_dma); | |
45eb400d | 2405 | cmd->rx_queue_ptr = cpu_to_le32(priv->rxq[0].rxd_dma); |
e600707b BC |
2406 | cmd->num_tx_queues = cpu_to_le32(mwl8k_tx_queues(priv)); |
2407 | for (i = 0; i < mwl8k_tx_queues(priv); i++) | |
45eb400d | 2408 | cmd->tx_queue_ptrs[i] = cpu_to_le32(priv->txq[i].txd_dma); |
4ff6432e | 2409 | cmd->num_tx_desc_per_queue = cpu_to_le32(MWL8K_TX_DESCS); |
45eb400d | 2410 | cmd->total_rxd = cpu_to_le32(MWL8K_RX_DESCS); |
a66098da LB |
2411 | |
2412 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
2413 | ||
2414 | if (!rc) { | |
2415 | SET_IEEE80211_PERM_ADDR(hw, cmd->perm_addr); | |
2416 | priv->num_mcaddrs = le16_to_cpu(cmd->num_mcaddrs); | |
4ff6432e | 2417 | priv->fw_rev = le32_to_cpu(cmd->fw_rev); |
a66098da | 2418 | priv->hw_rev = cmd->hw_rev; |
06953235 | 2419 | mwl8k_set_caps(hw, le32_to_cpu(cmd->caps)); |
ee0ddf18 LB |
2420 | priv->ap_macids_supported = 0x00000000; |
2421 | priv->sta_macids_supported = 0x00000001; | |
a66098da LB |
2422 | } |
2423 | ||
2424 | kfree(cmd); | |
2425 | return rc; | |
2426 | } | |
2427 | ||
42fba21d LB |
2428 | /* |
2429 | * CMD_GET_HW_SPEC (AP version). | |
2430 | */ | |
2431 | struct mwl8k_cmd_get_hw_spec_ap { | |
2432 | struct mwl8k_cmd_pkt header; | |
2433 | __u8 hw_rev; | |
2434 | __u8 host_interface; | |
2435 | __le16 num_wcb; | |
2436 | __le16 num_mcaddrs; | |
2437 | __u8 perm_addr[ETH_ALEN]; | |
2438 | __le16 region_code; | |
2439 | __le16 num_antenna; | |
2440 | __le32 fw_rev; | |
2441 | __le32 wcbbase0; | |
2442 | __le32 rxwrptr; | |
2443 | __le32 rxrdptr; | |
2444 | __le32 ps_cookie; | |
2445 | __le32 wcbbase1; | |
2446 | __le32 wcbbase2; | |
2447 | __le32 wcbbase3; | |
952a0e96 | 2448 | __le32 fw_api_version; |
8a7a578c BC |
2449 | __le32 caps; |
2450 | __le32 num_of_ampdu_queues; | |
2451 | __le32 wcbbase_ampdu[MWL8K_MAX_AMPDU_QUEUES]; | |
ba2d3587 | 2452 | } __packed; |
42fba21d LB |
2453 | |
2454 | static int mwl8k_cmd_get_hw_spec_ap(struct ieee80211_hw *hw) | |
2455 | { | |
2456 | struct mwl8k_priv *priv = hw->priv; | |
2457 | struct mwl8k_cmd_get_hw_spec_ap *cmd; | |
8a7a578c | 2458 | int rc, i; |
952a0e96 | 2459 | u32 api_version; |
42fba21d LB |
2460 | |
2461 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
2462 | if (cmd == NULL) | |
2463 | return -ENOMEM; | |
2464 | ||
2465 | cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_HW_SPEC); | |
2466 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
2467 | ||
2468 | memset(cmd->perm_addr, 0xff, sizeof(cmd->perm_addr)); | |
2469 | cmd->ps_cookie = cpu_to_le32(priv->cookie_dma); | |
2470 | ||
2471 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
2472 | ||
2473 | if (!rc) { | |
2474 | int off; | |
2475 | ||
952a0e96 BC |
2476 | api_version = le32_to_cpu(cmd->fw_api_version); |
2477 | if (priv->device_info->fw_api_ap != api_version) { | |
2478 | printk(KERN_ERR "%s: Unsupported fw API version for %s." | |
2479 | " Expected %d got %d.\n", MWL8K_NAME, | |
2480 | priv->device_info->part_name, | |
2481 | priv->device_info->fw_api_ap, | |
2482 | api_version); | |
2483 | rc = -EINVAL; | |
2484 | goto done; | |
2485 | } | |
42fba21d LB |
2486 | SET_IEEE80211_PERM_ADDR(hw, cmd->perm_addr); |
2487 | priv->num_mcaddrs = le16_to_cpu(cmd->num_mcaddrs); | |
2488 | priv->fw_rev = le32_to_cpu(cmd->fw_rev); | |
2489 | priv->hw_rev = cmd->hw_rev; | |
8a7a578c | 2490 | mwl8k_set_caps(hw, le32_to_cpu(cmd->caps)); |
ee0ddf18 LB |
2491 | priv->ap_macids_supported = 0x000000ff; |
2492 | priv->sta_macids_supported = 0x00000000; | |
8a7a578c BC |
2493 | priv->num_ampdu_queues = le32_to_cpu(cmd->num_of_ampdu_queues); |
2494 | if (priv->num_ampdu_queues > MWL8K_MAX_AMPDU_QUEUES) { | |
2495 | wiphy_warn(hw->wiphy, "fw reported %d ampdu queues" | |
2496 | " but we only support %d.\n", | |
2497 | priv->num_ampdu_queues, | |
2498 | MWL8K_MAX_AMPDU_QUEUES); | |
2499 | priv->num_ampdu_queues = MWL8K_MAX_AMPDU_QUEUES; | |
2500 | } | |
42fba21d | 2501 | off = le32_to_cpu(cmd->rxwrptr) & 0xffff; |
b603742f | 2502 | iowrite32(priv->rxq[0].rxd_dma, priv->sram + off); |
42fba21d LB |
2503 | |
2504 | off = le32_to_cpu(cmd->rxrdptr) & 0xffff; | |
b603742f | 2505 | iowrite32(priv->rxq[0].rxd_dma, priv->sram + off); |
42fba21d | 2506 | |
73b46320 BC |
2507 | priv->txq_offset[0] = le32_to_cpu(cmd->wcbbase0) & 0xffff; |
2508 | priv->txq_offset[1] = le32_to_cpu(cmd->wcbbase1) & 0xffff; | |
2509 | priv->txq_offset[2] = le32_to_cpu(cmd->wcbbase2) & 0xffff; | |
2510 | priv->txq_offset[3] = le32_to_cpu(cmd->wcbbase3) & 0xffff; | |
8a7a578c BC |
2511 | |
2512 | for (i = 0; i < priv->num_ampdu_queues; i++) | |
e600707b | 2513 | priv->txq_offset[i + MWL8K_TX_WMM_QUEUES] = |
8a7a578c | 2514 | le32_to_cpu(cmd->wcbbase_ampdu[i]) & 0xffff; |
42fba21d LB |
2515 | } |
2516 | ||
952a0e96 | 2517 | done: |
42fba21d LB |
2518 | kfree(cmd); |
2519 | return rc; | |
2520 | } | |
2521 | ||
2522 | /* | |
2523 | * CMD_SET_HW_SPEC. | |
2524 | */ | |
2525 | struct mwl8k_cmd_set_hw_spec { | |
2526 | struct mwl8k_cmd_pkt header; | |
2527 | __u8 hw_rev; | |
2528 | __u8 host_interface; | |
2529 | __le16 num_mcaddrs; | |
2530 | __u8 perm_addr[ETH_ALEN]; | |
2531 | __le16 region_code; | |
2532 | __le32 fw_rev; | |
2533 | __le32 ps_cookie; | |
2534 | __le32 caps; | |
2535 | __le32 rx_queue_ptr; | |
2536 | __le32 num_tx_queues; | |
e600707b | 2537 | __le32 tx_queue_ptrs[MWL8K_MAX_TX_QUEUES]; |
42fba21d LB |
2538 | __le32 flags; |
2539 | __le32 num_tx_desc_per_queue; | |
2540 | __le32 total_rxd; | |
ba2d3587 | 2541 | } __packed; |
42fba21d | 2542 | |
8a7a578c BC |
2543 | /* If enabled, MWL8K_SET_HW_SPEC_FLAG_ENABLE_LIFE_TIME_EXPIRY will cause |
2544 | * packets to expire 500 ms after the timestamp in the tx descriptor. That is, | |
2545 | * the packets that are queued for more than 500ms, will be dropped in the | |
2546 | * hardware. This helps minimizing the issues caused due to head-of-line | |
2547 | * blocking where a slow client can hog the bandwidth and affect traffic to a | |
2548 | * faster client. | |
2549 | */ | |
2550 | #define MWL8K_SET_HW_SPEC_FLAG_ENABLE_LIFE_TIME_EXPIRY 0x00000400 | |
3373b28e | 2551 | #define MWL8K_SET_HW_SPEC_FLAG_GENERATE_CCMP_HDR 0x00000200 |
b64fe619 LB |
2552 | #define MWL8K_SET_HW_SPEC_FLAG_HOST_DECR_MGMT 0x00000080 |
2553 | #define MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_PROBERESP 0x00000020 | |
2554 | #define MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_BEACON 0x00000010 | |
42fba21d LB |
2555 | |
2556 | static int mwl8k_cmd_set_hw_spec(struct ieee80211_hw *hw) | |
2557 | { | |
2558 | struct mwl8k_priv *priv = hw->priv; | |
2559 | struct mwl8k_cmd_set_hw_spec *cmd; | |
2560 | int rc; | |
2561 | int i; | |
2562 | ||
2563 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
2564 | if (cmd == NULL) | |
2565 | return -ENOMEM; | |
2566 | ||
2567 | cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_HW_SPEC); | |
2568 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
2569 | ||
2570 | cmd->ps_cookie = cpu_to_le32(priv->cookie_dma); | |
2571 | cmd->rx_queue_ptr = cpu_to_le32(priv->rxq[0].rxd_dma); | |
e600707b | 2572 | cmd->num_tx_queues = cpu_to_le32(mwl8k_tx_queues(priv)); |
85c9205c NS |
2573 | |
2574 | /* | |
2575 | * Mac80211 stack has Q0 as highest priority and Q3 as lowest in | |
2576 | * that order. Firmware has Q3 as highest priority and Q0 as lowest | |
2577 | * in that order. Map Q3 of mac80211 to Q0 of firmware so that the | |
2578 | * priority is interpreted the right way in firmware. | |
2579 | */ | |
e600707b BC |
2580 | for (i = 0; i < mwl8k_tx_queues(priv); i++) { |
2581 | int j = mwl8k_tx_queues(priv) - 1 - i; | |
85c9205c NS |
2582 | cmd->tx_queue_ptrs[i] = cpu_to_le32(priv->txq[j].txd_dma); |
2583 | } | |
2584 | ||
b64fe619 LB |
2585 | cmd->flags = cpu_to_le32(MWL8K_SET_HW_SPEC_FLAG_HOST_DECR_MGMT | |
2586 | MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_PROBERESP | | |
31d291a7 | 2587 | MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_BEACON | |
3373b28e NS |
2588 | MWL8K_SET_HW_SPEC_FLAG_ENABLE_LIFE_TIME_EXPIRY | |
2589 | MWL8K_SET_HW_SPEC_FLAG_GENERATE_CCMP_HDR); | |
42fba21d LB |
2590 | cmd->num_tx_desc_per_queue = cpu_to_le32(MWL8K_TX_DESCS); |
2591 | cmd->total_rxd = cpu_to_le32(MWL8K_RX_DESCS); | |
2592 | ||
2593 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
2594 | kfree(cmd); | |
2595 | ||
2596 | return rc; | |
2597 | } | |
2598 | ||
a66098da LB |
2599 | /* |
2600 | * CMD_MAC_MULTICAST_ADR. | |
2601 | */ | |
2602 | struct mwl8k_cmd_mac_multicast_adr { | |
2603 | struct mwl8k_cmd_pkt header; | |
2604 | __le16 action; | |
2605 | __le16 numaddr; | |
ce9e2e1b | 2606 | __u8 addr[0][ETH_ALEN]; |
a66098da LB |
2607 | }; |
2608 | ||
d5e30845 LB |
2609 | #define MWL8K_ENABLE_RX_DIRECTED 0x0001 |
2610 | #define MWL8K_ENABLE_RX_MULTICAST 0x0002 | |
2611 | #define MWL8K_ENABLE_RX_ALL_MULTICAST 0x0004 | |
2612 | #define MWL8K_ENABLE_RX_BROADCAST 0x0008 | |
ce9e2e1b | 2613 | |
e81cd2d6 | 2614 | static struct mwl8k_cmd_pkt * |
447ced07 | 2615 | __mwl8k_cmd_mac_multicast_adr(struct ieee80211_hw *hw, int allmulti, |
22bedad3 | 2616 | struct netdev_hw_addr_list *mc_list) |
a66098da | 2617 | { |
e81cd2d6 | 2618 | struct mwl8k_priv *priv = hw->priv; |
a66098da | 2619 | struct mwl8k_cmd_mac_multicast_adr *cmd; |
e81cd2d6 | 2620 | int size; |
22bedad3 JP |
2621 | int mc_count = 0; |
2622 | ||
2623 | if (mc_list) | |
2624 | mc_count = netdev_hw_addr_list_count(mc_list); | |
e81cd2d6 | 2625 | |
447ced07 | 2626 | if (allmulti || mc_count > priv->num_mcaddrs) { |
d5e30845 LB |
2627 | allmulti = 1; |
2628 | mc_count = 0; | |
2629 | } | |
e81cd2d6 LB |
2630 | |
2631 | size = sizeof(*cmd) + mc_count * ETH_ALEN; | |
ce9e2e1b | 2632 | |
e81cd2d6 | 2633 | cmd = kzalloc(size, GFP_ATOMIC); |
a66098da | 2634 | if (cmd == NULL) |
e81cd2d6 | 2635 | return NULL; |
a66098da LB |
2636 | |
2637 | cmd->header.code = cpu_to_le16(MWL8K_CMD_MAC_MULTICAST_ADR); | |
2638 | cmd->header.length = cpu_to_le16(size); | |
d5e30845 LB |
2639 | cmd->action = cpu_to_le16(MWL8K_ENABLE_RX_DIRECTED | |
2640 | MWL8K_ENABLE_RX_BROADCAST); | |
2641 | ||
2642 | if (allmulti) { | |
2643 | cmd->action |= cpu_to_le16(MWL8K_ENABLE_RX_ALL_MULTICAST); | |
2644 | } else if (mc_count) { | |
22bedad3 JP |
2645 | struct netdev_hw_addr *ha; |
2646 | int i = 0; | |
d5e30845 LB |
2647 | |
2648 | cmd->action |= cpu_to_le16(MWL8K_ENABLE_RX_MULTICAST); | |
2649 | cmd->numaddr = cpu_to_le16(mc_count); | |
22bedad3 JP |
2650 | netdev_hw_addr_list_for_each(ha, mc_list) { |
2651 | memcpy(cmd->addr[i], ha->addr, ETH_ALEN); | |
a66098da | 2652 | } |
a66098da LB |
2653 | } |
2654 | ||
e81cd2d6 | 2655 | return &cmd->header; |
a66098da LB |
2656 | } |
2657 | ||
2658 | /* | |
55489b6e | 2659 | * CMD_GET_STAT. |
a66098da | 2660 | */ |
55489b6e | 2661 | struct mwl8k_cmd_get_stat { |
a66098da | 2662 | struct mwl8k_cmd_pkt header; |
a66098da | 2663 | __le32 stats[64]; |
ba2d3587 | 2664 | } __packed; |
a66098da LB |
2665 | |
2666 | #define MWL8K_STAT_ACK_FAILURE 9 | |
2667 | #define MWL8K_STAT_RTS_FAILURE 12 | |
2668 | #define MWL8K_STAT_FCS_ERROR 24 | |
2669 | #define MWL8K_STAT_RTS_SUCCESS 11 | |
2670 | ||
55489b6e LB |
2671 | static int mwl8k_cmd_get_stat(struct ieee80211_hw *hw, |
2672 | struct ieee80211_low_level_stats *stats) | |
a66098da | 2673 | { |
55489b6e | 2674 | struct mwl8k_cmd_get_stat *cmd; |
a66098da LB |
2675 | int rc; |
2676 | ||
2677 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
2678 | if (cmd == NULL) | |
2679 | return -ENOMEM; | |
2680 | ||
2681 | cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_STAT); | |
2682 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
a66098da LB |
2683 | |
2684 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
2685 | if (!rc) { | |
2686 | stats->dot11ACKFailureCount = | |
2687 | le32_to_cpu(cmd->stats[MWL8K_STAT_ACK_FAILURE]); | |
2688 | stats->dot11RTSFailureCount = | |
2689 | le32_to_cpu(cmd->stats[MWL8K_STAT_RTS_FAILURE]); | |
2690 | stats->dot11FCSErrorCount = | |
2691 | le32_to_cpu(cmd->stats[MWL8K_STAT_FCS_ERROR]); | |
2692 | stats->dot11RTSSuccessCount = | |
2693 | le32_to_cpu(cmd->stats[MWL8K_STAT_RTS_SUCCESS]); | |
2694 | } | |
2695 | kfree(cmd); | |
2696 | ||
2697 | return rc; | |
2698 | } | |
2699 | ||
2700 | /* | |
55489b6e | 2701 | * CMD_RADIO_CONTROL. |
a66098da | 2702 | */ |
55489b6e | 2703 | struct mwl8k_cmd_radio_control { |
a66098da LB |
2704 | struct mwl8k_cmd_pkt header; |
2705 | __le16 action; | |
2706 | __le16 control; | |
2707 | __le16 radio_on; | |
ba2d3587 | 2708 | } __packed; |
a66098da | 2709 | |
c46563b7 | 2710 | static int |
55489b6e | 2711 | mwl8k_cmd_radio_control(struct ieee80211_hw *hw, bool enable, bool force) |
a66098da LB |
2712 | { |
2713 | struct mwl8k_priv *priv = hw->priv; | |
55489b6e | 2714 | struct mwl8k_cmd_radio_control *cmd; |
a66098da LB |
2715 | int rc; |
2716 | ||
c46563b7 | 2717 | if (enable == priv->radio_on && !force) |
a66098da LB |
2718 | return 0; |
2719 | ||
a66098da LB |
2720 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); |
2721 | if (cmd == NULL) | |
2722 | return -ENOMEM; | |
2723 | ||
2724 | cmd->header.code = cpu_to_le16(MWL8K_CMD_RADIO_CONTROL); | |
2725 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
2726 | cmd->action = cpu_to_le16(MWL8K_CMD_SET); | |
68ce3884 | 2727 | cmd->control = cpu_to_le16(priv->radio_short_preamble ? 3 : 1); |
a66098da LB |
2728 | cmd->radio_on = cpu_to_le16(enable ? 0x0001 : 0x0000); |
2729 | ||
2730 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
2731 | kfree(cmd); | |
2732 | ||
2733 | if (!rc) | |
c46563b7 | 2734 | priv->radio_on = enable; |
a66098da LB |
2735 | |
2736 | return rc; | |
2737 | } | |
2738 | ||
55489b6e | 2739 | static int mwl8k_cmd_radio_disable(struct ieee80211_hw *hw) |
c46563b7 | 2740 | { |
55489b6e | 2741 | return mwl8k_cmd_radio_control(hw, 0, 0); |
c46563b7 LB |
2742 | } |
2743 | ||
55489b6e | 2744 | static int mwl8k_cmd_radio_enable(struct ieee80211_hw *hw) |
c46563b7 | 2745 | { |
55489b6e | 2746 | return mwl8k_cmd_radio_control(hw, 1, 0); |
c46563b7 LB |
2747 | } |
2748 | ||
a66098da LB |
2749 | static int |
2750 | mwl8k_set_radio_preamble(struct ieee80211_hw *hw, bool short_preamble) | |
2751 | { | |
99200a99 | 2752 | struct mwl8k_priv *priv = hw->priv; |
a66098da | 2753 | |
68ce3884 | 2754 | priv->radio_short_preamble = short_preamble; |
a66098da | 2755 | |
55489b6e | 2756 | return mwl8k_cmd_radio_control(hw, 1, 1); |
a66098da LB |
2757 | } |
2758 | ||
2759 | /* | |
55489b6e | 2760 | * CMD_RF_TX_POWER. |
a66098da | 2761 | */ |
41fdf097 | 2762 | #define MWL8K_RF_TX_POWER_LEVEL_TOTAL 8 |
a66098da | 2763 | |
55489b6e | 2764 | struct mwl8k_cmd_rf_tx_power { |
a66098da LB |
2765 | struct mwl8k_cmd_pkt header; |
2766 | __le16 action; | |
2767 | __le16 support_level; | |
2768 | __le16 current_level; | |
2769 | __le16 reserved; | |
41fdf097 | 2770 | __le16 power_level_list[MWL8K_RF_TX_POWER_LEVEL_TOTAL]; |
ba2d3587 | 2771 | } __packed; |
a66098da | 2772 | |
55489b6e | 2773 | static int mwl8k_cmd_rf_tx_power(struct ieee80211_hw *hw, int dBm) |
a66098da | 2774 | { |
55489b6e | 2775 | struct mwl8k_cmd_rf_tx_power *cmd; |
a66098da LB |
2776 | int rc; |
2777 | ||
2778 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
2779 | if (cmd == NULL) | |
2780 | return -ENOMEM; | |
2781 | ||
2782 | cmd->header.code = cpu_to_le16(MWL8K_CMD_RF_TX_POWER); | |
2783 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
2784 | cmd->action = cpu_to_le16(MWL8K_CMD_SET); | |
2785 | cmd->support_level = cpu_to_le16(dBm); | |
2786 | ||
2787 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
2788 | kfree(cmd); | |
2789 | ||
2790 | return rc; | |
2791 | } | |
2792 | ||
41fdf097 NS |
2793 | /* |
2794 | * CMD_TX_POWER. | |
2795 | */ | |
2796 | #define MWL8K_TX_POWER_LEVEL_TOTAL 12 | |
2797 | ||
2798 | struct mwl8k_cmd_tx_power { | |
2799 | struct mwl8k_cmd_pkt header; | |
2800 | __le16 action; | |
2801 | __le16 band; | |
2802 | __le16 channel; | |
2803 | __le16 bw; | |
2804 | __le16 sub_ch; | |
2805 | __le16 power_level_list[MWL8K_TX_POWER_LEVEL_TOTAL]; | |
ba30c4a5 | 2806 | } __packed; |
41fdf097 NS |
2807 | |
2808 | static int mwl8k_cmd_tx_power(struct ieee80211_hw *hw, | |
2809 | struct ieee80211_conf *conf, | |
2810 | unsigned short pwr) | |
2811 | { | |
2812 | struct ieee80211_channel *channel = conf->channel; | |
2813 | struct mwl8k_cmd_tx_power *cmd; | |
2814 | int rc; | |
2815 | int i; | |
2816 | ||
2817 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
2818 | if (cmd == NULL) | |
2819 | return -ENOMEM; | |
2820 | ||
2821 | cmd->header.code = cpu_to_le16(MWL8K_CMD_TX_POWER); | |
2822 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
2823 | cmd->action = cpu_to_le16(MWL8K_CMD_SET_LIST); | |
2824 | ||
2825 | if (channel->band == IEEE80211_BAND_2GHZ) | |
2826 | cmd->band = cpu_to_le16(0x1); | |
2827 | else if (channel->band == IEEE80211_BAND_5GHZ) | |
2828 | cmd->band = cpu_to_le16(0x4); | |
2829 | ||
604c4ef1 | 2830 | cmd->channel = cpu_to_le16(channel->hw_value); |
41fdf097 NS |
2831 | |
2832 | if (conf->channel_type == NL80211_CHAN_NO_HT || | |
2833 | conf->channel_type == NL80211_CHAN_HT20) { | |
2834 | cmd->bw = cpu_to_le16(0x2); | |
2835 | } else { | |
2836 | cmd->bw = cpu_to_le16(0x4); | |
2837 | if (conf->channel_type == NL80211_CHAN_HT40MINUS) | |
2838 | cmd->sub_ch = cpu_to_le16(0x3); | |
2839 | else if (conf->channel_type == NL80211_CHAN_HT40PLUS) | |
2840 | cmd->sub_ch = cpu_to_le16(0x1); | |
2841 | } | |
2842 | ||
2843 | for (i = 0; i < MWL8K_TX_POWER_LEVEL_TOTAL; i++) | |
2844 | cmd->power_level_list[i] = cpu_to_le16(pwr); | |
2845 | ||
2846 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
2847 | kfree(cmd); | |
2848 | ||
2849 | return rc; | |
2850 | } | |
2851 | ||
08b06347 LB |
2852 | /* |
2853 | * CMD_RF_ANTENNA. | |
2854 | */ | |
2855 | struct mwl8k_cmd_rf_antenna { | |
2856 | struct mwl8k_cmd_pkt header; | |
2857 | __le16 antenna; | |
2858 | __le16 mode; | |
ba2d3587 | 2859 | } __packed; |
08b06347 LB |
2860 | |
2861 | #define MWL8K_RF_ANTENNA_RX 1 | |
2862 | #define MWL8K_RF_ANTENNA_TX 2 | |
2863 | ||
2864 | static int | |
2865 | mwl8k_cmd_rf_antenna(struct ieee80211_hw *hw, int antenna, int mask) | |
2866 | { | |
2867 | struct mwl8k_cmd_rf_antenna *cmd; | |
2868 | int rc; | |
2869 | ||
2870 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
2871 | if (cmd == NULL) | |
2872 | return -ENOMEM; | |
2873 | ||
2874 | cmd->header.code = cpu_to_le16(MWL8K_CMD_RF_ANTENNA); | |
2875 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
2876 | cmd->antenna = cpu_to_le16(antenna); | |
2877 | cmd->mode = cpu_to_le16(mask); | |
2878 | ||
2879 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
2880 | kfree(cmd); | |
2881 | ||
2882 | return rc; | |
2883 | } | |
2884 | ||
b64fe619 LB |
2885 | /* |
2886 | * CMD_SET_BEACON. | |
2887 | */ | |
2888 | struct mwl8k_cmd_set_beacon { | |
2889 | struct mwl8k_cmd_pkt header; | |
2890 | __le16 beacon_len; | |
2891 | __u8 beacon[0]; | |
2892 | }; | |
2893 | ||
aa21d0f6 LB |
2894 | static int mwl8k_cmd_set_beacon(struct ieee80211_hw *hw, |
2895 | struct ieee80211_vif *vif, u8 *beacon, int len) | |
b64fe619 LB |
2896 | { |
2897 | struct mwl8k_cmd_set_beacon *cmd; | |
2898 | int rc; | |
2899 | ||
2900 | cmd = kzalloc(sizeof(*cmd) + len, GFP_KERNEL); | |
2901 | if (cmd == NULL) | |
2902 | return -ENOMEM; | |
2903 | ||
2904 | cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_BEACON); | |
2905 | cmd->header.length = cpu_to_le16(sizeof(*cmd) + len); | |
2906 | cmd->beacon_len = cpu_to_le16(len); | |
2907 | memcpy(cmd->beacon, beacon, len); | |
2908 | ||
aa21d0f6 | 2909 | rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header); |
b64fe619 LB |
2910 | kfree(cmd); |
2911 | ||
2912 | return rc; | |
2913 | } | |
2914 | ||
a66098da LB |
2915 | /* |
2916 | * CMD_SET_PRE_SCAN. | |
2917 | */ | |
2918 | struct mwl8k_cmd_set_pre_scan { | |
2919 | struct mwl8k_cmd_pkt header; | |
ba2d3587 | 2920 | } __packed; |
a66098da LB |
2921 | |
2922 | static int mwl8k_cmd_set_pre_scan(struct ieee80211_hw *hw) | |
2923 | { | |
2924 | struct mwl8k_cmd_set_pre_scan *cmd; | |
2925 | int rc; | |
2926 | ||
2927 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
2928 | if (cmd == NULL) | |
2929 | return -ENOMEM; | |
2930 | ||
2931 | cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_PRE_SCAN); | |
2932 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
2933 | ||
2934 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
2935 | kfree(cmd); | |
2936 | ||
2937 | return rc; | |
2938 | } | |
2939 | ||
2940 | /* | |
2941 | * CMD_SET_POST_SCAN. | |
2942 | */ | |
2943 | struct mwl8k_cmd_set_post_scan { | |
2944 | struct mwl8k_cmd_pkt header; | |
2945 | __le32 isibss; | |
d89173f2 | 2946 | __u8 bssid[ETH_ALEN]; |
ba2d3587 | 2947 | } __packed; |
a66098da LB |
2948 | |
2949 | static int | |
0a11dfc3 | 2950 | mwl8k_cmd_set_post_scan(struct ieee80211_hw *hw, const __u8 *mac) |
a66098da LB |
2951 | { |
2952 | struct mwl8k_cmd_set_post_scan *cmd; | |
2953 | int rc; | |
2954 | ||
2955 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
2956 | if (cmd == NULL) | |
2957 | return -ENOMEM; | |
2958 | ||
2959 | cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_POST_SCAN); | |
2960 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
2961 | cmd->isibss = 0; | |
d89173f2 | 2962 | memcpy(cmd->bssid, mac, ETH_ALEN); |
a66098da LB |
2963 | |
2964 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
2965 | kfree(cmd); | |
2966 | ||
2967 | return rc; | |
2968 | } | |
2969 | ||
2970 | /* | |
2971 | * CMD_SET_RF_CHANNEL. | |
2972 | */ | |
2973 | struct mwl8k_cmd_set_rf_channel { | |
2974 | struct mwl8k_cmd_pkt header; | |
2975 | __le16 action; | |
2976 | __u8 current_channel; | |
2977 | __le32 channel_flags; | |
ba2d3587 | 2978 | } __packed; |
a66098da LB |
2979 | |
2980 | static int mwl8k_cmd_set_rf_channel(struct ieee80211_hw *hw, | |
610677d2 | 2981 | struct ieee80211_conf *conf) |
a66098da | 2982 | { |
610677d2 | 2983 | struct ieee80211_channel *channel = conf->channel; |
a66098da LB |
2984 | struct mwl8k_cmd_set_rf_channel *cmd; |
2985 | int rc; | |
2986 | ||
2987 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
2988 | if (cmd == NULL) | |
2989 | return -ENOMEM; | |
2990 | ||
2991 | cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RF_CHANNEL); | |
2992 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
2993 | cmd->action = cpu_to_le16(MWL8K_CMD_SET); | |
2994 | cmd->current_channel = channel->hw_value; | |
610677d2 | 2995 | |
a66098da | 2996 | if (channel->band == IEEE80211_BAND_2GHZ) |
610677d2 | 2997 | cmd->channel_flags |= cpu_to_le32(0x00000001); |
42574ea2 LB |
2998 | else if (channel->band == IEEE80211_BAND_5GHZ) |
2999 | cmd->channel_flags |= cpu_to_le32(0x00000004); | |
610677d2 LB |
3000 | |
3001 | if (conf->channel_type == NL80211_CHAN_NO_HT || | |
3002 | conf->channel_type == NL80211_CHAN_HT20) | |
3003 | cmd->channel_flags |= cpu_to_le32(0x00000080); | |
3004 | else if (conf->channel_type == NL80211_CHAN_HT40MINUS) | |
3005 | cmd->channel_flags |= cpu_to_le32(0x000001900); | |
3006 | else if (conf->channel_type == NL80211_CHAN_HT40PLUS) | |
3007 | cmd->channel_flags |= cpu_to_le32(0x000000900); | |
a66098da LB |
3008 | |
3009 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
3010 | kfree(cmd); | |
3011 | ||
3012 | return rc; | |
3013 | } | |
3014 | ||
3015 | /* | |
55489b6e | 3016 | * CMD_SET_AID. |
a66098da | 3017 | */ |
55489b6e LB |
3018 | #define MWL8K_FRAME_PROT_DISABLED 0x00 |
3019 | #define MWL8K_FRAME_PROT_11G 0x07 | |
3020 | #define MWL8K_FRAME_PROT_11N_HT_40MHZ_ONLY 0x02 | |
3021 | #define MWL8K_FRAME_PROT_11N_HT_ALL 0x06 | |
a66098da | 3022 | |
55489b6e LB |
3023 | struct mwl8k_cmd_update_set_aid { |
3024 | struct mwl8k_cmd_pkt header; | |
3025 | __le16 aid; | |
a66098da | 3026 | |
55489b6e LB |
3027 | /* AP's MAC address (BSSID) */ |
3028 | __u8 bssid[ETH_ALEN]; | |
3029 | __le16 protection_mode; | |
3030 | __u8 supp_rates[14]; | |
ba2d3587 | 3031 | } __packed; |
a66098da | 3032 | |
c6e96010 LB |
3033 | static void legacy_rate_mask_to_array(u8 *rates, u32 mask) |
3034 | { | |
3035 | int i; | |
3036 | int j; | |
3037 | ||
3038 | /* | |
3039 | * Clear nonstandard rates 4 and 13. | |
3040 | */ | |
3041 | mask &= 0x1fef; | |
3042 | ||
3043 | for (i = 0, j = 0; i < 14; i++) { | |
3044 | if (mask & (1 << i)) | |
777ad375 | 3045 | rates[j++] = mwl8k_rates_24[i].hw_value; |
c6e96010 LB |
3046 | } |
3047 | } | |
3048 | ||
55489b6e | 3049 | static int |
c6e96010 LB |
3050 | mwl8k_cmd_set_aid(struct ieee80211_hw *hw, |
3051 | struct ieee80211_vif *vif, u32 legacy_rate_mask) | |
a66098da | 3052 | { |
55489b6e LB |
3053 | struct mwl8k_cmd_update_set_aid *cmd; |
3054 | u16 prot_mode; | |
a66098da LB |
3055 | int rc; |
3056 | ||
3057 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
3058 | if (cmd == NULL) | |
3059 | return -ENOMEM; | |
3060 | ||
55489b6e | 3061 | cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_AID); |
a66098da | 3062 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); |
7dc6a7a7 | 3063 | cmd->aid = cpu_to_le16(vif->bss_conf.aid); |
0a11dfc3 | 3064 | memcpy(cmd->bssid, vif->bss_conf.bssid, ETH_ALEN); |
a66098da | 3065 | |
7dc6a7a7 | 3066 | if (vif->bss_conf.use_cts_prot) { |
55489b6e LB |
3067 | prot_mode = MWL8K_FRAME_PROT_11G; |
3068 | } else { | |
7dc6a7a7 | 3069 | switch (vif->bss_conf.ht_operation_mode & |
55489b6e LB |
3070 | IEEE80211_HT_OP_MODE_PROTECTION) { |
3071 | case IEEE80211_HT_OP_MODE_PROTECTION_20MHZ: | |
3072 | prot_mode = MWL8K_FRAME_PROT_11N_HT_40MHZ_ONLY; | |
3073 | break; | |
3074 | case IEEE80211_HT_OP_MODE_PROTECTION_NONHT_MIXED: | |
3075 | prot_mode = MWL8K_FRAME_PROT_11N_HT_ALL; | |
3076 | break; | |
3077 | default: | |
3078 | prot_mode = MWL8K_FRAME_PROT_DISABLED; | |
3079 | break; | |
3080 | } | |
3081 | } | |
3082 | cmd->protection_mode = cpu_to_le16(prot_mode); | |
a66098da | 3083 | |
c6e96010 | 3084 | legacy_rate_mask_to_array(cmd->supp_rates, legacy_rate_mask); |
a66098da LB |
3085 | |
3086 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
3087 | kfree(cmd); | |
3088 | ||
3089 | return rc; | |
3090 | } | |
3091 | ||
32060e1b | 3092 | /* |
55489b6e | 3093 | * CMD_SET_RATE. |
32060e1b | 3094 | */ |
55489b6e LB |
3095 | struct mwl8k_cmd_set_rate { |
3096 | struct mwl8k_cmd_pkt header; | |
3097 | __u8 legacy_rates[14]; | |
3098 | ||
3099 | /* Bitmap for supported MCS codes. */ | |
3100 | __u8 mcs_set[16]; | |
3101 | __u8 reserved[16]; | |
ba2d3587 | 3102 | } __packed; |
32060e1b | 3103 | |
55489b6e | 3104 | static int |
c6e96010 | 3105 | mwl8k_cmd_set_rate(struct ieee80211_hw *hw, struct ieee80211_vif *vif, |
13935e2c | 3106 | u32 legacy_rate_mask, u8 *mcs_rates) |
32060e1b | 3107 | { |
55489b6e | 3108 | struct mwl8k_cmd_set_rate *cmd; |
32060e1b LB |
3109 | int rc; |
3110 | ||
3111 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
3112 | if (cmd == NULL) | |
3113 | return -ENOMEM; | |
3114 | ||
55489b6e | 3115 | cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RATE); |
32060e1b | 3116 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); |
c6e96010 | 3117 | legacy_rate_mask_to_array(cmd->legacy_rates, legacy_rate_mask); |
13935e2c | 3118 | memcpy(cmd->mcs_set, mcs_rates, 16); |
32060e1b LB |
3119 | |
3120 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
3121 | kfree(cmd); | |
3122 | ||
3123 | return rc; | |
3124 | } | |
3125 | ||
a66098da | 3126 | /* |
55489b6e | 3127 | * CMD_FINALIZE_JOIN. |
a66098da | 3128 | */ |
55489b6e LB |
3129 | #define MWL8K_FJ_BEACON_MAXLEN 128 |
3130 | ||
3131 | struct mwl8k_cmd_finalize_join { | |
a66098da | 3132 | struct mwl8k_cmd_pkt header; |
55489b6e LB |
3133 | __le32 sleep_interval; /* Number of beacon periods to sleep */ |
3134 | __u8 beacon_data[MWL8K_FJ_BEACON_MAXLEN]; | |
ba2d3587 | 3135 | } __packed; |
a66098da | 3136 | |
55489b6e LB |
3137 | static int mwl8k_cmd_finalize_join(struct ieee80211_hw *hw, void *frame, |
3138 | int framelen, int dtim) | |
a66098da | 3139 | { |
55489b6e LB |
3140 | struct mwl8k_cmd_finalize_join *cmd; |
3141 | struct ieee80211_mgmt *payload = frame; | |
3142 | int payload_len; | |
a66098da LB |
3143 | int rc; |
3144 | ||
3145 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
3146 | if (cmd == NULL) | |
3147 | return -ENOMEM; | |
3148 | ||
55489b6e | 3149 | cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_FINALIZE_JOIN); |
a66098da | 3150 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); |
55489b6e LB |
3151 | cmd->sleep_interval = cpu_to_le32(dtim ? dtim : 1); |
3152 | ||
3153 | payload_len = framelen - ieee80211_hdrlen(payload->frame_control); | |
3154 | if (payload_len < 0) | |
3155 | payload_len = 0; | |
3156 | else if (payload_len > MWL8K_FJ_BEACON_MAXLEN) | |
3157 | payload_len = MWL8K_FJ_BEACON_MAXLEN; | |
3158 | ||
3159 | memcpy(cmd->beacon_data, &payload->u.beacon, payload_len); | |
a66098da LB |
3160 | |
3161 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
3162 | kfree(cmd); | |
3163 | ||
3164 | return rc; | |
3165 | } | |
3166 | ||
3167 | /* | |
55489b6e | 3168 | * CMD_SET_RTS_THRESHOLD. |
a66098da | 3169 | */ |
55489b6e | 3170 | struct mwl8k_cmd_set_rts_threshold { |
a66098da LB |
3171 | struct mwl8k_cmd_pkt header; |
3172 | __le16 action; | |
55489b6e | 3173 | __le16 threshold; |
ba2d3587 | 3174 | } __packed; |
a66098da | 3175 | |
c2c2b12a LB |
3176 | static int |
3177 | mwl8k_cmd_set_rts_threshold(struct ieee80211_hw *hw, int rts_thresh) | |
a66098da | 3178 | { |
55489b6e | 3179 | struct mwl8k_cmd_set_rts_threshold *cmd; |
a66098da LB |
3180 | int rc; |
3181 | ||
3182 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
3183 | if (cmd == NULL) | |
3184 | return -ENOMEM; | |
3185 | ||
55489b6e | 3186 | cmd->header.code = cpu_to_le16(MWL8K_CMD_RTS_THRESHOLD); |
a66098da | 3187 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); |
c2c2b12a LB |
3188 | cmd->action = cpu_to_le16(MWL8K_CMD_SET); |
3189 | cmd->threshold = cpu_to_le16(rts_thresh); | |
a66098da LB |
3190 | |
3191 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
3192 | kfree(cmd); | |
3193 | ||
a66098da LB |
3194 | return rc; |
3195 | } | |
3196 | ||
3197 | /* | |
55489b6e | 3198 | * CMD_SET_SLOT. |
a66098da | 3199 | */ |
55489b6e | 3200 | struct mwl8k_cmd_set_slot { |
a66098da LB |
3201 | struct mwl8k_cmd_pkt header; |
3202 | __le16 action; | |
55489b6e | 3203 | __u8 short_slot; |
ba2d3587 | 3204 | } __packed; |
a66098da | 3205 | |
55489b6e | 3206 | static int mwl8k_cmd_set_slot(struct ieee80211_hw *hw, bool short_slot_time) |
a66098da | 3207 | { |
55489b6e | 3208 | struct mwl8k_cmd_set_slot *cmd; |
a66098da LB |
3209 | int rc; |
3210 | ||
3211 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
3212 | if (cmd == NULL) | |
3213 | return -ENOMEM; | |
3214 | ||
55489b6e | 3215 | cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_SLOT); |
a66098da | 3216 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); |
55489b6e LB |
3217 | cmd->action = cpu_to_le16(MWL8K_CMD_SET); |
3218 | cmd->short_slot = short_slot_time; | |
a66098da LB |
3219 | |
3220 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
3221 | kfree(cmd); | |
3222 | ||
3223 | return rc; | |
3224 | } | |
3225 | ||
3226 | /* | |
3227 | * CMD_SET_EDCA_PARAMS. | |
3228 | */ | |
3229 | struct mwl8k_cmd_set_edca_params { | |
3230 | struct mwl8k_cmd_pkt header; | |
3231 | ||
3232 | /* See MWL8K_SET_EDCA_XXX below */ | |
3233 | __le16 action; | |
3234 | ||
3235 | /* TX opportunity in units of 32 us */ | |
3236 | __le16 txop; | |
3237 | ||
2e484c89 LB |
3238 | union { |
3239 | struct { | |
3240 | /* Log exponent of max contention period: 0...15 */ | |
3241 | __le32 log_cw_max; | |
3242 | ||
3243 | /* Log exponent of min contention period: 0...15 */ | |
3244 | __le32 log_cw_min; | |
3245 | ||
3246 | /* Adaptive interframe spacing in units of 32us */ | |
3247 | __u8 aifs; | |
3248 | ||
3249 | /* TX queue to configure */ | |
3250 | __u8 txq; | |
3251 | } ap; | |
3252 | struct { | |
3253 | /* Log exponent of max contention period: 0...15 */ | |
3254 | __u8 log_cw_max; | |
a66098da | 3255 | |
2e484c89 LB |
3256 | /* Log exponent of min contention period: 0...15 */ |
3257 | __u8 log_cw_min; | |
a66098da | 3258 | |
2e484c89 LB |
3259 | /* Adaptive interframe spacing in units of 32us */ |
3260 | __u8 aifs; | |
a66098da | 3261 | |
2e484c89 LB |
3262 | /* TX queue to configure */ |
3263 | __u8 txq; | |
3264 | } sta; | |
3265 | }; | |
ba2d3587 | 3266 | } __packed; |
a66098da | 3267 | |
a66098da LB |
3268 | #define MWL8K_SET_EDCA_CW 0x01 |
3269 | #define MWL8K_SET_EDCA_TXOP 0x02 | |
3270 | #define MWL8K_SET_EDCA_AIFS 0x04 | |
3271 | ||
3272 | #define MWL8K_SET_EDCA_ALL (MWL8K_SET_EDCA_CW | \ | |
3273 | MWL8K_SET_EDCA_TXOP | \ | |
3274 | MWL8K_SET_EDCA_AIFS) | |
3275 | ||
3276 | static int | |
55489b6e LB |
3277 | mwl8k_cmd_set_edca_params(struct ieee80211_hw *hw, __u8 qnum, |
3278 | __u16 cw_min, __u16 cw_max, | |
3279 | __u8 aifs, __u16 txop) | |
a66098da | 3280 | { |
2e484c89 | 3281 | struct mwl8k_priv *priv = hw->priv; |
a66098da | 3282 | struct mwl8k_cmd_set_edca_params *cmd; |
a66098da LB |
3283 | int rc; |
3284 | ||
3285 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
3286 | if (cmd == NULL) | |
3287 | return -ENOMEM; | |
3288 | ||
a66098da LB |
3289 | cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_EDCA_PARAMS); |
3290 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
a66098da LB |
3291 | cmd->action = cpu_to_le16(MWL8K_SET_EDCA_ALL); |
3292 | cmd->txop = cpu_to_le16(txop); | |
2e484c89 LB |
3293 | if (priv->ap_fw) { |
3294 | cmd->ap.log_cw_max = cpu_to_le32(ilog2(cw_max + 1)); | |
3295 | cmd->ap.log_cw_min = cpu_to_le32(ilog2(cw_min + 1)); | |
3296 | cmd->ap.aifs = aifs; | |
3297 | cmd->ap.txq = qnum; | |
3298 | } else { | |
3299 | cmd->sta.log_cw_max = (u8)ilog2(cw_max + 1); | |
3300 | cmd->sta.log_cw_min = (u8)ilog2(cw_min + 1); | |
3301 | cmd->sta.aifs = aifs; | |
3302 | cmd->sta.txq = qnum; | |
3303 | } | |
a66098da LB |
3304 | |
3305 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
3306 | kfree(cmd); | |
3307 | ||
3308 | return rc; | |
3309 | } | |
3310 | ||
3311 | /* | |
55489b6e | 3312 | * CMD_SET_WMM_MODE. |
a66098da | 3313 | */ |
55489b6e | 3314 | struct mwl8k_cmd_set_wmm_mode { |
a66098da | 3315 | struct mwl8k_cmd_pkt header; |
55489b6e | 3316 | __le16 action; |
ba2d3587 | 3317 | } __packed; |
a66098da | 3318 | |
55489b6e | 3319 | static int mwl8k_cmd_set_wmm_mode(struct ieee80211_hw *hw, bool enable) |
a66098da | 3320 | { |
55489b6e LB |
3321 | struct mwl8k_priv *priv = hw->priv; |
3322 | struct mwl8k_cmd_set_wmm_mode *cmd; | |
a66098da LB |
3323 | int rc; |
3324 | ||
a66098da LB |
3325 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); |
3326 | if (cmd == NULL) | |
3327 | return -ENOMEM; | |
3328 | ||
55489b6e | 3329 | cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_WMM_MODE); |
a66098da | 3330 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); |
55489b6e | 3331 | cmd->action = cpu_to_le16(!!enable); |
a66098da LB |
3332 | |
3333 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
3334 | kfree(cmd); | |
16cec43d | 3335 | |
55489b6e LB |
3336 | if (!rc) |
3337 | priv->wmm_enabled = enable; | |
a66098da LB |
3338 | |
3339 | return rc; | |
3340 | } | |
3341 | ||
3342 | /* | |
55489b6e | 3343 | * CMD_MIMO_CONFIG. |
a66098da | 3344 | */ |
55489b6e LB |
3345 | struct mwl8k_cmd_mimo_config { |
3346 | struct mwl8k_cmd_pkt header; | |
3347 | __le32 action; | |
3348 | __u8 rx_antenna_map; | |
3349 | __u8 tx_antenna_map; | |
ba2d3587 | 3350 | } __packed; |
a66098da | 3351 | |
55489b6e | 3352 | static int mwl8k_cmd_mimo_config(struct ieee80211_hw *hw, __u8 rx, __u8 tx) |
a66098da | 3353 | { |
55489b6e | 3354 | struct mwl8k_cmd_mimo_config *cmd; |
a66098da LB |
3355 | int rc; |
3356 | ||
3357 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
3358 | if (cmd == NULL) | |
3359 | return -ENOMEM; | |
3360 | ||
55489b6e | 3361 | cmd->header.code = cpu_to_le16(MWL8K_CMD_MIMO_CONFIG); |
a66098da | 3362 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); |
55489b6e LB |
3363 | cmd->action = cpu_to_le32((u32)MWL8K_CMD_SET); |
3364 | cmd->rx_antenna_map = rx; | |
3365 | cmd->tx_antenna_map = tx; | |
a66098da LB |
3366 | |
3367 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
3368 | kfree(cmd); | |
3369 | ||
3370 | return rc; | |
3371 | } | |
3372 | ||
3373 | /* | |
b71ed2c6 | 3374 | * CMD_USE_FIXED_RATE (STA version). |
a66098da | 3375 | */ |
b71ed2c6 LB |
3376 | struct mwl8k_cmd_use_fixed_rate_sta { |
3377 | struct mwl8k_cmd_pkt header; | |
3378 | __le32 action; | |
3379 | __le32 allow_rate_drop; | |
3380 | __le32 num_rates; | |
3381 | struct { | |
3382 | __le32 is_ht_rate; | |
3383 | __le32 enable_retry; | |
3384 | __le32 rate; | |
3385 | __le32 retry_count; | |
3386 | } rate_entry[8]; | |
3387 | __le32 rate_type; | |
3388 | __le32 reserved1; | |
3389 | __le32 reserved2; | |
ba2d3587 | 3390 | } __packed; |
a66098da | 3391 | |
b71ed2c6 LB |
3392 | #define MWL8K_USE_AUTO_RATE 0x0002 |
3393 | #define MWL8K_UCAST_RATE 0 | |
a66098da | 3394 | |
b71ed2c6 | 3395 | static int mwl8k_cmd_use_fixed_rate_sta(struct ieee80211_hw *hw) |
a66098da | 3396 | { |
b71ed2c6 | 3397 | struct mwl8k_cmd_use_fixed_rate_sta *cmd; |
a66098da LB |
3398 | int rc; |
3399 | ||
3400 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
3401 | if (cmd == NULL) | |
3402 | return -ENOMEM; | |
3403 | ||
3404 | cmd->header.code = cpu_to_le16(MWL8K_CMD_USE_FIXED_RATE); | |
3405 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
b71ed2c6 LB |
3406 | cmd->action = cpu_to_le32(MWL8K_USE_AUTO_RATE); |
3407 | cmd->rate_type = cpu_to_le32(MWL8K_UCAST_RATE); | |
a66098da LB |
3408 | |
3409 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
3410 | kfree(cmd); | |
3411 | ||
3412 | return rc; | |
3413 | } | |
3414 | ||
088aab8b LB |
3415 | /* |
3416 | * CMD_USE_FIXED_RATE (AP version). | |
3417 | */ | |
3418 | struct mwl8k_cmd_use_fixed_rate_ap { | |
3419 | struct mwl8k_cmd_pkt header; | |
3420 | __le32 action; | |
3421 | __le32 allow_rate_drop; | |
3422 | __le32 num_rates; | |
3423 | struct mwl8k_rate_entry_ap { | |
3424 | __le32 is_ht_rate; | |
3425 | __le32 enable_retry; | |
3426 | __le32 rate; | |
3427 | __le32 retry_count; | |
3428 | } rate_entry[4]; | |
3429 | u8 multicast_rate; | |
3430 | u8 multicast_rate_type; | |
3431 | u8 management_rate; | |
ba2d3587 | 3432 | } __packed; |
088aab8b LB |
3433 | |
3434 | static int | |
3435 | mwl8k_cmd_use_fixed_rate_ap(struct ieee80211_hw *hw, int mcast, int mgmt) | |
3436 | { | |
3437 | struct mwl8k_cmd_use_fixed_rate_ap *cmd; | |
3438 | int rc; | |
3439 | ||
3440 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
3441 | if (cmd == NULL) | |
3442 | return -ENOMEM; | |
3443 | ||
3444 | cmd->header.code = cpu_to_le16(MWL8K_CMD_USE_FIXED_RATE); | |
3445 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
3446 | cmd->action = cpu_to_le32(MWL8K_USE_AUTO_RATE); | |
3447 | cmd->multicast_rate = mcast; | |
3448 | cmd->management_rate = mgmt; | |
3449 | ||
3450 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
3451 | kfree(cmd); | |
3452 | ||
3453 | return rc; | |
3454 | } | |
3455 | ||
55489b6e LB |
3456 | /* |
3457 | * CMD_ENABLE_SNIFFER. | |
3458 | */ | |
3459 | struct mwl8k_cmd_enable_sniffer { | |
3460 | struct mwl8k_cmd_pkt header; | |
3461 | __le32 action; | |
ba2d3587 | 3462 | } __packed; |
55489b6e LB |
3463 | |
3464 | static int mwl8k_cmd_enable_sniffer(struct ieee80211_hw *hw, bool enable) | |
3465 | { | |
3466 | struct mwl8k_cmd_enable_sniffer *cmd; | |
3467 | int rc; | |
3468 | ||
3469 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
3470 | if (cmd == NULL) | |
3471 | return -ENOMEM; | |
3472 | ||
3473 | cmd->header.code = cpu_to_le16(MWL8K_CMD_ENABLE_SNIFFER); | |
3474 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
3475 | cmd->action = cpu_to_le32(!!enable); | |
3476 | ||
3477 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
3478 | kfree(cmd); | |
3479 | ||
3480 | return rc; | |
3481 | } | |
3482 | ||
197a4e4e | 3483 | struct mwl8k_cmd_update_mac_addr { |
55489b6e LB |
3484 | struct mwl8k_cmd_pkt header; |
3485 | union { | |
3486 | struct { | |
3487 | __le16 mac_type; | |
3488 | __u8 mac_addr[ETH_ALEN]; | |
3489 | } mbss; | |
3490 | __u8 mac_addr[ETH_ALEN]; | |
3491 | }; | |
ba2d3587 | 3492 | } __packed; |
55489b6e | 3493 | |
ee0ddf18 LB |
3494 | #define MWL8K_MAC_TYPE_PRIMARY_CLIENT 0 |
3495 | #define MWL8K_MAC_TYPE_SECONDARY_CLIENT 1 | |
3496 | #define MWL8K_MAC_TYPE_PRIMARY_AP 2 | |
3497 | #define MWL8K_MAC_TYPE_SECONDARY_AP 3 | |
a9e00b15 | 3498 | |
197a4e4e YAP |
3499 | static int mwl8k_cmd_update_mac_addr(struct ieee80211_hw *hw, |
3500 | struct ieee80211_vif *vif, u8 *mac, bool set) | |
55489b6e LB |
3501 | { |
3502 | struct mwl8k_priv *priv = hw->priv; | |
ee0ddf18 | 3503 | struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif); |
197a4e4e | 3504 | struct mwl8k_cmd_update_mac_addr *cmd; |
ee0ddf18 | 3505 | int mac_type; |
55489b6e LB |
3506 | int rc; |
3507 | ||
ee0ddf18 LB |
3508 | mac_type = MWL8K_MAC_TYPE_PRIMARY_AP; |
3509 | if (vif != NULL && vif->type == NL80211_IFTYPE_STATION) { | |
3510 | if (mwl8k_vif->macid + 1 == ffs(priv->sta_macids_supported)) | |
3511 | mac_type = MWL8K_MAC_TYPE_PRIMARY_CLIENT; | |
3512 | else | |
3513 | mac_type = MWL8K_MAC_TYPE_SECONDARY_CLIENT; | |
3514 | } else if (vif != NULL && vif->type == NL80211_IFTYPE_AP) { | |
3515 | if (mwl8k_vif->macid + 1 == ffs(priv->ap_macids_supported)) | |
3516 | mac_type = MWL8K_MAC_TYPE_PRIMARY_AP; | |
3517 | else | |
3518 | mac_type = MWL8K_MAC_TYPE_SECONDARY_AP; | |
3519 | } | |
3520 | ||
55489b6e LB |
3521 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); |
3522 | if (cmd == NULL) | |
3523 | return -ENOMEM; | |
3524 | ||
197a4e4e YAP |
3525 | if (set) |
3526 | cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_MAC_ADDR); | |
3527 | else | |
3528 | cmd->header.code = cpu_to_le16(MWL8K_CMD_DEL_MAC_ADDR); | |
3529 | ||
55489b6e LB |
3530 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); |
3531 | if (priv->ap_fw) { | |
ee0ddf18 | 3532 | cmd->mbss.mac_type = cpu_to_le16(mac_type); |
55489b6e LB |
3533 | memcpy(cmd->mbss.mac_addr, mac, ETH_ALEN); |
3534 | } else { | |
3535 | memcpy(cmd->mac_addr, mac, ETH_ALEN); | |
3536 | } | |
3537 | ||
aa21d0f6 | 3538 | rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header); |
55489b6e LB |
3539 | kfree(cmd); |
3540 | ||
3541 | return rc; | |
3542 | } | |
3543 | ||
197a4e4e YAP |
3544 | /* |
3545 | * MWL8K_CMD_SET_MAC_ADDR. | |
3546 | */ | |
3547 | static inline int mwl8k_cmd_set_mac_addr(struct ieee80211_hw *hw, | |
3548 | struct ieee80211_vif *vif, u8 *mac) | |
3549 | { | |
3550 | return mwl8k_cmd_update_mac_addr(hw, vif, mac, true); | |
3551 | } | |
3552 | ||
3553 | /* | |
3554 | * MWL8K_CMD_DEL_MAC_ADDR. | |
3555 | */ | |
3556 | static inline int mwl8k_cmd_del_mac_addr(struct ieee80211_hw *hw, | |
3557 | struct ieee80211_vif *vif, u8 *mac) | |
3558 | { | |
3559 | return mwl8k_cmd_update_mac_addr(hw, vif, mac, false); | |
3560 | } | |
3561 | ||
55489b6e LB |
3562 | /* |
3563 | * CMD_SET_RATEADAPT_MODE. | |
3564 | */ | |
3565 | struct mwl8k_cmd_set_rate_adapt_mode { | |
3566 | struct mwl8k_cmd_pkt header; | |
3567 | __le16 action; | |
3568 | __le16 mode; | |
ba2d3587 | 3569 | } __packed; |
55489b6e LB |
3570 | |
3571 | static int mwl8k_cmd_set_rateadapt_mode(struct ieee80211_hw *hw, __u16 mode) | |
3572 | { | |
3573 | struct mwl8k_cmd_set_rate_adapt_mode *cmd; | |
3574 | int rc; | |
3575 | ||
3576 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
3577 | if (cmd == NULL) | |
3578 | return -ENOMEM; | |
3579 | ||
3580 | cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RATEADAPT_MODE); | |
3581 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
3582 | cmd->action = cpu_to_le16(MWL8K_CMD_SET); | |
3583 | cmd->mode = cpu_to_le16(mode); | |
3584 | ||
3585 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
3586 | kfree(cmd); | |
3587 | ||
3588 | return rc; | |
3589 | } | |
3590 | ||
3aefc37e NS |
3591 | /* |
3592 | * CMD_GET_WATCHDOG_BITMAP. | |
3593 | */ | |
3594 | struct mwl8k_cmd_get_watchdog_bitmap { | |
3595 | struct mwl8k_cmd_pkt header; | |
3596 | u8 bitmap; | |
3597 | } __packed; | |
3598 | ||
3599 | static int mwl8k_cmd_get_watchdog_bitmap(struct ieee80211_hw *hw, u8 *bitmap) | |
3600 | { | |
3601 | struct mwl8k_cmd_get_watchdog_bitmap *cmd; | |
3602 | int rc; | |
3603 | ||
3604 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
3605 | if (cmd == NULL) | |
3606 | return -ENOMEM; | |
3607 | ||
3608 | cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_WATCHDOG_BITMAP); | |
3609 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
3610 | ||
3611 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
3612 | if (!rc) | |
3613 | *bitmap = cmd->bitmap; | |
3614 | ||
3615 | kfree(cmd); | |
3616 | ||
3617 | return rc; | |
3618 | } | |
3619 | ||
cfacba12 YAP |
3620 | #define MWL8K_WMM_QUEUE_NUMBER 3 |
3621 | ||
3622 | static void mwl8k_destroy_ba(struct ieee80211_hw *hw, | |
3623 | u8 idx); | |
3624 | ||
3aefc37e NS |
3625 | static void mwl8k_watchdog_ba_events(struct work_struct *work) |
3626 | { | |
3627 | int rc; | |
3628 | u8 bitmap = 0, stream_index; | |
3629 | struct mwl8k_ampdu_stream *streams; | |
3630 | struct mwl8k_priv *priv = | |
3631 | container_of(work, struct mwl8k_priv, watchdog_ba_handle); | |
cfacba12 YAP |
3632 | struct ieee80211_hw *hw = priv->hw; |
3633 | int i; | |
3634 | u32 status = 0; | |
3635 | ||
3636 | mwl8k_fw_lock(hw); | |
3aefc37e NS |
3637 | |
3638 | rc = mwl8k_cmd_get_watchdog_bitmap(priv->hw, &bitmap); | |
3639 | if (rc) | |
cfacba12 | 3640 | goto done; |
3aefc37e | 3641 | |
cfacba12 | 3642 | spin_lock(&priv->stream_lock); |
3aefc37e NS |
3643 | |
3644 | /* the bitmap is the hw queue number. Map it to the ampdu queue. */ | |
cfacba12 YAP |
3645 | for (i = 0; i < TOTAL_HW_TX_QUEUES; i++) { |
3646 | if (bitmap & (1 << i)) { | |
3647 | stream_index = (i + MWL8K_WMM_QUEUE_NUMBER) % | |
3648 | TOTAL_HW_TX_QUEUES; | |
3649 | streams = &priv->ampdu[stream_index]; | |
3650 | if (streams->state == AMPDU_STREAM_ACTIVE) { | |
3651 | ieee80211_stop_tx_ba_session(streams->sta, | |
3652 | streams->tid); | |
3653 | spin_unlock(&priv->stream_lock); | |
3654 | mwl8k_destroy_ba(hw, stream_index); | |
3655 | spin_lock(&priv->stream_lock); | |
3656 | } | |
3657 | } | |
3658 | } | |
3aefc37e | 3659 | |
cfacba12 YAP |
3660 | spin_unlock(&priv->stream_lock); |
3661 | done: | |
c27a54d3 | 3662 | atomic_dec(&priv->watchdog_event_pending); |
cfacba12 YAP |
3663 | status = ioread32(priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK); |
3664 | iowrite32((status | MWL8K_A2H_INT_BA_WATCHDOG), | |
3665 | priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK); | |
3666 | mwl8k_fw_unlock(hw); | |
3aefc37e NS |
3667 | return; |
3668 | } | |
3669 | ||
3670 | ||
b64fe619 LB |
3671 | /* |
3672 | * CMD_BSS_START. | |
3673 | */ | |
3674 | struct mwl8k_cmd_bss_start { | |
3675 | struct mwl8k_cmd_pkt header; | |
3676 | __le32 enable; | |
ba2d3587 | 3677 | } __packed; |
b64fe619 | 3678 | |
aa21d0f6 LB |
3679 | static int mwl8k_cmd_bss_start(struct ieee80211_hw *hw, |
3680 | struct ieee80211_vif *vif, int enable) | |
b64fe619 LB |
3681 | { |
3682 | struct mwl8k_cmd_bss_start *cmd; | |
3683 | int rc; | |
3684 | ||
3685 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
3686 | if (cmd == NULL) | |
3687 | return -ENOMEM; | |
3688 | ||
3689 | cmd->header.code = cpu_to_le16(MWL8K_CMD_BSS_START); | |
3690 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
3691 | cmd->enable = cpu_to_le32(enable); | |
3692 | ||
aa21d0f6 | 3693 | rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header); |
b64fe619 LB |
3694 | kfree(cmd); |
3695 | ||
3696 | return rc; | |
3697 | } | |
3698 | ||
5faa1aff NS |
3699 | /* |
3700 | * CMD_BASTREAM. | |
3701 | */ | |
3702 | ||
3703 | /* | |
3704 | * UPSTREAM is tx direction | |
3705 | */ | |
3706 | #define BASTREAM_FLAG_DIRECTION_UPSTREAM 0x00 | |
3707 | #define BASTREAM_FLAG_IMMEDIATE_TYPE 0x01 | |
3708 | ||
ba30c4a5 | 3709 | enum ba_stream_action_type { |
5faa1aff NS |
3710 | MWL8K_BA_CREATE, |
3711 | MWL8K_BA_UPDATE, | |
3712 | MWL8K_BA_DESTROY, | |
3713 | MWL8K_BA_FLUSH, | |
3714 | MWL8K_BA_CHECK, | |
ba30c4a5 | 3715 | }; |
5faa1aff NS |
3716 | |
3717 | ||
3718 | struct mwl8k_create_ba_stream { | |
3719 | __le32 flags; | |
3720 | __le32 idle_thrs; | |
3721 | __le32 bar_thrs; | |
3722 | __le32 window_size; | |
3723 | u8 peer_mac_addr[6]; | |
3724 | u8 dialog_token; | |
3725 | u8 tid; | |
3726 | u8 queue_id; | |
3727 | u8 param_info; | |
3728 | __le32 ba_context; | |
3729 | u8 reset_seq_no_flag; | |
3730 | __le16 curr_seq_no; | |
3731 | u8 sta_src_mac_addr[6]; | |
3732 | } __packed; | |
3733 | ||
3734 | struct mwl8k_destroy_ba_stream { | |
3735 | __le32 flags; | |
3736 | __le32 ba_context; | |
3737 | } __packed; | |
3738 | ||
3739 | struct mwl8k_cmd_bastream { | |
3740 | struct mwl8k_cmd_pkt header; | |
3741 | __le32 action; | |
3742 | union { | |
3743 | struct mwl8k_create_ba_stream create_params; | |
3744 | struct mwl8k_destroy_ba_stream destroy_params; | |
3745 | }; | |
3746 | } __packed; | |
3747 | ||
3748 | static int | |
f95275c4 YAP |
3749 | mwl8k_check_ba(struct ieee80211_hw *hw, struct mwl8k_ampdu_stream *stream, |
3750 | struct ieee80211_vif *vif) | |
5faa1aff NS |
3751 | { |
3752 | struct mwl8k_cmd_bastream *cmd; | |
3753 | int rc; | |
3754 | ||
3755 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
3756 | if (cmd == NULL) | |
3757 | return -ENOMEM; | |
3758 | ||
3759 | cmd->header.code = cpu_to_le16(MWL8K_CMD_BASTREAM); | |
3760 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
3761 | ||
3762 | cmd->action = cpu_to_le32(MWL8K_BA_CHECK); | |
3763 | ||
3764 | cmd->create_params.queue_id = stream->idx; | |
3765 | memcpy(&cmd->create_params.peer_mac_addr[0], stream->sta->addr, | |
3766 | ETH_ALEN); | |
3767 | cmd->create_params.tid = stream->tid; | |
3768 | ||
3769 | cmd->create_params.flags = | |
3770 | cpu_to_le32(BASTREAM_FLAG_IMMEDIATE_TYPE) | | |
3771 | cpu_to_le32(BASTREAM_FLAG_DIRECTION_UPSTREAM); | |
3772 | ||
f95275c4 | 3773 | rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header); |
5faa1aff NS |
3774 | |
3775 | kfree(cmd); | |
3776 | ||
3777 | return rc; | |
3778 | } | |
3779 | ||
3780 | static int | |
3781 | mwl8k_create_ba(struct ieee80211_hw *hw, struct mwl8k_ampdu_stream *stream, | |
f95275c4 | 3782 | u8 buf_size, struct ieee80211_vif *vif) |
5faa1aff NS |
3783 | { |
3784 | struct mwl8k_cmd_bastream *cmd; | |
3785 | int rc; | |
3786 | ||
3787 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
3788 | if (cmd == NULL) | |
3789 | return -ENOMEM; | |
3790 | ||
3791 | ||
3792 | cmd->header.code = cpu_to_le16(MWL8K_CMD_BASTREAM); | |
3793 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
3794 | ||
3795 | cmd->action = cpu_to_le32(MWL8K_BA_CREATE); | |
3796 | ||
3797 | cmd->create_params.bar_thrs = cpu_to_le32((u32)buf_size); | |
3798 | cmd->create_params.window_size = cpu_to_le32((u32)buf_size); | |
3799 | cmd->create_params.queue_id = stream->idx; | |
3800 | ||
3801 | memcpy(cmd->create_params.peer_mac_addr, stream->sta->addr, ETH_ALEN); | |
3802 | cmd->create_params.tid = stream->tid; | |
3803 | cmd->create_params.curr_seq_no = cpu_to_le16(0); | |
3804 | cmd->create_params.reset_seq_no_flag = 1; | |
3805 | ||
3806 | cmd->create_params.param_info = | |
3807 | (stream->sta->ht_cap.ampdu_factor & | |
3808 | IEEE80211_HT_AMPDU_PARM_FACTOR) | | |
3809 | ((stream->sta->ht_cap.ampdu_density << 2) & | |
3810 | IEEE80211_HT_AMPDU_PARM_DENSITY); | |
3811 | ||
3812 | cmd->create_params.flags = | |
3813 | cpu_to_le32(BASTREAM_FLAG_IMMEDIATE_TYPE | | |
3814 | BASTREAM_FLAG_DIRECTION_UPSTREAM); | |
3815 | ||
f95275c4 | 3816 | rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header); |
5faa1aff NS |
3817 | |
3818 | wiphy_debug(hw->wiphy, "Created a BA stream for %pM : tid %d\n", | |
3819 | stream->sta->addr, stream->tid); | |
3820 | kfree(cmd); | |
3821 | ||
3822 | return rc; | |
3823 | } | |
3824 | ||
3825 | static void mwl8k_destroy_ba(struct ieee80211_hw *hw, | |
07f6dda1 | 3826 | u8 idx) |
5faa1aff NS |
3827 | { |
3828 | struct mwl8k_cmd_bastream *cmd; | |
3829 | ||
3830 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
3831 | if (cmd == NULL) | |
3832 | return; | |
3833 | ||
3834 | cmd->header.code = cpu_to_le16(MWL8K_CMD_BASTREAM); | |
3835 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
3836 | cmd->action = cpu_to_le32(MWL8K_BA_DESTROY); | |
3837 | ||
07f6dda1 | 3838 | cmd->destroy_params.ba_context = cpu_to_le32(idx); |
5faa1aff NS |
3839 | mwl8k_post_cmd(hw, &cmd->header); |
3840 | ||
07f6dda1 | 3841 | wiphy_debug(hw->wiphy, "Deleted BA stream index %d\n", idx); |
5faa1aff NS |
3842 | |
3843 | kfree(cmd); | |
3844 | } | |
3845 | ||
3f5610ff LB |
3846 | /* |
3847 | * CMD_SET_NEW_STN. | |
3848 | */ | |
3849 | struct mwl8k_cmd_set_new_stn { | |
3850 | struct mwl8k_cmd_pkt header; | |
3851 | __le16 aid; | |
3852 | __u8 mac_addr[6]; | |
3853 | __le16 stn_id; | |
3854 | __le16 action; | |
3855 | __le16 rsvd; | |
3856 | __le32 legacy_rates; | |
3857 | __u8 ht_rates[4]; | |
3858 | __le16 cap_info; | |
3859 | __le16 ht_capabilities_info; | |
3860 | __u8 mac_ht_param_info; | |
3861 | __u8 rev; | |
3862 | __u8 control_channel; | |
3863 | __u8 add_channel; | |
3864 | __le16 op_mode; | |
3865 | __le16 stbc; | |
3866 | __u8 add_qos_info; | |
3867 | __u8 is_qos_sta; | |
3868 | __le32 fw_sta_ptr; | |
ba2d3587 | 3869 | } __packed; |
3f5610ff LB |
3870 | |
3871 | #define MWL8K_STA_ACTION_ADD 0 | |
3872 | #define MWL8K_STA_ACTION_REMOVE 2 | |
3873 | ||
3874 | static int mwl8k_cmd_set_new_stn_add(struct ieee80211_hw *hw, | |
3875 | struct ieee80211_vif *vif, | |
3876 | struct ieee80211_sta *sta) | |
3877 | { | |
3878 | struct mwl8k_cmd_set_new_stn *cmd; | |
8707d026 | 3879 | u32 rates; |
3f5610ff LB |
3880 | int rc; |
3881 | ||
3882 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
3883 | if (cmd == NULL) | |
3884 | return -ENOMEM; | |
3885 | ||
3886 | cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_NEW_STN); | |
3887 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
3888 | cmd->aid = cpu_to_le16(sta->aid); | |
3889 | memcpy(cmd->mac_addr, sta->addr, ETH_ALEN); | |
3890 | cmd->stn_id = cpu_to_le16(sta->aid); | |
3891 | cmd->action = cpu_to_le16(MWL8K_STA_ACTION_ADD); | |
8707d026 LB |
3892 | if (hw->conf.channel->band == IEEE80211_BAND_2GHZ) |
3893 | rates = sta->supp_rates[IEEE80211_BAND_2GHZ]; | |
3894 | else | |
3895 | rates = sta->supp_rates[IEEE80211_BAND_5GHZ] << 5; | |
3896 | cmd->legacy_rates = cpu_to_le32(rates); | |
3f5610ff LB |
3897 | if (sta->ht_cap.ht_supported) { |
3898 | cmd->ht_rates[0] = sta->ht_cap.mcs.rx_mask[0]; | |
3899 | cmd->ht_rates[1] = sta->ht_cap.mcs.rx_mask[1]; | |
3900 | cmd->ht_rates[2] = sta->ht_cap.mcs.rx_mask[2]; | |
3901 | cmd->ht_rates[3] = sta->ht_cap.mcs.rx_mask[3]; | |
3902 | cmd->ht_capabilities_info = cpu_to_le16(sta->ht_cap.cap); | |
3903 | cmd->mac_ht_param_info = (sta->ht_cap.ampdu_factor & 3) | | |
3904 | ((sta->ht_cap.ampdu_density & 7) << 2); | |
3905 | cmd->is_qos_sta = 1; | |
3906 | } | |
3907 | ||
aa21d0f6 | 3908 | rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header); |
3f5610ff LB |
3909 | kfree(cmd); |
3910 | ||
3911 | return rc; | |
3912 | } | |
3913 | ||
b64fe619 LB |
3914 | static int mwl8k_cmd_set_new_stn_add_self(struct ieee80211_hw *hw, |
3915 | struct ieee80211_vif *vif) | |
3916 | { | |
3917 | struct mwl8k_cmd_set_new_stn *cmd; | |
3918 | int rc; | |
3919 | ||
3920 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
3921 | if (cmd == NULL) | |
3922 | return -ENOMEM; | |
3923 | ||
3924 | cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_NEW_STN); | |
3925 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
3926 | memcpy(cmd->mac_addr, vif->addr, ETH_ALEN); | |
3927 | ||
aa21d0f6 | 3928 | rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header); |
b64fe619 LB |
3929 | kfree(cmd); |
3930 | ||
3931 | return rc; | |
3932 | } | |
3933 | ||
3f5610ff LB |
3934 | static int mwl8k_cmd_set_new_stn_del(struct ieee80211_hw *hw, |
3935 | struct ieee80211_vif *vif, u8 *addr) | |
3936 | { | |
3937 | struct mwl8k_cmd_set_new_stn *cmd; | |
3938 | int rc; | |
3939 | ||
3940 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
3941 | if (cmd == NULL) | |
3942 | return -ENOMEM; | |
3943 | ||
3944 | cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_NEW_STN); | |
3945 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
3946 | memcpy(cmd->mac_addr, addr, ETH_ALEN); | |
3947 | cmd->action = cpu_to_le16(MWL8K_STA_ACTION_REMOVE); | |
3948 | ||
aa21d0f6 | 3949 | rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header); |
3f5610ff LB |
3950 | kfree(cmd); |
3951 | ||
3952 | return rc; | |
3953 | } | |
3954 | ||
fcdc403c NS |
3955 | /* |
3956 | * CMD_UPDATE_ENCRYPTION. | |
3957 | */ | |
3958 | ||
3959 | #define MAX_ENCR_KEY_LENGTH 16 | |
3960 | #define MIC_KEY_LENGTH 8 | |
3961 | ||
3962 | struct mwl8k_cmd_update_encryption { | |
3963 | struct mwl8k_cmd_pkt header; | |
3964 | ||
3965 | __le32 action; | |
3966 | __le32 reserved; | |
3967 | __u8 mac_addr[6]; | |
3968 | __u8 encr_type; | |
3969 | ||
ba30c4a5 | 3970 | } __packed; |
fcdc403c NS |
3971 | |
3972 | struct mwl8k_cmd_set_key { | |
3973 | struct mwl8k_cmd_pkt header; | |
3974 | ||
3975 | __le32 action; | |
3976 | __le32 reserved; | |
3977 | __le16 length; | |
3978 | __le16 key_type_id; | |
3979 | __le32 key_info; | |
3980 | __le32 key_id; | |
3981 | __le16 key_len; | |
3982 | __u8 key_material[MAX_ENCR_KEY_LENGTH]; | |
3983 | __u8 tkip_tx_mic_key[MIC_KEY_LENGTH]; | |
3984 | __u8 tkip_rx_mic_key[MIC_KEY_LENGTH]; | |
3985 | __le16 tkip_rsc_low; | |
3986 | __le32 tkip_rsc_high; | |
3987 | __le16 tkip_tsc_low; | |
3988 | __le32 tkip_tsc_high; | |
3989 | __u8 mac_addr[6]; | |
ba30c4a5 | 3990 | } __packed; |
fcdc403c NS |
3991 | |
3992 | enum { | |
3993 | MWL8K_ENCR_ENABLE, | |
3994 | MWL8K_ENCR_SET_KEY, | |
3995 | MWL8K_ENCR_REMOVE_KEY, | |
3996 | MWL8K_ENCR_SET_GROUP_KEY, | |
3997 | }; | |
3998 | ||
3999 | #define MWL8K_UPDATE_ENCRYPTION_TYPE_WEP 0 | |
4000 | #define MWL8K_UPDATE_ENCRYPTION_TYPE_DISABLE 1 | |
4001 | #define MWL8K_UPDATE_ENCRYPTION_TYPE_TKIP 4 | |
4002 | #define MWL8K_UPDATE_ENCRYPTION_TYPE_MIXED 7 | |
4003 | #define MWL8K_UPDATE_ENCRYPTION_TYPE_AES 8 | |
4004 | ||
4005 | enum { | |
4006 | MWL8K_ALG_WEP, | |
4007 | MWL8K_ALG_TKIP, | |
4008 | MWL8K_ALG_CCMP, | |
4009 | }; | |
4010 | ||
4011 | #define MWL8K_KEY_FLAG_TXGROUPKEY 0x00000004 | |
4012 | #define MWL8K_KEY_FLAG_PAIRWISE 0x00000008 | |
4013 | #define MWL8K_KEY_FLAG_TSC_VALID 0x00000040 | |
4014 | #define MWL8K_KEY_FLAG_WEP_TXKEY 0x01000000 | |
4015 | #define MWL8K_KEY_FLAG_MICKEY_VALID 0x02000000 | |
4016 | ||
4017 | static int mwl8k_cmd_update_encryption_enable(struct ieee80211_hw *hw, | |
4018 | struct ieee80211_vif *vif, | |
4019 | u8 *addr, | |
4020 | u8 encr_type) | |
4021 | { | |
4022 | struct mwl8k_cmd_update_encryption *cmd; | |
4023 | int rc; | |
4024 | ||
4025 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
4026 | if (cmd == NULL) | |
4027 | return -ENOMEM; | |
4028 | ||
4029 | cmd->header.code = cpu_to_le16(MWL8K_CMD_UPDATE_ENCRYPTION); | |
4030 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
4031 | cmd->action = cpu_to_le32(MWL8K_ENCR_ENABLE); | |
4032 | memcpy(cmd->mac_addr, addr, ETH_ALEN); | |
4033 | cmd->encr_type = encr_type; | |
4034 | ||
4035 | rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header); | |
4036 | kfree(cmd); | |
4037 | ||
4038 | return rc; | |
4039 | } | |
4040 | ||
4041 | static int mwl8k_encryption_set_cmd_info(struct mwl8k_cmd_set_key *cmd, | |
4042 | u8 *addr, | |
4043 | struct ieee80211_key_conf *key) | |
4044 | { | |
4045 | cmd->header.code = cpu_to_le16(MWL8K_CMD_UPDATE_ENCRYPTION); | |
4046 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
4047 | cmd->length = cpu_to_le16(sizeof(*cmd) - | |
4048 | offsetof(struct mwl8k_cmd_set_key, length)); | |
4049 | cmd->key_id = cpu_to_le32(key->keyidx); | |
4050 | cmd->key_len = cpu_to_le16(key->keylen); | |
4051 | memcpy(cmd->mac_addr, addr, ETH_ALEN); | |
4052 | ||
4053 | switch (key->cipher) { | |
4054 | case WLAN_CIPHER_SUITE_WEP40: | |
4055 | case WLAN_CIPHER_SUITE_WEP104: | |
4056 | cmd->key_type_id = cpu_to_le16(MWL8K_ALG_WEP); | |
4057 | if (key->keyidx == 0) | |
4058 | cmd->key_info = cpu_to_le32(MWL8K_KEY_FLAG_WEP_TXKEY); | |
4059 | ||
4060 | break; | |
4061 | case WLAN_CIPHER_SUITE_TKIP: | |
4062 | cmd->key_type_id = cpu_to_le16(MWL8K_ALG_TKIP); | |
4063 | cmd->key_info = (key->flags & IEEE80211_KEY_FLAG_PAIRWISE) | |
4064 | ? cpu_to_le32(MWL8K_KEY_FLAG_PAIRWISE) | |
4065 | : cpu_to_le32(MWL8K_KEY_FLAG_TXGROUPKEY); | |
4066 | cmd->key_info |= cpu_to_le32(MWL8K_KEY_FLAG_MICKEY_VALID | |
4067 | | MWL8K_KEY_FLAG_TSC_VALID); | |
4068 | break; | |
4069 | case WLAN_CIPHER_SUITE_CCMP: | |
4070 | cmd->key_type_id = cpu_to_le16(MWL8K_ALG_CCMP); | |
4071 | cmd->key_info = (key->flags & IEEE80211_KEY_FLAG_PAIRWISE) | |
4072 | ? cpu_to_le32(MWL8K_KEY_FLAG_PAIRWISE) | |
4073 | : cpu_to_le32(MWL8K_KEY_FLAG_TXGROUPKEY); | |
4074 | break; | |
4075 | default: | |
4076 | return -ENOTSUPP; | |
4077 | } | |
4078 | ||
4079 | return 0; | |
4080 | } | |
4081 | ||
4082 | static int mwl8k_cmd_encryption_set_key(struct ieee80211_hw *hw, | |
4083 | struct ieee80211_vif *vif, | |
4084 | u8 *addr, | |
4085 | struct ieee80211_key_conf *key) | |
4086 | { | |
4087 | struct mwl8k_cmd_set_key *cmd; | |
4088 | int rc; | |
4089 | int keymlen; | |
4090 | u32 action; | |
4091 | u8 idx; | |
4092 | struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif); | |
4093 | ||
4094 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
4095 | if (cmd == NULL) | |
4096 | return -ENOMEM; | |
4097 | ||
4098 | rc = mwl8k_encryption_set_cmd_info(cmd, addr, key); | |
4099 | if (rc < 0) | |
4100 | goto done; | |
4101 | ||
4102 | idx = key->keyidx; | |
4103 | ||
4104 | if (key->flags & IEEE80211_KEY_FLAG_PAIRWISE) | |
4105 | action = MWL8K_ENCR_SET_KEY; | |
4106 | else | |
4107 | action = MWL8K_ENCR_SET_GROUP_KEY; | |
4108 | ||
4109 | switch (key->cipher) { | |
4110 | case WLAN_CIPHER_SUITE_WEP40: | |
4111 | case WLAN_CIPHER_SUITE_WEP104: | |
4112 | if (!mwl8k_vif->wep_key_conf[idx].enabled) { | |
4113 | memcpy(mwl8k_vif->wep_key_conf[idx].key, key, | |
4114 | sizeof(*key) + key->keylen); | |
4115 | mwl8k_vif->wep_key_conf[idx].enabled = 1; | |
4116 | } | |
4117 | ||
9b571e24 | 4118 | keymlen = key->keylen; |
fcdc403c NS |
4119 | action = MWL8K_ENCR_SET_KEY; |
4120 | break; | |
4121 | case WLAN_CIPHER_SUITE_TKIP: | |
4122 | keymlen = MAX_ENCR_KEY_LENGTH + 2 * MIC_KEY_LENGTH; | |
4123 | break; | |
4124 | case WLAN_CIPHER_SUITE_CCMP: | |
4125 | keymlen = key->keylen; | |
4126 | break; | |
4127 | default: | |
4128 | rc = -ENOTSUPP; | |
4129 | goto done; | |
4130 | } | |
4131 | ||
4132 | memcpy(cmd->key_material, key->key, keymlen); | |
4133 | cmd->action = cpu_to_le32(action); | |
4134 | ||
4135 | rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header); | |
4136 | done: | |
4137 | kfree(cmd); | |
4138 | ||
4139 | return rc; | |
4140 | } | |
4141 | ||
4142 | static int mwl8k_cmd_encryption_remove_key(struct ieee80211_hw *hw, | |
4143 | struct ieee80211_vif *vif, | |
4144 | u8 *addr, | |
4145 | struct ieee80211_key_conf *key) | |
4146 | { | |
4147 | struct mwl8k_cmd_set_key *cmd; | |
4148 | int rc; | |
4149 | struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif); | |
4150 | ||
4151 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
4152 | if (cmd == NULL) | |
4153 | return -ENOMEM; | |
4154 | ||
4155 | rc = mwl8k_encryption_set_cmd_info(cmd, addr, key); | |
4156 | if (rc < 0) | |
4157 | goto done; | |
4158 | ||
4159 | if (key->cipher == WLAN_CIPHER_SUITE_WEP40 || | |
d981e059 | 4160 | key->cipher == WLAN_CIPHER_SUITE_WEP104) |
fcdc403c NS |
4161 | mwl8k_vif->wep_key_conf[key->keyidx].enabled = 0; |
4162 | ||
4163 | cmd->action = cpu_to_le32(MWL8K_ENCR_REMOVE_KEY); | |
4164 | ||
4165 | rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header); | |
4166 | done: | |
4167 | kfree(cmd); | |
4168 | ||
4169 | return rc; | |
4170 | } | |
4171 | ||
4172 | static int mwl8k_set_key(struct ieee80211_hw *hw, | |
4173 | enum set_key_cmd cmd_param, | |
4174 | struct ieee80211_vif *vif, | |
4175 | struct ieee80211_sta *sta, | |
4176 | struct ieee80211_key_conf *key) | |
4177 | { | |
4178 | int rc = 0; | |
4179 | u8 encr_type; | |
4180 | u8 *addr; | |
4181 | struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif); | |
4182 | ||
4183 | if (vif->type == NL80211_IFTYPE_STATION) | |
4184 | return -EOPNOTSUPP; | |
4185 | ||
4186 | if (sta == NULL) | |
ff7e9f99 | 4187 | addr = vif->addr; |
fcdc403c NS |
4188 | else |
4189 | addr = sta->addr; | |
4190 | ||
4191 | if (cmd_param == SET_KEY) { | |
fcdc403c NS |
4192 | rc = mwl8k_cmd_encryption_set_key(hw, vif, addr, key); |
4193 | if (rc) | |
4194 | goto out; | |
4195 | ||
4196 | if ((key->cipher == WLAN_CIPHER_SUITE_WEP40) | |
4197 | || (key->cipher == WLAN_CIPHER_SUITE_WEP104)) | |
4198 | encr_type = MWL8K_UPDATE_ENCRYPTION_TYPE_WEP; | |
4199 | else | |
4200 | encr_type = MWL8K_UPDATE_ENCRYPTION_TYPE_MIXED; | |
4201 | ||
4202 | rc = mwl8k_cmd_update_encryption_enable(hw, vif, addr, | |
4203 | encr_type); | |
4204 | if (rc) | |
4205 | goto out; | |
4206 | ||
4207 | mwl8k_vif->is_hw_crypto_enabled = true; | |
4208 | ||
4209 | } else { | |
4210 | rc = mwl8k_cmd_encryption_remove_key(hw, vif, addr, key); | |
4211 | ||
4212 | if (rc) | |
4213 | goto out; | |
fcdc403c NS |
4214 | } |
4215 | out: | |
4216 | return rc; | |
4217 | } | |
4218 | ||
55489b6e LB |
4219 | /* |
4220 | * CMD_UPDATE_STADB. | |
4221 | */ | |
25d81b1e LB |
4222 | struct ewc_ht_info { |
4223 | __le16 control1; | |
4224 | __le16 control2; | |
4225 | __le16 control3; | |
ba2d3587 | 4226 | } __packed; |
25d81b1e LB |
4227 | |
4228 | struct peer_capability_info { | |
4229 | /* Peer type - AP vs. STA. */ | |
4230 | __u8 peer_type; | |
4231 | ||
4232 | /* Basic 802.11 capabilities from assoc resp. */ | |
4233 | __le16 basic_caps; | |
4234 | ||
4235 | /* Set if peer supports 802.11n high throughput (HT). */ | |
4236 | __u8 ht_support; | |
4237 | ||
4238 | /* Valid if HT is supported. */ | |
4239 | __le16 ht_caps; | |
4240 | __u8 extended_ht_caps; | |
4241 | struct ewc_ht_info ewc_info; | |
4242 | ||
4243 | /* Legacy rate table. Intersection of our rates and peer rates. */ | |
4244 | __u8 legacy_rates[12]; | |
4245 | ||
4246 | /* HT rate table. Intersection of our rates and peer rates. */ | |
4247 | __u8 ht_rates[16]; | |
4248 | __u8 pad[16]; | |
4249 | ||
4250 | /* If set, interoperability mode, no proprietary extensions. */ | |
4251 | __u8 interop; | |
4252 | __u8 pad2; | |
4253 | __u8 station_id; | |
4254 | __le16 amsdu_enabled; | |
ba2d3587 | 4255 | } __packed; |
25d81b1e | 4256 | |
55489b6e LB |
4257 | struct mwl8k_cmd_update_stadb { |
4258 | struct mwl8k_cmd_pkt header; | |
4259 | ||
4260 | /* See STADB_ACTION_TYPE */ | |
4261 | __le32 action; | |
4262 | ||
4263 | /* Peer MAC address */ | |
4264 | __u8 peer_addr[ETH_ALEN]; | |
4265 | ||
4266 | __le32 reserved; | |
4267 | ||
4268 | /* Peer info - valid during add/update. */ | |
4269 | struct peer_capability_info peer_info; | |
ba2d3587 | 4270 | } __packed; |
55489b6e | 4271 | |
a680400e LB |
4272 | #define MWL8K_STA_DB_MODIFY_ENTRY 1 |
4273 | #define MWL8K_STA_DB_DEL_ENTRY 2 | |
4274 | ||
4275 | /* Peer Entry flags - used to define the type of the peer node */ | |
4276 | #define MWL8K_PEER_TYPE_ACCESSPOINT 2 | |
4277 | ||
4278 | static int mwl8k_cmd_update_stadb_add(struct ieee80211_hw *hw, | |
c6e96010 | 4279 | struct ieee80211_vif *vif, |
13935e2c | 4280 | struct ieee80211_sta *sta) |
55489b6e | 4281 | { |
55489b6e | 4282 | struct mwl8k_cmd_update_stadb *cmd; |
a680400e | 4283 | struct peer_capability_info *p; |
8707d026 | 4284 | u32 rates; |
55489b6e LB |
4285 | int rc; |
4286 | ||
4287 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
4288 | if (cmd == NULL) | |
4289 | return -ENOMEM; | |
4290 | ||
4291 | cmd->header.code = cpu_to_le16(MWL8K_CMD_UPDATE_STADB); | |
4292 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
a680400e | 4293 | cmd->action = cpu_to_le32(MWL8K_STA_DB_MODIFY_ENTRY); |
13935e2c | 4294 | memcpy(cmd->peer_addr, sta->addr, ETH_ALEN); |
55489b6e | 4295 | |
a680400e LB |
4296 | p = &cmd->peer_info; |
4297 | p->peer_type = MWL8K_PEER_TYPE_ACCESSPOINT; | |
4298 | p->basic_caps = cpu_to_le16(vif->bss_conf.assoc_capability); | |
13935e2c | 4299 | p->ht_support = sta->ht_cap.ht_supported; |
b603742f | 4300 | p->ht_caps = cpu_to_le16(sta->ht_cap.cap); |
13935e2c LB |
4301 | p->extended_ht_caps = (sta->ht_cap.ampdu_factor & 3) | |
4302 | ((sta->ht_cap.ampdu_density & 7) << 2); | |
8707d026 LB |
4303 | if (hw->conf.channel->band == IEEE80211_BAND_2GHZ) |
4304 | rates = sta->supp_rates[IEEE80211_BAND_2GHZ]; | |
4305 | else | |
4306 | rates = sta->supp_rates[IEEE80211_BAND_5GHZ] << 5; | |
4307 | legacy_rate_mask_to_array(p->legacy_rates, rates); | |
13935e2c | 4308 | memcpy(p->ht_rates, sta->ht_cap.mcs.rx_mask, 16); |
a680400e LB |
4309 | p->interop = 1; |
4310 | p->amsdu_enabled = 0; | |
4311 | ||
4312 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
4313 | kfree(cmd); | |
4314 | ||
4315 | return rc ? rc : p->station_id; | |
4316 | } | |
4317 | ||
4318 | static int mwl8k_cmd_update_stadb_del(struct ieee80211_hw *hw, | |
4319 | struct ieee80211_vif *vif, u8 *addr) | |
4320 | { | |
4321 | struct mwl8k_cmd_update_stadb *cmd; | |
4322 | int rc; | |
4323 | ||
4324 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
4325 | if (cmd == NULL) | |
4326 | return -ENOMEM; | |
4327 | ||
4328 | cmd->header.code = cpu_to_le16(MWL8K_CMD_UPDATE_STADB); | |
4329 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
4330 | cmd->action = cpu_to_le32(MWL8K_STA_DB_DEL_ENTRY); | |
bbfd9128 | 4331 | memcpy(cmd->peer_addr, addr, ETH_ALEN); |
55489b6e | 4332 | |
a680400e | 4333 | rc = mwl8k_post_cmd(hw, &cmd->header); |
55489b6e LB |
4334 | kfree(cmd); |
4335 | ||
4336 | return rc; | |
4337 | } | |
4338 | ||
a66098da LB |
4339 | |
4340 | /* | |
4341 | * Interrupt handling. | |
4342 | */ | |
4343 | static irqreturn_t mwl8k_interrupt(int irq, void *dev_id) | |
4344 | { | |
4345 | struct ieee80211_hw *hw = dev_id; | |
4346 | struct mwl8k_priv *priv = hw->priv; | |
4347 | u32 status; | |
4348 | ||
4349 | status = ioread32(priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS); | |
a66098da LB |
4350 | if (!status) |
4351 | return IRQ_NONE; | |
4352 | ||
1e9f9de3 LB |
4353 | if (status & MWL8K_A2H_INT_TX_DONE) { |
4354 | status &= ~MWL8K_A2H_INT_TX_DONE; | |
4355 | tasklet_schedule(&priv->poll_tx_task); | |
4356 | } | |
4357 | ||
a66098da | 4358 | if (status & MWL8K_A2H_INT_RX_READY) { |
67e2eb27 LB |
4359 | status &= ~MWL8K_A2H_INT_RX_READY; |
4360 | tasklet_schedule(&priv->poll_rx_task); | |
a66098da LB |
4361 | } |
4362 | ||
3aefc37e | 4363 | if (status & MWL8K_A2H_INT_BA_WATCHDOG) { |
c27a54d3 YAP |
4364 | iowrite32(~MWL8K_A2H_INT_BA_WATCHDOG, |
4365 | priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK); | |
4366 | ||
4367 | atomic_inc(&priv->watchdog_event_pending); | |
3aefc37e NS |
4368 | status &= ~MWL8K_A2H_INT_BA_WATCHDOG; |
4369 | ieee80211_queue_work(hw, &priv->watchdog_ba_handle); | |
4370 | } | |
4371 | ||
67e2eb27 LB |
4372 | if (status) |
4373 | iowrite32(~status, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS); | |
4374 | ||
a66098da | 4375 | if (status & MWL8K_A2H_INT_OPC_DONE) { |
618952a7 | 4376 | if (priv->hostcmd_wait != NULL) |
a66098da | 4377 | complete(priv->hostcmd_wait); |
a66098da LB |
4378 | } |
4379 | ||
4380 | if (status & MWL8K_A2H_INT_QUEUE_EMPTY) { | |
618952a7 | 4381 | if (!mutex_is_locked(&priv->fw_mutex) && |
88de754a | 4382 | priv->radio_on && priv->pending_tx_pkts) |
618952a7 | 4383 | mwl8k_tx_start(priv); |
a66098da LB |
4384 | } |
4385 | ||
4386 | return IRQ_HANDLED; | |
4387 | } | |
4388 | ||
1e9f9de3 LB |
4389 | static void mwl8k_tx_poll(unsigned long data) |
4390 | { | |
4391 | struct ieee80211_hw *hw = (struct ieee80211_hw *)data; | |
4392 | struct mwl8k_priv *priv = hw->priv; | |
4393 | int limit; | |
4394 | int i; | |
4395 | ||
4396 | limit = 32; | |
4397 | ||
4398 | spin_lock_bh(&priv->tx_lock); | |
4399 | ||
e600707b | 4400 | for (i = 0; i < mwl8k_tx_queues(priv); i++) |
1e9f9de3 LB |
4401 | limit -= mwl8k_txq_reclaim(hw, i, limit, 0); |
4402 | ||
4403 | if (!priv->pending_tx_pkts && priv->tx_wait != NULL) { | |
4404 | complete(priv->tx_wait); | |
4405 | priv->tx_wait = NULL; | |
4406 | } | |
4407 | ||
4408 | spin_unlock_bh(&priv->tx_lock); | |
4409 | ||
4410 | if (limit) { | |
4411 | writel(~MWL8K_A2H_INT_TX_DONE, | |
4412 | priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS); | |
4413 | } else { | |
4414 | tasklet_schedule(&priv->poll_tx_task); | |
4415 | } | |
4416 | } | |
4417 | ||
67e2eb27 LB |
4418 | static void mwl8k_rx_poll(unsigned long data) |
4419 | { | |
4420 | struct ieee80211_hw *hw = (struct ieee80211_hw *)data; | |
4421 | struct mwl8k_priv *priv = hw->priv; | |
4422 | int limit; | |
4423 | ||
4424 | limit = 32; | |
4425 | limit -= rxq_process(hw, 0, limit); | |
4426 | limit -= rxq_refill(hw, 0, limit); | |
4427 | ||
4428 | if (limit) { | |
4429 | writel(~MWL8K_A2H_INT_RX_READY, | |
4430 | priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS); | |
4431 | } else { | |
4432 | tasklet_schedule(&priv->poll_rx_task); | |
4433 | } | |
4434 | } | |
4435 | ||
a66098da LB |
4436 | |
4437 | /* | |
4438 | * Core driver operations. | |
4439 | */ | |
36323f81 TH |
4440 | static void mwl8k_tx(struct ieee80211_hw *hw, |
4441 | struct ieee80211_tx_control *control, | |
4442 | struct sk_buff *skb) | |
a66098da LB |
4443 | { |
4444 | struct mwl8k_priv *priv = hw->priv; | |
4445 | int index = skb_get_queue_mapping(skb); | |
a66098da | 4446 | |
9189c100 | 4447 | if (!priv->radio_on) { |
c96c31e4 JP |
4448 | wiphy_debug(hw->wiphy, |
4449 | "dropped TX frame since radio disabled\n"); | |
a66098da | 4450 | dev_kfree_skb(skb); |
7bb45683 | 4451 | return; |
a66098da LB |
4452 | } |
4453 | ||
36323f81 | 4454 | mwl8k_txq_xmit(hw, index, control->sta, skb); |
a66098da LB |
4455 | } |
4456 | ||
a66098da LB |
4457 | static int mwl8k_start(struct ieee80211_hw *hw) |
4458 | { | |
a66098da LB |
4459 | struct mwl8k_priv *priv = hw->priv; |
4460 | int rc; | |
4461 | ||
a0607fd3 | 4462 | rc = request_irq(priv->pdev->irq, mwl8k_interrupt, |
a66098da LB |
4463 | IRQF_SHARED, MWL8K_NAME, hw); |
4464 | if (rc) { | |
bf3ca7f7 | 4465 | priv->irq = -1; |
5db55844 | 4466 | wiphy_err(hw->wiphy, "failed to register IRQ handler\n"); |
2ec610cb | 4467 | return -EIO; |
a66098da | 4468 | } |
bf3ca7f7 | 4469 | priv->irq = priv->pdev->irq; |
a66098da | 4470 | |
67e2eb27 | 4471 | /* Enable TX reclaim and RX tasklets. */ |
1e9f9de3 | 4472 | tasklet_enable(&priv->poll_tx_task); |
67e2eb27 | 4473 | tasklet_enable(&priv->poll_rx_task); |
2ec610cb | 4474 | |
a66098da | 4475 | /* Enable interrupts */ |
c23b5a69 | 4476 | iowrite32(MWL8K_A2H_EVENTS, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK); |
12488e01 NS |
4477 | iowrite32(MWL8K_A2H_EVENTS, |
4478 | priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK); | |
a66098da | 4479 | |
2ec610cb LB |
4480 | rc = mwl8k_fw_lock(hw); |
4481 | if (!rc) { | |
55489b6e | 4482 | rc = mwl8k_cmd_radio_enable(hw); |
a66098da | 4483 | |
5e4cf166 LB |
4484 | if (!priv->ap_fw) { |
4485 | if (!rc) | |
55489b6e | 4486 | rc = mwl8k_cmd_enable_sniffer(hw, 0); |
a66098da | 4487 | |
5e4cf166 LB |
4488 | if (!rc) |
4489 | rc = mwl8k_cmd_set_pre_scan(hw); | |
4490 | ||
4491 | if (!rc) | |
4492 | rc = mwl8k_cmd_set_post_scan(hw, | |
4493 | "\x00\x00\x00\x00\x00\x00"); | |
4494 | } | |
2ec610cb LB |
4495 | |
4496 | if (!rc) | |
55489b6e | 4497 | rc = mwl8k_cmd_set_rateadapt_mode(hw, 0); |
a66098da | 4498 | |
2ec610cb | 4499 | if (!rc) |
55489b6e | 4500 | rc = mwl8k_cmd_set_wmm_mode(hw, 0); |
a66098da | 4501 | |
2ec610cb LB |
4502 | mwl8k_fw_unlock(hw); |
4503 | } | |
4504 | ||
4505 | if (rc) { | |
4506 | iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK); | |
4507 | free_irq(priv->pdev->irq, hw); | |
bf3ca7f7 | 4508 | priv->irq = -1; |
1e9f9de3 | 4509 | tasklet_disable(&priv->poll_tx_task); |
67e2eb27 | 4510 | tasklet_disable(&priv->poll_rx_task); |
2ec610cb | 4511 | } |
a66098da LB |
4512 | |
4513 | return rc; | |
4514 | } | |
4515 | ||
a66098da LB |
4516 | static void mwl8k_stop(struct ieee80211_hw *hw) |
4517 | { | |
a66098da LB |
4518 | struct mwl8k_priv *priv = hw->priv; |
4519 | int i; | |
4520 | ||
6b6accc3 YAP |
4521 | if (!priv->hw_restart_in_progress) |
4522 | mwl8k_cmd_radio_disable(hw); | |
a66098da LB |
4523 | |
4524 | ieee80211_stop_queues(hw); | |
4525 | ||
a66098da | 4526 | /* Disable interrupts */ |
a66098da | 4527 | iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK); |
bf3ca7f7 BC |
4528 | if (priv->irq != -1) { |
4529 | free_irq(priv->pdev->irq, hw); | |
4530 | priv->irq = -1; | |
4531 | } | |
a66098da LB |
4532 | |
4533 | /* Stop finalize join worker */ | |
4534 | cancel_work_sync(&priv->finalize_join_worker); | |
3aefc37e | 4535 | cancel_work_sync(&priv->watchdog_ba_handle); |
a66098da LB |
4536 | if (priv->beacon_skb != NULL) |
4537 | dev_kfree_skb(priv->beacon_skb); | |
4538 | ||
67e2eb27 | 4539 | /* Stop TX reclaim and RX tasklets. */ |
1e9f9de3 | 4540 | tasklet_disable(&priv->poll_tx_task); |
67e2eb27 | 4541 | tasklet_disable(&priv->poll_rx_task); |
a66098da | 4542 | |
a66098da | 4543 | /* Return all skbs to mac80211 */ |
e600707b | 4544 | for (i = 0; i < mwl8k_tx_queues(priv); i++) |
efb7c49a | 4545 | mwl8k_txq_reclaim(hw, i, INT_MAX, 1); |
a66098da LB |
4546 | } |
4547 | ||
0863ade8 BC |
4548 | static int mwl8k_reload_firmware(struct ieee80211_hw *hw, char *fw_image); |
4549 | ||
a66098da | 4550 | static int mwl8k_add_interface(struct ieee80211_hw *hw, |
f5bb87cf | 4551 | struct ieee80211_vif *vif) |
a66098da LB |
4552 | { |
4553 | struct mwl8k_priv *priv = hw->priv; | |
4554 | struct mwl8k_vif *mwl8k_vif; | |
ee0ddf18 | 4555 | u32 macids_supported; |
0863ade8 BC |
4556 | int macid, rc; |
4557 | struct mwl8k_device_info *di; | |
a66098da | 4558 | |
a43c49a8 LB |
4559 | /* |
4560 | * Reject interface creation if sniffer mode is active, as | |
4561 | * STA operation is mutually exclusive with hardware sniffer | |
b64fe619 | 4562 | * mode. (Sniffer mode is only used on STA firmware.) |
a43c49a8 LB |
4563 | */ |
4564 | if (priv->sniffer_enabled) { | |
c96c31e4 JP |
4565 | wiphy_info(hw->wiphy, |
4566 | "unable to create STA interface because sniffer mode is enabled\n"); | |
a43c49a8 LB |
4567 | return -EINVAL; |
4568 | } | |
4569 | ||
0863ade8 | 4570 | di = priv->device_info; |
ee0ddf18 LB |
4571 | switch (vif->type) { |
4572 | case NL80211_IFTYPE_AP: | |
0863ade8 BC |
4573 | if (!priv->ap_fw && di->fw_image_ap) { |
4574 | /* we must load the ap fw to meet this request */ | |
4575 | if (!list_empty(&priv->vif_list)) | |
4576 | return -EBUSY; | |
4577 | rc = mwl8k_reload_firmware(hw, di->fw_image_ap); | |
4578 | if (rc) | |
4579 | return rc; | |
4580 | } | |
ee0ddf18 LB |
4581 | macids_supported = priv->ap_macids_supported; |
4582 | break; | |
4583 | case NL80211_IFTYPE_STATION: | |
0863ade8 BC |
4584 | if (priv->ap_fw && di->fw_image_sta) { |
4585 | /* we must load the sta fw to meet this request */ | |
4586 | if (!list_empty(&priv->vif_list)) | |
4587 | return -EBUSY; | |
4588 | rc = mwl8k_reload_firmware(hw, di->fw_image_sta); | |
4589 | if (rc) | |
4590 | return rc; | |
4591 | } | |
ee0ddf18 LB |
4592 | macids_supported = priv->sta_macids_supported; |
4593 | break; | |
4594 | default: | |
4595 | return -EINVAL; | |
4596 | } | |
4597 | ||
4598 | macid = ffs(macids_supported & ~priv->macids_used); | |
4599 | if (!macid--) | |
4600 | return -EBUSY; | |
4601 | ||
f5bb87cf | 4602 | /* Setup driver private area. */ |
1ed32e4f | 4603 | mwl8k_vif = MWL8K_VIF(vif); |
a66098da | 4604 | memset(mwl8k_vif, 0, sizeof(*mwl8k_vif)); |
f5bb87cf | 4605 | mwl8k_vif->vif = vif; |
ee0ddf18 | 4606 | mwl8k_vif->macid = macid; |
a66098da | 4607 | mwl8k_vif->seqno = 0; |
d9a07d49 NS |
4608 | memcpy(mwl8k_vif->bssid, vif->addr, ETH_ALEN); |
4609 | mwl8k_vif->is_hw_crypto_enabled = false; | |
a66098da | 4610 | |
aa21d0f6 LB |
4611 | /* Set the mac address. */ |
4612 | mwl8k_cmd_set_mac_addr(hw, vif, vif->addr); | |
4613 | ||
4614 | if (priv->ap_fw) | |
4615 | mwl8k_cmd_set_new_stn_add_self(hw, vif); | |
4616 | ||
ee0ddf18 | 4617 | priv->macids_used |= 1 << mwl8k_vif->macid; |
f5bb87cf | 4618 | list_add_tail(&mwl8k_vif->list, &priv->vif_list); |
a66098da LB |
4619 | |
4620 | return 0; | |
4621 | } | |
4622 | ||
6b6accc3 YAP |
4623 | static void mwl8k_remove_vif(struct mwl8k_priv *priv, struct mwl8k_vif *vif) |
4624 | { | |
4625 | /* Has ieee80211_restart_hw re-added the removed interfaces? */ | |
4626 | if (!priv->macids_used) | |
4627 | return; | |
4628 | ||
4629 | priv->macids_used &= ~(1 << vif->macid); | |
4630 | list_del(&vif->list); | |
4631 | } | |
4632 | ||
a66098da | 4633 | static void mwl8k_remove_interface(struct ieee80211_hw *hw, |
1ed32e4f | 4634 | struct ieee80211_vif *vif) |
a66098da LB |
4635 | { |
4636 | struct mwl8k_priv *priv = hw->priv; | |
f5bb87cf | 4637 | struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif); |
a66098da | 4638 | |
b64fe619 LB |
4639 | if (priv->ap_fw) |
4640 | mwl8k_cmd_set_new_stn_del(hw, vif, vif->addr); | |
4641 | ||
197a4e4e | 4642 | mwl8k_cmd_del_mac_addr(hw, vif, vif->addr); |
32060e1b | 4643 | |
6b6accc3 YAP |
4644 | mwl8k_remove_vif(priv, mwl8k_vif); |
4645 | } | |
4646 | ||
4647 | static void mwl8k_hw_restart_work(struct work_struct *work) | |
4648 | { | |
4649 | struct mwl8k_priv *priv = | |
4650 | container_of(work, struct mwl8k_priv, fw_reload); | |
4651 | struct ieee80211_hw *hw = priv->hw; | |
4652 | struct mwl8k_device_info *di; | |
4653 | int rc; | |
4654 | ||
4655 | /* If some command is waiting for a response, clear it */ | |
4656 | if (priv->hostcmd_wait != NULL) { | |
4657 | complete(priv->hostcmd_wait); | |
4658 | priv->hostcmd_wait = NULL; | |
4659 | } | |
4660 | ||
4661 | priv->hw_restart_owner = current; | |
4662 | di = priv->device_info; | |
4663 | mwl8k_fw_lock(hw); | |
4664 | ||
4665 | if (priv->ap_fw) | |
4666 | rc = mwl8k_reload_firmware(hw, di->fw_image_ap); | |
4667 | else | |
4668 | rc = mwl8k_reload_firmware(hw, di->fw_image_sta); | |
4669 | ||
4670 | if (rc) | |
4671 | goto fail; | |
4672 | ||
4673 | priv->hw_restart_owner = NULL; | |
4674 | priv->hw_restart_in_progress = false; | |
4675 | ||
4676 | /* | |
4677 | * This unlock will wake up the queues and | |
4678 | * also opens the command path for other | |
4679 | * commands | |
4680 | */ | |
4681 | mwl8k_fw_unlock(hw); | |
4682 | ||
4683 | ieee80211_restart_hw(hw); | |
4684 | ||
4685 | wiphy_err(hw->wiphy, "Firmware restarted successfully\n"); | |
4686 | ||
4687 | return; | |
4688 | fail: | |
4689 | mwl8k_fw_unlock(hw); | |
4690 | ||
4691 | wiphy_err(hw->wiphy, "Firmware restart failed\n"); | |
a66098da LB |
4692 | } |
4693 | ||
ee03a932 | 4694 | static int mwl8k_config(struct ieee80211_hw *hw, u32 changed) |
a66098da | 4695 | { |
a66098da LB |
4696 | struct ieee80211_conf *conf = &hw->conf; |
4697 | struct mwl8k_priv *priv = hw->priv; | |
ee03a932 | 4698 | int rc; |
a66098da | 4699 | |
7595d67a | 4700 | if (conf->flags & IEEE80211_CONF_IDLE) { |
55489b6e | 4701 | mwl8k_cmd_radio_disable(hw); |
ee03a932 | 4702 | return 0; |
7595d67a LB |
4703 | } |
4704 | ||
ee03a932 LB |
4705 | rc = mwl8k_fw_lock(hw); |
4706 | if (rc) | |
4707 | return rc; | |
a66098da | 4708 | |
55489b6e | 4709 | rc = mwl8k_cmd_radio_enable(hw); |
ee03a932 LB |
4710 | if (rc) |
4711 | goto out; | |
a66098da | 4712 | |
610677d2 | 4713 | rc = mwl8k_cmd_set_rf_channel(hw, conf); |
ee03a932 LB |
4714 | if (rc) |
4715 | goto out; | |
4716 | ||
a66098da LB |
4717 | if (conf->power_level > 18) |
4718 | conf->power_level = 18; | |
a66098da | 4719 | |
08b06347 | 4720 | if (priv->ap_fw) { |
03217087 NS |
4721 | |
4722 | if (conf->flags & IEEE80211_CONF_CHANGE_POWER) { | |
4723 | rc = mwl8k_cmd_tx_power(hw, conf, conf->power_level); | |
4724 | if (rc) | |
4725 | goto out; | |
4726 | } | |
41fdf097 | 4727 | |
da62b761 NS |
4728 | rc = mwl8k_cmd_rf_antenna(hw, MWL8K_RF_ANTENNA_RX, 0x3); |
4729 | if (rc) | |
4730 | wiphy_warn(hw->wiphy, "failed to set # of RX antennas"); | |
4731 | rc = mwl8k_cmd_rf_antenna(hw, MWL8K_RF_ANTENNA_TX, 0x7); | |
4732 | if (rc) | |
4733 | wiphy_warn(hw->wiphy, "failed to set # of TX antennas"); | |
4734 | ||
08b06347 | 4735 | } else { |
41fdf097 NS |
4736 | rc = mwl8k_cmd_rf_tx_power(hw, conf->power_level); |
4737 | if (rc) | |
4738 | goto out; | |
08b06347 LB |
4739 | rc = mwl8k_cmd_mimo_config(hw, 0x7, 0x7); |
4740 | } | |
a66098da | 4741 | |
ee03a932 LB |
4742 | out: |
4743 | mwl8k_fw_unlock(hw); | |
a66098da | 4744 | |
ee03a932 | 4745 | return rc; |
a66098da LB |
4746 | } |
4747 | ||
b64fe619 LB |
4748 | static void |
4749 | mwl8k_bss_info_changed_sta(struct ieee80211_hw *hw, struct ieee80211_vif *vif, | |
4750 | struct ieee80211_bss_conf *info, u32 changed) | |
a66098da | 4751 | { |
a66098da | 4752 | struct mwl8k_priv *priv = hw->priv; |
ba30c4a5 | 4753 | u32 ap_legacy_rates = 0; |
13935e2c | 4754 | u8 ap_mcs_rates[16]; |
3a980d0a LB |
4755 | int rc; |
4756 | ||
c3cbbe8a | 4757 | if (mwl8k_fw_lock(hw)) |
3a980d0a | 4758 | return; |
a66098da | 4759 | |
c3cbbe8a LB |
4760 | /* |
4761 | * No need to capture a beacon if we're no longer associated. | |
4762 | */ | |
4763 | if ((changed & BSS_CHANGED_ASSOC) && !vif->bss_conf.assoc) | |
4764 | priv->capture_beacon = false; | |
3a980d0a | 4765 | |
c3cbbe8a | 4766 | /* |
13935e2c | 4767 | * Get the AP's legacy and MCS rates. |
c3cbbe8a | 4768 | */ |
7dc6a7a7 | 4769 | if (vif->bss_conf.assoc) { |
c6e96010 | 4770 | struct ieee80211_sta *ap; |
c97470dd | 4771 | |
c6e96010 | 4772 | rcu_read_lock(); |
c6e96010 | 4773 | |
c3cbbe8a LB |
4774 | ap = ieee80211_find_sta(vif, vif->bss_conf.bssid); |
4775 | if (ap == NULL) { | |
4776 | rcu_read_unlock(); | |
c6e96010 | 4777 | goto out; |
c3cbbe8a LB |
4778 | } |
4779 | ||
8707d026 LB |
4780 | if (hw->conf.channel->band == IEEE80211_BAND_2GHZ) { |
4781 | ap_legacy_rates = ap->supp_rates[IEEE80211_BAND_2GHZ]; | |
4782 | } else { | |
4783 | ap_legacy_rates = | |
4784 | ap->supp_rates[IEEE80211_BAND_5GHZ] << 5; | |
4785 | } | |
13935e2c | 4786 | memcpy(ap_mcs_rates, ap->ht_cap.mcs.rx_mask, 16); |
c3cbbe8a LB |
4787 | |
4788 | rcu_read_unlock(); | |
4789 | } | |
c6e96010 | 4790 | |
c3cbbe8a | 4791 | if ((changed & BSS_CHANGED_ASSOC) && vif->bss_conf.assoc) { |
13935e2c | 4792 | rc = mwl8k_cmd_set_rate(hw, vif, ap_legacy_rates, ap_mcs_rates); |
3a980d0a LB |
4793 | if (rc) |
4794 | goto out; | |
a66098da | 4795 | |
b71ed2c6 | 4796 | rc = mwl8k_cmd_use_fixed_rate_sta(hw); |
3a980d0a LB |
4797 | if (rc) |
4798 | goto out; | |
c3cbbe8a | 4799 | } |
a66098da | 4800 | |
c3cbbe8a | 4801 | if (changed & BSS_CHANGED_ERP_PREAMBLE) { |
7dc6a7a7 LB |
4802 | rc = mwl8k_set_radio_preamble(hw, |
4803 | vif->bss_conf.use_short_preamble); | |
3a980d0a LB |
4804 | if (rc) |
4805 | goto out; | |
c3cbbe8a | 4806 | } |
a66098da | 4807 | |
c3cbbe8a | 4808 | if (changed & BSS_CHANGED_ERP_SLOT) { |
7dc6a7a7 | 4809 | rc = mwl8k_cmd_set_slot(hw, vif->bss_conf.use_short_slot); |
3a980d0a LB |
4810 | if (rc) |
4811 | goto out; | |
c3cbbe8a | 4812 | } |
a66098da | 4813 | |
c97470dd LB |
4814 | if (vif->bss_conf.assoc && |
4815 | (changed & (BSS_CHANGED_ASSOC | BSS_CHANGED_ERP_CTS_PROT | | |
4816 | BSS_CHANGED_HT))) { | |
c3cbbe8a | 4817 | rc = mwl8k_cmd_set_aid(hw, vif, ap_legacy_rates); |
3a980d0a LB |
4818 | if (rc) |
4819 | goto out; | |
c3cbbe8a | 4820 | } |
a66098da | 4821 | |
c3cbbe8a LB |
4822 | if (vif->bss_conf.assoc && |
4823 | (changed & (BSS_CHANGED_ASSOC | BSS_CHANGED_BEACON_INT))) { | |
a66098da LB |
4824 | /* |
4825 | * Finalize the join. Tell rx handler to process | |
4826 | * next beacon from our BSSID. | |
4827 | */ | |
0a11dfc3 | 4828 | memcpy(priv->capture_bssid, vif->bss_conf.bssid, ETH_ALEN); |
a66098da | 4829 | priv->capture_beacon = true; |
a66098da LB |
4830 | } |
4831 | ||
3a980d0a LB |
4832 | out: |
4833 | mwl8k_fw_unlock(hw); | |
a66098da LB |
4834 | } |
4835 | ||
b64fe619 LB |
4836 | static void |
4837 | mwl8k_bss_info_changed_ap(struct ieee80211_hw *hw, struct ieee80211_vif *vif, | |
4838 | struct ieee80211_bss_conf *info, u32 changed) | |
4839 | { | |
4840 | int rc; | |
4841 | ||
4842 | if (mwl8k_fw_lock(hw)) | |
4843 | return; | |
4844 | ||
4845 | if (changed & BSS_CHANGED_ERP_PREAMBLE) { | |
4846 | rc = mwl8k_set_radio_preamble(hw, | |
4847 | vif->bss_conf.use_short_preamble); | |
4848 | if (rc) | |
4849 | goto out; | |
4850 | } | |
4851 | ||
4852 | if (changed & BSS_CHANGED_BASIC_RATES) { | |
4853 | int idx; | |
4854 | int rate; | |
4855 | ||
4856 | /* | |
4857 | * Use lowest supported basic rate for multicasts | |
4858 | * and management frames (such as probe responses -- | |
4859 | * beacons will always go out at 1 Mb/s). | |
4860 | */ | |
4861 | idx = ffs(vif->bss_conf.basic_rates); | |
8707d026 LB |
4862 | if (idx) |
4863 | idx--; | |
4864 | ||
4865 | if (hw->conf.channel->band == IEEE80211_BAND_2GHZ) | |
4866 | rate = mwl8k_rates_24[idx].hw_value; | |
4867 | else | |
4868 | rate = mwl8k_rates_50[idx].hw_value; | |
b64fe619 LB |
4869 | |
4870 | mwl8k_cmd_use_fixed_rate_ap(hw, rate, rate); | |
4871 | } | |
4872 | ||
4873 | if (changed & (BSS_CHANGED_BEACON_INT | BSS_CHANGED_BEACON)) { | |
4874 | struct sk_buff *skb; | |
4875 | ||
4876 | skb = ieee80211_beacon_get(hw, vif); | |
4877 | if (skb != NULL) { | |
aa21d0f6 | 4878 | mwl8k_cmd_set_beacon(hw, vif, skb->data, skb->len); |
b64fe619 LB |
4879 | kfree_skb(skb); |
4880 | } | |
4881 | } | |
4882 | ||
4883 | if (changed & BSS_CHANGED_BEACON_ENABLED) | |
aa21d0f6 | 4884 | mwl8k_cmd_bss_start(hw, vif, info->enable_beacon); |
b64fe619 LB |
4885 | |
4886 | out: | |
4887 | mwl8k_fw_unlock(hw); | |
4888 | } | |
4889 | ||
4890 | static void | |
4891 | mwl8k_bss_info_changed(struct ieee80211_hw *hw, struct ieee80211_vif *vif, | |
4892 | struct ieee80211_bss_conf *info, u32 changed) | |
4893 | { | |
4894 | struct mwl8k_priv *priv = hw->priv; | |
4895 | ||
4896 | if (!priv->ap_fw) | |
4897 | mwl8k_bss_info_changed_sta(hw, vif, info, changed); | |
4898 | else | |
4899 | mwl8k_bss_info_changed_ap(hw, vif, info, changed); | |
4900 | } | |
4901 | ||
e81cd2d6 | 4902 | static u64 mwl8k_prepare_multicast(struct ieee80211_hw *hw, |
22bedad3 | 4903 | struct netdev_hw_addr_list *mc_list) |
e81cd2d6 LB |
4904 | { |
4905 | struct mwl8k_cmd_pkt *cmd; | |
4906 | ||
447ced07 LB |
4907 | /* |
4908 | * Synthesize and return a command packet that programs the | |
4909 | * hardware multicast address filter. At this point we don't | |
4910 | * know whether FIF_ALLMULTI is being requested, but if it is, | |
4911 | * we'll end up throwing this packet away and creating a new | |
4912 | * one in mwl8k_configure_filter(). | |
4913 | */ | |
22bedad3 | 4914 | cmd = __mwl8k_cmd_mac_multicast_adr(hw, 0, mc_list); |
e81cd2d6 LB |
4915 | |
4916 | return (unsigned long)cmd; | |
4917 | } | |
4918 | ||
a43c49a8 LB |
4919 | static int |
4920 | mwl8k_configure_filter_sniffer(struct ieee80211_hw *hw, | |
4921 | unsigned int changed_flags, | |
4922 | unsigned int *total_flags) | |
4923 | { | |
4924 | struct mwl8k_priv *priv = hw->priv; | |
4925 | ||
4926 | /* | |
4927 | * Hardware sniffer mode is mutually exclusive with STA | |
4928 | * operation, so refuse to enable sniffer mode if a STA | |
4929 | * interface is active. | |
4930 | */ | |
f5bb87cf | 4931 | if (!list_empty(&priv->vif_list)) { |
a43c49a8 | 4932 | if (net_ratelimit()) |
c96c31e4 JP |
4933 | wiphy_info(hw->wiphy, |
4934 | "not enabling sniffer mode because STA interface is active\n"); | |
a43c49a8 LB |
4935 | return 0; |
4936 | } | |
4937 | ||
4938 | if (!priv->sniffer_enabled) { | |
55489b6e | 4939 | if (mwl8k_cmd_enable_sniffer(hw, 1)) |
a43c49a8 LB |
4940 | return 0; |
4941 | priv->sniffer_enabled = true; | |
4942 | } | |
4943 | ||
4944 | *total_flags &= FIF_PROMISC_IN_BSS | FIF_ALLMULTI | | |
4945 | FIF_BCN_PRBRESP_PROMISC | FIF_CONTROL | | |
4946 | FIF_OTHER_BSS; | |
4947 | ||
4948 | return 1; | |
4949 | } | |
4950 | ||
f5bb87cf LB |
4951 | static struct mwl8k_vif *mwl8k_first_vif(struct mwl8k_priv *priv) |
4952 | { | |
4953 | if (!list_empty(&priv->vif_list)) | |
4954 | return list_entry(priv->vif_list.next, struct mwl8k_vif, list); | |
4955 | ||
4956 | return NULL; | |
4957 | } | |
4958 | ||
e6935ea1 LB |
4959 | static void mwl8k_configure_filter(struct ieee80211_hw *hw, |
4960 | unsigned int changed_flags, | |
4961 | unsigned int *total_flags, | |
4962 | u64 multicast) | |
4963 | { | |
4964 | struct mwl8k_priv *priv = hw->priv; | |
a43c49a8 LB |
4965 | struct mwl8k_cmd_pkt *cmd = (void *)(unsigned long)multicast; |
4966 | ||
c0adae2c LB |
4967 | /* |
4968 | * AP firmware doesn't allow fine-grained control over | |
4969 | * the receive filter. | |
4970 | */ | |
4971 | if (priv->ap_fw) { | |
4972 | *total_flags &= FIF_ALLMULTI | FIF_BCN_PRBRESP_PROMISC; | |
4973 | kfree(cmd); | |
4974 | return; | |
4975 | } | |
4976 | ||
a43c49a8 LB |
4977 | /* |
4978 | * Enable hardware sniffer mode if FIF_CONTROL or | |
4979 | * FIF_OTHER_BSS is requested. | |
4980 | */ | |
4981 | if (*total_flags & (FIF_CONTROL | FIF_OTHER_BSS) && | |
4982 | mwl8k_configure_filter_sniffer(hw, changed_flags, total_flags)) { | |
4983 | kfree(cmd); | |
4984 | return; | |
4985 | } | |
a66098da | 4986 | |
e6935ea1 | 4987 | /* Clear unsupported feature flags */ |
447ced07 | 4988 | *total_flags &= FIF_ALLMULTI | FIF_BCN_PRBRESP_PROMISC; |
a66098da | 4989 | |
90852f7a LB |
4990 | if (mwl8k_fw_lock(hw)) { |
4991 | kfree(cmd); | |
e6935ea1 | 4992 | return; |
90852f7a | 4993 | } |
a66098da | 4994 | |
a43c49a8 | 4995 | if (priv->sniffer_enabled) { |
55489b6e | 4996 | mwl8k_cmd_enable_sniffer(hw, 0); |
a43c49a8 LB |
4997 | priv->sniffer_enabled = false; |
4998 | } | |
4999 | ||
e6935ea1 | 5000 | if (changed_flags & FIF_BCN_PRBRESP_PROMISC) { |
77165d88 LB |
5001 | if (*total_flags & FIF_BCN_PRBRESP_PROMISC) { |
5002 | /* | |
5003 | * Disable the BSS filter. | |
5004 | */ | |
e6935ea1 | 5005 | mwl8k_cmd_set_pre_scan(hw); |
77165d88 | 5006 | } else { |
f5bb87cf | 5007 | struct mwl8k_vif *mwl8k_vif; |
0a11dfc3 | 5008 | const u8 *bssid; |
a94cc97e | 5009 | |
77165d88 LB |
5010 | /* |
5011 | * Enable the BSS filter. | |
5012 | * | |
5013 | * If there is an active STA interface, use that | |
5014 | * interface's BSSID, otherwise use a dummy one | |
5015 | * (where the OUI part needs to be nonzero for | |
5016 | * the BSSID to be accepted by POST_SCAN). | |
5017 | */ | |
f5bb87cf LB |
5018 | mwl8k_vif = mwl8k_first_vif(priv); |
5019 | if (mwl8k_vif != NULL) | |
5020 | bssid = mwl8k_vif->vif->bss_conf.bssid; | |
5021 | else | |
5022 | bssid = "\x01\x00\x00\x00\x00\x00"; | |
a94cc97e | 5023 | |
e6935ea1 | 5024 | mwl8k_cmd_set_post_scan(hw, bssid); |
a66098da LB |
5025 | } |
5026 | } | |
5027 | ||
447ced07 LB |
5028 | /* |
5029 | * If FIF_ALLMULTI is being requested, throw away the command | |
5030 | * packet that ->prepare_multicast() built and replace it with | |
5031 | * a command packet that enables reception of all multicast | |
5032 | * packets. | |
5033 | */ | |
5034 | if (*total_flags & FIF_ALLMULTI) { | |
5035 | kfree(cmd); | |
22bedad3 | 5036 | cmd = __mwl8k_cmd_mac_multicast_adr(hw, 1, NULL); |
447ced07 LB |
5037 | } |
5038 | ||
5039 | if (cmd != NULL) { | |
5040 | mwl8k_post_cmd(hw, cmd); | |
5041 | kfree(cmd); | |
e6935ea1 | 5042 | } |
a66098da | 5043 | |
e6935ea1 | 5044 | mwl8k_fw_unlock(hw); |
a66098da LB |
5045 | } |
5046 | ||
a66098da LB |
5047 | static int mwl8k_set_rts_threshold(struct ieee80211_hw *hw, u32 value) |
5048 | { | |
c2c2b12a | 5049 | return mwl8k_cmd_set_rts_threshold(hw, value); |
a66098da LB |
5050 | } |
5051 | ||
4a6967b8 JB |
5052 | static int mwl8k_sta_remove(struct ieee80211_hw *hw, |
5053 | struct ieee80211_vif *vif, | |
5054 | struct ieee80211_sta *sta) | |
3f5610ff LB |
5055 | { |
5056 | struct mwl8k_priv *priv = hw->priv; | |
5057 | ||
4a6967b8 JB |
5058 | if (priv->ap_fw) |
5059 | return mwl8k_cmd_set_new_stn_del(hw, vif, sta->addr); | |
5060 | else | |
5061 | return mwl8k_cmd_update_stadb_del(hw, vif, sta->addr); | |
bbfd9128 LB |
5062 | } |
5063 | ||
4a6967b8 JB |
5064 | static int mwl8k_sta_add(struct ieee80211_hw *hw, |
5065 | struct ieee80211_vif *vif, | |
5066 | struct ieee80211_sta *sta) | |
bbfd9128 LB |
5067 | { |
5068 | struct mwl8k_priv *priv = hw->priv; | |
4a6967b8 | 5069 | int ret; |
fcdc403c NS |
5070 | int i; |
5071 | struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif); | |
5072 | struct ieee80211_key_conf *key; | |
bbfd9128 | 5073 | |
4a6967b8 JB |
5074 | if (!priv->ap_fw) { |
5075 | ret = mwl8k_cmd_update_stadb_add(hw, vif, sta); | |
5076 | if (ret >= 0) { | |
5077 | MWL8K_STA(sta)->peer_id = ret; | |
17033543 NS |
5078 | if (sta->ht_cap.ht_supported) |
5079 | MWL8K_STA(sta)->is_ampdu_allowed = true; | |
fcdc403c | 5080 | ret = 0; |
4a6967b8 | 5081 | } |
bbfd9128 | 5082 | |
d9a07d49 NS |
5083 | } else { |
5084 | ret = mwl8k_cmd_set_new_stn_add(hw, vif, sta); | |
bbfd9128 | 5085 | } |
4a6967b8 | 5086 | |
d9a07d49 NS |
5087 | for (i = 0; i < NUM_WEP_KEYS; i++) { |
5088 | key = IEEE80211_KEY_CONF(mwl8k_vif->wep_key_conf[i].key); | |
5089 | if (mwl8k_vif->wep_key_conf[i].enabled) | |
5090 | mwl8k_set_key(hw, SET_KEY, vif, sta, key); | |
5091 | } | |
fcdc403c | 5092 | return ret; |
bbfd9128 LB |
5093 | } |
5094 | ||
8a3a3c85 EP |
5095 | static int mwl8k_conf_tx(struct ieee80211_hw *hw, |
5096 | struct ieee80211_vif *vif, u16 queue, | |
a66098da LB |
5097 | const struct ieee80211_tx_queue_params *params) |
5098 | { | |
3e4f542c | 5099 | struct mwl8k_priv *priv = hw->priv; |
a66098da | 5100 | int rc; |
a66098da | 5101 | |
3e4f542c LB |
5102 | rc = mwl8k_fw_lock(hw); |
5103 | if (!rc) { | |
e600707b | 5104 | BUG_ON(queue > MWL8K_TX_WMM_QUEUES - 1); |
0863ade8 BC |
5105 | memcpy(&priv->wmm_params[queue], params, sizeof(*params)); |
5106 | ||
3e4f542c | 5107 | if (!priv->wmm_enabled) |
55489b6e | 5108 | rc = mwl8k_cmd_set_wmm_mode(hw, 1); |
a66098da | 5109 | |
85c9205c | 5110 | if (!rc) { |
e600707b | 5111 | int q = MWL8K_TX_WMM_QUEUES - 1 - queue; |
85c9205c | 5112 | rc = mwl8k_cmd_set_edca_params(hw, q, |
55489b6e LB |
5113 | params->cw_min, |
5114 | params->cw_max, | |
5115 | params->aifs, | |
5116 | params->txop); | |
85c9205c | 5117 | } |
3e4f542c LB |
5118 | |
5119 | mwl8k_fw_unlock(hw); | |
a66098da | 5120 | } |
3e4f542c | 5121 | |
a66098da LB |
5122 | return rc; |
5123 | } | |
5124 | ||
a66098da LB |
5125 | static int mwl8k_get_stats(struct ieee80211_hw *hw, |
5126 | struct ieee80211_low_level_stats *stats) | |
5127 | { | |
55489b6e | 5128 | return mwl8k_cmd_get_stat(hw, stats); |
a66098da LB |
5129 | } |
5130 | ||
0d462bbb JL |
5131 | static int mwl8k_get_survey(struct ieee80211_hw *hw, int idx, |
5132 | struct survey_info *survey) | |
5133 | { | |
5134 | struct mwl8k_priv *priv = hw->priv; | |
5135 | struct ieee80211_conf *conf = &hw->conf; | |
5136 | ||
5137 | if (idx != 0) | |
5138 | return -ENOENT; | |
5139 | ||
5140 | survey->channel = conf->channel; | |
5141 | survey->filled = SURVEY_INFO_NOISE_DBM; | |
5142 | survey->noise = priv->noise; | |
5143 | ||
5144 | return 0; | |
5145 | } | |
5146 | ||
65f3ddcd NS |
5147 | #define MAX_AMPDU_ATTEMPTS 5 |
5148 | ||
a2292d83 LB |
5149 | static int |
5150 | mwl8k_ampdu_action(struct ieee80211_hw *hw, struct ieee80211_vif *vif, | |
5151 | enum ieee80211_ampdu_mlme_action action, | |
0b01f030 JB |
5152 | struct ieee80211_sta *sta, u16 tid, u16 *ssn, |
5153 | u8 buf_size) | |
a2292d83 | 5154 | { |
65f3ddcd NS |
5155 | |
5156 | int i, rc = 0; | |
5157 | struct mwl8k_priv *priv = hw->priv; | |
5158 | struct mwl8k_ampdu_stream *stream; | |
07f6dda1 | 5159 | u8 *addr = sta->addr, idx; |
fd712f5f | 5160 | struct mwl8k_sta *sta_info = MWL8K_STA(sta); |
65f3ddcd NS |
5161 | |
5162 | if (!(hw->flags & IEEE80211_HW_AMPDU_AGGREGATION)) | |
5163 | return -ENOTSUPP; | |
5164 | ||
5165 | spin_lock(&priv->stream_lock); | |
5166 | stream = mwl8k_lookup_stream(hw, addr, tid); | |
5167 | ||
a2292d83 LB |
5168 | switch (action) { |
5169 | case IEEE80211_AMPDU_RX_START: | |
5170 | case IEEE80211_AMPDU_RX_STOP: | |
65f3ddcd NS |
5171 | break; |
5172 | case IEEE80211_AMPDU_TX_START: | |
5173 | /* By the time we get here the hw queues may contain outgoing | |
5174 | * packets for this RA/TID that are not part of this BA | |
5175 | * session. The hw will assign sequence numbers to these | |
5176 | * packets as they go out. So if we query the hw for its next | |
5177 | * sequence number and use that for the SSN here, it may end up | |
5178 | * being wrong, which will lead to sequence number mismatch at | |
5179 | * the recipient. To avoid this, we reset the sequence number | |
5180 | * to O for the first MPDU in this BA stream. | |
5181 | */ | |
5182 | *ssn = 0; | |
5183 | if (stream == NULL) { | |
5184 | /* This means that somebody outside this driver called | |
5185 | * ieee80211_start_tx_ba_session. This is unexpected | |
5186 | * because we do our own rate control. Just warn and | |
5187 | * move on. | |
5188 | */ | |
5189 | wiphy_warn(hw->wiphy, "Unexpected call to %s. " | |
5190 | "Proceeding anyway.\n", __func__); | |
5191 | stream = mwl8k_add_stream(hw, sta, tid); | |
5192 | } | |
5193 | if (stream == NULL) { | |
5194 | wiphy_debug(hw->wiphy, "no free AMPDU streams\n"); | |
5195 | rc = -EBUSY; | |
5196 | break; | |
5197 | } | |
5198 | stream->state = AMPDU_STREAM_IN_PROGRESS; | |
5199 | ||
5200 | /* Release the lock before we do the time consuming stuff */ | |
5201 | spin_unlock(&priv->stream_lock); | |
5202 | for (i = 0; i < MAX_AMPDU_ATTEMPTS; i++) { | |
fd712f5f YAP |
5203 | |
5204 | /* Check if link is still valid */ | |
5205 | if (!sta_info->is_ampdu_allowed) { | |
5206 | spin_lock(&priv->stream_lock); | |
5207 | mwl8k_remove_stream(hw, stream); | |
5208 | spin_unlock(&priv->stream_lock); | |
5209 | return -EBUSY; | |
5210 | } | |
5211 | ||
f95275c4 | 5212 | rc = mwl8k_check_ba(hw, stream, vif); |
65f3ddcd | 5213 | |
6b6accc3 YAP |
5214 | /* If HW restart is in progress mwl8k_post_cmd will |
5215 | * return -EBUSY. Avoid retrying mwl8k_check_ba in | |
5216 | * such cases | |
5217 | */ | |
5218 | if (!rc || rc == -EBUSY) | |
65f3ddcd NS |
5219 | break; |
5220 | /* | |
5221 | * HW queues take time to be flushed, give them | |
5222 | * sufficient time | |
5223 | */ | |
5224 | ||
5225 | msleep(1000); | |
5226 | } | |
5227 | spin_lock(&priv->stream_lock); | |
5228 | if (rc) { | |
5229 | wiphy_err(hw->wiphy, "Stream for tid %d busy after %d" | |
5230 | " attempts\n", tid, MAX_AMPDU_ATTEMPTS); | |
5231 | mwl8k_remove_stream(hw, stream); | |
5232 | rc = -EBUSY; | |
5233 | break; | |
5234 | } | |
5235 | ieee80211_start_tx_ba_cb_irqsafe(vif, addr, tid); | |
5236 | break; | |
18b559d5 JB |
5237 | case IEEE80211_AMPDU_TX_STOP_CONT: |
5238 | case IEEE80211_AMPDU_TX_STOP_FLUSH: | |
5239 | case IEEE80211_AMPDU_TX_STOP_FLUSH_CONT: | |
eca107ff YAP |
5240 | if (stream) { |
5241 | if (stream->state == AMPDU_STREAM_ACTIVE) { | |
07f6dda1 | 5242 | idx = stream->idx; |
eca107ff | 5243 | spin_unlock(&priv->stream_lock); |
07f6dda1 | 5244 | mwl8k_destroy_ba(hw, idx); |
eca107ff YAP |
5245 | spin_lock(&priv->stream_lock); |
5246 | } | |
5247 | mwl8k_remove_stream(hw, stream); | |
65f3ddcd | 5248 | } |
65f3ddcd NS |
5249 | ieee80211_stop_tx_ba_cb_irqsafe(vif, addr, tid); |
5250 | break; | |
5251 | case IEEE80211_AMPDU_TX_OPERATIONAL: | |
5252 | BUG_ON(stream == NULL); | |
5253 | BUG_ON(stream->state != AMPDU_STREAM_IN_PROGRESS); | |
5254 | spin_unlock(&priv->stream_lock); | |
f95275c4 | 5255 | rc = mwl8k_create_ba(hw, stream, buf_size, vif); |
65f3ddcd NS |
5256 | spin_lock(&priv->stream_lock); |
5257 | if (!rc) | |
5258 | stream->state = AMPDU_STREAM_ACTIVE; | |
5259 | else { | |
07f6dda1 | 5260 | idx = stream->idx; |
65f3ddcd | 5261 | spin_unlock(&priv->stream_lock); |
07f6dda1 | 5262 | mwl8k_destroy_ba(hw, idx); |
65f3ddcd NS |
5263 | spin_lock(&priv->stream_lock); |
5264 | wiphy_debug(hw->wiphy, | |
5265 | "Failed adding stream for sta %pM tid %d\n", | |
5266 | addr, tid); | |
5267 | mwl8k_remove_stream(hw, stream); | |
5268 | } | |
5269 | break; | |
5270 | ||
a2292d83 | 5271 | default: |
65f3ddcd | 5272 | rc = -ENOTSUPP; |
a2292d83 | 5273 | } |
65f3ddcd NS |
5274 | |
5275 | spin_unlock(&priv->stream_lock); | |
5276 | return rc; | |
a2292d83 LB |
5277 | } |
5278 | ||
a66098da LB |
5279 | static const struct ieee80211_ops mwl8k_ops = { |
5280 | .tx = mwl8k_tx, | |
5281 | .start = mwl8k_start, | |
5282 | .stop = mwl8k_stop, | |
5283 | .add_interface = mwl8k_add_interface, | |
5284 | .remove_interface = mwl8k_remove_interface, | |
5285 | .config = mwl8k_config, | |
a66098da | 5286 | .bss_info_changed = mwl8k_bss_info_changed, |
3ac64bee | 5287 | .prepare_multicast = mwl8k_prepare_multicast, |
a66098da | 5288 | .configure_filter = mwl8k_configure_filter, |
fcdc403c | 5289 | .set_key = mwl8k_set_key, |
a66098da | 5290 | .set_rts_threshold = mwl8k_set_rts_threshold, |
4a6967b8 JB |
5291 | .sta_add = mwl8k_sta_add, |
5292 | .sta_remove = mwl8k_sta_remove, | |
a66098da | 5293 | .conf_tx = mwl8k_conf_tx, |
a66098da | 5294 | .get_stats = mwl8k_get_stats, |
0d462bbb | 5295 | .get_survey = mwl8k_get_survey, |
a2292d83 | 5296 | .ampdu_action = mwl8k_ampdu_action, |
a66098da LB |
5297 | }; |
5298 | ||
a66098da LB |
5299 | static void mwl8k_finalize_join_worker(struct work_struct *work) |
5300 | { | |
5301 | struct mwl8k_priv *priv = | |
5302 | container_of(work, struct mwl8k_priv, finalize_join_worker); | |
5303 | struct sk_buff *skb = priv->beacon_skb; | |
56007a02 JB |
5304 | struct ieee80211_mgmt *mgmt = (void *)skb->data; |
5305 | int len = skb->len - offsetof(struct ieee80211_mgmt, u.beacon.variable); | |
5306 | const u8 *tim = cfg80211_find_ie(WLAN_EID_TIM, | |
5307 | mgmt->u.beacon.variable, len); | |
5308 | int dtim_period = 1; | |
5309 | ||
5310 | if (tim && tim[1] >= 2) | |
5311 | dtim_period = tim[3]; | |
a66098da | 5312 | |
56007a02 | 5313 | mwl8k_cmd_finalize_join(priv->hw, skb->data, skb->len, dtim_period); |
a66098da | 5314 | |
f5bb87cf | 5315 | dev_kfree_skb(skb); |
a66098da LB |
5316 | priv->beacon_skb = NULL; |
5317 | } | |
5318 | ||
bcb628d5 | 5319 | enum { |
9e1b17ea LB |
5320 | MWL8363 = 0, |
5321 | MWL8687, | |
bcb628d5 | 5322 | MWL8366, |
6f6d1e9a LB |
5323 | }; |
5324 | ||
c2f2e202 | 5325 | #define MWL8K_8366_AP_FW_API 3 |
952a0e96 BC |
5326 | #define _MWL8K_8366_AP_FW(api) "mwl8k/fmimage_8366_ap-" #api ".fw" |
5327 | #define MWL8K_8366_AP_FW(api) _MWL8K_8366_AP_FW(api) | |
5328 | ||
8dee5eef | 5329 | static struct mwl8k_device_info mwl8k_info_tbl[] = { |
9e1b17ea LB |
5330 | [MWL8363] = { |
5331 | .part_name = "88w8363", | |
5332 | .helper_image = "mwl8k/helper_8363.fw", | |
0863ade8 | 5333 | .fw_image_sta = "mwl8k/fmimage_8363.fw", |
9e1b17ea | 5334 | }, |
49eb691c | 5335 | [MWL8687] = { |
bcb628d5 JL |
5336 | .part_name = "88w8687", |
5337 | .helper_image = "mwl8k/helper_8687.fw", | |
0863ade8 | 5338 | .fw_image_sta = "mwl8k/fmimage_8687.fw", |
bcb628d5 | 5339 | }, |
49eb691c | 5340 | [MWL8366] = { |
bcb628d5 JL |
5341 | .part_name = "88w8366", |
5342 | .helper_image = "mwl8k/helper_8366.fw", | |
0863ade8 | 5343 | .fw_image_sta = "mwl8k/fmimage_8366.fw", |
952a0e96 BC |
5344 | .fw_image_ap = MWL8K_8366_AP_FW(MWL8K_8366_AP_FW_API), |
5345 | .fw_api_ap = MWL8K_8366_AP_FW_API, | |
89a91f4f | 5346 | .ap_rxd_ops = &rxd_8366_ap_ops, |
bcb628d5 | 5347 | }, |
45a390dd LB |
5348 | }; |
5349 | ||
c92d4ede LB |
5350 | MODULE_FIRMWARE("mwl8k/helper_8363.fw"); |
5351 | MODULE_FIRMWARE("mwl8k/fmimage_8363.fw"); | |
5352 | MODULE_FIRMWARE("mwl8k/helper_8687.fw"); | |
5353 | MODULE_FIRMWARE("mwl8k/fmimage_8687.fw"); | |
5354 | MODULE_FIRMWARE("mwl8k/helper_8366.fw"); | |
5355 | MODULE_FIRMWARE("mwl8k/fmimage_8366.fw"); | |
952a0e96 | 5356 | MODULE_FIRMWARE(MWL8K_8366_AP_FW(MWL8K_8366_AP_FW_API)); |
c92d4ede | 5357 | |
45a390dd | 5358 | static DEFINE_PCI_DEVICE_TABLE(mwl8k_pci_id_table) = { |
e5868ba1 | 5359 | { PCI_VDEVICE(MARVELL, 0x2a0a), .driver_data = MWL8363, }, |
9e1b17ea LB |
5360 | { PCI_VDEVICE(MARVELL, 0x2a0c), .driver_data = MWL8363, }, |
5361 | { PCI_VDEVICE(MARVELL, 0x2a24), .driver_data = MWL8363, }, | |
bcb628d5 JL |
5362 | { PCI_VDEVICE(MARVELL, 0x2a2b), .driver_data = MWL8687, }, |
5363 | { PCI_VDEVICE(MARVELL, 0x2a30), .driver_data = MWL8687, }, | |
5364 | { PCI_VDEVICE(MARVELL, 0x2a40), .driver_data = MWL8366, }, | |
ca66527c | 5365 | { PCI_VDEVICE(MARVELL, 0x2a43), .driver_data = MWL8366, }, |
bcb628d5 | 5366 | { }, |
45a390dd LB |
5367 | }; |
5368 | MODULE_DEVICE_TABLE(pci, mwl8k_pci_id_table); | |
5369 | ||
99020471 BC |
5370 | static int mwl8k_request_alt_fw(struct mwl8k_priv *priv) |
5371 | { | |
5372 | int rc; | |
5373 | printk(KERN_ERR "%s: Error requesting preferred fw %s.\n" | |
5374 | "Trying alternative firmware %s\n", pci_name(priv->pdev), | |
5375 | priv->fw_pref, priv->fw_alt); | |
5376 | rc = mwl8k_request_fw(priv, priv->fw_alt, &priv->fw_ucode, true); | |
5377 | if (rc) { | |
5378 | printk(KERN_ERR "%s: Error requesting alt fw %s\n", | |
5379 | pci_name(priv->pdev), priv->fw_alt); | |
5380 | return rc; | |
5381 | } | |
5382 | return 0; | |
5383 | } | |
5384 | ||
5385 | static int mwl8k_firmware_load_success(struct mwl8k_priv *priv); | |
5386 | static void mwl8k_fw_state_machine(const struct firmware *fw, void *context) | |
5387 | { | |
5388 | struct mwl8k_priv *priv = context; | |
5389 | struct mwl8k_device_info *di = priv->device_info; | |
5390 | int rc; | |
5391 | ||
5392 | switch (priv->fw_state) { | |
5393 | case FW_STATE_INIT: | |
5394 | if (!fw) { | |
5395 | printk(KERN_ERR "%s: Error requesting helper fw %s\n", | |
5396 | pci_name(priv->pdev), di->helper_image); | |
5397 | goto fail; | |
5398 | } | |
5399 | priv->fw_helper = fw; | |
5400 | rc = mwl8k_request_fw(priv, priv->fw_pref, &priv->fw_ucode, | |
5401 | true); | |
5402 | if (rc && priv->fw_alt) { | |
5403 | rc = mwl8k_request_alt_fw(priv); | |
5404 | if (rc) | |
5405 | goto fail; | |
5406 | priv->fw_state = FW_STATE_LOADING_ALT; | |
5407 | } else if (rc) | |
5408 | goto fail; | |
5409 | else | |
5410 | priv->fw_state = FW_STATE_LOADING_PREF; | |
5411 | break; | |
5412 | ||
5413 | case FW_STATE_LOADING_PREF: | |
5414 | if (!fw) { | |
5415 | if (priv->fw_alt) { | |
5416 | rc = mwl8k_request_alt_fw(priv); | |
5417 | if (rc) | |
5418 | goto fail; | |
5419 | priv->fw_state = FW_STATE_LOADING_ALT; | |
5420 | } else | |
5421 | goto fail; | |
5422 | } else { | |
5423 | priv->fw_ucode = fw; | |
5424 | rc = mwl8k_firmware_load_success(priv); | |
5425 | if (rc) | |
5426 | goto fail; | |
5427 | else | |
5428 | complete(&priv->firmware_loading_complete); | |
5429 | } | |
5430 | break; | |
5431 | ||
5432 | case FW_STATE_LOADING_ALT: | |
5433 | if (!fw) { | |
5434 | printk(KERN_ERR "%s: Error requesting alt fw %s\n", | |
5435 | pci_name(priv->pdev), di->helper_image); | |
5436 | goto fail; | |
5437 | } | |
5438 | priv->fw_ucode = fw; | |
5439 | rc = mwl8k_firmware_load_success(priv); | |
5440 | if (rc) | |
5441 | goto fail; | |
5442 | else | |
5443 | complete(&priv->firmware_loading_complete); | |
5444 | break; | |
5445 | ||
5446 | default: | |
5447 | printk(KERN_ERR "%s: Unexpected firmware loading state: %d\n", | |
5448 | MWL8K_NAME, priv->fw_state); | |
5449 | BUG_ON(1); | |
5450 | } | |
5451 | ||
5452 | return; | |
5453 | ||
5454 | fail: | |
5455 | priv->fw_state = FW_STATE_ERROR; | |
5456 | complete(&priv->firmware_loading_complete); | |
5457 | device_release_driver(&priv->pdev->dev); | |
5458 | mwl8k_release_firmware(priv); | |
5459 | } | |
5460 | ||
6b6accc3 | 5461 | #define MAX_RESTART_ATTEMPTS 1 |
99020471 BC |
5462 | static int mwl8k_init_firmware(struct ieee80211_hw *hw, char *fw_image, |
5463 | bool nowait) | |
a66098da | 5464 | { |
3cc7772c | 5465 | struct mwl8k_priv *priv = hw->priv; |
a66098da | 5466 | int rc; |
6b6accc3 | 5467 | int count = MAX_RESTART_ATTEMPTS; |
be695fc4 | 5468 | |
6b6accc3 | 5469 | retry: |
be695fc4 LB |
5470 | /* Reset firmware and hardware */ |
5471 | mwl8k_hw_reset(priv); | |
5472 | ||
5473 | /* Ask userland hotplug daemon for the device firmware */ | |
99020471 | 5474 | rc = mwl8k_request_firmware(priv, fw_image, nowait); |
be695fc4 | 5475 | if (rc) { |
5db55844 | 5476 | wiphy_err(hw->wiphy, "Firmware files not found\n"); |
3cc7772c | 5477 | return rc; |
be695fc4 LB |
5478 | } |
5479 | ||
99020471 BC |
5480 | if (nowait) |
5481 | return rc; | |
5482 | ||
be695fc4 LB |
5483 | /* Load firmware into hardware */ |
5484 | rc = mwl8k_load_firmware(hw); | |
3cc7772c | 5485 | if (rc) |
5db55844 | 5486 | wiphy_err(hw->wiphy, "Cannot start firmware\n"); |
be695fc4 LB |
5487 | |
5488 | /* Reclaim memory once firmware is successfully loaded */ | |
5489 | mwl8k_release_firmware(priv); | |
5490 | ||
6b6accc3 YAP |
5491 | if (rc && count) { |
5492 | /* FW did not start successfully; | |
5493 | * lets try one more time | |
5494 | */ | |
5495 | count--; | |
5496 | wiphy_err(hw->wiphy, "Trying to reload the firmware again\n"); | |
5497 | msleep(20); | |
5498 | goto retry; | |
5499 | } | |
5500 | ||
3cc7772c BC |
5501 | return rc; |
5502 | } | |
5503 | ||
73b46320 BC |
5504 | static int mwl8k_init_txqs(struct ieee80211_hw *hw) |
5505 | { | |
5506 | struct mwl8k_priv *priv = hw->priv; | |
5507 | int rc = 0; | |
5508 | int i; | |
5509 | ||
e600707b | 5510 | for (i = 0; i < mwl8k_tx_queues(priv); i++) { |
73b46320 BC |
5511 | rc = mwl8k_txq_init(hw, i); |
5512 | if (rc) | |
5513 | break; | |
5514 | if (priv->ap_fw) | |
5515 | iowrite32(priv->txq[i].txd_dma, | |
5516 | priv->sram + priv->txq_offset[i]); | |
5517 | } | |
5518 | return rc; | |
5519 | } | |
5520 | ||
3cc7772c BC |
5521 | /* initialize hw after successfully loading a firmware image */ |
5522 | static int mwl8k_probe_hw(struct ieee80211_hw *hw) | |
5523 | { | |
5524 | struct mwl8k_priv *priv = hw->priv; | |
5525 | int rc = 0; | |
5526 | int i; | |
be695fc4 | 5527 | |
91942230 | 5528 | if (priv->ap_fw) { |
89a91f4f | 5529 | priv->rxd_ops = priv->device_info->ap_rxd_ops; |
91942230 | 5530 | if (priv->rxd_ops == NULL) { |
c96c31e4 JP |
5531 | wiphy_err(hw->wiphy, |
5532 | "Driver does not have AP firmware image support for this hardware\n"); | |
91942230 LB |
5533 | goto err_stop_firmware; |
5534 | } | |
5535 | } else { | |
89a91f4f | 5536 | priv->rxd_ops = &rxd_sta_ops; |
91942230 | 5537 | } |
be695fc4 LB |
5538 | |
5539 | priv->sniffer_enabled = false; | |
5540 | priv->wmm_enabled = false; | |
5541 | priv->pending_tx_pkts = 0; | |
c27a54d3 | 5542 | atomic_set(&priv->watchdog_event_pending, 0); |
be695fc4 | 5543 | |
a66098da LB |
5544 | rc = mwl8k_rxq_init(hw, 0); |
5545 | if (rc) | |
3cc7772c | 5546 | goto err_stop_firmware; |
a66098da LB |
5547 | rxq_refill(hw, 0, INT_MAX); |
5548 | ||
73b46320 BC |
5549 | /* For the sta firmware, we need to know the dma addresses of tx queues |
5550 | * before sending MWL8K_CMD_GET_HW_SPEC. So we must initialize them | |
5551 | * prior to issuing this command. But for the AP case, we learn the | |
5552 | * total number of queues from the result CMD_GET_HW_SPEC, so for this | |
5553 | * case we must initialize the tx queues after. | |
5554 | */ | |
8a7a578c | 5555 | priv->num_ampdu_queues = 0; |
73b46320 BC |
5556 | if (!priv->ap_fw) { |
5557 | rc = mwl8k_init_txqs(hw); | |
a66098da LB |
5558 | if (rc) |
5559 | goto err_free_queues; | |
5560 | } | |
5561 | ||
5562 | iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS); | |
c23b5a69 | 5563 | iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK); |
3aefc37e NS |
5564 | iowrite32(MWL8K_A2H_INT_TX_DONE|MWL8K_A2H_INT_RX_READY| |
5565 | MWL8K_A2H_INT_BA_WATCHDOG, | |
1e9f9de3 | 5566 | priv->regs + MWL8K_HIU_A2H_INTERRUPT_CLEAR_SEL); |
12488e01 NS |
5567 | iowrite32(MWL8K_A2H_INT_OPC_DONE, |
5568 | priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK); | |
a66098da | 5569 | |
a0607fd3 | 5570 | rc = request_irq(priv->pdev->irq, mwl8k_interrupt, |
a66098da LB |
5571 | IRQF_SHARED, MWL8K_NAME, hw); |
5572 | if (rc) { | |
5db55844 | 5573 | wiphy_err(hw->wiphy, "failed to register IRQ handler\n"); |
a66098da LB |
5574 | goto err_free_queues; |
5575 | } | |
5576 | ||
6b6accc3 YAP |
5577 | /* |
5578 | * When hw restart is requested, | |
5579 | * mac80211 will take care of clearing | |
5580 | * the ampdu streams, so do not clear | |
5581 | * the ampdu state here | |
5582 | */ | |
5583 | if (!priv->hw_restart_in_progress) | |
5584 | memset(priv->ampdu, 0, sizeof(priv->ampdu)); | |
ac109fd0 | 5585 | |
a66098da LB |
5586 | /* |
5587 | * Temporarily enable interrupts. Initial firmware host | |
c2c2b12a | 5588 | * commands use interrupts and avoid polling. Disable |
a66098da LB |
5589 | * interrupts when done. |
5590 | */ | |
c23b5a69 | 5591 | iowrite32(MWL8K_A2H_EVENTS, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK); |
a66098da LB |
5592 | |
5593 | /* Get config data, mac addrs etc */ | |
42fba21d LB |
5594 | if (priv->ap_fw) { |
5595 | rc = mwl8k_cmd_get_hw_spec_ap(hw); | |
73b46320 BC |
5596 | if (!rc) |
5597 | rc = mwl8k_init_txqs(hw); | |
42fba21d LB |
5598 | if (!rc) |
5599 | rc = mwl8k_cmd_set_hw_spec(hw); | |
5600 | } else { | |
5601 | rc = mwl8k_cmd_get_hw_spec_sta(hw); | |
5602 | } | |
a66098da | 5603 | if (rc) { |
5db55844 | 5604 | wiphy_err(hw->wiphy, "Cannot initialise firmware\n"); |
be695fc4 | 5605 | goto err_free_irq; |
a66098da LB |
5606 | } |
5607 | ||
5608 | /* Turn radio off */ | |
55489b6e | 5609 | rc = mwl8k_cmd_radio_disable(hw); |
a66098da | 5610 | if (rc) { |
5db55844 | 5611 | wiphy_err(hw->wiphy, "Cannot disable\n"); |
be695fc4 | 5612 | goto err_free_irq; |
a66098da LB |
5613 | } |
5614 | ||
32060e1b | 5615 | /* Clear MAC address */ |
aa21d0f6 | 5616 | rc = mwl8k_cmd_set_mac_addr(hw, NULL, "\x00\x00\x00\x00\x00\x00"); |
32060e1b | 5617 | if (rc) { |
5db55844 | 5618 | wiphy_err(hw->wiphy, "Cannot clear MAC address\n"); |
be695fc4 | 5619 | goto err_free_irq; |
32060e1b LB |
5620 | } |
5621 | ||
a66098da | 5622 | /* Disable interrupts */ |
a66098da | 5623 | iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK); |
a66098da LB |
5624 | free_irq(priv->pdev->irq, hw); |
5625 | ||
c96c31e4 JP |
5626 | wiphy_info(hw->wiphy, "%s v%d, %pm, %s firmware %u.%u.%u.%u\n", |
5627 | priv->device_info->part_name, | |
5628 | priv->hw_rev, hw->wiphy->perm_addr, | |
5629 | priv->ap_fw ? "AP" : "STA", | |
5630 | (priv->fw_rev >> 24) & 0xff, (priv->fw_rev >> 16) & 0xff, | |
5631 | (priv->fw_rev >> 8) & 0xff, priv->fw_rev & 0xff); | |
a66098da LB |
5632 | |
5633 | return 0; | |
5634 | ||
a66098da | 5635 | err_free_irq: |
a66098da | 5636 | iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK); |
a66098da LB |
5637 | free_irq(priv->pdev->irq, hw); |
5638 | ||
5639 | err_free_queues: | |
e600707b | 5640 | for (i = 0; i < mwl8k_tx_queues(priv); i++) |
a66098da LB |
5641 | mwl8k_txq_deinit(hw, i); |
5642 | mwl8k_rxq_deinit(hw, 0); | |
5643 | ||
3cc7772c BC |
5644 | err_stop_firmware: |
5645 | mwl8k_hw_reset(priv); | |
5646 | ||
5647 | return rc; | |
5648 | } | |
5649 | ||
5650 | /* | |
5651 | * invoke mwl8k_reload_firmware to change the firmware image after the device | |
5652 | * has already been registered | |
5653 | */ | |
5654 | static int mwl8k_reload_firmware(struct ieee80211_hw *hw, char *fw_image) | |
5655 | { | |
5656 | int i, rc = 0; | |
5657 | struct mwl8k_priv *priv = hw->priv; | |
6b6accc3 | 5658 | struct mwl8k_vif *vif, *tmp_vif; |
3cc7772c BC |
5659 | |
5660 | mwl8k_stop(hw); | |
5661 | mwl8k_rxq_deinit(hw, 0); | |
5662 | ||
6b6accc3 YAP |
5663 | /* |
5664 | * All the existing interfaces are re-added by the ieee80211_reconfig; | |
5665 | * which means driver should remove existing interfaces before calling | |
5666 | * ieee80211_restart_hw | |
5667 | */ | |
5668 | if (priv->hw_restart_in_progress) | |
5669 | list_for_each_entry_safe(vif, tmp_vif, &priv->vif_list, list) | |
5670 | mwl8k_remove_vif(priv, vif); | |
5671 | ||
e600707b | 5672 | for (i = 0; i < mwl8k_tx_queues(priv); i++) |
3cc7772c BC |
5673 | mwl8k_txq_deinit(hw, i); |
5674 | ||
99020471 | 5675 | rc = mwl8k_init_firmware(hw, fw_image, false); |
3cc7772c BC |
5676 | if (rc) |
5677 | goto fail; | |
5678 | ||
5679 | rc = mwl8k_probe_hw(hw); | |
5680 | if (rc) | |
5681 | goto fail; | |
5682 | ||
6b6accc3 YAP |
5683 | if (priv->hw_restart_in_progress) |
5684 | return rc; | |
5685 | ||
3cc7772c BC |
5686 | rc = mwl8k_start(hw); |
5687 | if (rc) | |
5688 | goto fail; | |
5689 | ||
5690 | rc = mwl8k_config(hw, ~0); | |
5691 | if (rc) | |
5692 | goto fail; | |
5693 | ||
e600707b | 5694 | for (i = 0; i < MWL8K_TX_WMM_QUEUES; i++) { |
8a3a3c85 | 5695 | rc = mwl8k_conf_tx(hw, NULL, i, &priv->wmm_params[i]); |
3cc7772c BC |
5696 | if (rc) |
5697 | goto fail; | |
5698 | } | |
5699 | ||
5700 | return rc; | |
5701 | ||
5702 | fail: | |
5703 | printk(KERN_WARNING "mwl8k: Failed to reload firmware image.\n"); | |
5704 | return rc; | |
5705 | } | |
5706 | ||
5d377fca YAP |
5707 | static const struct ieee80211_iface_limit ap_if_limits[] = { |
5708 | { .max = 8, .types = BIT(NL80211_IFTYPE_AP) }, | |
5709 | }; | |
5710 | ||
5711 | static const struct ieee80211_iface_combination ap_if_comb = { | |
5712 | .limits = ap_if_limits, | |
5713 | .n_limits = ARRAY_SIZE(ap_if_limits), | |
5714 | .max_interfaces = 8, | |
5715 | .num_different_channels = 1, | |
5716 | }; | |
5717 | ||
5718 | ||
3cc7772c BC |
5719 | static int mwl8k_firmware_load_success(struct mwl8k_priv *priv) |
5720 | { | |
5721 | struct ieee80211_hw *hw = priv->hw; | |
5722 | int i, rc; | |
5723 | ||
99020471 BC |
5724 | rc = mwl8k_load_firmware(hw); |
5725 | mwl8k_release_firmware(priv); | |
5726 | if (rc) { | |
5727 | wiphy_err(hw->wiphy, "Cannot start firmware\n"); | |
5728 | return rc; | |
5729 | } | |
5730 | ||
3cc7772c BC |
5731 | /* |
5732 | * Extra headroom is the size of the required DMA header | |
5733 | * minus the size of the smallest 802.11 frame (CTS frame). | |
5734 | */ | |
5735 | hw->extra_tx_headroom = | |
5736 | sizeof(struct mwl8k_dma_data) - sizeof(struct ieee80211_cts); | |
5737 | ||
ff776cec YAP |
5738 | hw->extra_tx_headroom -= priv->ap_fw ? REDUCED_TX_HEADROOM : 0; |
5739 | ||
3cc7772c BC |
5740 | hw->channel_change_time = 10; |
5741 | ||
e600707b | 5742 | hw->queues = MWL8K_TX_WMM_QUEUES; |
3cc7772c BC |
5743 | |
5744 | /* Set rssi values to dBm */ | |
0bf22c37 | 5745 | hw->flags |= IEEE80211_HW_SIGNAL_DBM | IEEE80211_HW_HAS_RATE_CONTROL; |
2a36a0ec YAP |
5746 | |
5747 | /* | |
5748 | * Ask mac80211 to not to trigger PS mode | |
5749 | * based on PM bit of incoming frames. | |
5750 | */ | |
5751 | if (priv->ap_fw) | |
5752 | hw->flags |= IEEE80211_HW_AP_LINK_PS; | |
5753 | ||
3cc7772c BC |
5754 | hw->vif_data_size = sizeof(struct mwl8k_vif); |
5755 | hw->sta_data_size = sizeof(struct mwl8k_sta); | |
5756 | ||
5757 | priv->macids_used = 0; | |
5758 | INIT_LIST_HEAD(&priv->vif_list); | |
5759 | ||
5760 | /* Set default radio state and preamble */ | |
3db1cd5c RR |
5761 | priv->radio_on = false; |
5762 | priv->radio_short_preamble = false; | |
3cc7772c BC |
5763 | |
5764 | /* Finalize join worker */ | |
5765 | INIT_WORK(&priv->finalize_join_worker, mwl8k_finalize_join_worker); | |
3aefc37e NS |
5766 | /* Handle watchdog ba events */ |
5767 | INIT_WORK(&priv->watchdog_ba_handle, mwl8k_watchdog_ba_events); | |
6b6accc3 YAP |
5768 | /* To reload the firmware if it crashes */ |
5769 | INIT_WORK(&priv->fw_reload, mwl8k_hw_restart_work); | |
3cc7772c BC |
5770 | |
5771 | /* TX reclaim and RX tasklets. */ | |
5772 | tasklet_init(&priv->poll_tx_task, mwl8k_tx_poll, (unsigned long)hw); | |
5773 | tasklet_disable(&priv->poll_tx_task); | |
5774 | tasklet_init(&priv->poll_rx_task, mwl8k_rx_poll, (unsigned long)hw); | |
5775 | tasklet_disable(&priv->poll_rx_task); | |
5776 | ||
5777 | /* Power management cookie */ | |
5778 | priv->cookie = pci_alloc_consistent(priv->pdev, 4, &priv->cookie_dma); | |
5779 | if (priv->cookie == NULL) | |
5780 | return -ENOMEM; | |
5781 | ||
5782 | mutex_init(&priv->fw_mutex); | |
5783 | priv->fw_mutex_owner = NULL; | |
5784 | priv->fw_mutex_depth = 0; | |
5785 | priv->hostcmd_wait = NULL; | |
5786 | ||
5787 | spin_lock_init(&priv->tx_lock); | |
5788 | ||
ac109fd0 BC |
5789 | spin_lock_init(&priv->stream_lock); |
5790 | ||
3cc7772c BC |
5791 | priv->tx_wait = NULL; |
5792 | ||
5793 | rc = mwl8k_probe_hw(hw); | |
5794 | if (rc) | |
5795 | goto err_free_cookie; | |
5796 | ||
5797 | hw->wiphy->interface_modes = 0; | |
5d377fca YAP |
5798 | |
5799 | if (priv->ap_macids_supported || priv->device_info->fw_image_ap) { | |
3cc7772c | 5800 | hw->wiphy->interface_modes |= BIT(NL80211_IFTYPE_AP); |
5d377fca YAP |
5801 | hw->wiphy->iface_combinations = &ap_if_comb; |
5802 | hw->wiphy->n_iface_combinations = 1; | |
5803 | } | |
5804 | ||
3cc7772c BC |
5805 | if (priv->sta_macids_supported || priv->device_info->fw_image_sta) |
5806 | hw->wiphy->interface_modes |= BIT(NL80211_IFTYPE_STATION); | |
5807 | ||
5808 | rc = ieee80211_register_hw(hw); | |
5809 | if (rc) { | |
5810 | wiphy_err(hw->wiphy, "Cannot register device\n"); | |
5811 | goto err_unprobe_hw; | |
5812 | } | |
5813 | ||
5814 | return 0; | |
5815 | ||
5816 | err_unprobe_hw: | |
e600707b | 5817 | for (i = 0; i < mwl8k_tx_queues(priv); i++) |
3cc7772c BC |
5818 | mwl8k_txq_deinit(hw, i); |
5819 | mwl8k_rxq_deinit(hw, 0); | |
5820 | ||
be695fc4 | 5821 | err_free_cookie: |
a66098da LB |
5822 | if (priv->cookie != NULL) |
5823 | pci_free_consistent(priv->pdev, 4, | |
5824 | priv->cookie, priv->cookie_dma); | |
5825 | ||
3cc7772c BC |
5826 | return rc; |
5827 | } | |
8dee5eef | 5828 | static int mwl8k_probe(struct pci_dev *pdev, |
3cc7772c BC |
5829 | const struct pci_device_id *id) |
5830 | { | |
5831 | static int printed_version; | |
5832 | struct ieee80211_hw *hw; | |
5833 | struct mwl8k_priv *priv; | |
0863ade8 | 5834 | struct mwl8k_device_info *di; |
3cc7772c BC |
5835 | int rc; |
5836 | ||
5837 | if (!printed_version) { | |
5838 | printk(KERN_INFO "%s version %s\n", MWL8K_DESC, MWL8K_VERSION); | |
5839 | printed_version = 1; | |
5840 | } | |
5841 | ||
5842 | ||
5843 | rc = pci_enable_device(pdev); | |
5844 | if (rc) { | |
5845 | printk(KERN_ERR "%s: Cannot enable new PCI device\n", | |
5846 | MWL8K_NAME); | |
5847 | return rc; | |
5848 | } | |
5849 | ||
5850 | rc = pci_request_regions(pdev, MWL8K_NAME); | |
5851 | if (rc) { | |
5852 | printk(KERN_ERR "%s: Cannot obtain PCI resources\n", | |
5853 | MWL8K_NAME); | |
5854 | goto err_disable_device; | |
5855 | } | |
5856 | ||
5857 | pci_set_master(pdev); | |
5858 | ||
5859 | ||
5860 | hw = ieee80211_alloc_hw(sizeof(*priv), &mwl8k_ops); | |
5861 | if (hw == NULL) { | |
5862 | printk(KERN_ERR "%s: ieee80211 alloc failed\n", MWL8K_NAME); | |
5863 | rc = -ENOMEM; | |
5864 | goto err_free_reg; | |
5865 | } | |
5866 | ||
5867 | SET_IEEE80211_DEV(hw, &pdev->dev); | |
5868 | pci_set_drvdata(pdev, hw); | |
5869 | ||
5870 | priv = hw->priv; | |
5871 | priv->hw = hw; | |
5872 | priv->pdev = pdev; | |
5873 | priv->device_info = &mwl8k_info_tbl[id->driver_data]; | |
5874 | ||
5875 | ||
5876 | priv->sram = pci_iomap(pdev, 0, 0x10000); | |
5877 | if (priv->sram == NULL) { | |
5878 | wiphy_err(hw->wiphy, "Cannot map device SRAM\n"); | |
5879 | goto err_iounmap; | |
5880 | } | |
5881 | ||
5882 | /* | |
5883 | * If BAR0 is a 32 bit BAR, the register BAR will be BAR1. | |
5884 | * If BAR0 is a 64 bit BAR, the register BAR will be BAR2. | |
5885 | */ | |
5886 | priv->regs = pci_iomap(pdev, 1, 0x10000); | |
5887 | if (priv->regs == NULL) { | |
5888 | priv->regs = pci_iomap(pdev, 2, 0x10000); | |
5889 | if (priv->regs == NULL) { | |
5890 | wiphy_err(hw->wiphy, "Cannot map device registers\n"); | |
5891 | goto err_iounmap; | |
5892 | } | |
5893 | } | |
5894 | ||
0863ade8 | 5895 | /* |
99020471 BC |
5896 | * Choose the initial fw image depending on user input. If a second |
5897 | * image is available, make it the alternative image that will be | |
5898 | * loaded if the first one fails. | |
0863ade8 | 5899 | */ |
99020471 | 5900 | init_completion(&priv->firmware_loading_complete); |
0863ade8 | 5901 | di = priv->device_info; |
99020471 BC |
5902 | if (ap_mode_default && di->fw_image_ap) { |
5903 | priv->fw_pref = di->fw_image_ap; | |
5904 | priv->fw_alt = di->fw_image_sta; | |
5905 | } else if (!ap_mode_default && di->fw_image_sta) { | |
5906 | priv->fw_pref = di->fw_image_sta; | |
5907 | priv->fw_alt = di->fw_image_ap; | |
5908 | } else if (ap_mode_default && !di->fw_image_ap && di->fw_image_sta) { | |
0863ade8 | 5909 | printk(KERN_WARNING "AP fw is unavailable. Using STA fw."); |
99020471 | 5910 | priv->fw_pref = di->fw_image_sta; |
0863ade8 BC |
5911 | } else if (!ap_mode_default && !di->fw_image_sta && di->fw_image_ap) { |
5912 | printk(KERN_WARNING "STA fw is unavailable. Using AP fw."); | |
99020471 BC |
5913 | priv->fw_pref = di->fw_image_ap; |
5914 | } | |
5915 | rc = mwl8k_init_firmware(hw, priv->fw_pref, true); | |
3cc7772c BC |
5916 | if (rc) |
5917 | goto err_stop_firmware; | |
6b6accc3 YAP |
5918 | |
5919 | priv->hw_restart_in_progress = false; | |
5920 | ||
99020471 | 5921 | return rc; |
3cc7772c | 5922 | |
be695fc4 LB |
5923 | err_stop_firmware: |
5924 | mwl8k_hw_reset(priv); | |
be695fc4 LB |
5925 | |
5926 | err_iounmap: | |
a66098da LB |
5927 | if (priv->regs != NULL) |
5928 | pci_iounmap(pdev, priv->regs); | |
5929 | ||
5b9482dd LB |
5930 | if (priv->sram != NULL) |
5931 | pci_iounmap(pdev, priv->sram); | |
5932 | ||
a66098da LB |
5933 | pci_set_drvdata(pdev, NULL); |
5934 | ieee80211_free_hw(hw); | |
5935 | ||
5936 | err_free_reg: | |
5937 | pci_release_regions(pdev); | |
3db95e50 LB |
5938 | |
5939 | err_disable_device: | |
a66098da LB |
5940 | pci_disable_device(pdev); |
5941 | ||
5942 | return rc; | |
5943 | } | |
5944 | ||
8dee5eef | 5945 | static void mwl8k_remove(struct pci_dev *pdev) |
a66098da LB |
5946 | { |
5947 | struct ieee80211_hw *hw = pci_get_drvdata(pdev); | |
5948 | struct mwl8k_priv *priv; | |
5949 | int i; | |
5950 | ||
5951 | if (hw == NULL) | |
5952 | return; | |
5953 | priv = hw->priv; | |
5954 | ||
99020471 BC |
5955 | wait_for_completion(&priv->firmware_loading_complete); |
5956 | ||
5957 | if (priv->fw_state == FW_STATE_ERROR) { | |
5958 | mwl8k_hw_reset(priv); | |
5959 | goto unmap; | |
5960 | } | |
5961 | ||
a66098da LB |
5962 | ieee80211_stop_queues(hw); |
5963 | ||
60aa569f LB |
5964 | ieee80211_unregister_hw(hw); |
5965 | ||
67e2eb27 | 5966 | /* Remove TX reclaim and RX tasklets. */ |
1e9f9de3 | 5967 | tasklet_kill(&priv->poll_tx_task); |
67e2eb27 | 5968 | tasklet_kill(&priv->poll_rx_task); |
a66098da | 5969 | |
a66098da LB |
5970 | /* Stop hardware */ |
5971 | mwl8k_hw_reset(priv); | |
5972 | ||
5973 | /* Return all skbs to mac80211 */ | |
e600707b | 5974 | for (i = 0; i < mwl8k_tx_queues(priv); i++) |
efb7c49a | 5975 | mwl8k_txq_reclaim(hw, i, INT_MAX, 1); |
a66098da | 5976 | |
e600707b | 5977 | for (i = 0; i < mwl8k_tx_queues(priv); i++) |
a66098da LB |
5978 | mwl8k_txq_deinit(hw, i); |
5979 | ||
5980 | mwl8k_rxq_deinit(hw, 0); | |
5981 | ||
c2c357ce | 5982 | pci_free_consistent(priv->pdev, 4, priv->cookie, priv->cookie_dma); |
a66098da | 5983 | |
99020471 | 5984 | unmap: |
a66098da | 5985 | pci_iounmap(pdev, priv->regs); |
5b9482dd | 5986 | pci_iounmap(pdev, priv->sram); |
a66098da LB |
5987 | pci_set_drvdata(pdev, NULL); |
5988 | ieee80211_free_hw(hw); | |
5989 | pci_release_regions(pdev); | |
5990 | pci_disable_device(pdev); | |
5991 | } | |
5992 | ||
5993 | static struct pci_driver mwl8k_driver = { | |
5994 | .name = MWL8K_NAME, | |
45a390dd | 5995 | .id_table = mwl8k_pci_id_table, |
a66098da | 5996 | .probe = mwl8k_probe, |
8dee5eef | 5997 | .remove = mwl8k_remove, |
a66098da LB |
5998 | }; |
5999 | ||
5b0a3b7e | 6000 | module_pci_driver(mwl8k_driver); |
c2c357ce LB |
6001 | |
6002 | MODULE_DESCRIPTION(MWL8K_DESC); | |
6003 | MODULE_VERSION(MWL8K_VERSION); | |
6004 | MODULE_AUTHOR("Lennert Buytenhek <buytenh@marvell.com>"); | |
6005 | MODULE_LICENSE("GPL"); |