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mac80211: Do not scan for IBSS merge with a fixed BSSID.
[deliverable/linux.git] / drivers / net / wireless / mwl8k.c
CommitLineData
a66098da 1/*
ce9e2e1b
LB		 2 * drivers/net/wireless/mwl8k.c
3 * Driver for Marvell TOPDOG 802.11 Wireless cards
a66098da 4 *
a5fb297d 5 * Copyright (C) 2008, 2009, 2010 Marvell Semiconductor Inc.
a66098da
LB		 6 *
7 * This file is licensed under the terms of the GNU General Public
8 * License version 2. This program is licensed "as is" without any
9 * warranty of any kind, whether express or implied.
10 */
11
12#include <linux/init.h>
a6b7a407 13#include <linux/interrupt.h>
a66098da
LB		 14#include <linux/module.h>
15#include <linux/kernel.h>
3d76e82c 16#include <linux/sched.h>
a66098da
LB		 17#include <linux/spinlock.h>
18#include <linux/list.h>
19#include <linux/pci.h>
20#include <linux/delay.h>
21#include <linux/completion.h>
22#include <linux/etherdevice.h>
5a0e3ad6 23#include <linux/slab.h>
a66098da
LB		 24#include <net/mac80211.h>
25#include <linux/moduleparam.h>
26#include <linux/firmware.h>
27#include <linux/workqueue.h>
28
29#define MWL8K_DESC "Marvell TOPDOG(R) 802.11 Wireless Network Driver"
30#define MWL8K_NAME KBUILD_MODNAME
00e8e692 31#define MWL8K_VERSION "0.13"
a66098da 32
0863ade8 33/* Module parameters */
eb939922 34static bool ap_mode_default;
0863ade8
BC		 35module_param(ap_mode_default, bool, 0);
36MODULE_PARM_DESC(ap_mode_default,
37 "Set to 1 to make ap mode the default instead of sta mode");
38
a66098da
LB		 39/* Register definitions */
40#define MWL8K_HIU_GEN_PTR 0x00000c10
ce9e2e1b
LB		 41#define MWL8K_MODE_STA 0x0000005a
42#define MWL8K_MODE_AP 0x000000a5
a66098da 43#define MWL8K_HIU_INT_CODE 0x00000c14
ce9e2e1b
LB		 44#define MWL8K_FWSTA_READY 0xf0f1f2f4
45#define MWL8K_FWAP_READY 0xf1f2f4a5
46#define MWL8K_INT_CODE_CMD_FINISHED 0x00000005
a66098da
LB		 47#define MWL8K_HIU_SCRATCH 0x00000c40
48
49/* Host->device communications */
50#define MWL8K_HIU_H2A_INTERRUPT_EVENTS 0x00000c18
51#define MWL8K_HIU_H2A_INTERRUPT_STATUS 0x00000c1c
52#define MWL8K_HIU_H2A_INTERRUPT_MASK 0x00000c20
53#define MWL8K_HIU_H2A_INTERRUPT_CLEAR_SEL 0x00000c24
54#define MWL8K_HIU_H2A_INTERRUPT_STATUS_MASK 0x00000c28
ce9e2e1b
LB		 55#define MWL8K_H2A_INT_DUMMY (1 << 20)
56#define MWL8K_H2A_INT_RESET (1 << 15)
57#define MWL8K_H2A_INT_DOORBELL (1 << 1)
58#define MWL8K_H2A_INT_PPA_READY (1 << 0)
a66098da
LB		 59
60/* Device->host communications */
61#define MWL8K_HIU_A2H_INTERRUPT_EVENTS 0x00000c2c
62#define MWL8K_HIU_A2H_INTERRUPT_STATUS 0x00000c30
63#define MWL8K_HIU_A2H_INTERRUPT_MASK 0x00000c34
64#define MWL8K_HIU_A2H_INTERRUPT_CLEAR_SEL 0x00000c38
65#define MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK 0x00000c3c
ce9e2e1b 66#define MWL8K_A2H_INT_DUMMY (1 << 20)
3aefc37e 67#define MWL8K_A2H_INT_BA_WATCHDOG (1 << 14)
ce9e2e1b
LB		 68#define MWL8K_A2H_INT_CHNL_SWITCHED (1 << 11)
69#define MWL8K_A2H_INT_QUEUE_EMPTY (1 << 10)
70#define MWL8K_A2H_INT_RADAR_DETECT (1 << 7)
71#define MWL8K_A2H_INT_RADIO_ON (1 << 6)
72#define MWL8K_A2H_INT_RADIO_OFF (1 << 5)
73#define MWL8K_A2H_INT_MAC_EVENT (1 << 3)
74#define MWL8K_A2H_INT_OPC_DONE (1 << 2)
75#define MWL8K_A2H_INT_RX_READY (1 << 1)
76#define MWL8K_A2H_INT_TX_DONE (1 << 0)
a66098da 77
566875db
PN		 78/* HW micro second timer register
79 * located at offset 0xA600. This
80 * will be used to timestamp tx
81 * packets.
82 */
83
84#define MWL8K_HW_TIMER_REGISTER 0x0000a600
85
a66098da
LB		 86#define MWL8K_A2H_EVENTS (MWL8K_A2H_INT_DUMMY | \
87 MWL8K_A2H_INT_CHNL_SWITCHED | \
88 MWL8K_A2H_INT_QUEUE_EMPTY | \
89 MWL8K_A2H_INT_RADAR_DETECT | \
90 MWL8K_A2H_INT_RADIO_ON | \
91 MWL8K_A2H_INT_RADIO_OFF | \
92 MWL8K_A2H_INT_MAC_EVENT | \
93 MWL8K_A2H_INT_OPC_DONE | \
94 MWL8K_A2H_INT_RX_READY | \
3aefc37e
NS		 95 MWL8K_A2H_INT_TX_DONE | \
96 MWL8K_A2H_INT_BA_WATCHDOG)
a66098da 97
a66098da 98#define MWL8K_RX_QUEUES 1
e600707b 99#define MWL8K_TX_WMM_QUEUES 4
8a7a578c 100#define MWL8K_MAX_AMPDU_QUEUES 8
e600707b
BC		 101#define MWL8K_MAX_TX_QUEUES (MWL8K_TX_WMM_QUEUES + MWL8K_MAX_AMPDU_QUEUES)
102#define mwl8k_tx_queues(priv) (MWL8K_TX_WMM_QUEUES + (priv)->num_ampdu_queues)
a66098da 103
54bc3a0d
LB		 104struct rxd_ops {
105 int rxd_size;
106 void (*rxd_init)(void *rxd, dma_addr_t next_dma_addr);
107 void (*rxd_refill)(void *rxd, dma_addr_t addr, int len);
20f09c3d 108 int (*rxd_process)(void *rxd, struct ieee80211_rx_status *status,
0d462bbb 109 __le16 *qos, s8 *noise);
54bc3a0d
LB		 110};
111
45a390dd 112struct mwl8k_device_info {
a74b295e
LB		 113 char *part_name;
114 char *helper_image;
0863ade8
BC		 115 char *fw_image_sta;
116 char *fw_image_ap;
89a91f4f 117 struct rxd_ops *ap_rxd_ops;
952a0e96 118 u32 fw_api_ap;
45a390dd
LB		 119};
120
a66098da 121struct mwl8k_rx_queue {
45eb400d 122 int rxd_count;
a66098da
LB		 123
124 /* hw receives here */
45eb400d 125 int head;
a66098da
LB		 126
127 /* refill descs here */
45eb400d 128 int tail;
a66098da 129
54bc3a0d 130 void *rxd;
45eb400d 131 dma_addr_t rxd_dma;
788838eb
LB		 132 struct {
133 struct sk_buff *skb;
53b1b3e1 134 DEFINE_DMA_UNMAP_ADDR(dma);
788838eb 135 } *buf;
a66098da
LB		 136};
137
a66098da
LB		 138struct mwl8k_tx_queue {
139 /* hw transmits here */
45eb400d 140 int head;
a66098da
LB		 141
142 /* sw appends here */
45eb400d 143 int tail;
a66098da 144
8ccbc3b8 145 unsigned int len;
45eb400d
LB		 146 struct mwl8k_tx_desc *txd;
147 dma_addr_t txd_dma;
148 struct sk_buff **skb;
a66098da
LB		 149};
150
ac109fd0
BC		 151enum {
152 AMPDU_NO_STREAM,
153 AMPDU_STREAM_NEW,
154 AMPDU_STREAM_IN_PROGRESS,
155 AMPDU_STREAM_ACTIVE,
156};
157
5faa1aff
NS		 158struct mwl8k_ampdu_stream {
159 struct ieee80211_sta *sta;
160 u8 tid;
161 u8 state;
162 u8 idx;
163 u8 txq_idx; /* index of this stream in priv->txq */
164};
165
a66098da 166struct mwl8k_priv {
a66098da 167 struct ieee80211_hw *hw;
a66098da 168 struct pci_dev *pdev;
bf3ca7f7 169 int irq;
a66098da 170
45a390dd
LB		 171 struct mwl8k_device_info *device_info;
172
be695fc4
LB		 173 void __iomem *sram;
174 void __iomem *regs;
175
176 /* firmware */
d1f9e41d
BC		 177 const struct firmware *fw_helper;
178 const struct firmware *fw_ucode;
a66098da 179
be695fc4
LB		 180 /* hardware/firmware parameters */
181 bool ap_fw;
182 struct rxd_ops *rxd_ops;
777ad375
LB		 183 struct ieee80211_supported_band band_24;
184 struct ieee80211_channel channels_24[14];
185 struct ieee80211_rate rates_24[14];
4eae9edd
LB		 186 struct ieee80211_supported_band band_50;
187 struct ieee80211_channel channels_50[4];
188 struct ieee80211_rate rates_50[9];
ee0ddf18
LB		 189 u32 ap_macids_supported;
190 u32 sta_macids_supported;
be695fc4 191
8a7a578c
BC		 192 /* Ampdu stream information */
193 u8 num_ampdu_queues;
ac109fd0
BC		 194 spinlock_t stream_lock;
195 struct mwl8k_ampdu_stream ampdu[MWL8K_MAX_AMPDU_QUEUES];
3aefc37e 196 struct work_struct watchdog_ba_handle;
8a7a578c 197
618952a7
LB		 198 /* firmware access */
199 struct mutex fw_mutex;
200 struct task_struct *fw_mutex_owner;
6b6accc3 201 struct task_struct *hw_restart_owner;
618952a7 202 int fw_mutex_depth;
618952a7
LB		 203 struct completion *hostcmd_wait;
204
a66098da
LB		 205 /* lock held over TX and TX reap */
206 spinlock_t tx_lock;
a66098da 207
88de754a
LB		 208 /* TX quiesce completion, protected by fw_mutex and tx_lock */
209 struct completion *tx_wait;
210
f5bb87cf 211 /* List of interfaces. */
ee0ddf18 212 u32 macids_used;
f5bb87cf 213 struct list_head vif_list;
a66098da 214
a66098da
LB		 215 /* power management status cookie from firmware */
216 u32 *cookie;
217 dma_addr_t cookie_dma;
218
219 u16 num_mcaddrs;
a66098da 220 u8 hw_rev;
2aa7b01f 221 u32 fw_rev;
a66098da
LB		 222
223 /*
224 * Running count of TX packets in flight, to avoid
225 * iterating over the transmit rings each time.
226 */
227 int pending_tx_pkts;
228
229 struct mwl8k_rx_queue rxq[MWL8K_RX_QUEUES];
e600707b
BC		 230 struct mwl8k_tx_queue txq[MWL8K_MAX_TX_QUEUES];
231 u32 txq_offset[MWL8K_MAX_TX_QUEUES];
a66098da 232
c46563b7 233 bool radio_on;
68ce3884 234 bool radio_short_preamble;
a43c49a8 235 bool sniffer_enabled;
0439b1f5 236 bool wmm_enabled;
a66098da 237
a66098da
LB		 238 /* XXX need to convert this to handle multiple interfaces */
239 bool capture_beacon;
d89173f2 240 u8 capture_bssid[ETH_ALEN];
a66098da
LB		 241 struct sk_buff *beacon_skb;
242
243 /*
244 * This FJ worker has to be global as it is scheduled from the
245 * RX handler. At this point we don't know which interface it
246 * belongs to until the list of bssids waiting to complete join
247 * is checked.
248 */
249 struct work_struct finalize_join_worker;
250
1e9f9de3
LB		 251 /* Tasklet to perform TX reclaim. */
252 struct tasklet_struct poll_tx_task;
67e2eb27
LB		 253
254 /* Tasklet to perform RX. */
255 struct tasklet_struct poll_rx_task;
0d462bbb
JL		 256
257 /* Most recently reported noise in dBm */
258 s8 noise;
0863ade8
BC		 259
260 /*
261 * preserve the queue configurations so they can be restored if/when
262 * the firmware image is swapped.
263 */
e600707b 264 struct ieee80211_tx_queue_params wmm_params[MWL8K_TX_WMM_QUEUES];
99020471 265
6b6accc3
YAP		 266 /* To perform the task of reloading the firmware */
267 struct work_struct fw_reload;
268 bool hw_restart_in_progress;
269
99020471
BC		 270 /* async firmware loading state */
271 unsigned fw_state;
272 char *fw_pref;
273 char *fw_alt;
274 struct completion firmware_loading_complete;
a66098da
LB		 275};
276
e53d9b96
NS		 277#define MAX_WEP_KEY_LEN 13
278#define NUM_WEP_KEYS 4
279
a66098da
LB		 280/* Per interface specific private data */
281struct mwl8k_vif {
f5bb87cf
LB		 282 struct list_head list;
283 struct ieee80211_vif *vif;
284
f57ca9c1
LB		 285 /* Firmware macid for this vif. */
286 int macid;
287
c2c2b12a 288 /* Non AMPDU sequence number assigned by driver. */
a680400e 289 u16 seqno;
e53d9b96
NS		 290
291 /* Saved WEP keys */
292 struct {
293 u8 enabled;
294 u8 key[sizeof(struct ieee80211_key_conf) + MAX_WEP_KEY_LEN];
295 } wep_key_conf[NUM_WEP_KEYS];
d9a07d49
NS		 296
297 /* BSSID */
298 u8 bssid[ETH_ALEN];
299
300 /* A flag to indicate is HW crypto is enabled for this bssid */
301 bool is_hw_crypto_enabled;
a66098da 302};
a94cc97e 303#define MWL8K_VIF(_vif) ((struct mwl8k_vif *)&((_vif)->drv_priv))
fcdc403c 304#define IEEE80211_KEY_CONF(_u8) ((struct ieee80211_key_conf *)(_u8))
a66098da 305
d0805c1c
BC		 306struct tx_traffic_info {
307 u32 start_time;
308 u32 pkts;
309};
310
311#define MWL8K_MAX_TID 8
a680400e
LB		 312struct mwl8k_sta {
313 /* Index into station database. Returned by UPDATE_STADB. */
314 u8 peer_id;
17033543 315 u8 is_ampdu_allowed;
d0805c1c 316 struct tx_traffic_info tx_stats[MWL8K_MAX_TID];
a680400e
LB		 317};
318#define MWL8K_STA(_sta) ((struct mwl8k_sta *)&((_sta)->drv_priv))
319
777ad375 320static const struct ieee80211_channel mwl8k_channels_24[] = {
a66098da
LB		 321 { .center_freq = 2412, .hw_value = 1, },
322 { .center_freq = 2417, .hw_value = 2, },
323 { .center_freq = 2422, .hw_value = 3, },
324 { .center_freq = 2427, .hw_value = 4, },
325 { .center_freq = 2432, .hw_value = 5, },
326 { .center_freq = 2437, .hw_value = 6, },
327 { .center_freq = 2442, .hw_value = 7, },
328 { .center_freq = 2447, .hw_value = 8, },
329 { .center_freq = 2452, .hw_value = 9, },
330 { .center_freq = 2457, .hw_value = 10, },
331 { .center_freq = 2462, .hw_value = 11, },
647ca6b0
LB		 332 { .center_freq = 2467, .hw_value = 12, },
333 { .center_freq = 2472, .hw_value = 13, },
334 { .center_freq = 2484, .hw_value = 14, },
a66098da
LB		 335};
336
777ad375 337static const struct ieee80211_rate mwl8k_rates_24[] = {
a66098da
LB		 338 { .bitrate = 10, .hw_value = 2, },
339 { .bitrate = 20, .hw_value = 4, },
340 { .bitrate = 55, .hw_value = 11, },
5dfd3e2c
LB		 341 { .bitrate = 110, .hw_value = 22, },
342 { .bitrate = 220, .hw_value = 44, },
a66098da
LB		 343 { .bitrate = 60, .hw_value = 12, },
344 { .bitrate = 90, .hw_value = 18, },
a66098da
LB		 345 { .bitrate = 120, .hw_value = 24, },
346 { .bitrate = 180, .hw_value = 36, },
347 { .bitrate = 240, .hw_value = 48, },
348 { .bitrate = 360, .hw_value = 72, },
349 { .bitrate = 480, .hw_value = 96, },
350 { .bitrate = 540, .hw_value = 108, },
140eb5e2
LB		 351 { .bitrate = 720, .hw_value = 144, },
352};
353
4eae9edd
LB		 354static const struct ieee80211_channel mwl8k_channels_50[] = {
355 { .center_freq = 5180, .hw_value = 36, },
356 { .center_freq = 5200, .hw_value = 40, },
357 { .center_freq = 5220, .hw_value = 44, },
358 { .center_freq = 5240, .hw_value = 48, },
359};
360
361static const struct ieee80211_rate mwl8k_rates_50[] = {
362 { .bitrate = 60, .hw_value = 12, },
363 { .bitrate = 90, .hw_value = 18, },
364 { .bitrate = 120, .hw_value = 24, },
365 { .bitrate = 180, .hw_value = 36, },
366 { .bitrate = 240, .hw_value = 48, },
367 { .bitrate = 360, .hw_value = 72, },
368 { .bitrate = 480, .hw_value = 96, },
369 { .bitrate = 540, .hw_value = 108, },
370 { .bitrate = 720, .hw_value = 144, },
371};
372
a66098da 373/* Set or get info from Firmware */
a66098da 374#define MWL8K_CMD_GET 0x0000
41fdf097
NS		 375#define MWL8K_CMD_SET 0x0001
376#define MWL8K_CMD_SET_LIST 0x0002
a66098da
LB		 377
378/* Firmware command codes */
379#define MWL8K_CMD_CODE_DNLD 0x0001
380#define MWL8K_CMD_GET_HW_SPEC 0x0003
42fba21d 381#define MWL8K_CMD_SET_HW_SPEC 0x0004
a66098da
LB		 382#define MWL8K_CMD_MAC_MULTICAST_ADR 0x0010
383#define MWL8K_CMD_GET_STAT 0x0014
ff45fc60
LB		 384#define MWL8K_CMD_RADIO_CONTROL 0x001c
385#define MWL8K_CMD_RF_TX_POWER 0x001e
41fdf097 386#define MWL8K_CMD_TX_POWER 0x001f
08b06347 387#define MWL8K_CMD_RF_ANTENNA 0x0020
aa21d0f6 388#define MWL8K_CMD_SET_BEACON 0x0100 /* per-vif */
a66098da
LB		 389#define MWL8K_CMD_SET_PRE_SCAN 0x0107
390#define MWL8K_CMD_SET_POST_SCAN 0x0108
ff45fc60
LB		 391#define MWL8K_CMD_SET_RF_CHANNEL 0x010a
392#define MWL8K_CMD_SET_AID 0x010d
393#define MWL8K_CMD_SET_RATE 0x0110
394#define MWL8K_CMD_SET_FINALIZE_JOIN 0x0111
395#define MWL8K_CMD_RTS_THRESHOLD 0x0113
a66098da 396#define MWL8K_CMD_SET_SLOT 0x0114
ff45fc60
LB		 397#define MWL8K_CMD_SET_EDCA_PARAMS 0x0115
398#define MWL8K_CMD_SET_WMM_MODE 0x0123
a66098da 399#define MWL8K_CMD_MIMO_CONFIG 0x0125
ff45fc60 400#define MWL8K_CMD_USE_FIXED_RATE 0x0126
a66098da 401#define MWL8K_CMD_ENABLE_SNIFFER 0x0150
aa21d0f6 402#define MWL8K_CMD_SET_MAC_ADDR 0x0202 /* per-vif */
a66098da 403#define MWL8K_CMD_SET_RATEADAPT_MODE 0x0203
3aefc37e 404#define MWL8K_CMD_GET_WATCHDOG_BITMAP 0x0205
aa21d0f6
LB		 405#define MWL8K_CMD_BSS_START 0x1100 /* per-vif */
406#define MWL8K_CMD_SET_NEW_STN 0x1111 /* per-vif */
fcdc403c 407#define MWL8K_CMD_UPDATE_ENCRYPTION 0x1122 /* per-vif */
ff45fc60 408#define MWL8K_CMD_UPDATE_STADB 0x1123
5faa1aff 409#define MWL8K_CMD_BASTREAM 0x1125
a66098da 410
b603742f 411static const char *mwl8k_cmd_name(__le16 cmd, char *buf, int bufsize)
a66098da 412{
b603742f
JL		 413 u16 command = le16_to_cpu(cmd);
414
a66098da
LB		 415#define MWL8K_CMDNAME(x) case MWL8K_CMD_##x: do {\
416 snprintf(buf, bufsize, "%s", #x);\
417 return buf;\
418 } while (0)
b603742f 419 switch (command & ~0x8000) {
a66098da
LB		 420 MWL8K_CMDNAME(CODE_DNLD);
421 MWL8K_CMDNAME(GET_HW_SPEC);
42fba21d 422 MWL8K_CMDNAME(SET_HW_SPEC);
a66098da
LB		 423 MWL8K_CMDNAME(MAC_MULTICAST_ADR);
424 MWL8K_CMDNAME(GET_STAT);
425 MWL8K_CMDNAME(RADIO_CONTROL);
426 MWL8K_CMDNAME(RF_TX_POWER);
41fdf097 427 MWL8K_CMDNAME(TX_POWER);
08b06347 428 MWL8K_CMDNAME(RF_ANTENNA);
b64fe619 429 MWL8K_CMDNAME(SET_BEACON);
a66098da
LB		 430 MWL8K_CMDNAME(SET_PRE_SCAN);
431 MWL8K_CMDNAME(SET_POST_SCAN);
432 MWL8K_CMDNAME(SET_RF_CHANNEL);
ff45fc60
LB		 433 MWL8K_CMDNAME(SET_AID);
434 MWL8K_CMDNAME(SET_RATE);
435 MWL8K_CMDNAME(SET_FINALIZE_JOIN);
436 MWL8K_CMDNAME(RTS_THRESHOLD);
a66098da 437 MWL8K_CMDNAME(SET_SLOT);
ff45fc60
LB		 438 MWL8K_CMDNAME(SET_EDCA_PARAMS);
439 MWL8K_CMDNAME(SET_WMM_MODE);
a66098da 440 MWL8K_CMDNAME(MIMO_CONFIG);
ff45fc60 441 MWL8K_CMDNAME(USE_FIXED_RATE);
a66098da 442 MWL8K_CMDNAME(ENABLE_SNIFFER);
32060e1b 443 MWL8K_CMDNAME(SET_MAC_ADDR);
a66098da 444 MWL8K_CMDNAME(SET_RATEADAPT_MODE);
b64fe619 445 MWL8K_CMDNAME(BSS_START);
3f5610ff 446 MWL8K_CMDNAME(SET_NEW_STN);
fcdc403c 447 MWL8K_CMDNAME(UPDATE_ENCRYPTION);
ff45fc60 448 MWL8K_CMDNAME(UPDATE_STADB);
5faa1aff 449 MWL8K_CMDNAME(BASTREAM);
3aefc37e 450 MWL8K_CMDNAME(GET_WATCHDOG_BITMAP);
a66098da
LB		 451 default:
452 snprintf(buf, bufsize, "0x%x", cmd);
453 }
454#undef MWL8K_CMDNAME
455
456 return buf;
457}
458
459/* Hardware and firmware reset */
460static void mwl8k_hw_reset(struct mwl8k_priv *priv)
461{
462 iowrite32(MWL8K_H2A_INT_RESET,
463 priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
464 iowrite32(MWL8K_H2A_INT_RESET,
465 priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
466 msleep(20);
467}
468
469/* Release fw image */
d1f9e41d 470static void mwl8k_release_fw(const struct firmware **fw)
a66098da
LB		 471{
472 if (*fw == NULL)
473 return;
474 release_firmware(*fw);
475 *fw = NULL;
476}
477
478static void mwl8k_release_firmware(struct mwl8k_priv *priv)
479{
22be40d9
LB		 480 mwl8k_release_fw(&priv->fw_ucode);
481 mwl8k_release_fw(&priv->fw_helper);
a66098da
LB		 482}
483
99020471
BC		 484/* states for asynchronous f/w loading */
485static void mwl8k_fw_state_machine(const struct firmware *fw, void *context);
486enum {
487 FW_STATE_INIT = 0,
488 FW_STATE_LOADING_PREF,
489 FW_STATE_LOADING_ALT,
490 FW_STATE_ERROR,
491};
492
a66098da
LB		 493/* Request fw image */
494static int mwl8k_request_fw(struct mwl8k_priv *priv,
d1f9e41d 495 const char *fname, const struct firmware **fw,
99020471 496 bool nowait)
a66098da
LB		 497{
498 /* release current image */
499 if (*fw != NULL)
500 mwl8k_release_fw(fw);
501
99020471
BC		 502 if (nowait)
503 return request_firmware_nowait(THIS_MODULE, 1, fname,
504 &priv->pdev->dev, GFP_KERNEL,
505 priv, mwl8k_fw_state_machine);
506 else
d1f9e41d 507 return request_firmware(fw, fname, &priv->pdev->dev);
a66098da
LB		 508}
509
99020471
BC		 510static int mwl8k_request_firmware(struct mwl8k_priv *priv, char *fw_image,
511 bool nowait)
a66098da 512{
a74b295e 513 struct mwl8k_device_info *di = priv->device_info;
a66098da
LB		 514 int rc;
515
a74b295e 516 if (di->helper_image != NULL) {
99020471
BC		 517 if (nowait)
518 rc = mwl8k_request_fw(priv, di->helper_image,
519 &priv->fw_helper, true);
520 else
521 rc = mwl8k_request_fw(priv, di->helper_image,
522 &priv->fw_helper, false);
523 if (rc)
524 printk(KERN_ERR "%s: Error requesting helper fw %s\n",
525 pci_name(priv->pdev), di->helper_image);
526
527 if (rc || nowait)
a74b295e 528 return rc;
a66098da
LB		 529 }
530
99020471
BC		 531 if (nowait) {
532 /*
533 * if we get here, no helper image is needed. Skip the
534 * FW_STATE_INIT state.
535 */
536 priv->fw_state = FW_STATE_LOADING_PREF;
537 rc = mwl8k_request_fw(priv, fw_image,
538 &priv->fw_ucode,
539 true);
540 } else
541 rc = mwl8k_request_fw(priv, fw_image,
542 &priv->fw_ucode, false);
a66098da 543 if (rc) {
c2c357ce 544 printk(KERN_ERR "%s: Error requesting firmware file %s\n",
0863ade8 545 pci_name(priv->pdev), fw_image);
22be40d9 546 mwl8k_release_fw(&priv->fw_helper);
a66098da
LB		 547 return rc;
548 }
549
550 return 0;
551}
552
553struct mwl8k_cmd_pkt {
554 __le16 code;
555 __le16 length;
f57ca9c1
LB		 556 __u8 seq_num;
557 __u8 macid;
a66098da
LB		 558 __le16 result;
559 char payload[0];
ba2d3587 560} __packed;
a66098da
LB		 561
562/*
563 * Firmware loading.
564 */
565static int
566mwl8k_send_fw_load_cmd(struct mwl8k_priv *priv, void *data, int length)
567{
568 void __iomem *regs = priv->regs;
569 dma_addr_t dma_addr;
a66098da
LB		 570 int loops;
571
572 dma_addr = pci_map_single(priv->pdev, data, length, PCI_DMA_TODEVICE);
573 if (pci_dma_mapping_error(priv->pdev, dma_addr))
574 return -ENOMEM;
575
576 iowrite32(dma_addr, regs + MWL8K_HIU_GEN_PTR);
577 iowrite32(0, regs + MWL8K_HIU_INT_CODE);
578 iowrite32(MWL8K_H2A_INT_DOORBELL,
579 regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
580 iowrite32(MWL8K_H2A_INT_DUMMY,
581 regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
582
a66098da
LB		 583 loops = 1000;
584 do {
585 u32 int_code;
586
587 int_code = ioread32(regs + MWL8K_HIU_INT_CODE);
588 if (int_code == MWL8K_INT_CODE_CMD_FINISHED) {
589 iowrite32(0, regs + MWL8K_HIU_INT_CODE);
a66098da
LB		 590 break;
591 }
592
3d76e82c 593 cond_resched();
a66098da
LB		 594 udelay(1);
595 } while (--loops);
596
597 pci_unmap_single(priv->pdev, dma_addr, length, PCI_DMA_TODEVICE);
598
d4b70570 599 return loops ? 0 : -ETIMEDOUT;
a66098da
LB		 600}
601
602static int mwl8k_load_fw_image(struct mwl8k_priv *priv,
603 const u8 *data, size_t length)
604{
605 struct mwl8k_cmd_pkt *cmd;
606 int done;
607 int rc = 0;
608
609 cmd = kmalloc(sizeof(*cmd) + 256, GFP_KERNEL);
610 if (cmd == NULL)
611 return -ENOMEM;
612
613 cmd->code = cpu_to_le16(MWL8K_CMD_CODE_DNLD);
614 cmd->seq_num = 0;
f57ca9c1 615 cmd->macid = 0;
a66098da
LB		 616 cmd->result = 0;
617
618 done = 0;
619 while (length) {
620 int block_size = length > 256 ? 256 : length;
621
622 memcpy(cmd->payload, data + done, block_size);
623 cmd->length = cpu_to_le16(block_size);
624
625 rc = mwl8k_send_fw_load_cmd(priv, cmd,
626 sizeof(*cmd) + block_size);
627 if (rc)
628 break;
629
630 done += block_size;
631 length -= block_size;
632 }
633
634 if (!rc) {
635 cmd->length = 0;
636 rc = mwl8k_send_fw_load_cmd(priv, cmd, sizeof(*cmd));
637 }
638
639 kfree(cmd);
640
641 return rc;
642}
643
644static int mwl8k_feed_fw_image(struct mwl8k_priv *priv,
645 const u8 *data, size_t length)
646{
647 unsigned char *buffer;
648 int may_continue, rc = 0;
649 u32 done, prev_block_size;
650
651 buffer = kmalloc(1024, GFP_KERNEL);
652 if (buffer == NULL)
653 return -ENOMEM;
654
655 done = 0;
656 prev_block_size = 0;
657 may_continue = 1000;
658 while (may_continue > 0) {
659 u32 block_size;
660
661 block_size = ioread32(priv->regs + MWL8K_HIU_SCRATCH);
662 if (block_size & 1) {
663 block_size &= ~1;
664 may_continue--;
665 } else {
666 done += prev_block_size;
667 length -= prev_block_size;
668 }
669
670 if (block_size > 1024 || block_size > length) {
671 rc = -EOVERFLOW;
672 break;
673 }
674
675 if (length == 0) {
676 rc = 0;
677 break;
678 }
679
680 if (block_size == 0) {
681 rc = -EPROTO;
682 may_continue--;
683 udelay(1);
684 continue;
685 }
686
687 prev_block_size = block_size;
688 memcpy(buffer, data + done, block_size);
689
690 rc = mwl8k_send_fw_load_cmd(priv, buffer, block_size);
691 if (rc)
692 break;
693 }
694
695 if (!rc && length != 0)
696 rc = -EREMOTEIO;
697
698 kfree(buffer);
699
700 return rc;
701}
702
c2c357ce 703static int mwl8k_load_firmware(struct ieee80211_hw *hw)
a66098da 704{
c2c357ce 705 struct mwl8k_priv *priv = hw->priv;
d1f9e41d 706 const struct firmware *fw = priv->fw_ucode;
c2c357ce
LB		 707 int rc;
708 int loops;
709
710 if (!memcmp(fw->data, "\x01\x00\x00\x00", 4)) {
d1f9e41d 711 const struct firmware *helper = priv->fw_helper;
a66098da 712
c2c357ce
LB		 713 if (helper == NULL) {
714 printk(KERN_ERR "%s: helper image needed but none "
715 "given\n", pci_name(priv->pdev));
716 return -EINVAL;
717 }
a66098da 718
c2c357ce 719 rc = mwl8k_load_fw_image(priv, helper->data, helper->size);
a66098da
LB		 720 if (rc) {
721 printk(KERN_ERR "%s: unable to load firmware "
c2c357ce 722 "helper image\n", pci_name(priv->pdev));
a66098da
LB		 723 return rc;
724 }
ba30c4a5 725 msleep(20);
a66098da 726
c2c357ce 727 rc = mwl8k_feed_fw_image(priv, fw->data, fw->size);
a66098da 728 } else {
c2c357ce 729 rc = mwl8k_load_fw_image(priv, fw->data, fw->size);
a66098da
LB		 730 }
731
732 if (rc) {
c2c357ce
LB		 733 printk(KERN_ERR "%s: unable to load firmware image\n",
734 pci_name(priv->pdev));
a66098da
LB		 735 return rc;
736 }
737
89a91f4f 738 iowrite32(MWL8K_MODE_STA, priv->regs + MWL8K_HIU_GEN_PTR);
a66098da 739
89b872e2 740 loops = 500000;
a66098da 741 do {
eae74e65
LB		 742 u32 ready_code;
743
744 ready_code = ioread32(priv->regs + MWL8K_HIU_INT_CODE);
745 if (ready_code == MWL8K_FWAP_READY) {
3db1cd5c 746 priv->ap_fw = true;
eae74e65
LB		 747 break;
748 } else if (ready_code == MWL8K_FWSTA_READY) {
3db1cd5c 749 priv->ap_fw = false;
a66098da 750 break;
eae74e65
LB		 751 }
752
753 cond_resched();
a66098da
LB		 754 udelay(1);
755 } while (--loops);
756
757 return loops ? 0 : -ETIMEDOUT;
758}
759
760
a66098da
LB		 761/* DMA header used by firmware and hardware. */
762struct mwl8k_dma_data {
763 __le16 fwlen;
764 struct ieee80211_hdr wh;
20f09c3d 765 char data[0];
ba2d3587 766} __packed;
a66098da
LB		 767
768/* Routines to add/remove DMA header from skb. */
20f09c3d 769static inline void mwl8k_remove_dma_header(struct sk_buff *skb, __le16 qos)
a66098da 770{
20f09c3d
LB		 771 struct mwl8k_dma_data *tr;
772 int hdrlen;
773
774 tr = (struct mwl8k_dma_data *)skb->data;
775 hdrlen = ieee80211_hdrlen(tr->wh.frame_control);
776
777 if (hdrlen != sizeof(tr->wh)) {
778 if (ieee80211_is_data_qos(tr->wh.frame_control)) {
779 memmove(tr->data - hdrlen, &tr->wh, hdrlen - 2);
780 *((__le16 *)(tr->data - 2)) = qos;
781 } else {
782 memmove(tr->data - hdrlen, &tr->wh, hdrlen);
783 }
a66098da 784 }
20f09c3d
LB		 785
786 if (hdrlen != sizeof(*tr))
787 skb_pull(skb, sizeof(*tr) - hdrlen);
a66098da
LB		 788}
789
ff776cec
YAP		 790#define REDUCED_TX_HEADROOM 8
791
252486a1 792static void
e4eefec7
YAP		 793mwl8k_add_dma_header(struct mwl8k_priv *priv, struct sk_buff *skb,
794 int head_pad, int tail_pad)
a66098da
LB		 795{
796 struct ieee80211_hdr *wh;
ca009301 797 int hdrlen;
252486a1 798 int reqd_hdrlen;
a66098da
LB		 799 struct mwl8k_dma_data *tr;
800
ca009301
LB		 801 /*
802 * Add a firmware DMA header; the firmware requires that we
803 * present a 2-byte payload length followed by a 4-address
804 * header (without QoS field), followed (optionally) by any
805 * WEP/ExtIV header (but only filled in for CCMP).
806 */
a66098da 807 wh = (struct ieee80211_hdr *)skb->data;
ca009301 808
a66098da 809 hdrlen = ieee80211_hdrlen(wh->frame_control);
ff776cec
YAP		 810
811 /*
812 * Check if skb_resize is required because of
813 * tx_headroom adjustment.
814 */
815 if (priv->ap_fw && (hdrlen < (sizeof(struct ieee80211_cts)
816 + REDUCED_TX_HEADROOM))) {
817 if (pskb_expand_head(skb, REDUCED_TX_HEADROOM, 0, GFP_ATOMIC)) {
818
819 wiphy_err(priv->hw->wiphy,
820 "Failed to reallocate TX buffer\n");
821 return;
822 }
823 skb->truesize += REDUCED_TX_HEADROOM;
824 }
825
e4eefec7 826 reqd_hdrlen = sizeof(*tr) + head_pad;
252486a1
NS		 827
828 if (hdrlen != reqd_hdrlen)
829 skb_push(skb, reqd_hdrlen - hdrlen);
a66098da 830
ca009301 831 if (ieee80211_is_data_qos(wh->frame_control))
252486a1 832 hdrlen -= IEEE80211_QOS_CTL_LEN;
a66098da
LB		 833
834 tr = (struct mwl8k_dma_data *)skb->data;
835 if (wh != &tr->wh)
836 memmove(&tr->wh, wh, hdrlen);
ca009301
LB		 837 if (hdrlen != sizeof(tr->wh))
838 memset(((void *)&tr->wh) + hdrlen, 0, sizeof(tr->wh) - hdrlen);
a66098da
LB		 839
840 /*
841 * Firmware length is the length of the fully formed "802.11
842 * payload". That is, everything except for the 802.11 header.
843 * This includes all crypto material including the MIC.
844 */
252486a1 845 tr->fwlen = cpu_to_le16(skb->len - sizeof(*tr) + tail_pad);
a66098da
LB		 846}
847
ff776cec
YAP		 848static void mwl8k_encapsulate_tx_frame(struct mwl8k_priv *priv,
849 struct sk_buff *skb)
e53d9b96
NS		 850{
851 struct ieee80211_hdr *wh;
852 struct ieee80211_tx_info *tx_info;
853 struct ieee80211_key_conf *key_conf;
854 int data_pad;
e4eefec7 855 int head_pad = 0;
e53d9b96
NS		 856
857 wh = (struct ieee80211_hdr *)skb->data;
858
859 tx_info = IEEE80211_SKB_CB(skb);
860
861 key_conf = NULL;
862 if (ieee80211_is_data(wh->frame_control))
863 key_conf = tx_info->control.hw_key;
864
865 /*
866 * Make sure the packet header is in the DMA header format (4-address
e4eefec7 867 * without QoS), and add head & tail padding when HW crypto is enabled.
e53d9b96
NS		 868 *
869 * We have the following trailer padding requirements:
870 * - WEP: 4 trailer bytes (ICV)
871 * - TKIP: 12 trailer bytes (8 MIC + 4 ICV)
872 * - CCMP: 8 trailer bytes (MIC)
873 */
874 data_pad = 0;
875 if (key_conf != NULL) {
e4eefec7 876 head_pad = key_conf->iv_len;
e53d9b96
NS		 877 switch (key_conf->cipher) {
878 case WLAN_CIPHER_SUITE_WEP40:
879 case WLAN_CIPHER_SUITE_WEP104:
880 data_pad = 4;
881 break;
882 case WLAN_CIPHER_SUITE_TKIP:
883 data_pad = 12;
884 break;
885 case WLAN_CIPHER_SUITE_CCMP:
886 data_pad = 8;
887 break;
888 }
889 }
e4eefec7 890 mwl8k_add_dma_header(priv, skb, head_pad, data_pad);
e53d9b96 891}
a66098da
LB		 892
893/*
89a91f4f 894 * Packet reception for 88w8366 AP firmware.
6f6d1e9a 895 */
89a91f4f 896struct mwl8k_rxd_8366_ap {
6f6d1e9a
LB		 897 __le16 pkt_len;
898 __u8 sq2;
899 __u8 rate;
900 __le32 pkt_phys_addr;
901 __le32 next_rxd_phys_addr;
902 __le16 qos_control;
903 __le16 htsig2;
904 __le32 hw_rssi_info;
905 __le32 hw_noise_floor_info;
906 __u8 noise_floor;
907 __u8 pad0[3];
908 __u8 rssi;
909 __u8 rx_status;
910 __u8 channel;
911 __u8 rx_ctrl;
ba2d3587 912} __packed;
6f6d1e9a 913
89a91f4f
LB		 914#define MWL8K_8366_AP_RATE_INFO_MCS_FORMAT 0x80
915#define MWL8K_8366_AP_RATE_INFO_40MHZ 0x40
916#define MWL8K_8366_AP_RATE_INFO_RATEID(x) ((x) & 0x3f)
8e9f33f0 917
89a91f4f 918#define MWL8K_8366_AP_RX_CTRL_OWNED_BY_HOST 0x80
6f6d1e9a 919
d9a07d49
NS		 920/* 8366 AP rx_status bits */
921#define MWL8K_8366_AP_RXSTAT_DECRYPT_ERR_MASK 0x80
922#define MWL8K_8366_AP_RXSTAT_GENERAL_DECRYPT_ERR 0xFF
923#define MWL8K_8366_AP_RXSTAT_TKIP_DECRYPT_MIC_ERR 0x02
924#define MWL8K_8366_AP_RXSTAT_WEP_DECRYPT_ICV_ERR 0x04
925#define MWL8K_8366_AP_RXSTAT_TKIP_DECRYPT_ICV_ERR 0x08
926
89a91f4f 927static void mwl8k_rxd_8366_ap_init(void *_rxd, dma_addr_t next_dma_addr)
6f6d1e9a 928{
89a91f4f 929 struct mwl8k_rxd_8366_ap *rxd = _rxd;
6f6d1e9a
LB		 930
931 rxd->next_rxd_phys_addr = cpu_to_le32(next_dma_addr);
89a91f4f 932 rxd->rx_ctrl = MWL8K_8366_AP_RX_CTRL_OWNED_BY_HOST;
6f6d1e9a
LB		 933}
934
89a91f4f 935static void mwl8k_rxd_8366_ap_refill(void *_rxd, dma_addr_t addr, int len)
6f6d1e9a 936{
89a91f4f 937 struct mwl8k_rxd_8366_ap *rxd = _rxd;
6f6d1e9a
LB		 938
939 rxd->pkt_len = cpu_to_le16(len);
940 rxd->pkt_phys_addr = cpu_to_le32(addr);
941 wmb();
942 rxd->rx_ctrl = 0;
943}
944
945static int
89a91f4f 946mwl8k_rxd_8366_ap_process(void *_rxd, struct ieee80211_rx_status *status,
0d462bbb 947 __le16 *qos, s8 *noise)
6f6d1e9a 948{
89a91f4f 949 struct mwl8k_rxd_8366_ap *rxd = _rxd;
6f6d1e9a 950
89a91f4f 951 if (!(rxd->rx_ctrl & MWL8K_8366_AP_RX_CTRL_OWNED_BY_HOST))
6f6d1e9a
LB		 952 return -1;
953 rmb();
954
955 memset(status, 0, sizeof(*status));
956
957 status->signal = -rxd->rssi;
0d462bbb 958 *noise = -rxd->noise_floor;
6f6d1e9a 959
89a91f4f 960 if (rxd->rate & MWL8K_8366_AP_RATE_INFO_MCS_FORMAT) {
6f6d1e9a 961 status->flag |= RX_FLAG_HT;
89a91f4f 962 if (rxd->rate & MWL8K_8366_AP_RATE_INFO_40MHZ)
8e9f33f0 963 status->flag |= RX_FLAG_40MHZ;
89a91f4f 964 status->rate_idx = MWL8K_8366_AP_RATE_INFO_RATEID(rxd->rate);
6f6d1e9a
LB		 965 } else {
966 int i;
967
777ad375
LB		 968 for (i = 0; i < ARRAY_SIZE(mwl8k_rates_24); i++) {
969 if (mwl8k_rates_24[i].hw_value == rxd->rate) {
6f6d1e9a
LB		 970 status->rate_idx = i;
971 break;
972 }
973 }
974 }
975
85478344
LB		 976 if (rxd->channel > 14) {
977 status->band = IEEE80211_BAND_5GHZ;
978 if (!(status->flag & RX_FLAG_HT))
979 status->rate_idx -= 5;
980 } else {
981 status->band = IEEE80211_BAND_2GHZ;
982 }
59eb21a6
BR		 983 status->freq = ieee80211_channel_to_frequency(rxd->channel,
984 status->band);
6f6d1e9a 985
20f09c3d
LB		 986 *qos = rxd->qos_control;
987
d9a07d49
NS		 988 if ((rxd->rx_status != MWL8K_8366_AP_RXSTAT_GENERAL_DECRYPT_ERR) &&
989 (rxd->rx_status & MWL8K_8366_AP_RXSTAT_DECRYPT_ERR_MASK) &&
990 (rxd->rx_status & MWL8K_8366_AP_RXSTAT_TKIP_DECRYPT_MIC_ERR))
991 status->flag |= RX_FLAG_MMIC_ERROR;
992
6f6d1e9a
LB		 993 return le16_to_cpu(rxd->pkt_len);
994}
995
89a91f4f
LB		 996static struct rxd_ops rxd_8366_ap_ops = {
997 .rxd_size = sizeof(struct mwl8k_rxd_8366_ap),
998 .rxd_init = mwl8k_rxd_8366_ap_init,
999 .rxd_refill = mwl8k_rxd_8366_ap_refill,
1000 .rxd_process = mwl8k_rxd_8366_ap_process,
6f6d1e9a
LB		 1001};
1002
1003/*
89a91f4f 1004 * Packet reception for STA firmware.
a66098da 1005 */
89a91f4f 1006struct mwl8k_rxd_sta {
a66098da
LB		 1007 __le16 pkt_len;
1008 __u8 link_quality;
1009 __u8 noise_level;
1010 __le32 pkt_phys_addr;
45eb400d 1011 __le32 next_rxd_phys_addr;
a66098da
LB		 1012 __le16 qos_control;
1013 __le16 rate_info;
1014 __le32 pad0[4];
1015 __u8 rssi;
1016 __u8 channel;
1017 __le16 pad1;
1018 __u8 rx_ctrl;
1019 __u8 rx_status;
1020 __u8 pad2[2];
ba2d3587 1021} __packed;
a66098da 1022
89a91f4f
LB		 1023#define MWL8K_STA_RATE_INFO_SHORTPRE 0x8000
1024#define MWL8K_STA_RATE_INFO_ANTSELECT(x) (((x) >> 11) & 0x3)
1025#define MWL8K_STA_RATE_INFO_RATEID(x) (((x) >> 3) & 0x3f)
1026#define MWL8K_STA_RATE_INFO_40MHZ 0x0004
1027#define MWL8K_STA_RATE_INFO_SHORTGI 0x0002
1028#define MWL8K_STA_RATE_INFO_MCS_FORMAT 0x0001
54bc3a0d 1029
89a91f4f 1030#define MWL8K_STA_RX_CTRL_OWNED_BY_HOST 0x02
d9a07d49
NS		 1031#define MWL8K_STA_RX_CTRL_DECRYPT_ERROR 0x04
1032/* ICV=0 or MIC=1 */
1033#define MWL8K_STA_RX_CTRL_DEC_ERR_TYPE 0x08
1034/* Key is uploaded only in failure case */
1035#define MWL8K_STA_RX_CTRL_KEY_INDEX 0x30
54bc3a0d 1036
89a91f4f 1037static void mwl8k_rxd_sta_init(void *_rxd, dma_addr_t next_dma_addr)
54bc3a0d 1038{
89a91f4f 1039 struct mwl8k_rxd_sta *rxd = _rxd;
54bc3a0d
LB		 1040
1041 rxd->next_rxd_phys_addr = cpu_to_le32(next_dma_addr);
89a91f4f 1042 rxd->rx_ctrl = MWL8K_STA_RX_CTRL_OWNED_BY_HOST;
54bc3a0d
LB		 1043}
1044
89a91f4f 1045static void mwl8k_rxd_sta_refill(void *_rxd, dma_addr_t addr, int len)
54bc3a0d 1046{
89a91f4f 1047 struct mwl8k_rxd_sta *rxd = _rxd;
54bc3a0d
LB		 1048
1049 rxd->pkt_len = cpu_to_le16(len);
1050 rxd->pkt_phys_addr = cpu_to_le32(addr);
1051 wmb();
1052 rxd->rx_ctrl = 0;
1053}
1054
1055static int
89a91f4f 1056mwl8k_rxd_sta_process(void *_rxd, struct ieee80211_rx_status *status,
0d462bbb 1057 __le16 *qos, s8 *noise)
54bc3a0d 1058{
89a91f4f 1059 struct mwl8k_rxd_sta *rxd = _rxd;
54bc3a0d
LB		 1060 u16 rate_info;
1061
89a91f4f 1062 if (!(rxd->rx_ctrl & MWL8K_STA_RX_CTRL_OWNED_BY_HOST))
54bc3a0d
LB		 1063 return -1;
1064 rmb();
1065
1066 rate_info = le16_to_cpu(rxd->rate_info);
1067
1068 memset(status, 0, sizeof(*status));
1069
1070 status->signal = -rxd->rssi;
0d462bbb 1071 *noise = -rxd->noise_level;
89a91f4f
LB		 1072 status->antenna = MWL8K_STA_RATE_INFO_ANTSELECT(rate_info);
1073 status->rate_idx = MWL8K_STA_RATE_INFO_RATEID(rate_info);
54bc3a0d 1074
89a91f4f 1075 if (rate_info & MWL8K_STA_RATE_INFO_SHORTPRE)
54bc3a0d 1076 status->flag |= RX_FLAG_SHORTPRE;
89a91f4f 1077 if (rate_info & MWL8K_STA_RATE_INFO_40MHZ)
54bc3a0d 1078 status->flag |= RX_FLAG_40MHZ;
89a91f4f 1079 if (rate_info & MWL8K_STA_RATE_INFO_SHORTGI)
54bc3a0d 1080 status->flag |= RX_FLAG_SHORT_GI;
89a91f4f 1081 if (rate_info & MWL8K_STA_RATE_INFO_MCS_FORMAT)
54bc3a0d
LB		 1082 status->flag |= RX_FLAG_HT;
1083
85478344
LB		 1084 if (rxd->channel > 14) {
1085 status->band = IEEE80211_BAND_5GHZ;
1086 if (!(status->flag & RX_FLAG_HT))
1087 status->rate_idx -= 5;
1088 } else {
1089 status->band = IEEE80211_BAND_2GHZ;
1090 }
59eb21a6
BR		 1091 status->freq = ieee80211_channel_to_frequency(rxd->channel,
1092 status->band);
54bc3a0d 1093
20f09c3d 1094 *qos = rxd->qos_control;
d9a07d49
NS		 1095 if ((rxd->rx_ctrl & MWL8K_STA_RX_CTRL_DECRYPT_ERROR) &&
1096 (rxd->rx_ctrl & MWL8K_STA_RX_CTRL_DEC_ERR_TYPE))
1097 status->flag |= RX_FLAG_MMIC_ERROR;
20f09c3d 1098
54bc3a0d
LB		 1099 return le16_to_cpu(rxd->pkt_len);
1100}
1101
89a91f4f
LB		 1102static struct rxd_ops rxd_sta_ops = {
1103 .rxd_size = sizeof(struct mwl8k_rxd_sta),
1104 .rxd_init = mwl8k_rxd_sta_init,
1105 .rxd_refill = mwl8k_rxd_sta_refill,
1106 .rxd_process = mwl8k_rxd_sta_process,
54bc3a0d
LB		 1107};
1108
1109
a66098da
LB		 1110#define MWL8K_RX_DESCS 256
1111#define MWL8K_RX_MAXSZ 3800
1112
1113static int mwl8k_rxq_init(struct ieee80211_hw *hw, int index)
1114{
1115 struct mwl8k_priv *priv = hw->priv;
1116 struct mwl8k_rx_queue *rxq = priv->rxq + index;
1117 int size;
1118 int i;
1119
45eb400d
LB		 1120 rxq->rxd_count = 0;
1121 rxq->head = 0;
1122 rxq->tail = 0;
a66098da 1123
54bc3a0d 1124 size = MWL8K_RX_DESCS * priv->rxd_ops->rxd_size;
a66098da 1125
45eb400d
LB		 1126 rxq->rxd = pci_alloc_consistent(priv->pdev, size, &rxq->rxd_dma);
1127 if (rxq->rxd == NULL) {
5db55844 1128 wiphy_err(hw->wiphy, "failed to alloc RX descriptors\n");
a66098da
LB		 1129 return -ENOMEM;
1130 }
45eb400d 1131 memset(rxq->rxd, 0, size);
a66098da 1132
b9ede5f1 1133 rxq->buf = kcalloc(MWL8K_RX_DESCS, sizeof(*rxq->buf), GFP_KERNEL);
788838eb 1134 if (rxq->buf == NULL) {
5db55844 1135 wiphy_err(hw->wiphy, "failed to alloc RX skbuff list\n");
45eb400d 1136 pci_free_consistent(priv->pdev, size, rxq->rxd, rxq->rxd_dma);
a66098da
LB		 1137 return -ENOMEM;
1138 }
a66098da
LB		 1139
1140 for (i = 0; i < MWL8K_RX_DESCS; i++) {
54bc3a0d
LB		 1141 int desc_size;
1142 void *rxd;
a66098da 1143 int nexti;
54bc3a0d
LB		 1144 dma_addr_t next_dma_addr;
1145
1146 desc_size = priv->rxd_ops->rxd_size;
1147 rxd = rxq->rxd + (i * priv->rxd_ops->rxd_size);
a66098da 1148
54bc3a0d
LB		 1149 nexti = i + 1;
1150 if (nexti == MWL8K_RX_DESCS)
1151 nexti = 0;
1152 next_dma_addr = rxq->rxd_dma + (nexti * desc_size);
a66098da 1153
54bc3a0d 1154 priv->rxd_ops->rxd_init(rxd, next_dma_addr);
a66098da
LB		 1155 }
1156
1157 return 0;
1158}
1159
1160static int rxq_refill(struct ieee80211_hw *hw, int index, int limit)
1161{
1162 struct mwl8k_priv *priv = hw->priv;
1163 struct mwl8k_rx_queue *rxq = priv->rxq + index;
1164 int refilled;
1165
1166 refilled = 0;
45eb400d 1167 while (rxq->rxd_count < MWL8K_RX_DESCS && limit--) {
a66098da 1168 struct sk_buff *skb;
788838eb 1169 dma_addr_t addr;
a66098da 1170 int rx;
54bc3a0d 1171 void *rxd;
a66098da
LB		 1172
1173 skb = dev_alloc_skb(MWL8K_RX_MAXSZ);
1174 if (skb == NULL)
1175 break;
1176
788838eb
LB		 1177 addr = pci_map_single(priv->pdev, skb->data,
1178 MWL8K_RX_MAXSZ, DMA_FROM_DEVICE);
a66098da 1179
54bc3a0d
LB		 1180 rxq->rxd_count++;
1181 rx = rxq->tail++;
1182 if (rxq->tail == MWL8K_RX_DESCS)
1183 rxq->tail = 0;
788838eb 1184 rxq->buf[rx].skb = skb;
53b1b3e1 1185 dma_unmap_addr_set(&rxq->buf[rx], dma, addr);
54bc3a0d
LB		 1186
1187 rxd = rxq->rxd + (rx * priv->rxd_ops->rxd_size);
1188 priv->rxd_ops->rxd_refill(rxd, addr, MWL8K_RX_MAXSZ);
a66098da
LB		 1189
1190 refilled++;
1191 }
1192
1193 return refilled;
1194}
1195
1196/* Must be called only when the card's reception is completely halted */
1197static void mwl8k_rxq_deinit(struct ieee80211_hw *hw, int index)
1198{
1199 struct mwl8k_priv *priv = hw->priv;
1200 struct mwl8k_rx_queue *rxq = priv->rxq + index;
1201 int i;
1202
73b46320
BC		 1203 if (rxq->rxd == NULL)
1204 return;
1205
a66098da 1206 for (i = 0; i < MWL8K_RX_DESCS; i++) {
788838eb
LB		 1207 if (rxq->buf[i].skb != NULL) {
1208 pci_unmap_single(priv->pdev,
53b1b3e1 1209 dma_unmap_addr(&rxq->buf[i], dma),
788838eb 1210 MWL8K_RX_MAXSZ, PCI_DMA_FROMDEVICE);
53b1b3e1 1211 dma_unmap_addr_set(&rxq->buf[i], dma, 0);
788838eb
LB		 1212
1213 kfree_skb(rxq->buf[i].skb);
1214 rxq->buf[i].skb = NULL;
a66098da
LB		 1215 }
1216 }
1217
788838eb
LB		 1218 kfree(rxq->buf);
1219 rxq->buf = NULL;
a66098da
LB		 1220
1221 pci_free_consistent(priv->pdev,
54bc3a0d 1222 MWL8K_RX_DESCS * priv->rxd_ops->rxd_size,
45eb400d
LB		 1223 rxq->rxd, rxq->rxd_dma);
1224 rxq->rxd = NULL;
a66098da
LB		 1225}
1226
1227
1228/*
1229 * Scan a list of BSSIDs to process for finalize join.
1230 * Allows for extension to process multiple BSSIDs.
1231 */
1232static inline int
1233mwl8k_capture_bssid(struct mwl8k_priv *priv, struct ieee80211_hdr *wh)
1234{
1235 return priv->capture_beacon &&
1236 ieee80211_is_beacon(wh->frame_control) &&
1237 !compare_ether_addr(wh->addr3, priv->capture_bssid);
1238}
1239
3779752d
LB		 1240static inline void mwl8k_save_beacon(struct ieee80211_hw *hw,
1241 struct sk_buff *skb)
a66098da 1242{
3779752d
LB		 1243 struct mwl8k_priv *priv = hw->priv;
1244
a66098da 1245 priv->capture_beacon = false;
d89173f2 1246 memset(priv->capture_bssid, 0, ETH_ALEN);
a66098da
LB		 1247
1248 /*
1249 * Use GFP_ATOMIC as rxq_process is called from
1250 * the primary interrupt handler, memory allocation call
1251 * must not sleep.
1252 */
1253 priv->beacon_skb = skb_copy(skb, GFP_ATOMIC);
1254 if (priv->beacon_skb != NULL)
3779752d 1255 ieee80211_queue_work(hw, &priv->finalize_join_worker);
a66098da
LB		 1256}
1257
d9a07d49
NS		 1258static inline struct mwl8k_vif *mwl8k_find_vif_bss(struct list_head *vif_list,
1259 u8 *bssid)
1260{
1261 struct mwl8k_vif *mwl8k_vif;
1262
1263 list_for_each_entry(mwl8k_vif,
1264 vif_list, list) {
1265 if (memcmp(bssid, mwl8k_vif->bssid,
1266 ETH_ALEN) == 0)
1267 return mwl8k_vif;
1268 }
1269
1270 return NULL;
1271}
1272
a66098da
LB		 1273static int rxq_process(struct ieee80211_hw *hw, int index, int limit)
1274{
1275 struct mwl8k_priv *priv = hw->priv;
d9a07d49 1276 struct mwl8k_vif *mwl8k_vif = NULL;
a66098da
LB		 1277 struct mwl8k_rx_queue *rxq = priv->rxq + index;
1278 int processed;
1279
1280 processed = 0;
45eb400d 1281 while (rxq->rxd_count && limit--) {
a66098da 1282 struct sk_buff *skb;
54bc3a0d
LB		 1283 void *rxd;
1284 int pkt_len;
a66098da 1285 struct ieee80211_rx_status status;
d9a07d49 1286 struct ieee80211_hdr *wh;
20f09c3d 1287 __le16 qos;
a66098da 1288
788838eb 1289 skb = rxq->buf[rxq->head].skb;
d25f9f13
LB		 1290 if (skb == NULL)
1291 break;
54bc3a0d
LB		 1292
1293 rxd = rxq->rxd + (rxq->head * priv->rxd_ops->rxd_size);
1294
0d462bbb
JL		 1295 pkt_len = priv->rxd_ops->rxd_process(rxd, &status, &qos,
1296 &priv->noise);
54bc3a0d
LB		 1297 if (pkt_len < 0)
1298 break;
1299
788838eb
LB		 1300 rxq->buf[rxq->head].skb = NULL;
1301
1302 pci_unmap_single(priv->pdev,
53b1b3e1 1303 dma_unmap_addr(&rxq->buf[rxq->head], dma),
788838eb 1304 MWL8K_RX_MAXSZ, PCI_DMA_FROMDEVICE);
53b1b3e1 1305 dma_unmap_addr_set(&rxq->buf[rxq->head], dma, 0);
a66098da 1306
54bc3a0d
LB		 1307 rxq->head++;
1308 if (rxq->head == MWL8K_RX_DESCS)
1309 rxq->head = 0;
1310
45eb400d 1311 rxq->rxd_count--;
a66098da 1312
d9a07d49 1313 wh = &((struct mwl8k_dma_data *)skb->data)->wh;
a66098da 1314
a66098da 1315 /*
c2c357ce
LB		 1316 * Check for a pending join operation. Save a
1317 * copy of the beacon and schedule a tasklet to
1318 * send a FINALIZE_JOIN command to the firmware.
a66098da 1319 */
54bc3a0d 1320 if (mwl8k_capture_bssid(priv, (void *)skb->data))
3779752d 1321 mwl8k_save_beacon(hw, skb);
a66098da 1322
d9a07d49
NS		 1323 if (ieee80211_has_protected(wh->frame_control)) {
1324
1325 /* Check if hw crypto has been enabled for
1326 * this bss. If yes, set the status flags
1327 * accordingly
1328 */
1329 mwl8k_vif = mwl8k_find_vif_bss(&priv->vif_list,
1330 wh->addr1);
1331
1332 if (mwl8k_vif != NULL &&
1333 mwl8k_vif->is_hw_crypto_enabled == true) {
1334 /*
1335 * When MMIC ERROR is encountered
1336 * by the firmware, payload is
1337 * dropped and only 32 bytes of
1338 * mwl8k Firmware header is sent
1339 * to the host.
1340 *
1341 * We need to add four bytes of
1342 * key information. In it
1343 * MAC80211 expects keyidx set to
1344 * 0 for triggering Counter
1345 * Measure of MMIC failure.
1346 */
1347 if (status.flag & RX_FLAG_MMIC_ERROR) {
1348 struct mwl8k_dma_data *tr;
1349 tr = (struct mwl8k_dma_data *)skb->data;
1350 memset((void *)&(tr->data), 0, 4);
1351 pkt_len += 4;
1352 }
1353
1354 if (!ieee80211_is_auth(wh->frame_control))
1355 status.flag |= RX_FLAG_IV_STRIPPED |
1356 RX_FLAG_DECRYPTED |
1357 RX_FLAG_MMIC_STRIPPED;
1358 }
1359 }
1360
1361 skb_put(skb, pkt_len);
1362 mwl8k_remove_dma_header(skb, qos);
f1d58c25
JB		 1363 memcpy(IEEE80211_SKB_RXCB(skb), &status, sizeof(status));
1364 ieee80211_rx_irqsafe(hw, skb);
a66098da
LB		 1365
1366 processed++;
1367 }
1368
1369 return processed;
1370}
1371
1372
1373/*
1374 * Packet transmission.
1375 */
1376
a66098da
LB		 1377#define MWL8K_TXD_STATUS_OK 0x00000001
1378#define MWL8K_TXD_STATUS_OK_RETRY 0x00000002
1379#define MWL8K_TXD_STATUS_OK_MORE_RETRY 0x00000004
1380#define MWL8K_TXD_STATUS_MULTICAST_TX 0x00000008
a66098da 1381#define MWL8K_TXD_STATUS_FW_OWNED 0x80000000
a66098da 1382
e0493a8d
LB		 1383#define MWL8K_QOS_QLEN_UNSPEC 0xff00
1384#define MWL8K_QOS_ACK_POLICY_MASK 0x0060
1385#define MWL8K_QOS_ACK_POLICY_NORMAL 0x0000
1386#define MWL8K_QOS_ACK_POLICY_BLOCKACK 0x0060
1387#define MWL8K_QOS_EOSP 0x0010
1388
a66098da
LB		 1389struct mwl8k_tx_desc {
1390 __le32 status;
1391 __u8 data_rate;
1392 __u8 tx_priority;
1393 __le16 qos_control;
1394 __le32 pkt_phys_addr;
1395 __le16 pkt_len;
d89173f2 1396 __u8 dest_MAC_addr[ETH_ALEN];
45eb400d 1397 __le32 next_txd_phys_addr;
8a7a578c 1398 __le32 timestamp;
a66098da
LB		 1399 __le16 rate_info;
1400 __u8 peer_id;
a1fe24b0 1401 __u8 tx_frag_cnt;
ba2d3587 1402} __packed;
a66098da
LB		 1403
1404#define MWL8K_TX_DESCS 128
1405
1406static int mwl8k_txq_init(struct ieee80211_hw *hw, int index)
1407{
1408 struct mwl8k_priv *priv = hw->priv;
1409 struct mwl8k_tx_queue *txq = priv->txq + index;
1410 int size;
1411 int i;
1412
8ccbc3b8 1413 txq->len = 0;
45eb400d
LB		 1414 txq->head = 0;
1415 txq->tail = 0;
a66098da
LB		 1416
1417 size = MWL8K_TX_DESCS * sizeof(struct mwl8k_tx_desc);
1418
45eb400d
LB		 1419 txq->txd = pci_alloc_consistent(priv->pdev, size, &txq->txd_dma);
1420 if (txq->txd == NULL) {
5db55844 1421 wiphy_err(hw->wiphy, "failed to alloc TX descriptors\n");
a66098da
LB		 1422 return -ENOMEM;
1423 }
45eb400d 1424 memset(txq->txd, 0, size);
a66098da 1425
b9ede5f1 1426 txq->skb = kcalloc(MWL8K_TX_DESCS, sizeof(*txq->skb), GFP_KERNEL);
45eb400d 1427 if (txq->skb == NULL) {
5db55844 1428 wiphy_err(hw->wiphy, "failed to alloc TX skbuff list\n");
45eb400d 1429 pci_free_consistent(priv->pdev, size, txq->txd, txq->txd_dma);
a66098da
LB		 1430 return -ENOMEM;
1431 }
a66098da
LB		 1432
1433 for (i = 0; i < MWL8K_TX_DESCS; i++) {
1434 struct mwl8k_tx_desc *tx_desc;
1435 int nexti;
1436
45eb400d 1437 tx_desc = txq->txd + i;
a66098da
LB		 1438 nexti = (i + 1) % MWL8K_TX_DESCS;
1439
1440 tx_desc->status = 0;
45eb400d
LB		 1441 tx_desc->next_txd_phys_addr =
1442 cpu_to_le32(txq->txd_dma + nexti * sizeof(*tx_desc));
a66098da
LB		 1443 }
1444
1445 return 0;
1446}
1447
1448static inline void mwl8k_tx_start(struct mwl8k_priv *priv)
1449{
1450 iowrite32(MWL8K_H2A_INT_PPA_READY,
1451 priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
1452 iowrite32(MWL8K_H2A_INT_DUMMY,
1453 priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
1454 ioread32(priv->regs + MWL8K_HIU_INT_CODE);
1455}
1456
7e1112d3 1457static void mwl8k_dump_tx_rings(struct ieee80211_hw *hw)
a66098da 1458{
7e1112d3
LB		 1459 struct mwl8k_priv *priv = hw->priv;
1460 int i;
1461
e600707b 1462 for (i = 0; i < mwl8k_tx_queues(priv); i++) {
7e1112d3
LB		 1463 struct mwl8k_tx_queue *txq = priv->txq + i;
1464 int fw_owned = 0;
1465 int drv_owned = 0;
1466 int unused = 0;
1467 int desc;
1468
a66098da 1469 for (desc = 0; desc < MWL8K_TX_DESCS; desc++) {
7e1112d3
LB		 1470 struct mwl8k_tx_desc *tx_desc = txq->txd + desc;
1471 u32 status;
a66098da 1472
7e1112d3 1473 status = le32_to_cpu(tx_desc->status);
a66098da 1474 if (status & MWL8K_TXD_STATUS_FW_OWNED)
7e1112d3 1475 fw_owned++;
a66098da 1476 else
7e1112d3 1477 drv_owned++;
a66098da
LB		 1478
1479 if (tx_desc->pkt_len == 0)
7e1112d3 1480 unused++;
a66098da 1481 }
a66098da 1482
c96c31e4
JP		 1483 wiphy_err(hw->wiphy,
1484 "txq[%d] len=%d head=%d tail=%d "
1485 "fw_owned=%d drv_owned=%d unused=%d\n",
1486 i,
1487 txq->len, txq->head, txq->tail,
1488 fw_owned, drv_owned, unused);
7e1112d3 1489 }
a66098da
LB		 1490}
1491
618952a7 1492/*
88de754a 1493 * Must be called with priv->fw_mutex held and tx queues stopped.
618952a7 1494 */
62abd3cf 1495#define MWL8K_TX_WAIT_TIMEOUT_MS 5000
7e1112d3 1496
950d5b01 1497static int mwl8k_tx_wait_empty(struct ieee80211_hw *hw)
a66098da 1498{
a66098da 1499 struct mwl8k_priv *priv = hw->priv;
88de754a 1500 DECLARE_COMPLETION_ONSTACK(tx_wait);
7e1112d3
LB		 1501 int retry;
1502 int rc;
a66098da
LB		 1503
1504 might_sleep();
1505
6b6accc3
YAP		 1506 /* Since fw restart is in progress, allow only the firmware
1507 * commands from the restart code and block the other
1508 * commands since they are going to fail in any case since
1509 * the firmware has crashed
1510 */
1511 if (priv->hw_restart_in_progress) {
1512 if (priv->hw_restart_owner == current)
1513 return 0;
1514 else
1515 return -EBUSY;
1516 }
1517
7e1112d3
LB		 1518 /*
1519 * The TX queues are stopped at this point, so this test
1520 * doesn't need to take ->tx_lock.
1521 */
1522 if (!priv->pending_tx_pkts)
1523 return 0;
1524
1525 retry = 0;
1526 rc = 0;
1527
a66098da 1528 spin_lock_bh(&priv->tx_lock);
7e1112d3
LB		 1529 priv->tx_wait = &tx_wait;
1530 while (!rc) {
1531 int oldcount;
1532 unsigned long timeout;
a66098da 1533
7e1112d3 1534 oldcount = priv->pending_tx_pkts;
a66098da 1535
7e1112d3 1536 spin_unlock_bh(&priv->tx_lock);
88de754a 1537 timeout = wait_for_completion_timeout(&tx_wait,
7e1112d3 1538 msecs_to_jiffies(MWL8K_TX_WAIT_TIMEOUT_MS));
a66098da 1539 spin_lock_bh(&priv->tx_lock);
7e1112d3
LB		 1540
1541 if (timeout) {
1542 WARN_ON(priv->pending_tx_pkts);
ba30c4a5 1543 if (retry)
c96c31e4 1544 wiphy_notice(hw->wiphy, "tx rings drained\n");
7e1112d3
LB		 1545 break;
1546 }
1547
1548 if (priv->pending_tx_pkts < oldcount) {
c96c31e4
JP		 1549 wiphy_notice(hw->wiphy,
1550 "waiting for tx rings to drain (%d -> %d pkts)\n",
1551 oldcount, priv->pending_tx_pkts);
7e1112d3
LB		 1552 retry = 1;
1553 continue;
1554 }
1555
a66098da 1556 priv->tx_wait = NULL;
a66098da 1557
c96c31e4
JP		 1558 wiphy_err(hw->wiphy, "tx rings stuck for %d ms\n",
1559 MWL8K_TX_WAIT_TIMEOUT_MS);
7e1112d3 1560 mwl8k_dump_tx_rings(hw);
6b6accc3
YAP		 1561 priv->hw_restart_in_progress = true;
1562 ieee80211_queue_work(hw, &priv->fw_reload);
7e1112d3
LB		 1563
1564 rc = -ETIMEDOUT;
a66098da 1565 }
7e1112d3 1566 spin_unlock_bh(&priv->tx_lock);
a66098da 1567
7e1112d3 1568 return rc;
a66098da
LB		 1569}
1570
c23b5a69
LB		 1571#define MWL8K_TXD_SUCCESS(status) \
1572 ((status) & (MWL8K_TXD_STATUS_OK | \
1573 MWL8K_TXD_STATUS_OK_RETRY | \
1574 MWL8K_TXD_STATUS_OK_MORE_RETRY))
a66098da 1575
a0e7c6cf
NS		 1576static int mwl8k_tid_queue_mapping(u8 tid)
1577{
1578 BUG_ON(tid > 7);
1579
1580 switch (tid) {
1581 case 0:
1582 case 3:
1583 return IEEE80211_AC_BE;
1584 break;
1585 case 1:
1586 case 2:
1587 return IEEE80211_AC_BK;
1588 break;
1589 case 4:
1590 case 5:
1591 return IEEE80211_AC_VI;
1592 break;
1593 case 6:
1594 case 7:
1595 return IEEE80211_AC_VO;
1596 break;
1597 default:
1598 return -1;
1599 break;
1600 }
1601}
1602
17033543
NS		 1603/* The firmware will fill in the rate information
1604 * for each packet that gets queued in the hardware
49adc5ce 1605 * and these macros will interpret that info.
17033543
NS		 1606 */
1607
49adc5ce
JL		 1608#define RI_FORMAT(a) (a & 0x0001)
1609#define RI_RATE_ID_MCS(a) ((a & 0x01f8) >> 3)
17033543 1610
efb7c49a
LB		 1611static int
1612mwl8k_txq_reclaim(struct ieee80211_hw *hw, int index, int limit, int force)
a66098da
LB		 1613{
1614 struct mwl8k_priv *priv = hw->priv;
1615 struct mwl8k_tx_queue *txq = priv->txq + index;
efb7c49a 1616 int processed;
a66098da 1617
efb7c49a 1618 processed = 0;
8ccbc3b8 1619 while (txq->len > 0 && limit--) {
a66098da 1620 int tx;
a66098da
LB		 1621 struct mwl8k_tx_desc *tx_desc;
1622 unsigned long addr;
ce9e2e1b 1623 int size;
a66098da
LB		 1624 struct sk_buff *skb;
1625 struct ieee80211_tx_info *info;
1626 u32 status;
17033543
NS		 1627 struct ieee80211_sta *sta;
1628 struct mwl8k_sta *sta_info = NULL;
1629 u16 rate_info;
17033543 1630 struct ieee80211_hdr *wh;
a66098da 1631
45eb400d
LB		 1632 tx = txq->head;
1633 tx_desc = txq->txd + tx;
a66098da
LB		 1634
1635 status = le32_to_cpu(tx_desc->status);
1636
1637 if (status & MWL8K_TXD_STATUS_FW_OWNED) {
1638 if (!force)
1639 break;
1640 tx_desc->status &=
1641 ~cpu_to_le32(MWL8K_TXD_STATUS_FW_OWNED);
1642 }
1643
45eb400d 1644 txq->head = (tx + 1) % MWL8K_TX_DESCS;
8ccbc3b8
KV		 1645 BUG_ON(txq->len == 0);
1646 txq->len--;
a66098da
LB		 1647 priv->pending_tx_pkts--;
1648
1649 addr = le32_to_cpu(tx_desc->pkt_phys_addr);
ce9e2e1b 1650 size = le16_to_cpu(tx_desc->pkt_len);
45eb400d
LB		 1651 skb = txq->skb[tx];
1652 txq->skb[tx] = NULL;
a66098da
LB		 1653
1654 BUG_ON(skb == NULL);
1655 pci_unmap_single(priv->pdev, addr, size, PCI_DMA_TODEVICE);
1656
20f09c3d 1657 mwl8k_remove_dma_header(skb, tx_desc->qos_control);
a66098da 1658
17033543
NS		 1659 wh = (struct ieee80211_hdr *) skb->data;
1660
a66098da
LB		 1661 /* Mark descriptor as unused */
1662 tx_desc->pkt_phys_addr = 0;
1663 tx_desc->pkt_len = 0;
1664
a66098da 1665 info = IEEE80211_SKB_CB(skb);
17033543
NS		 1666 if (ieee80211_is_data(wh->frame_control)) {
1667 sta = info->control.sta;
1668 if (sta) {
1669 sta_info = MWL8K_STA(sta);
1670 BUG_ON(sta_info == NULL);
1671 rate_info = le16_to_cpu(tx_desc->rate_info);
17033543
NS		 1672 /* If rate is < 6.5 Mpbs for an ht station
1673 * do not form an ampdu. If the station is a
1674 * legacy station (format = 0), do not form an
1675 * ampdu
1676 */
49adc5ce
JL		 1677 if (RI_RATE_ID_MCS(rate_info) < 1 ||
1678 RI_FORMAT(rate_info) == 0) {
17033543
NS		 1679 sta_info->is_ampdu_allowed = false;
1680 } else {
1681 sta_info->is_ampdu_allowed = true;
1682 }
1683 }
1684 }
1685
a66098da 1686 ieee80211_tx_info_clear_status(info);
0bf22c37
NS		 1687
1688 /* Rate control is happening in the firmware.
1689 * Ensure no tx rate is being reported.
1690 */
ba30c4a5
YAP		 1691 info->status.rates[0].idx = -1;
1692 info->status.rates[0].count = 1;
0bf22c37 1693
ce9e2e1b 1694 if (MWL8K_TXD_SUCCESS(status))
a66098da 1695 info->flags |= IEEE80211_TX_STAT_ACK;
a66098da
LB		 1696
1697 ieee80211_tx_status_irqsafe(hw, skb);
1698
efb7c49a 1699 processed++;
a66098da
LB		 1700 }
1701
efb7c49a 1702 return processed;
a66098da
LB		 1703}
1704
1705/* must be called only when the card's transmit is completely halted */
1706static void mwl8k_txq_deinit(struct ieee80211_hw *hw, int index)
1707{
1708 struct mwl8k_priv *priv = hw->priv;
1709 struct mwl8k_tx_queue *txq = priv->txq + index;
1710
73b46320
BC		 1711 if (txq->txd == NULL)
1712 return;
1713
efb7c49a 1714 mwl8k_txq_reclaim(hw, index, INT_MAX, 1);
a66098da 1715
45eb400d
LB		 1716 kfree(txq->skb);
1717 txq->skb = NULL;
a66098da
LB		 1718
1719 pci_free_consistent(priv->pdev,
1720 MWL8K_TX_DESCS * sizeof(struct mwl8k_tx_desc),
45eb400d
LB		 1721 txq->txd, txq->txd_dma);
1722 txq->txd = NULL;
a66098da
LB		 1723}
1724
ac109fd0 1725/* caller must hold priv->stream_lock when calling the stream functions */
ba30c4a5 1726static struct mwl8k_ampdu_stream *
ac109fd0
BC		 1727mwl8k_add_stream(struct ieee80211_hw *hw, struct ieee80211_sta *sta, u8 tid)
1728{
1729 struct mwl8k_ampdu_stream *stream;
1730 struct mwl8k_priv *priv = hw->priv;
1731 int i;
1732
1733 for (i = 0; i < priv->num_ampdu_queues; i++) {
1734 stream = &priv->ampdu[i];
1735 if (stream->state == AMPDU_NO_STREAM) {
1736 stream->sta = sta;
1737 stream->state = AMPDU_STREAM_NEW;
1738 stream->tid = tid;
1739 stream->idx = i;
1740 stream->txq_idx = MWL8K_TX_WMM_QUEUES + i;
1741 wiphy_debug(hw->wiphy, "Added a new stream for %pM %d",
1742 sta->addr, tid);
1743 return stream;
1744 }
1745 }
1746 return NULL;
1747}
1748
1749static int
1750mwl8k_start_stream(struct ieee80211_hw *hw, struct mwl8k_ampdu_stream *stream)
1751{
1752 int ret;
1753
1754 /* if the stream has already been started, don't start it again */
1755 if (stream->state != AMPDU_STREAM_NEW)
1756 return 0;
1757 ret = ieee80211_start_tx_ba_session(stream->sta, stream->tid, 0);
1758 if (ret)
1759 wiphy_debug(hw->wiphy, "Failed to start stream for %pM %d: "
1760 "%d\n", stream->sta->addr, stream->tid, ret);
1761 else
1762 wiphy_debug(hw->wiphy, "Started stream for %pM %d\n",
1763 stream->sta->addr, stream->tid);
1764 return ret;
1765}
1766
1767static void
1768mwl8k_remove_stream(struct ieee80211_hw *hw, struct mwl8k_ampdu_stream *stream)
1769{
1770 wiphy_debug(hw->wiphy, "Remove stream for %pM %d\n", stream->sta->addr,
1771 stream->tid);
1772 memset(stream, 0, sizeof(*stream));
1773}
1774
1775static struct mwl8k_ampdu_stream *
1776mwl8k_lookup_stream(struct ieee80211_hw *hw, u8 *addr, u8 tid)
1777{
1778 struct mwl8k_priv *priv = hw->priv;
1779 int i;
1780
1781 for (i = 0 ; i < priv->num_ampdu_queues; i++) {
1782 struct mwl8k_ampdu_stream *stream;
1783 stream = &priv->ampdu[i];
1784 if (stream->state == AMPDU_NO_STREAM)
1785 continue;
1786 if (!memcmp(stream->sta->addr, addr, ETH_ALEN) &&
1787 stream->tid == tid)
1788 return stream;
1789 }
1790 return NULL;
1791}
1792
d0805c1c
BC		 1793#define MWL8K_AMPDU_PACKET_THRESHOLD 64
1794static inline bool mwl8k_ampdu_allowed(struct ieee80211_sta *sta, u8 tid)
1795{
1796 struct mwl8k_sta *sta_info = MWL8K_STA(sta);
1797 struct tx_traffic_info *tx_stats;
1798
1799 BUG_ON(tid >= MWL8K_MAX_TID);
1800 tx_stats = &sta_info->tx_stats[tid];
1801
1802 return sta_info->is_ampdu_allowed &&
1803 tx_stats->pkts > MWL8K_AMPDU_PACKET_THRESHOLD;
1804}
1805
1806static inline void mwl8k_tx_count_packet(struct ieee80211_sta *sta, u8 tid)
1807{
1808 struct mwl8k_sta *sta_info = MWL8K_STA(sta);
1809 struct tx_traffic_info *tx_stats;
1810
1811 BUG_ON(tid >= MWL8K_MAX_TID);
1812 tx_stats = &sta_info->tx_stats[tid];
1813
1814 if (tx_stats->start_time == 0)
1815 tx_stats->start_time = jiffies;
1816
1817 /* reset the packet count after each second elapses. If the number of
1818 * packets ever exceeds the ampdu_min_traffic threshold, we will allow
1819 * an ampdu stream to be started.
1820 */
1821 if (jiffies - tx_stats->start_time > HZ) {
1822 tx_stats->pkts = 0;
1823 tx_stats->start_time = 0;
1824 } else
1825 tx_stats->pkts++;
1826}
1827
7bb45683 1828static void
a66098da
LB		 1829mwl8k_txq_xmit(struct ieee80211_hw *hw, int index, struct sk_buff *skb)
1830{
1831 struct mwl8k_priv *priv = hw->priv;
1832 struct ieee80211_tx_info *tx_info;
23b33906 1833 struct mwl8k_vif *mwl8k_vif;
65f3ddcd 1834 struct ieee80211_sta *sta;
a66098da
LB		 1835 struct ieee80211_hdr *wh;
1836 struct mwl8k_tx_queue *txq;
1837 struct mwl8k_tx_desc *tx;
a66098da 1838 dma_addr_t dma;
23b33906
LB		 1839 u32 txstatus;
1840 u8 txdatarate;
1841 u16 qos;
65f3ddcd
NS		 1842 int txpriority;
1843 u8 tid = 0;
1844 struct mwl8k_ampdu_stream *stream = NULL;
1845 bool start_ba_session = false;
3a769888 1846 bool mgmtframe = false;
a0e7c6cf 1847 struct ieee80211_mgmt *mgmt = (struct ieee80211_mgmt *)skb->data;
a66098da 1848
23b33906
LB		 1849 wh = (struct ieee80211_hdr *)skb->data;
1850 if (ieee80211_is_data_qos(wh->frame_control))
1851 qos = le16_to_cpu(*((__le16 *)ieee80211_get_qos_ctl(wh)));
1852 else
1853 qos = 0;
a66098da 1854
3a769888
NS		 1855 if (ieee80211_is_mgmt(wh->frame_control))
1856 mgmtframe = true;
1857
d9a07d49 1858 if (priv->ap_fw)
ff776cec 1859 mwl8k_encapsulate_tx_frame(priv, skb);
d9a07d49 1860 else
e4eefec7 1861 mwl8k_add_dma_header(priv, skb, 0, 0);
d9a07d49 1862
23b33906 1863 wh = &((struct mwl8k_dma_data *)skb->data)->wh;
a66098da
LB		 1864
1865 tx_info = IEEE80211_SKB_CB(skb);
65f3ddcd 1866 sta = tx_info->control.sta;
a66098da 1867 mwl8k_vif = MWL8K_VIF(tx_info->control.vif);
a66098da
LB		 1868
1869 if (tx_info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) {
a66098da 1870 wh->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
657232b6
LB		 1871 wh->seq_ctrl |= cpu_to_le16(mwl8k_vif->seqno);
1872 mwl8k_vif->seqno += 0x10;
a66098da
LB		 1873 }
1874
23b33906
LB		 1875 /* Setup firmware control bit fields for each frame type. */
1876 txstatus = 0;
1877 txdatarate = 0;
1878 if (ieee80211_is_mgmt(wh->frame_control) ||
1879 ieee80211_is_ctl(wh->frame_control)) {
1880 txdatarate = 0;
e0493a8d 1881 qos |= MWL8K_QOS_QLEN_UNSPEC | MWL8K_QOS_EOSP;
23b33906
LB		 1882 } else if (ieee80211_is_data(wh->frame_control)) {
1883 txdatarate = 1;
1884 if (is_multicast_ether_addr(wh->addr1))
1885 txstatus |= MWL8K_TXD_STATUS_MULTICAST_TX;
1886
e0493a8d 1887 qos &= ~MWL8K_QOS_ACK_POLICY_MASK;
23b33906 1888 if (tx_info->flags & IEEE80211_TX_CTL_AMPDU)
e0493a8d 1889 qos |= MWL8K_QOS_ACK_POLICY_BLOCKACK;
23b33906 1890 else
e0493a8d 1891 qos |= MWL8K_QOS_ACK_POLICY_NORMAL;
23b33906 1892 }
a66098da 1893
a0e7c6cf
NS		 1894 /* Queue ADDBA request in the respective data queue. While setting up
1895 * the ampdu stream, mac80211 queues further packets for that
1896 * particular ra/tid pair. However, packets piled up in the hardware
1897 * for that ra/tid pair will still go out. ADDBA request and the
1898 * related data packets going out from different queues asynchronously
1899 * will cause a shift in the receiver window which might result in
1900 * ampdu packets getting dropped at the receiver after the stream has
1901 * been setup.
1902 */
1903 if (unlikely(ieee80211_is_action(wh->frame_control) &&
1904 mgmt->u.action.category == WLAN_CATEGORY_BACK &&
1905 mgmt->u.action.u.addba_req.action_code == WLAN_ACTION_ADDBA_REQ &&
1906 priv->ap_fw)) {
1907 u16 capab = le16_to_cpu(mgmt->u.action.u.addba_req.capab);
1908 tid = (capab & IEEE80211_ADDBA_PARAM_TID_MASK) >> 2;
1909 index = mwl8k_tid_queue_mapping(tid);
1910 }
1911
65f3ddcd
NS		 1912 txpriority = index;
1913
16c929df
YAP		 1914 if (priv->ap_fw && sta && sta->ht_cap.ht_supported
1915 && skb->protocol != cpu_to_be16(ETH_P_PAE)
1916 && ieee80211_is_data_qos(wh->frame_control)) {
65f3ddcd 1917 tid = qos & 0xf;
d0805c1c 1918 mwl8k_tx_count_packet(sta, tid);
65f3ddcd
NS		 1919 spin_lock(&priv->stream_lock);
1920 stream = mwl8k_lookup_stream(hw, sta->addr, tid);
1921 if (stream != NULL) {
1922 if (stream->state == AMPDU_STREAM_ACTIVE) {
1923 txpriority = stream->txq_idx;
1924 index = stream->txq_idx;
1925 } else if (stream->state == AMPDU_STREAM_NEW) {
1926 /* We get here if the driver sends us packets
1927 * after we've initiated a stream, but before
1928 * our ampdu_action routine has been called
1929 * with IEEE80211_AMPDU_TX_START to get the SSN
1930 * for the ADDBA request. So this packet can
1931 * go out with no risk of sequence number
1932 * mismatch. No special handling is required.
1933 */
1934 } else {
1935 /* Drop packets that would go out after the
1936 * ADDBA request was sent but before the ADDBA
1937 * response is received. If we don't do this,
1938 * the recipient would probably receive it
1939 * after the ADDBA request with SSN 0. This
1940 * will cause the recipient's BA receive window
1941 * to shift, which would cause the subsequent
1942 * packets in the BA stream to be discarded.
1943 * mac80211 queues our packets for us in this
1944 * case, so this is really just a safety check.
1945 */
1946 wiphy_warn(hw->wiphy,
1947 "Cannot send packet while ADDBA "
1948 "dialog is underway.\n");
1949 spin_unlock(&priv->stream_lock);
1950 dev_kfree_skb(skb);
1951 return;
1952 }
1953 } else {
1954 /* Defer calling mwl8k_start_stream so that the current
1955 * skb can go out before the ADDBA request. This
1956 * prevents sequence number mismatch at the recepient
1957 * as described above.
1958 */
d0805c1c 1959 if (mwl8k_ampdu_allowed(sta, tid)) {
17033543
NS		 1960 stream = mwl8k_add_stream(hw, sta, tid);
1961 if (stream != NULL)
1962 start_ba_session = true;
1963 }
65f3ddcd
NS		 1964 }
1965 spin_unlock(&priv->stream_lock);
1966 }
1967
a66098da
LB		 1968 dma = pci_map_single(priv->pdev, skb->data,
1969 skb->len, PCI_DMA_TODEVICE);
1970
1971 if (pci_dma_mapping_error(priv->pdev, dma)) {
c96c31e4
JP		 1972 wiphy_debug(hw->wiphy,
1973 "failed to dma map skb, dropping TX frame.\n");
65f3ddcd
NS		 1974 if (start_ba_session) {
1975 spin_lock(&priv->stream_lock);
1976 mwl8k_remove_stream(hw, stream);
1977 spin_unlock(&priv->stream_lock);
1978 }
23b33906 1979 dev_kfree_skb(skb);
7bb45683 1980 return;
a66098da
LB		 1981 }
1982
23b33906 1983 spin_lock_bh(&priv->tx_lock);
a66098da 1984
23b33906 1985 txq = priv->txq + index;
a66098da 1986
3a769888
NS		 1987 /* Mgmt frames that go out frequently are probe
1988 * responses. Other mgmt frames got out relatively
1989 * infrequently. Hence reserve 2 buffers so that
1990 * other mgmt frames do not get dropped due to an
1991 * already queued probe response in one of the
1992 * reserved buffers.
1993 */
1994
1995 if (txq->len >= MWL8K_TX_DESCS - 2) {
1996 if (mgmtframe == false ||
1997 txq->len == MWL8K_TX_DESCS) {
1998 if (start_ba_session) {
1999 spin_lock(&priv->stream_lock);
2000 mwl8k_remove_stream(hw, stream);
2001 spin_unlock(&priv->stream_lock);
2002 }
2003 spin_unlock_bh(&priv->tx_lock);
2004 dev_kfree_skb(skb);
2005 return;
3a7dbc3b 2006 }
65f3ddcd
NS		 2007 }
2008
45eb400d
LB		 2009 BUG_ON(txq->skb[txq->tail] != NULL);
2010 txq->skb[txq->tail] = skb;
a66098da 2011
45eb400d 2012 tx = txq->txd + txq->tail;
23b33906 2013 tx->data_rate = txdatarate;
65f3ddcd 2014 tx->tx_priority = txpriority;
a66098da 2015 tx->qos_control = cpu_to_le16(qos);
a66098da
LB		 2016 tx->pkt_phys_addr = cpu_to_le32(dma);
2017 tx->pkt_len = cpu_to_le16(skb->len);
23b33906 2018 tx->rate_info = 0;
a680400e
LB		 2019 if (!priv->ap_fw && tx_info->control.sta != NULL)
2020 tx->peer_id = MWL8K_STA(tx_info->control.sta)->peer_id;
2021 else
2022 tx->peer_id = 0;
566875db
PN		 2023
2024 if (priv->ap_fw)
2025 tx->timestamp = cpu_to_le32(ioread32(priv->regs +
2026 MWL8K_HW_TIMER_REGISTER));
2027
a66098da 2028 wmb();
23b33906
LB		 2029 tx->status = cpu_to_le32(MWL8K_TXD_STATUS_FW_OWNED | txstatus);
2030
8ccbc3b8 2031 txq->len++;
a66098da 2032 priv->pending_tx_pkts++;
a66098da 2033
45eb400d
LB		 2034 txq->tail++;
2035 if (txq->tail == MWL8K_TX_DESCS)
2036 txq->tail = 0;
23b33906 2037
23b33906 2038 mwl8k_tx_start(priv);
a66098da
LB		 2039
2040 spin_unlock_bh(&priv->tx_lock);
65f3ddcd
NS		 2041
2042 /* Initiate the ampdu session here */
2043 if (start_ba_session) {
2044 spin_lock(&priv->stream_lock);
2045 if (mwl8k_start_stream(hw, stream))
2046 mwl8k_remove_stream(hw, stream);
2047 spin_unlock(&priv->stream_lock);
2048 }
a66098da
LB		 2049}
2050
2051
618952a7
LB		 2052/*
2053 * Firmware access.
2054 *
2055 * We have the following requirements for issuing firmware commands:
2056 * - Some commands require that the packet transmit path is idle when
2057 * the command is issued. (For simplicity, we'll just quiesce the
2058 * transmit path for every command.)
2059 * - There are certain sequences of commands that need to be issued to
2060 * the hardware sequentially, with no other intervening commands.
2061 *
2062 * This leads to an implementation of a "firmware lock" as a mutex that
2063 * can be taken recursively, and which is taken by both the low-level
2064 * command submission function (mwl8k_post_cmd) as well as any users of
2065 * that function that require issuing of an atomic sequence of commands,
2066 * and quiesces the transmit path whenever it's taken.
2067 */
2068static int mwl8k_fw_lock(struct ieee80211_hw *hw)
2069{
2070 struct mwl8k_priv *priv = hw->priv;
2071
2072 if (priv->fw_mutex_owner != current) {
2073 int rc;
2074
2075 mutex_lock(&priv->fw_mutex);
2076 ieee80211_stop_queues(hw);
2077
2078 rc = mwl8k_tx_wait_empty(hw);
2079 if (rc) {
6b6accc3
YAP		 2080 if (!priv->hw_restart_in_progress)
2081 ieee80211_wake_queues(hw);
2082
618952a7
LB		 2083 mutex_unlock(&priv->fw_mutex);
2084
2085 return rc;
2086 }
2087
2088 priv->fw_mutex_owner = current;
2089 }
2090
2091 priv->fw_mutex_depth++;
2092
2093 return 0;
2094}
2095
2096static void mwl8k_fw_unlock(struct ieee80211_hw *hw)
2097{
2098 struct mwl8k_priv *priv = hw->priv;
2099
2100 if (!--priv->fw_mutex_depth) {
6b6accc3
YAP		 2101 if (!priv->hw_restart_in_progress)
2102 ieee80211_wake_queues(hw);
2103
618952a7
LB		 2104 priv->fw_mutex_owner = NULL;
2105 mutex_unlock(&priv->fw_mutex);
2106 }
2107}
2108
2109
a66098da
LB		 2110/*
2111 * Command processing.
2112 */
2113
0c9cc640
LB		 2114/* Timeout firmware commands after 10s */
2115#define MWL8K_CMD_TIMEOUT_MS 10000
a66098da
LB		 2116
2117static int mwl8k_post_cmd(struct ieee80211_hw *hw, struct mwl8k_cmd_pkt *cmd)
2118{
2119 DECLARE_COMPLETION_ONSTACK(cmd_wait);
2120 struct mwl8k_priv *priv = hw->priv;
2121 void __iomem *regs = priv->regs;
2122 dma_addr_t dma_addr;
2123 unsigned int dma_size;
2124 int rc;
a66098da
LB		 2125 unsigned long timeout = 0;
2126 u8 buf[32];
2127
b603742f 2128 cmd->result = (__force __le16) 0xffff;
a66098da
LB		 2129 dma_size = le16_to_cpu(cmd->length);
2130 dma_addr = pci_map_single(priv->pdev, cmd, dma_size,
2131 PCI_DMA_BIDIRECTIONAL);
2132 if (pci_dma_mapping_error(priv->pdev, dma_addr))
2133 return -ENOMEM;
2134
618952a7 2135 rc = mwl8k_fw_lock(hw);
39a1e42e
LB		 2136 if (rc) {
2137 pci_unmap_single(priv->pdev, dma_addr, dma_size,
2138 PCI_DMA_BIDIRECTIONAL);
618952a7 2139 return rc;
39a1e42e 2140 }
a66098da 2141
a66098da
LB		 2142 priv->hostcmd_wait = &cmd_wait;
2143 iowrite32(dma_addr, regs + MWL8K_HIU_GEN_PTR);
2144 iowrite32(MWL8K_H2A_INT_DOORBELL,
2145 regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
2146 iowrite32(MWL8K_H2A_INT_DUMMY,
2147 regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
a66098da
LB		 2148
2149 timeout = wait_for_completion_timeout(&cmd_wait,
2150 msecs_to_jiffies(MWL8K_CMD_TIMEOUT_MS));
2151
618952a7
LB		 2152 priv->hostcmd_wait = NULL;
2153
2154 mwl8k_fw_unlock(hw);
2155
37055bd4
LB		 2156 pci_unmap_single(priv->pdev, dma_addr, dma_size,
2157 PCI_DMA_BIDIRECTIONAL);
2158
a66098da 2159 if (!timeout) {
5db55844 2160 wiphy_err(hw->wiphy, "Command %s timeout after %u ms\n",
c96c31e4
JP		 2161 mwl8k_cmd_name(cmd->code, buf, sizeof(buf)),
2162 MWL8K_CMD_TIMEOUT_MS);
a66098da
LB		 2163 rc = -ETIMEDOUT;
2164 } else {
0c9cc640
LB		 2165 int ms;
2166
2167 ms = MWL8K_CMD_TIMEOUT_MS - jiffies_to_msecs(timeout);
2168
ce9e2e1b 2169 rc = cmd->result ? -EINVAL : 0;
a66098da 2170 if (rc)
5db55844 2171 wiphy_err(hw->wiphy, "Command %s error 0x%x\n",
c96c31e4
JP		 2172 mwl8k_cmd_name(cmd->code, buf, sizeof(buf)),
2173 le16_to_cpu(cmd->result));
0c9cc640 2174 else if (ms > 2000)
5db55844 2175 wiphy_notice(hw->wiphy, "Command %s took %d ms\n",
c96c31e4
JP		 2176 mwl8k_cmd_name(cmd->code,
2177 buf, sizeof(buf)),
2178 ms);
a66098da
LB		 2179 }
2180
a66098da
LB		 2181 return rc;
2182}
2183
f57ca9c1
LB		 2184static int mwl8k_post_pervif_cmd(struct ieee80211_hw *hw,
2185 struct ieee80211_vif *vif,
2186 struct mwl8k_cmd_pkt *cmd)
2187{
2188 if (vif != NULL)
2189 cmd->macid = MWL8K_VIF(vif)->macid;
2190 return mwl8k_post_cmd(hw, cmd);
2191}
2192
1349ad2f
LB		 2193/*
2194 * Setup code shared between STA and AP firmware images.
2195 */
2196static void mwl8k_setup_2ghz_band(struct ieee80211_hw *hw)
2197{
2198 struct mwl8k_priv *priv = hw->priv;
2199
2200 BUILD_BUG_ON(sizeof(priv->channels_24) != sizeof(mwl8k_channels_24));
2201 memcpy(priv->channels_24, mwl8k_channels_24, sizeof(mwl8k_channels_24));
2202
2203 BUILD_BUG_ON(sizeof(priv->rates_24) != sizeof(mwl8k_rates_24));
2204 memcpy(priv->rates_24, mwl8k_rates_24, sizeof(mwl8k_rates_24));
2205
2206 priv->band_24.band = IEEE80211_BAND_2GHZ;
2207 priv->band_24.channels = priv->channels_24;
2208 priv->band_24.n_channels = ARRAY_SIZE(mwl8k_channels_24);
2209 priv->band_24.bitrates = priv->rates_24;
2210 priv->band_24.n_bitrates = ARRAY_SIZE(mwl8k_rates_24);
2211
2212 hw->wiphy->bands[IEEE80211_BAND_2GHZ] = &priv->band_24;
2213}
2214
4eae9edd
LB		 2215static void mwl8k_setup_5ghz_band(struct ieee80211_hw *hw)
2216{
2217 struct mwl8k_priv *priv = hw->priv;
2218
2219 BUILD_BUG_ON(sizeof(priv->channels_50) != sizeof(mwl8k_channels_50));
2220 memcpy(priv->channels_50, mwl8k_channels_50, sizeof(mwl8k_channels_50));
2221
2222 BUILD_BUG_ON(sizeof(priv->rates_50) != sizeof(mwl8k_rates_50));
2223 memcpy(priv->rates_50, mwl8k_rates_50, sizeof(mwl8k_rates_50));
2224
2225 priv->band_50.band = IEEE80211_BAND_5GHZ;
2226 priv->band_50.channels = priv->channels_50;
2227 priv->band_50.n_channels = ARRAY_SIZE(mwl8k_channels_50);
2228 priv->band_50.bitrates = priv->rates_50;
2229 priv->band_50.n_bitrates = ARRAY_SIZE(mwl8k_rates_50);
2230
2231 hw->wiphy->bands[IEEE80211_BAND_5GHZ] = &priv->band_50;
2232}
2233
a66098da 2234/*
04b147b1 2235 * CMD_GET_HW_SPEC (STA version).
a66098da 2236 */
04b147b1 2237struct mwl8k_cmd_get_hw_spec_sta {
a66098da
LB		 2238 struct mwl8k_cmd_pkt header;
2239 __u8 hw_rev;
2240 __u8 host_interface;
2241 __le16 num_mcaddrs;
d89173f2 2242 __u8 perm_addr[ETH_ALEN];
a66098da
LB		 2243 __le16 region_code;
2244 __le32 fw_rev;
2245 __le32 ps_cookie;
2246 __le32 caps;
2247 __u8 mcs_bitmap[16];
2248 __le32 rx_queue_ptr;
2249 __le32 num_tx_queues;
e600707b 2250 __le32 tx_queue_ptrs[MWL8K_TX_WMM_QUEUES];
a66098da
LB		 2251 __le32 caps2;
2252 __le32 num_tx_desc_per_queue;
45eb400d 2253 __le32 total_rxd;
ba2d3587 2254} __packed;
a66098da 2255
341c9791
LB		 2256#define MWL8K_CAP_MAX_AMSDU 0x20000000
2257#define MWL8K_CAP_GREENFIELD 0x08000000
2258#define MWL8K_CAP_AMPDU 0x04000000
2259#define MWL8K_CAP_RX_STBC 0x01000000
2260#define MWL8K_CAP_TX_STBC 0x00800000
2261#define MWL8K_CAP_SHORTGI_40MHZ 0x00400000
2262#define MWL8K_CAP_SHORTGI_20MHZ 0x00200000
2263#define MWL8K_CAP_RX_ANTENNA_MASK 0x000e0000
2264#define MWL8K_CAP_TX_ANTENNA_MASK 0x0001c000
2265#define MWL8K_CAP_DELAY_BA 0x00003000
2266#define MWL8K_CAP_MIMO 0x00000200
2267#define MWL8K_CAP_40MHZ 0x00000100
06953235
LB		 2268#define MWL8K_CAP_BAND_MASK 0x00000007
2269#define MWL8K_CAP_5GHZ 0x00000004
2270#define MWL8K_CAP_2GHZ4 0x00000001
341c9791 2271
06953235
LB		 2272static void
2273mwl8k_set_ht_caps(struct ieee80211_hw *hw,
2274 struct ieee80211_supported_band *band, u32 cap)
341c9791 2275{
341c9791
LB		 2276 int rx_streams;
2277 int tx_streams;
2278
777ad375 2279 band->ht_cap.ht_supported = 1;
341c9791
LB		 2280
2281 if (cap & MWL8K_CAP_MAX_AMSDU)
777ad375 2282 band->ht_cap.cap |= IEEE80211_HT_CAP_MAX_AMSDU;
341c9791 2283 if (cap & MWL8K_CAP_GREENFIELD)
777ad375 2284 band->ht_cap.cap |= IEEE80211_HT_CAP_GRN_FLD;
341c9791
LB		 2285 if (cap & MWL8K_CAP_AMPDU) {
2286 hw->flags |= IEEE80211_HW_AMPDU_AGGREGATION;
777ad375
LB		 2287 band->ht_cap.ampdu_factor = IEEE80211_HT_MAX_AMPDU_64K;
2288 band->ht_cap.ampdu_density = IEEE80211_HT_MPDU_DENSITY_NONE;
341c9791
LB		 2289 }
2290 if (cap & MWL8K_CAP_RX_STBC)
777ad375 2291 band->ht_cap.cap |= IEEE80211_HT_CAP_RX_STBC;
341c9791 2292 if (cap & MWL8K_CAP_TX_STBC)
777ad375 2293 band->ht_cap.cap |= IEEE80211_HT_CAP_TX_STBC;
341c9791 2294 if (cap & MWL8K_CAP_SHORTGI_40MHZ)
777ad375 2295 band->ht_cap.cap |= IEEE80211_HT_CAP_SGI_40;
341c9791 2296 if (cap & MWL8K_CAP_SHORTGI_20MHZ)
777ad375 2297 band->ht_cap.cap |= IEEE80211_HT_CAP_SGI_20;
341c9791 2298 if (cap & MWL8K_CAP_DELAY_BA)
777ad375 2299 band->ht_cap.cap |= IEEE80211_HT_CAP_DELAY_BA;
341c9791 2300 if (cap & MWL8K_CAP_40MHZ)
777ad375 2301 band->ht_cap.cap |= IEEE80211_HT_CAP_SUP_WIDTH_20_40;
341c9791
LB		 2302
2303 rx_streams = hweight32(cap & MWL8K_CAP_RX_ANTENNA_MASK);
2304 tx_streams = hweight32(cap & MWL8K_CAP_TX_ANTENNA_MASK);
2305
777ad375 2306 band->ht_cap.mcs.rx_mask[0] = 0xff;
341c9791 2307 if (rx_streams >= 2)
777ad375 2308 band->ht_cap.mcs.rx_mask[1] = 0xff;
341c9791 2309 if (rx_streams >= 3)
777ad375
LB		 2310 band->ht_cap.mcs.rx_mask[2] = 0xff;
2311 band->ht_cap.mcs.rx_mask[4] = 0x01;
2312 band->ht_cap.mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED;
341c9791
LB		 2313
2314 if (rx_streams != tx_streams) {
777ad375
LB		 2315 band->ht_cap.mcs.tx_params |= IEEE80211_HT_MCS_TX_RX_DIFF;
2316 band->ht_cap.mcs.tx_params |= (tx_streams - 1) <<
341c9791
LB		 2317 IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT;
2318 }
2319}
2320
06953235
LB		 2321static void
2322mwl8k_set_caps(struct ieee80211_hw *hw, u32 caps)
2323{
2324 struct mwl8k_priv *priv = hw->priv;
2325
2326 if ((caps & MWL8K_CAP_2GHZ4) || !(caps & MWL8K_CAP_BAND_MASK)) {
2327 mwl8k_setup_2ghz_band(hw);
2328 if (caps & MWL8K_CAP_MIMO)
2329 mwl8k_set_ht_caps(hw, &priv->band_24, caps);
2330 }
2331
2332 if (caps & MWL8K_CAP_5GHZ) {
2333 mwl8k_setup_5ghz_band(hw);
2334 if (caps & MWL8K_CAP_MIMO)
2335 mwl8k_set_ht_caps(hw, &priv->band_50, caps);
2336 }
2337}
2338
04b147b1 2339static int mwl8k_cmd_get_hw_spec_sta(struct ieee80211_hw *hw)
a66098da
LB		 2340{
2341 struct mwl8k_priv *priv = hw->priv;
04b147b1 2342 struct mwl8k_cmd_get_hw_spec_sta *cmd;
a66098da
LB		 2343 int rc;
2344 int i;
2345
2346 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2347 if (cmd == NULL)
2348 return -ENOMEM;
2349
2350 cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_HW_SPEC);
2351 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2352
2353 memset(cmd->perm_addr, 0xff, sizeof(cmd->perm_addr));
2354 cmd->ps_cookie = cpu_to_le32(priv->cookie_dma);
45eb400d 2355 cmd->rx_queue_ptr = cpu_to_le32(priv->rxq[0].rxd_dma);
e600707b
BC		 2356 cmd->num_tx_queues = cpu_to_le32(mwl8k_tx_queues(priv));
2357 for (i = 0; i < mwl8k_tx_queues(priv); i++)
45eb400d 2358 cmd->tx_queue_ptrs[i] = cpu_to_le32(priv->txq[i].txd_dma);
4ff6432e 2359 cmd->num_tx_desc_per_queue = cpu_to_le32(MWL8K_TX_DESCS);
45eb400d 2360 cmd->total_rxd = cpu_to_le32(MWL8K_RX_DESCS);
a66098da
LB		 2361
2362 rc = mwl8k_post_cmd(hw, &cmd->header);
2363
2364 if (!rc) {
2365 SET_IEEE80211_PERM_ADDR(hw, cmd->perm_addr);
2366 priv->num_mcaddrs = le16_to_cpu(cmd->num_mcaddrs);
4ff6432e 2367 priv->fw_rev = le32_to_cpu(cmd->fw_rev);
a66098da 2368 priv->hw_rev = cmd->hw_rev;
06953235 2369 mwl8k_set_caps(hw, le32_to_cpu(cmd->caps));
ee0ddf18
LB		 2370 priv->ap_macids_supported = 0x00000000;
2371 priv->sta_macids_supported = 0x00000001;
a66098da
LB		 2372 }
2373
2374 kfree(cmd);
2375 return rc;
2376}
2377
42fba21d
LB		 2378/*
2379 * CMD_GET_HW_SPEC (AP version).
2380 */
2381struct mwl8k_cmd_get_hw_spec_ap {
2382 struct mwl8k_cmd_pkt header;
2383 __u8 hw_rev;
2384 __u8 host_interface;
2385 __le16 num_wcb;
2386 __le16 num_mcaddrs;
2387 __u8 perm_addr[ETH_ALEN];
2388 __le16 region_code;
2389 __le16 num_antenna;
2390 __le32 fw_rev;
2391 __le32 wcbbase0;
2392 __le32 rxwrptr;
2393 __le32 rxrdptr;
2394 __le32 ps_cookie;
2395 __le32 wcbbase1;
2396 __le32 wcbbase2;
2397 __le32 wcbbase3;
952a0e96 2398 __le32 fw_api_version;
8a7a578c
BC		 2399 __le32 caps;
2400 __le32 num_of_ampdu_queues;
2401 __le32 wcbbase_ampdu[MWL8K_MAX_AMPDU_QUEUES];
ba2d3587 2402} __packed;
42fba21d
LB		 2403
2404static int mwl8k_cmd_get_hw_spec_ap(struct ieee80211_hw *hw)
2405{
2406 struct mwl8k_priv *priv = hw->priv;
2407 struct mwl8k_cmd_get_hw_spec_ap *cmd;
8a7a578c 2408 int rc, i;
952a0e96 2409 u32 api_version;
42fba21d
LB		 2410
2411 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2412 if (cmd == NULL)
2413 return -ENOMEM;
2414
2415 cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_HW_SPEC);
2416 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2417
2418 memset(cmd->perm_addr, 0xff, sizeof(cmd->perm_addr));
2419 cmd->ps_cookie = cpu_to_le32(priv->cookie_dma);
2420
2421 rc = mwl8k_post_cmd(hw, &cmd->header);
2422
2423 if (!rc) {
2424 int off;
2425
952a0e96
BC		 2426 api_version = le32_to_cpu(cmd->fw_api_version);
2427 if (priv->device_info->fw_api_ap != api_version) {
2428 printk(KERN_ERR "%s: Unsupported fw API version for %s."
2429 " Expected %d got %d.\n", MWL8K_NAME,
2430 priv->device_info->part_name,
2431 priv->device_info->fw_api_ap,
2432 api_version);
2433 rc = -EINVAL;
2434 goto done;
2435 }
42fba21d
LB		 2436 SET_IEEE80211_PERM_ADDR(hw, cmd->perm_addr);
2437 priv->num_mcaddrs = le16_to_cpu(cmd->num_mcaddrs);
2438 priv->fw_rev = le32_to_cpu(cmd->fw_rev);
2439 priv->hw_rev = cmd->hw_rev;
8a7a578c 2440 mwl8k_set_caps(hw, le32_to_cpu(cmd->caps));
ee0ddf18
LB		 2441 priv->ap_macids_supported = 0x000000ff;
2442 priv->sta_macids_supported = 0x00000000;
8a7a578c
BC		 2443 priv->num_ampdu_queues = le32_to_cpu(cmd->num_of_ampdu_queues);
2444 if (priv->num_ampdu_queues > MWL8K_MAX_AMPDU_QUEUES) {
2445 wiphy_warn(hw->wiphy, "fw reported %d ampdu queues"
2446 " but we only support %d.\n",
2447 priv->num_ampdu_queues,
2448 MWL8K_MAX_AMPDU_QUEUES);
2449 priv->num_ampdu_queues = MWL8K_MAX_AMPDU_QUEUES;
2450 }
42fba21d 2451 off = le32_to_cpu(cmd->rxwrptr) & 0xffff;
b603742f 2452 iowrite32(priv->rxq[0].rxd_dma, priv->sram + off);
42fba21d
LB		 2453
2454 off = le32_to_cpu(cmd->rxrdptr) & 0xffff;
b603742f 2455 iowrite32(priv->rxq[0].rxd_dma, priv->sram + off);
42fba21d 2456
73b46320
BC		 2457 priv->txq_offset[0] = le32_to_cpu(cmd->wcbbase0) & 0xffff;
2458 priv->txq_offset[1] = le32_to_cpu(cmd->wcbbase1) & 0xffff;
2459 priv->txq_offset[2] = le32_to_cpu(cmd->wcbbase2) & 0xffff;
2460 priv->txq_offset[3] = le32_to_cpu(cmd->wcbbase3) & 0xffff;
8a7a578c
BC		 2461
2462 for (i = 0; i < priv->num_ampdu_queues; i++)
e600707b 2463 priv->txq_offset[i + MWL8K_TX_WMM_QUEUES] =
8a7a578c 2464 le32_to_cpu(cmd->wcbbase_ampdu[i]) & 0xffff;
42fba21d
LB		 2465 }
2466
952a0e96 2467done:
42fba21d
LB		 2468 kfree(cmd);
2469 return rc;
2470}
2471
2472/*
2473 * CMD_SET_HW_SPEC.
2474 */
2475struct mwl8k_cmd_set_hw_spec {
2476 struct mwl8k_cmd_pkt header;
2477 __u8 hw_rev;
2478 __u8 host_interface;
2479 __le16 num_mcaddrs;
2480 __u8 perm_addr[ETH_ALEN];
2481 __le16 region_code;
2482 __le32 fw_rev;
2483 __le32 ps_cookie;
2484 __le32 caps;
2485 __le32 rx_queue_ptr;
2486 __le32 num_tx_queues;
e600707b 2487 __le32 tx_queue_ptrs[MWL8K_MAX_TX_QUEUES];
42fba21d
LB		 2488 __le32 flags;
2489 __le32 num_tx_desc_per_queue;
2490 __le32 total_rxd;
ba2d3587 2491} __packed;
42fba21d 2492
8a7a578c
BC		 2493/* If enabled, MWL8K_SET_HW_SPEC_FLAG_ENABLE_LIFE_TIME_EXPIRY will cause
2494 * packets to expire 500 ms after the timestamp in the tx descriptor. That is,
2495 * the packets that are queued for more than 500ms, will be dropped in the
2496 * hardware. This helps minimizing the issues caused due to head-of-line
2497 * blocking where a slow client can hog the bandwidth and affect traffic to a
2498 * faster client.
2499 */
2500#define MWL8K_SET_HW_SPEC_FLAG_ENABLE_LIFE_TIME_EXPIRY 0x00000400
3373b28e 2501#define MWL8K_SET_HW_SPEC_FLAG_GENERATE_CCMP_HDR 0x00000200
b64fe619
LB		 2502#define MWL8K_SET_HW_SPEC_FLAG_HOST_DECR_MGMT 0x00000080
2503#define MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_PROBERESP 0x00000020
2504#define MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_BEACON 0x00000010
42fba21d
LB		 2505
2506static int mwl8k_cmd_set_hw_spec(struct ieee80211_hw *hw)
2507{
2508 struct mwl8k_priv *priv = hw->priv;
2509 struct mwl8k_cmd_set_hw_spec *cmd;
2510 int rc;
2511 int i;
2512
2513 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2514 if (cmd == NULL)
2515 return -ENOMEM;
2516
2517 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_HW_SPEC);
2518 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2519
2520 cmd->ps_cookie = cpu_to_le32(priv->cookie_dma);
2521 cmd->rx_queue_ptr = cpu_to_le32(priv->rxq[0].rxd_dma);
e600707b 2522 cmd->num_tx_queues = cpu_to_le32(mwl8k_tx_queues(priv));
85c9205c
NS		 2523
2524 /*
2525 * Mac80211 stack has Q0 as highest priority and Q3 as lowest in
2526 * that order. Firmware has Q3 as highest priority and Q0 as lowest
2527 * in that order. Map Q3 of mac80211 to Q0 of firmware so that the
2528 * priority is interpreted the right way in firmware.
2529 */
e600707b
BC		 2530 for (i = 0; i < mwl8k_tx_queues(priv); i++) {
2531 int j = mwl8k_tx_queues(priv) - 1 - i;
85c9205c
NS		 2532 cmd->tx_queue_ptrs[i] = cpu_to_le32(priv->txq[j].txd_dma);
2533 }
2534
b64fe619
LB		 2535 cmd->flags = cpu_to_le32(MWL8K_SET_HW_SPEC_FLAG_HOST_DECR_MGMT |
2536 MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_PROBERESP |
31d291a7 2537 MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_BEACON |
3373b28e
NS		 2538 MWL8K_SET_HW_SPEC_FLAG_ENABLE_LIFE_TIME_EXPIRY |
2539 MWL8K_SET_HW_SPEC_FLAG_GENERATE_CCMP_HDR);
42fba21d
LB		 2540 cmd->num_tx_desc_per_queue = cpu_to_le32(MWL8K_TX_DESCS);
2541 cmd->total_rxd = cpu_to_le32(MWL8K_RX_DESCS);
2542
2543 rc = mwl8k_post_cmd(hw, &cmd->header);
2544 kfree(cmd);
2545
2546 return rc;
2547}
2548
a66098da
LB		 2549/*
2550 * CMD_MAC_MULTICAST_ADR.
2551 */
2552struct mwl8k_cmd_mac_multicast_adr {
2553 struct mwl8k_cmd_pkt header;
2554 __le16 action;
2555 __le16 numaddr;
ce9e2e1b 2556 __u8 addr[0][ETH_ALEN];
a66098da
LB		 2557};
2558
d5e30845
LB		 2559#define MWL8K_ENABLE_RX_DIRECTED 0x0001
2560#define MWL8K_ENABLE_RX_MULTICAST 0x0002
2561#define MWL8K_ENABLE_RX_ALL_MULTICAST 0x0004
2562#define MWL8K_ENABLE_RX_BROADCAST 0x0008
ce9e2e1b 2563
e81cd2d6 2564static struct mwl8k_cmd_pkt *
447ced07 2565__mwl8k_cmd_mac_multicast_adr(struct ieee80211_hw *hw, int allmulti,
22bedad3 2566 struct netdev_hw_addr_list *mc_list)
a66098da 2567{
e81cd2d6 2568 struct mwl8k_priv *priv = hw->priv;
a66098da 2569 struct mwl8k_cmd_mac_multicast_adr *cmd;
e81cd2d6 2570 int size;
22bedad3
JP		 2571 int mc_count = 0;
2572
2573 if (mc_list)
2574 mc_count = netdev_hw_addr_list_count(mc_list);
e81cd2d6 2575
447ced07 2576 if (allmulti || mc_count > priv->num_mcaddrs) {
d5e30845
LB		 2577 allmulti = 1;
2578 mc_count = 0;
2579 }
e81cd2d6
LB		 2580
2581 size = sizeof(*cmd) + mc_count * ETH_ALEN;
ce9e2e1b 2582
e81cd2d6 2583 cmd = kzalloc(size, GFP_ATOMIC);
a66098da 2584 if (cmd == NULL)
e81cd2d6 2585 return NULL;
a66098da
LB		 2586
2587 cmd->header.code = cpu_to_le16(MWL8K_CMD_MAC_MULTICAST_ADR);
2588 cmd->header.length = cpu_to_le16(size);
d5e30845
LB		 2589 cmd->action = cpu_to_le16(MWL8K_ENABLE_RX_DIRECTED |
2590 MWL8K_ENABLE_RX_BROADCAST);
2591
2592 if (allmulti) {
2593 cmd->action |= cpu_to_le16(MWL8K_ENABLE_RX_ALL_MULTICAST);
2594 } else if (mc_count) {
22bedad3
JP		 2595 struct netdev_hw_addr *ha;
2596 int i = 0;
d5e30845
LB		 2597
2598 cmd->action |= cpu_to_le16(MWL8K_ENABLE_RX_MULTICAST);
2599 cmd->numaddr = cpu_to_le16(mc_count);
22bedad3
JP		 2600 netdev_hw_addr_list_for_each(ha, mc_list) {
2601 memcpy(cmd->addr[i], ha->addr, ETH_ALEN);
a66098da 2602 }
a66098da
LB		 2603 }
2604
e81cd2d6 2605 return &cmd->header;
a66098da
LB		 2606}
2607
2608/*
55489b6e 2609 * CMD_GET_STAT.
a66098da 2610 */
55489b6e 2611struct mwl8k_cmd_get_stat {
a66098da 2612 struct mwl8k_cmd_pkt header;
a66098da 2613 __le32 stats[64];
ba2d3587 2614} __packed;
a66098da
LB		 2615
2616#define MWL8K_STAT_ACK_FAILURE 9
2617#define MWL8K_STAT_RTS_FAILURE 12
2618#define MWL8K_STAT_FCS_ERROR 24
2619#define MWL8K_STAT_RTS_SUCCESS 11
2620
55489b6e
LB		 2621static int mwl8k_cmd_get_stat(struct ieee80211_hw *hw,
2622 struct ieee80211_low_level_stats *stats)
a66098da 2623{
55489b6e 2624 struct mwl8k_cmd_get_stat *cmd;
a66098da
LB		 2625 int rc;
2626
2627 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2628 if (cmd == NULL)
2629 return -ENOMEM;
2630
2631 cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_STAT);
2632 cmd->header.length = cpu_to_le16(sizeof(*cmd));
a66098da
LB		 2633
2634 rc = mwl8k_post_cmd(hw, &cmd->header);
2635 if (!rc) {
2636 stats->dot11ACKFailureCount =
2637 le32_to_cpu(cmd->stats[MWL8K_STAT_ACK_FAILURE]);
2638 stats->dot11RTSFailureCount =
2639 le32_to_cpu(cmd->stats[MWL8K_STAT_RTS_FAILURE]);
2640 stats->dot11FCSErrorCount =
2641 le32_to_cpu(cmd->stats[MWL8K_STAT_FCS_ERROR]);
2642 stats->dot11RTSSuccessCount =
2643 le32_to_cpu(cmd->stats[MWL8K_STAT_RTS_SUCCESS]);
2644 }
2645 kfree(cmd);
2646
2647 return rc;
2648}
2649
2650/*
55489b6e 2651 * CMD_RADIO_CONTROL.
a66098da 2652 */
55489b6e 2653struct mwl8k_cmd_radio_control {
a66098da
LB		 2654 struct mwl8k_cmd_pkt header;
2655 __le16 action;
2656 __le16 control;
2657 __le16 radio_on;
ba2d3587 2658} __packed;
a66098da 2659
c46563b7 2660static int
55489b6e 2661mwl8k_cmd_radio_control(struct ieee80211_hw *hw, bool enable, bool force)
a66098da
LB		 2662{
2663 struct mwl8k_priv *priv = hw->priv;
55489b6e 2664 struct mwl8k_cmd_radio_control *cmd;
a66098da
LB		 2665 int rc;
2666
c46563b7 2667 if (enable == priv->radio_on && !force)
a66098da
LB		 2668 return 0;
2669
a66098da
LB		 2670 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2671 if (cmd == NULL)
2672 return -ENOMEM;
2673
2674 cmd->header.code = cpu_to_le16(MWL8K_CMD_RADIO_CONTROL);
2675 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2676 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
68ce3884 2677 cmd->control = cpu_to_le16(priv->radio_short_preamble ? 3 : 1);
a66098da
LB		 2678 cmd->radio_on = cpu_to_le16(enable ? 0x0001 : 0x0000);
2679
2680 rc = mwl8k_post_cmd(hw, &cmd->header);
2681 kfree(cmd);
2682
2683 if (!rc)
c46563b7 2684 priv->radio_on = enable;
a66098da
LB		 2685
2686 return rc;
2687}
2688
55489b6e 2689static int mwl8k_cmd_radio_disable(struct ieee80211_hw *hw)
c46563b7 2690{
55489b6e 2691 return mwl8k_cmd_radio_control(hw, 0, 0);
c46563b7
LB		 2692}
2693
55489b6e 2694static int mwl8k_cmd_radio_enable(struct ieee80211_hw *hw)
c46563b7 2695{
55489b6e 2696 return mwl8k_cmd_radio_control(hw, 1, 0);
c46563b7
LB		 2697}
2698
a66098da
LB		 2699static int
2700mwl8k_set_radio_preamble(struct ieee80211_hw *hw, bool short_preamble)
2701{
99200a99 2702 struct mwl8k_priv *priv = hw->priv;
a66098da 2703
68ce3884 2704 priv->radio_short_preamble = short_preamble;
a66098da 2705
55489b6e 2706 return mwl8k_cmd_radio_control(hw, 1, 1);
a66098da
LB		 2707}
2708
2709/*
55489b6e 2710 * CMD_RF_TX_POWER.
a66098da 2711 */
41fdf097 2712#define MWL8K_RF_TX_POWER_LEVEL_TOTAL 8
a66098da 2713
55489b6e 2714struct mwl8k_cmd_rf_tx_power {
a66098da
LB		 2715 struct mwl8k_cmd_pkt header;
2716 __le16 action;
2717 __le16 support_level;
2718 __le16 current_level;
2719 __le16 reserved;
41fdf097 2720 __le16 power_level_list[MWL8K_RF_TX_POWER_LEVEL_TOTAL];
ba2d3587 2721} __packed;
a66098da 2722
55489b6e 2723static int mwl8k_cmd_rf_tx_power(struct ieee80211_hw *hw, int dBm)
a66098da 2724{
55489b6e 2725 struct mwl8k_cmd_rf_tx_power *cmd;
a66098da
LB		 2726 int rc;
2727
2728 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2729 if (cmd == NULL)
2730 return -ENOMEM;
2731
2732 cmd->header.code = cpu_to_le16(MWL8K_CMD_RF_TX_POWER);
2733 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2734 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
2735 cmd->support_level = cpu_to_le16(dBm);
2736
2737 rc = mwl8k_post_cmd(hw, &cmd->header);
2738 kfree(cmd);
2739
2740 return rc;
2741}
2742
41fdf097
NS		 2743/*
2744 * CMD_TX_POWER.
2745 */
2746#define MWL8K_TX_POWER_LEVEL_TOTAL 12
2747
2748struct mwl8k_cmd_tx_power {
2749 struct mwl8k_cmd_pkt header;
2750 __le16 action;
2751 __le16 band;
2752 __le16 channel;
2753 __le16 bw;
2754 __le16 sub_ch;
2755 __le16 power_level_list[MWL8K_TX_POWER_LEVEL_TOTAL];
ba30c4a5 2756} __packed;
41fdf097
NS		 2757
2758static int mwl8k_cmd_tx_power(struct ieee80211_hw *hw,
2759 struct ieee80211_conf *conf,
2760 unsigned short pwr)
2761{
2762 struct ieee80211_channel *channel = conf->channel;
2763 struct mwl8k_cmd_tx_power *cmd;
2764 int rc;
2765 int i;
2766
2767 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2768 if (cmd == NULL)
2769 return -ENOMEM;
2770
2771 cmd->header.code = cpu_to_le16(MWL8K_CMD_TX_POWER);
2772 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2773 cmd->action = cpu_to_le16(MWL8K_CMD_SET_LIST);
2774
2775 if (channel->band == IEEE80211_BAND_2GHZ)
2776 cmd->band = cpu_to_le16(0x1);
2777 else if (channel->band == IEEE80211_BAND_5GHZ)
2778 cmd->band = cpu_to_le16(0x4);
2779
604c4ef1 2780 cmd->channel = cpu_to_le16(channel->hw_value);
41fdf097
NS		 2781
2782 if (conf->channel_type == NL80211_CHAN_NO_HT ||
2783 conf->channel_type == NL80211_CHAN_HT20) {
2784 cmd->bw = cpu_to_le16(0x2);
2785 } else {
2786 cmd->bw = cpu_to_le16(0x4);
2787 if (conf->channel_type == NL80211_CHAN_HT40MINUS)
2788 cmd->sub_ch = cpu_to_le16(0x3);
2789 else if (conf->channel_type == NL80211_CHAN_HT40PLUS)
2790 cmd->sub_ch = cpu_to_le16(0x1);
2791 }
2792
2793 for (i = 0; i < MWL8K_TX_POWER_LEVEL_TOTAL; i++)
2794 cmd->power_level_list[i] = cpu_to_le16(pwr);
2795
2796 rc = mwl8k_post_cmd(hw, &cmd->header);
2797 kfree(cmd);
2798
2799 return rc;
2800}
2801
08b06347
LB		 2802/*
2803 * CMD_RF_ANTENNA.
2804 */
2805struct mwl8k_cmd_rf_antenna {
2806 struct mwl8k_cmd_pkt header;
2807 __le16 antenna;
2808 __le16 mode;
ba2d3587 2809} __packed;
08b06347
LB		 2810
2811#define MWL8K_RF_ANTENNA_RX 1
2812#define MWL8K_RF_ANTENNA_TX 2
2813
2814static int
2815mwl8k_cmd_rf_antenna(struct ieee80211_hw *hw, int antenna, int mask)
2816{
2817 struct mwl8k_cmd_rf_antenna *cmd;
2818 int rc;
2819
2820 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2821 if (cmd == NULL)
2822 return -ENOMEM;
2823
2824 cmd->header.code = cpu_to_le16(MWL8K_CMD_RF_ANTENNA);
2825 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2826 cmd->antenna = cpu_to_le16(antenna);
2827 cmd->mode = cpu_to_le16(mask);
2828
2829 rc = mwl8k_post_cmd(hw, &cmd->header);
2830 kfree(cmd);
2831
2832 return rc;
2833}
2834
b64fe619
LB		 2835/*
2836 * CMD_SET_BEACON.
2837 */
2838struct mwl8k_cmd_set_beacon {
2839 struct mwl8k_cmd_pkt header;
2840 __le16 beacon_len;
2841 __u8 beacon[0];
2842};
2843
aa21d0f6
LB		 2844static int mwl8k_cmd_set_beacon(struct ieee80211_hw *hw,
2845 struct ieee80211_vif *vif, u8 *beacon, int len)
b64fe619
LB		 2846{
2847 struct mwl8k_cmd_set_beacon *cmd;
2848 int rc;
2849
2850 cmd = kzalloc(sizeof(*cmd) + len, GFP_KERNEL);
2851 if (cmd == NULL)
2852 return -ENOMEM;
2853
2854 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_BEACON);
2855 cmd->header.length = cpu_to_le16(sizeof(*cmd) + len);
2856 cmd->beacon_len = cpu_to_le16(len);
2857 memcpy(cmd->beacon, beacon, len);
2858
aa21d0f6 2859 rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
b64fe619
LB		 2860 kfree(cmd);
2861
2862 return rc;
2863}
2864
a66098da
LB		 2865/*
2866 * CMD_SET_PRE_SCAN.
2867 */
2868struct mwl8k_cmd_set_pre_scan {
2869 struct mwl8k_cmd_pkt header;
ba2d3587 2870} __packed;
a66098da
LB		 2871
2872static int mwl8k_cmd_set_pre_scan(struct ieee80211_hw *hw)
2873{
2874 struct mwl8k_cmd_set_pre_scan *cmd;
2875 int rc;
2876
2877 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2878 if (cmd == NULL)
2879 return -ENOMEM;
2880
2881 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_PRE_SCAN);
2882 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2883
2884 rc = mwl8k_post_cmd(hw, &cmd->header);
2885 kfree(cmd);
2886
2887 return rc;
2888}
2889
2890/*
2891 * CMD_SET_POST_SCAN.
2892 */
2893struct mwl8k_cmd_set_post_scan {
2894 struct mwl8k_cmd_pkt header;
2895 __le32 isibss;
d89173f2 2896 __u8 bssid[ETH_ALEN];
ba2d3587 2897} __packed;
a66098da
LB		 2898
2899static int
0a11dfc3 2900mwl8k_cmd_set_post_scan(struct ieee80211_hw *hw, const __u8 *mac)
a66098da
LB		 2901{
2902 struct mwl8k_cmd_set_post_scan *cmd;
2903 int rc;
2904
2905 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2906 if (cmd == NULL)
2907 return -ENOMEM;
2908
2909 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_POST_SCAN);
2910 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2911 cmd->isibss = 0;
d89173f2 2912 memcpy(cmd->bssid, mac, ETH_ALEN);
a66098da
LB		 2913
2914 rc = mwl8k_post_cmd(hw, &cmd->header);
2915 kfree(cmd);
2916
2917 return rc;
2918}
2919
2920/*
2921 * CMD_SET_RF_CHANNEL.
2922 */
2923struct mwl8k_cmd_set_rf_channel {
2924 struct mwl8k_cmd_pkt header;
2925 __le16 action;
2926 __u8 current_channel;
2927 __le32 channel_flags;
ba2d3587 2928} __packed;
a66098da
LB		 2929
2930static int mwl8k_cmd_set_rf_channel(struct ieee80211_hw *hw,
610677d2 2931 struct ieee80211_conf *conf)
a66098da 2932{
610677d2 2933 struct ieee80211_channel *channel = conf->channel;
a66098da
LB		 2934 struct mwl8k_cmd_set_rf_channel *cmd;
2935 int rc;
2936
2937 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2938 if (cmd == NULL)
2939 return -ENOMEM;
2940
2941 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RF_CHANNEL);
2942 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2943 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
2944 cmd->current_channel = channel->hw_value;
610677d2 2945
a66098da 2946 if (channel->band == IEEE80211_BAND_2GHZ)
610677d2 2947 cmd->channel_flags |= cpu_to_le32(0x00000001);
42574ea2
LB		 2948 else if (channel->band == IEEE80211_BAND_5GHZ)
2949 cmd->channel_flags |= cpu_to_le32(0x00000004);
610677d2
LB		 2950
2951 if (conf->channel_type == NL80211_CHAN_NO_HT ||
2952 conf->channel_type == NL80211_CHAN_HT20)
2953 cmd->channel_flags |= cpu_to_le32(0x00000080);
2954 else if (conf->channel_type == NL80211_CHAN_HT40MINUS)
2955 cmd->channel_flags |= cpu_to_le32(0x000001900);
2956 else if (conf->channel_type == NL80211_CHAN_HT40PLUS)
2957 cmd->channel_flags |= cpu_to_le32(0x000000900);
a66098da
LB		 2958
2959 rc = mwl8k_post_cmd(hw, &cmd->header);
2960 kfree(cmd);
2961
2962 return rc;
2963}
2964
2965/*
55489b6e 2966 * CMD_SET_AID.
a66098da 2967 */
55489b6e
LB		 2968#define MWL8K_FRAME_PROT_DISABLED 0x00
2969#define MWL8K_FRAME_PROT_11G 0x07
2970#define MWL8K_FRAME_PROT_11N_HT_40MHZ_ONLY 0x02
2971#define MWL8K_FRAME_PROT_11N_HT_ALL 0x06
a66098da 2972
55489b6e
LB		 2973struct mwl8k_cmd_update_set_aid {
2974 struct mwl8k_cmd_pkt header;
2975 __le16 aid;
a66098da 2976
55489b6e
LB		 2977 /* AP's MAC address (BSSID) */
2978 __u8 bssid[ETH_ALEN];
2979 __le16 protection_mode;
2980 __u8 supp_rates[14];
ba2d3587 2981} __packed;
a66098da 2982
c6e96010
LB		 2983static void legacy_rate_mask_to_array(u8 *rates, u32 mask)
2984{
2985 int i;
2986 int j;
2987
2988 /*
2989 * Clear nonstandard rates 4 and 13.
2990 */
2991 mask &= 0x1fef;
2992
2993 for (i = 0, j = 0; i < 14; i++) {
2994 if (mask & (1 << i))
777ad375 2995 rates[j++] = mwl8k_rates_24[i].hw_value;
c6e96010
LB		 2996 }
2997}
2998
55489b6e 2999static int
c6e96010
LB		 3000mwl8k_cmd_set_aid(struct ieee80211_hw *hw,
3001 struct ieee80211_vif *vif, u32 legacy_rate_mask)
a66098da 3002{
55489b6e
LB		 3003 struct mwl8k_cmd_update_set_aid *cmd;
3004 u16 prot_mode;
a66098da
LB		 3005 int rc;
3006
3007 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3008 if (cmd == NULL)
3009 return -ENOMEM;
3010
55489b6e 3011 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_AID);
a66098da 3012 cmd->header.length = cpu_to_le16(sizeof(*cmd));
7dc6a7a7 3013 cmd->aid = cpu_to_le16(vif->bss_conf.aid);
0a11dfc3 3014 memcpy(cmd->bssid, vif->bss_conf.bssid, ETH_ALEN);
a66098da 3015
7dc6a7a7 3016 if (vif->bss_conf.use_cts_prot) {
55489b6e
LB		 3017 prot_mode = MWL8K_FRAME_PROT_11G;
3018 } else {
7dc6a7a7 3019 switch (vif->bss_conf.ht_operation_mode &
55489b6e
LB		 3020 IEEE80211_HT_OP_MODE_PROTECTION) {
3021 case IEEE80211_HT_OP_MODE_PROTECTION_20MHZ:
3022 prot_mode = MWL8K_FRAME_PROT_11N_HT_40MHZ_ONLY;
3023 break;
3024 case IEEE80211_HT_OP_MODE_PROTECTION_NONHT_MIXED:
3025 prot_mode = MWL8K_FRAME_PROT_11N_HT_ALL;
3026 break;
3027 default:
3028 prot_mode = MWL8K_FRAME_PROT_DISABLED;
3029 break;
3030 }
3031 }
3032 cmd->protection_mode = cpu_to_le16(prot_mode);
a66098da 3033
c6e96010 3034 legacy_rate_mask_to_array(cmd->supp_rates, legacy_rate_mask);
a66098da
LB		 3035
3036 rc = mwl8k_post_cmd(hw, &cmd->header);
3037 kfree(cmd);
3038
3039 return rc;
3040}
3041
32060e1b 3042/*
55489b6e 3043 * CMD_SET_RATE.
32060e1b 3044 */
55489b6e
LB		 3045struct mwl8k_cmd_set_rate {
3046 struct mwl8k_cmd_pkt header;
3047 __u8 legacy_rates[14];
3048
3049 /* Bitmap for supported MCS codes. */
3050 __u8 mcs_set[16];
3051 __u8 reserved[16];
ba2d3587 3052} __packed;
32060e1b 3053
55489b6e 3054static int
c6e96010 3055mwl8k_cmd_set_rate(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
13935e2c 3056 u32 legacy_rate_mask, u8 *mcs_rates)
32060e1b 3057{
55489b6e 3058 struct mwl8k_cmd_set_rate *cmd;
32060e1b
LB		 3059 int rc;
3060
3061 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3062 if (cmd == NULL)
3063 return -ENOMEM;
3064
55489b6e 3065 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RATE);
32060e1b 3066 cmd->header.length = cpu_to_le16(sizeof(*cmd));
c6e96010 3067 legacy_rate_mask_to_array(cmd->legacy_rates, legacy_rate_mask);
13935e2c 3068 memcpy(cmd->mcs_set, mcs_rates, 16);
32060e1b
LB		 3069
3070 rc = mwl8k_post_cmd(hw, &cmd->header);
3071 kfree(cmd);
3072
3073 return rc;
3074}
3075
a66098da 3076/*
55489b6e 3077 * CMD_FINALIZE_JOIN.
a66098da 3078 */
55489b6e
LB		 3079#define MWL8K_FJ_BEACON_MAXLEN 128
3080
3081struct mwl8k_cmd_finalize_join {
a66098da 3082 struct mwl8k_cmd_pkt header;
55489b6e
LB		 3083 __le32 sleep_interval; /* Number of beacon periods to sleep */
3084 __u8 beacon_data[MWL8K_FJ_BEACON_MAXLEN];
ba2d3587 3085} __packed;
a66098da 3086
55489b6e
LB		 3087static int mwl8k_cmd_finalize_join(struct ieee80211_hw *hw, void *frame,
3088 int framelen, int dtim)
a66098da 3089{
55489b6e
LB		 3090 struct mwl8k_cmd_finalize_join *cmd;
3091 struct ieee80211_mgmt *payload = frame;
3092 int payload_len;
a66098da
LB		 3093 int rc;
3094
3095 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3096 if (cmd == NULL)
3097 return -ENOMEM;
3098
55489b6e 3099 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_FINALIZE_JOIN);
a66098da 3100 cmd->header.length = cpu_to_le16(sizeof(*cmd));
55489b6e
LB		 3101 cmd->sleep_interval = cpu_to_le32(dtim ? dtim : 1);
3102
3103 payload_len = framelen - ieee80211_hdrlen(payload->frame_control);
3104 if (payload_len < 0)
3105 payload_len = 0;
3106 else if (payload_len > MWL8K_FJ_BEACON_MAXLEN)
3107 payload_len = MWL8K_FJ_BEACON_MAXLEN;
3108
3109 memcpy(cmd->beacon_data, &payload->u.beacon, payload_len);
a66098da
LB		 3110
3111 rc = mwl8k_post_cmd(hw, &cmd->header);
3112 kfree(cmd);
3113
3114 return rc;
3115}
3116
3117/*
55489b6e 3118 * CMD_SET_RTS_THRESHOLD.
a66098da 3119 */
55489b6e 3120struct mwl8k_cmd_set_rts_threshold {
a66098da
LB		 3121 struct mwl8k_cmd_pkt header;
3122 __le16 action;
55489b6e 3123 __le16 threshold;
ba2d3587 3124} __packed;
a66098da 3125
c2c2b12a
LB		 3126static int
3127mwl8k_cmd_set_rts_threshold(struct ieee80211_hw *hw, int rts_thresh)
a66098da 3128{
55489b6e 3129 struct mwl8k_cmd_set_rts_threshold *cmd;
a66098da
LB		 3130 int rc;
3131
3132 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3133 if (cmd == NULL)
3134 return -ENOMEM;
3135
55489b6e 3136 cmd->header.code = cpu_to_le16(MWL8K_CMD_RTS_THRESHOLD);
a66098da 3137 cmd->header.length = cpu_to_le16(sizeof(*cmd));
c2c2b12a
LB		 3138 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
3139 cmd->threshold = cpu_to_le16(rts_thresh);
a66098da
LB		 3140
3141 rc = mwl8k_post_cmd(hw, &cmd->header);
3142 kfree(cmd);
3143
a66098da
LB		 3144 return rc;
3145}
3146
3147/*
55489b6e 3148 * CMD_SET_SLOT.
a66098da 3149 */
55489b6e 3150struct mwl8k_cmd_set_slot {
a66098da
LB		 3151 struct mwl8k_cmd_pkt header;
3152 __le16 action;
55489b6e 3153 __u8 short_slot;
ba2d3587 3154} __packed;
a66098da 3155
55489b6e 3156static int mwl8k_cmd_set_slot(struct ieee80211_hw *hw, bool short_slot_time)
a66098da 3157{
55489b6e 3158 struct mwl8k_cmd_set_slot *cmd;
a66098da
LB		 3159 int rc;
3160
3161 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3162 if (cmd == NULL)
3163 return -ENOMEM;
3164
55489b6e 3165 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_SLOT);
a66098da 3166 cmd->header.length = cpu_to_le16(sizeof(*cmd));
55489b6e
LB		 3167 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
3168 cmd->short_slot = short_slot_time;
a66098da
LB		 3169
3170 rc = mwl8k_post_cmd(hw, &cmd->header);
3171 kfree(cmd);
3172
3173 return rc;
3174}
3175
3176/*
3177 * CMD_SET_EDCA_PARAMS.
3178 */
3179struct mwl8k_cmd_set_edca_params {
3180 struct mwl8k_cmd_pkt header;
3181
3182 /* See MWL8K_SET_EDCA_XXX below */
3183 __le16 action;
3184
3185 /* TX opportunity in units of 32 us */
3186 __le16 txop;
3187
2e484c89
LB		 3188 union {
3189 struct {
3190 /* Log exponent of max contention period: 0...15 */
3191 __le32 log_cw_max;
3192
3193 /* Log exponent of min contention period: 0...15 */
3194 __le32 log_cw_min;
3195
3196 /* Adaptive interframe spacing in units of 32us */
3197 __u8 aifs;
3198
3199 /* TX queue to configure */
3200 __u8 txq;
3201 } ap;
3202 struct {
3203 /* Log exponent of max contention period: 0...15 */
3204 __u8 log_cw_max;
a66098da 3205
2e484c89
LB		 3206 /* Log exponent of min contention period: 0...15 */
3207 __u8 log_cw_min;
a66098da 3208
2e484c89
LB		 3209 /* Adaptive interframe spacing in units of 32us */
3210 __u8 aifs;
a66098da 3211
2e484c89
LB		 3212 /* TX queue to configure */
3213 __u8 txq;
3214 } sta;
3215 };
ba2d3587 3216} __packed;
a66098da 3217
a66098da
LB		 3218#define MWL8K_SET_EDCA_CW 0x01
3219#define MWL8K_SET_EDCA_TXOP 0x02
3220#define MWL8K_SET_EDCA_AIFS 0x04
3221
3222#define MWL8K_SET_EDCA_ALL (MWL8K_SET_EDCA_CW | \
3223 MWL8K_SET_EDCA_TXOP | \
3224 MWL8K_SET_EDCA_AIFS)
3225
3226static int
55489b6e
LB		 3227mwl8k_cmd_set_edca_params(struct ieee80211_hw *hw, __u8 qnum,
3228 __u16 cw_min, __u16 cw_max,
3229 __u8 aifs, __u16 txop)
a66098da 3230{
2e484c89 3231 struct mwl8k_priv *priv = hw->priv;
a66098da 3232 struct mwl8k_cmd_set_edca_params *cmd;
a66098da
LB		 3233 int rc;
3234
3235 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3236 if (cmd == NULL)
3237 return -ENOMEM;
3238
a66098da
LB		 3239 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_EDCA_PARAMS);
3240 cmd->header.length = cpu_to_le16(sizeof(*cmd));
a66098da
LB		 3241 cmd->action = cpu_to_le16(MWL8K_SET_EDCA_ALL);
3242 cmd->txop = cpu_to_le16(txop);
2e484c89
LB		 3243 if (priv->ap_fw) {
3244 cmd->ap.log_cw_max = cpu_to_le32(ilog2(cw_max + 1));
3245 cmd->ap.log_cw_min = cpu_to_le32(ilog2(cw_min + 1));
3246 cmd->ap.aifs = aifs;
3247 cmd->ap.txq = qnum;
3248 } else {
3249 cmd->sta.log_cw_max = (u8)ilog2(cw_max + 1);
3250 cmd->sta.log_cw_min = (u8)ilog2(cw_min + 1);
3251 cmd->sta.aifs = aifs;
3252 cmd->sta.txq = qnum;
3253 }
a66098da
LB		 3254
3255 rc = mwl8k_post_cmd(hw, &cmd->header);
3256 kfree(cmd);
3257
3258 return rc;
3259}
3260
3261/*
55489b6e 3262 * CMD_SET_WMM_MODE.
a66098da 3263 */
55489b6e 3264struct mwl8k_cmd_set_wmm_mode {
a66098da 3265 struct mwl8k_cmd_pkt header;
55489b6e 3266 __le16 action;
ba2d3587 3267} __packed;
a66098da 3268
55489b6e 3269static int mwl8k_cmd_set_wmm_mode(struct ieee80211_hw *hw, bool enable)
a66098da 3270{
55489b6e
LB		 3271 struct mwl8k_priv *priv = hw->priv;
3272 struct mwl8k_cmd_set_wmm_mode *cmd;
a66098da
LB		 3273 int rc;
3274
a66098da
LB		 3275 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3276 if (cmd == NULL)
3277 return -ENOMEM;
3278
55489b6e 3279 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_WMM_MODE);
a66098da 3280 cmd->header.length = cpu_to_le16(sizeof(*cmd));
55489b6e 3281 cmd->action = cpu_to_le16(!!enable);
a66098da
LB		 3282
3283 rc = mwl8k_post_cmd(hw, &cmd->header);
3284 kfree(cmd);
16cec43d 3285
55489b6e
LB		 3286 if (!rc)
3287 priv->wmm_enabled = enable;
a66098da
LB		 3288
3289 return rc;
3290}
3291
3292/*
55489b6e 3293 * CMD_MIMO_CONFIG.
a66098da 3294 */
55489b6e
LB		 3295struct mwl8k_cmd_mimo_config {
3296 struct mwl8k_cmd_pkt header;
3297 __le32 action;
3298 __u8 rx_antenna_map;
3299 __u8 tx_antenna_map;
ba2d3587 3300} __packed;
a66098da 3301
55489b6e 3302static int mwl8k_cmd_mimo_config(struct ieee80211_hw *hw, __u8 rx, __u8 tx)
a66098da 3303{
55489b6e 3304 struct mwl8k_cmd_mimo_config *cmd;
a66098da
LB		 3305 int rc;
3306
3307 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3308 if (cmd == NULL)
3309 return -ENOMEM;
3310
55489b6e 3311 cmd->header.code = cpu_to_le16(MWL8K_CMD_MIMO_CONFIG);
a66098da 3312 cmd->header.length = cpu_to_le16(sizeof(*cmd));
55489b6e
LB		 3313 cmd->action = cpu_to_le32((u32)MWL8K_CMD_SET);
3314 cmd->rx_antenna_map = rx;
3315 cmd->tx_antenna_map = tx;
a66098da
LB		 3316
3317 rc = mwl8k_post_cmd(hw, &cmd->header);
3318 kfree(cmd);
3319
3320 return rc;
3321}
3322
3323/*
b71ed2c6 3324 * CMD_USE_FIXED_RATE (STA version).
a66098da 3325 */
b71ed2c6
LB		 3326struct mwl8k_cmd_use_fixed_rate_sta {
3327 struct mwl8k_cmd_pkt header;
3328 __le32 action;
3329 __le32 allow_rate_drop;
3330 __le32 num_rates;
3331 struct {
3332 __le32 is_ht_rate;
3333 __le32 enable_retry;
3334 __le32 rate;
3335 __le32 retry_count;
3336 } rate_entry[8];
3337 __le32 rate_type;
3338 __le32 reserved1;
3339 __le32 reserved2;
ba2d3587 3340} __packed;
a66098da 3341
b71ed2c6
LB		 3342#define MWL8K_USE_AUTO_RATE 0x0002
3343#define MWL8K_UCAST_RATE 0
a66098da 3344
b71ed2c6 3345static int mwl8k_cmd_use_fixed_rate_sta(struct ieee80211_hw *hw)
a66098da 3346{
b71ed2c6 3347 struct mwl8k_cmd_use_fixed_rate_sta *cmd;
a66098da
LB		 3348 int rc;
3349
3350 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3351 if (cmd == NULL)
3352 return -ENOMEM;
3353
3354 cmd->header.code = cpu_to_le16(MWL8K_CMD_USE_FIXED_RATE);
3355 cmd->header.length = cpu_to_le16(sizeof(*cmd));
b71ed2c6
LB		 3356 cmd->action = cpu_to_le32(MWL8K_USE_AUTO_RATE);
3357 cmd->rate_type = cpu_to_le32(MWL8K_UCAST_RATE);
a66098da
LB		 3358
3359 rc = mwl8k_post_cmd(hw, &cmd->header);
3360 kfree(cmd);
3361
3362 return rc;
3363}
3364
088aab8b
LB		 3365/*
3366 * CMD_USE_FIXED_RATE (AP version).
3367 */
3368struct mwl8k_cmd_use_fixed_rate_ap {
3369 struct mwl8k_cmd_pkt header;
3370 __le32 action;
3371 __le32 allow_rate_drop;
3372 __le32 num_rates;
3373 struct mwl8k_rate_entry_ap {
3374 __le32 is_ht_rate;
3375 __le32 enable_retry;
3376 __le32 rate;
3377 __le32 retry_count;
3378 } rate_entry[4];
3379 u8 multicast_rate;
3380 u8 multicast_rate_type;
3381 u8 management_rate;
ba2d3587 3382} __packed;
088aab8b
LB		 3383
3384static int
3385mwl8k_cmd_use_fixed_rate_ap(struct ieee80211_hw *hw, int mcast, int mgmt)
3386{
3387 struct mwl8k_cmd_use_fixed_rate_ap *cmd;
3388 int rc;
3389
3390 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3391 if (cmd == NULL)
3392 return -ENOMEM;
3393
3394 cmd->header.code = cpu_to_le16(MWL8K_CMD_USE_FIXED_RATE);
3395 cmd->header.length = cpu_to_le16(sizeof(*cmd));
3396 cmd->action = cpu_to_le32(MWL8K_USE_AUTO_RATE);
3397 cmd->multicast_rate = mcast;
3398 cmd->management_rate = mgmt;
3399
3400 rc = mwl8k_post_cmd(hw, &cmd->header);
3401 kfree(cmd);
3402
3403 return rc;
3404}
3405
55489b6e
LB		 3406/*
3407 * CMD_ENABLE_SNIFFER.
3408 */
3409struct mwl8k_cmd_enable_sniffer {
3410 struct mwl8k_cmd_pkt header;
3411 __le32 action;
ba2d3587 3412} __packed;
55489b6e
LB		 3413
3414static int mwl8k_cmd_enable_sniffer(struct ieee80211_hw *hw, bool enable)
3415{
3416 struct mwl8k_cmd_enable_sniffer *cmd;
3417 int rc;
3418
3419 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3420 if (cmd == NULL)
3421 return -ENOMEM;
3422
3423 cmd->header.code = cpu_to_le16(MWL8K_CMD_ENABLE_SNIFFER);
3424 cmd->header.length = cpu_to_le16(sizeof(*cmd));
3425 cmd->action = cpu_to_le32(!!enable);
3426
3427 rc = mwl8k_post_cmd(hw, &cmd->header);
3428 kfree(cmd);
3429
3430 return rc;
3431}
3432
3433/*
3434 * CMD_SET_MAC_ADDR.
3435 */
3436struct mwl8k_cmd_set_mac_addr {
3437 struct mwl8k_cmd_pkt header;
3438 union {
3439 struct {
3440 __le16 mac_type;
3441 __u8 mac_addr[ETH_ALEN];
3442 } mbss;
3443 __u8 mac_addr[ETH_ALEN];
3444 };
ba2d3587 3445} __packed;
55489b6e 3446
ee0ddf18
LB		 3447#define MWL8K_MAC_TYPE_PRIMARY_CLIENT 0
3448#define MWL8K_MAC_TYPE_SECONDARY_CLIENT 1
3449#define MWL8K_MAC_TYPE_PRIMARY_AP 2
3450#define MWL8K_MAC_TYPE_SECONDARY_AP 3
a9e00b15 3451
aa21d0f6
LB		 3452static int mwl8k_cmd_set_mac_addr(struct ieee80211_hw *hw,
3453 struct ieee80211_vif *vif, u8 *mac)
55489b6e
LB		 3454{
3455 struct mwl8k_priv *priv = hw->priv;
ee0ddf18 3456 struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif);
55489b6e 3457 struct mwl8k_cmd_set_mac_addr *cmd;
ee0ddf18 3458 int mac_type;
55489b6e
LB		 3459 int rc;
3460
ee0ddf18
LB		 3461 mac_type = MWL8K_MAC_TYPE_PRIMARY_AP;
3462 if (vif != NULL && vif->type == NL80211_IFTYPE_STATION) {
3463 if (mwl8k_vif->macid + 1 == ffs(priv->sta_macids_supported))
3464 mac_type = MWL8K_MAC_TYPE_PRIMARY_CLIENT;
3465 else
3466 mac_type = MWL8K_MAC_TYPE_SECONDARY_CLIENT;
3467 } else if (vif != NULL && vif->type == NL80211_IFTYPE_AP) {
3468 if (mwl8k_vif->macid + 1 == ffs(priv->ap_macids_supported))
3469 mac_type = MWL8K_MAC_TYPE_PRIMARY_AP;
3470 else
3471 mac_type = MWL8K_MAC_TYPE_SECONDARY_AP;
3472 }
3473
55489b6e
LB		 3474 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3475 if (cmd == NULL)
3476 return -ENOMEM;
3477
3478 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_MAC_ADDR);
3479 cmd->header.length = cpu_to_le16(sizeof(*cmd));
3480 if (priv->ap_fw) {
ee0ddf18 3481 cmd->mbss.mac_type = cpu_to_le16(mac_type);
55489b6e
LB		 3482 memcpy(cmd->mbss.mac_addr, mac, ETH_ALEN);
3483 } else {
3484 memcpy(cmd->mac_addr, mac, ETH_ALEN);
3485 }
3486
aa21d0f6 3487 rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
55489b6e
LB		 3488 kfree(cmd);
3489
3490 return rc;
3491}
3492
3493/*
3494 * CMD_SET_RATEADAPT_MODE.
3495 */
3496struct mwl8k_cmd_set_rate_adapt_mode {
3497 struct mwl8k_cmd_pkt header;
3498 __le16 action;
3499 __le16 mode;
ba2d3587 3500} __packed;
55489b6e
LB		 3501
3502static int mwl8k_cmd_set_rateadapt_mode(struct ieee80211_hw *hw, __u16 mode)
3503{
3504 struct mwl8k_cmd_set_rate_adapt_mode *cmd;
3505 int rc;
3506
3507 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3508 if (cmd == NULL)
3509 return -ENOMEM;
3510
3511 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RATEADAPT_MODE);
3512 cmd->header.length = cpu_to_le16(sizeof(*cmd));
3513 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
3514 cmd->mode = cpu_to_le16(mode);
3515
3516 rc = mwl8k_post_cmd(hw, &cmd->header);
3517 kfree(cmd);
3518
3519 return rc;
3520}
3521
3aefc37e
NS		 3522/*
3523 * CMD_GET_WATCHDOG_BITMAP.
3524 */
3525struct mwl8k_cmd_get_watchdog_bitmap {
3526 struct mwl8k_cmd_pkt header;
3527 u8 bitmap;
3528} __packed;
3529
3530static int mwl8k_cmd_get_watchdog_bitmap(struct ieee80211_hw *hw, u8 *bitmap)
3531{
3532 struct mwl8k_cmd_get_watchdog_bitmap *cmd;
3533 int rc;
3534
3535 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3536 if (cmd == NULL)
3537 return -ENOMEM;
3538
3539 cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_WATCHDOG_BITMAP);
3540 cmd->header.length = cpu_to_le16(sizeof(*cmd));
3541
3542 rc = mwl8k_post_cmd(hw, &cmd->header);
3543 if (!rc)
3544 *bitmap = cmd->bitmap;
3545
3546 kfree(cmd);
3547
3548 return rc;
3549}
3550
3551#define INVALID_BA 0xAA
3552static void mwl8k_watchdog_ba_events(struct work_struct *work)
3553{
3554 int rc;
3555 u8 bitmap = 0, stream_index;
3556 struct mwl8k_ampdu_stream *streams;
3557 struct mwl8k_priv *priv =
3558 container_of(work, struct mwl8k_priv, watchdog_ba_handle);
3559
3560 rc = mwl8k_cmd_get_watchdog_bitmap(priv->hw, &bitmap);
3561 if (rc)
3562 return;
3563
3564 if (bitmap == INVALID_BA)
3565 return;
3566
3567 /* the bitmap is the hw queue number. Map it to the ampdu queue. */
3568 stream_index = bitmap - MWL8K_TX_WMM_QUEUES;
3569
3570 BUG_ON(stream_index >= priv->num_ampdu_queues);
3571
3572 streams = &priv->ampdu[stream_index];
3573
3574 if (streams->state == AMPDU_STREAM_ACTIVE)
3575 ieee80211_stop_tx_ba_session(streams->sta, streams->tid);
3576
3577 return;
3578}
3579
3580
b64fe619
LB		 3581/*
3582 * CMD_BSS_START.
3583 */
3584struct mwl8k_cmd_bss_start {
3585 struct mwl8k_cmd_pkt header;
3586 __le32 enable;
ba2d3587 3587} __packed;
b64fe619 3588
aa21d0f6
LB		 3589static int mwl8k_cmd_bss_start(struct ieee80211_hw *hw,
3590 struct ieee80211_vif *vif, int enable)
b64fe619
LB		 3591{
3592 struct mwl8k_cmd_bss_start *cmd;
3593 int rc;
3594
3595 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3596 if (cmd == NULL)
3597 return -ENOMEM;
3598
3599 cmd->header.code = cpu_to_le16(MWL8K_CMD_BSS_START);
3600 cmd->header.length = cpu_to_le16(sizeof(*cmd));
3601 cmd->enable = cpu_to_le32(enable);
3602
aa21d0f6 3603 rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
b64fe619
LB		 3604 kfree(cmd);
3605
3606 return rc;
3607}
3608
5faa1aff
NS		 3609/*
3610 * CMD_BASTREAM.
3611 */
3612
3613/*
3614 * UPSTREAM is tx direction
3615 */
3616#define BASTREAM_FLAG_DIRECTION_UPSTREAM 0x00
3617#define BASTREAM_FLAG_IMMEDIATE_TYPE 0x01
3618
ba30c4a5 3619enum ba_stream_action_type {
5faa1aff
NS		 3620 MWL8K_BA_CREATE,
3621 MWL8K_BA_UPDATE,
3622 MWL8K_BA_DESTROY,
3623 MWL8K_BA_FLUSH,
3624 MWL8K_BA_CHECK,
ba30c4a5 3625};
5faa1aff
NS		 3626
3627
3628struct mwl8k_create_ba_stream {
3629 __le32 flags;
3630 __le32 idle_thrs;
3631 __le32 bar_thrs;
3632 __le32 window_size;
3633 u8 peer_mac_addr[6];
3634 u8 dialog_token;
3635 u8 tid;
3636 u8 queue_id;
3637 u8 param_info;
3638 __le32 ba_context;
3639 u8 reset_seq_no_flag;
3640 __le16 curr_seq_no;
3641 u8 sta_src_mac_addr[6];
3642} __packed;
3643
3644struct mwl8k_destroy_ba_stream {
3645 __le32 flags;
3646 __le32 ba_context;
3647} __packed;
3648
3649struct mwl8k_cmd_bastream {
3650 struct mwl8k_cmd_pkt header;
3651 __le32 action;
3652 union {
3653 struct mwl8k_create_ba_stream create_params;
3654 struct mwl8k_destroy_ba_stream destroy_params;
3655 };
3656} __packed;
3657
3658static int
3659mwl8k_check_ba(struct ieee80211_hw *hw, struct mwl8k_ampdu_stream *stream)
3660{
3661 struct mwl8k_cmd_bastream *cmd;
3662 int rc;
3663
3664 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3665 if (cmd == NULL)
3666 return -ENOMEM;
3667
3668 cmd->header.code = cpu_to_le16(MWL8K_CMD_BASTREAM);
3669 cmd->header.length = cpu_to_le16(sizeof(*cmd));
3670
3671 cmd->action = cpu_to_le32(MWL8K_BA_CHECK);
3672
3673 cmd->create_params.queue_id = stream->idx;
3674 memcpy(&cmd->create_params.peer_mac_addr[0], stream->sta->addr,
3675 ETH_ALEN);
3676 cmd->create_params.tid = stream->tid;
3677
3678 cmd->create_params.flags =
3679 cpu_to_le32(BASTREAM_FLAG_IMMEDIATE_TYPE) |
3680 cpu_to_le32(BASTREAM_FLAG_DIRECTION_UPSTREAM);
3681
3682 rc = mwl8k_post_cmd(hw, &cmd->header);
3683
3684 kfree(cmd);
3685
3686 return rc;
3687}
3688
3689static int
3690mwl8k_create_ba(struct ieee80211_hw *hw, struct mwl8k_ampdu_stream *stream,
3691 u8 buf_size)
3692{
3693 struct mwl8k_cmd_bastream *cmd;
3694 int rc;
3695
3696 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3697 if (cmd == NULL)
3698 return -ENOMEM;
3699
3700
3701 cmd->header.code = cpu_to_le16(MWL8K_CMD_BASTREAM);
3702 cmd->header.length = cpu_to_le16(sizeof(*cmd));
3703
3704 cmd->action = cpu_to_le32(MWL8K_BA_CREATE);
3705
3706 cmd->create_params.bar_thrs = cpu_to_le32((u32)buf_size);
3707 cmd->create_params.window_size = cpu_to_le32((u32)buf_size);
3708 cmd->create_params.queue_id = stream->idx;
3709
3710 memcpy(cmd->create_params.peer_mac_addr, stream->sta->addr, ETH_ALEN);
3711 cmd->create_params.tid = stream->tid;
3712 cmd->create_params.curr_seq_no = cpu_to_le16(0);
3713 cmd->create_params.reset_seq_no_flag = 1;
3714
3715 cmd->create_params.param_info =
3716 (stream->sta->ht_cap.ampdu_factor &
3717 IEEE80211_HT_AMPDU_PARM_FACTOR) |
3718 ((stream->sta->ht_cap.ampdu_density << 2) &
3719 IEEE80211_HT_AMPDU_PARM_DENSITY);
3720
3721 cmd->create_params.flags =
3722 cpu_to_le32(BASTREAM_FLAG_IMMEDIATE_TYPE |
3723 BASTREAM_FLAG_DIRECTION_UPSTREAM);
3724
3725 rc = mwl8k_post_cmd(hw, &cmd->header);
3726
3727 wiphy_debug(hw->wiphy, "Created a BA stream for %pM : tid %d\n",
3728 stream->sta->addr, stream->tid);
3729 kfree(cmd);
3730
3731 return rc;
3732}
3733
3734static void mwl8k_destroy_ba(struct ieee80211_hw *hw,
3735 struct mwl8k_ampdu_stream *stream)
3736{
3737 struct mwl8k_cmd_bastream *cmd;
3738
3739 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3740 if (cmd == NULL)
3741 return;
3742
3743 cmd->header.code = cpu_to_le16(MWL8K_CMD_BASTREAM);
3744 cmd->header.length = cpu_to_le16(sizeof(*cmd));
3745 cmd->action = cpu_to_le32(MWL8K_BA_DESTROY);
3746
3747 cmd->destroy_params.ba_context = cpu_to_le32(stream->idx);
3748 mwl8k_post_cmd(hw, &cmd->header);
3749
3750 wiphy_debug(hw->wiphy, "Deleted BA stream index %d\n", stream->idx);
3751
3752 kfree(cmd);
3753}
3754
3f5610ff
LB		 3755/*
3756 * CMD_SET_NEW_STN.
3757 */
3758struct mwl8k_cmd_set_new_stn {
3759 struct mwl8k_cmd_pkt header;
3760 __le16 aid;
3761 __u8 mac_addr[6];
3762 __le16 stn_id;
3763 __le16 action;
3764 __le16 rsvd;
3765 __le32 legacy_rates;
3766 __u8 ht_rates[4];
3767 __le16 cap_info;
3768 __le16 ht_capabilities_info;
3769 __u8 mac_ht_param_info;
3770 __u8 rev;
3771 __u8 control_channel;
3772 __u8 add_channel;
3773 __le16 op_mode;
3774 __le16 stbc;
3775 __u8 add_qos_info;
3776 __u8 is_qos_sta;
3777 __le32 fw_sta_ptr;
ba2d3587 3778} __packed;
3f5610ff
LB		 3779
3780#define MWL8K_STA_ACTION_ADD 0
3781#define MWL8K_STA_ACTION_REMOVE 2
3782
3783static int mwl8k_cmd_set_new_stn_add(struct ieee80211_hw *hw,
3784 struct ieee80211_vif *vif,
3785 struct ieee80211_sta *sta)
3786{
3787 struct mwl8k_cmd_set_new_stn *cmd;
8707d026 3788 u32 rates;
3f5610ff
LB		 3789 int rc;
3790
3791 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3792 if (cmd == NULL)
3793 return -ENOMEM;
3794
3795 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_NEW_STN);
3796 cmd->header.length = cpu_to_le16(sizeof(*cmd));
3797 cmd->aid = cpu_to_le16(sta->aid);
3798 memcpy(cmd->mac_addr, sta->addr, ETH_ALEN);
3799 cmd->stn_id = cpu_to_le16(sta->aid);
3800 cmd->action = cpu_to_le16(MWL8K_STA_ACTION_ADD);
8707d026
LB		 3801 if (hw->conf.channel->band == IEEE80211_BAND_2GHZ)
3802 rates = sta->supp_rates[IEEE80211_BAND_2GHZ];
3803 else
3804 rates = sta->supp_rates[IEEE80211_BAND_5GHZ] << 5;
3805 cmd->legacy_rates = cpu_to_le32(rates);
3f5610ff
LB		 3806 if (sta->ht_cap.ht_supported) {
3807 cmd->ht_rates[0] = sta->ht_cap.mcs.rx_mask[0];
3808 cmd->ht_rates[1] = sta->ht_cap.mcs.rx_mask[1];
3809 cmd->ht_rates[2] = sta->ht_cap.mcs.rx_mask[2];
3810 cmd->ht_rates[3] = sta->ht_cap.mcs.rx_mask[3];
3811 cmd->ht_capabilities_info = cpu_to_le16(sta->ht_cap.cap);
3812 cmd->mac_ht_param_info = (sta->ht_cap.ampdu_factor & 3) |
3813 ((sta->ht_cap.ampdu_density & 7) << 2);
3814 cmd->is_qos_sta = 1;
3815 }
3816
aa21d0f6 3817 rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
3f5610ff
LB		 3818 kfree(cmd);
3819
3820 return rc;
3821}
3822
b64fe619
LB		 3823static int mwl8k_cmd_set_new_stn_add_self(struct ieee80211_hw *hw,
3824 struct ieee80211_vif *vif)
3825{
3826 struct mwl8k_cmd_set_new_stn *cmd;
3827 int rc;
3828
3829 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3830 if (cmd == NULL)
3831 return -ENOMEM;
3832
3833 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_NEW_STN);
3834 cmd->header.length = cpu_to_le16(sizeof(*cmd));
3835 memcpy(cmd->mac_addr, vif->addr, ETH_ALEN);
3836
aa21d0f6 3837 rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
b64fe619
LB		 3838 kfree(cmd);
3839
3840 return rc;
3841}
3842
3f5610ff
LB		 3843static int mwl8k_cmd_set_new_stn_del(struct ieee80211_hw *hw,
3844 struct ieee80211_vif *vif, u8 *addr)
3845{
3846 struct mwl8k_cmd_set_new_stn *cmd;
3847 int rc;
3848
3849 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3850 if (cmd == NULL)
3851 return -ENOMEM;
3852
3853 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_NEW_STN);
3854 cmd->header.length = cpu_to_le16(sizeof(*cmd));
3855 memcpy(cmd->mac_addr, addr, ETH_ALEN);
3856 cmd->action = cpu_to_le16(MWL8K_STA_ACTION_REMOVE);
3857
aa21d0f6 3858 rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
3f5610ff
LB		 3859 kfree(cmd);
3860
3861 return rc;
3862}
3863
fcdc403c
NS		 3864/*
3865 * CMD_UPDATE_ENCRYPTION.
3866 */
3867
3868#define MAX_ENCR_KEY_LENGTH 16
3869#define MIC_KEY_LENGTH 8
3870
3871struct mwl8k_cmd_update_encryption {
3872 struct mwl8k_cmd_pkt header;
3873
3874 __le32 action;
3875 __le32 reserved;
3876 __u8 mac_addr[6];
3877 __u8 encr_type;
3878
ba30c4a5 3879} __packed;
fcdc403c
NS		 3880
3881struct mwl8k_cmd_set_key {
3882 struct mwl8k_cmd_pkt header;
3883
3884 __le32 action;
3885 __le32 reserved;
3886 __le16 length;
3887 __le16 key_type_id;
3888 __le32 key_info;
3889 __le32 key_id;
3890 __le16 key_len;
3891 __u8 key_material[MAX_ENCR_KEY_LENGTH];
3892 __u8 tkip_tx_mic_key[MIC_KEY_LENGTH];
3893 __u8 tkip_rx_mic_key[MIC_KEY_LENGTH];
3894 __le16 tkip_rsc_low;
3895 __le32 tkip_rsc_high;
3896 __le16 tkip_tsc_low;
3897 __le32 tkip_tsc_high;
3898 __u8 mac_addr[6];
ba30c4a5 3899} __packed;
fcdc403c
NS		 3900
3901enum {
3902 MWL8K_ENCR_ENABLE,
3903 MWL8K_ENCR_SET_KEY,
3904 MWL8K_ENCR_REMOVE_KEY,
3905 MWL8K_ENCR_SET_GROUP_KEY,
3906};
3907
3908#define MWL8K_UPDATE_ENCRYPTION_TYPE_WEP 0
3909#define MWL8K_UPDATE_ENCRYPTION_TYPE_DISABLE 1
3910#define MWL8K_UPDATE_ENCRYPTION_TYPE_TKIP 4
3911#define MWL8K_UPDATE_ENCRYPTION_TYPE_MIXED 7
3912#define MWL8K_UPDATE_ENCRYPTION_TYPE_AES 8
3913
3914enum {
3915 MWL8K_ALG_WEP,
3916 MWL8K_ALG_TKIP,
3917 MWL8K_ALG_CCMP,
3918};
3919
3920#define MWL8K_KEY_FLAG_TXGROUPKEY 0x00000004
3921#define MWL8K_KEY_FLAG_PAIRWISE 0x00000008
3922#define MWL8K_KEY_FLAG_TSC_VALID 0x00000040
3923#define MWL8K_KEY_FLAG_WEP_TXKEY 0x01000000
3924#define MWL8K_KEY_FLAG_MICKEY_VALID 0x02000000
3925
3926static int mwl8k_cmd_update_encryption_enable(struct ieee80211_hw *hw,
3927 struct ieee80211_vif *vif,
3928 u8 *addr,
3929 u8 encr_type)
3930{
3931 struct mwl8k_cmd_update_encryption *cmd;
3932 int rc;
3933
3934 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3935 if (cmd == NULL)
3936 return -ENOMEM;
3937
3938 cmd->header.code = cpu_to_le16(MWL8K_CMD_UPDATE_ENCRYPTION);
3939 cmd->header.length = cpu_to_le16(sizeof(*cmd));
3940 cmd->action = cpu_to_le32(MWL8K_ENCR_ENABLE);
3941 memcpy(cmd->mac_addr, addr, ETH_ALEN);
3942 cmd->encr_type = encr_type;
3943
3944 rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
3945 kfree(cmd);
3946
3947 return rc;
3948}
3949
3950static int mwl8k_encryption_set_cmd_info(struct mwl8k_cmd_set_key *cmd,
3951 u8 *addr,
3952 struct ieee80211_key_conf *key)
3953{
3954 cmd->header.code = cpu_to_le16(MWL8K_CMD_UPDATE_ENCRYPTION);
3955 cmd->header.length = cpu_to_le16(sizeof(*cmd));
3956 cmd->length = cpu_to_le16(sizeof(*cmd) -
3957 offsetof(struct mwl8k_cmd_set_key, length));
3958 cmd->key_id = cpu_to_le32(key->keyidx);
3959 cmd->key_len = cpu_to_le16(key->keylen);
3960 memcpy(cmd->mac_addr, addr, ETH_ALEN);
3961
3962 switch (key->cipher) {
3963 case WLAN_CIPHER_SUITE_WEP40:
3964 case WLAN_CIPHER_SUITE_WEP104:
3965 cmd->key_type_id = cpu_to_le16(MWL8K_ALG_WEP);
3966 if (key->keyidx == 0)
3967 cmd->key_info = cpu_to_le32(MWL8K_KEY_FLAG_WEP_TXKEY);
3968
3969 break;
3970 case WLAN_CIPHER_SUITE_TKIP:
3971 cmd->key_type_id = cpu_to_le16(MWL8K_ALG_TKIP);
3972 cmd->key_info = (key->flags & IEEE80211_KEY_FLAG_PAIRWISE)
3973 ? cpu_to_le32(MWL8K_KEY_FLAG_PAIRWISE)
3974 : cpu_to_le32(MWL8K_KEY_FLAG_TXGROUPKEY);
3975 cmd->key_info |= cpu_to_le32(MWL8K_KEY_FLAG_MICKEY_VALID
3976 | MWL8K_KEY_FLAG_TSC_VALID);
3977 break;
3978 case WLAN_CIPHER_SUITE_CCMP:
3979 cmd->key_type_id = cpu_to_le16(MWL8K_ALG_CCMP);
3980 cmd->key_info = (key->flags & IEEE80211_KEY_FLAG_PAIRWISE)
3981 ? cpu_to_le32(MWL8K_KEY_FLAG_PAIRWISE)
3982 : cpu_to_le32(MWL8K_KEY_FLAG_TXGROUPKEY);
3983 break;
3984 default:
3985 return -ENOTSUPP;
3986 }
3987
3988 return 0;
3989}
3990
3991static int mwl8k_cmd_encryption_set_key(struct ieee80211_hw *hw,
3992 struct ieee80211_vif *vif,
3993 u8 *addr,
3994 struct ieee80211_key_conf *key)
3995{
3996 struct mwl8k_cmd_set_key *cmd;
3997 int rc;
3998 int keymlen;
3999 u32 action;
4000 u8 idx;
4001 struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif);
4002
4003 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
4004 if (cmd == NULL)
4005 return -ENOMEM;
4006
4007 rc = mwl8k_encryption_set_cmd_info(cmd, addr, key);
4008 if (rc < 0)
4009 goto done;
4010
4011 idx = key->keyidx;
4012
4013 if (key->flags & IEEE80211_KEY_FLAG_PAIRWISE)
4014 action = MWL8K_ENCR_SET_KEY;
4015 else
4016 action = MWL8K_ENCR_SET_GROUP_KEY;
4017
4018 switch (key->cipher) {
4019 case WLAN_CIPHER_SUITE_WEP40:
4020 case WLAN_CIPHER_SUITE_WEP104:
4021 if (!mwl8k_vif->wep_key_conf[idx].enabled) {
4022 memcpy(mwl8k_vif->wep_key_conf[idx].key, key,
4023 sizeof(*key) + key->keylen);
4024 mwl8k_vif->wep_key_conf[idx].enabled = 1;
4025 }
4026
9b571e24 4027 keymlen = key->keylen;
fcdc403c
NS		 4028 action = MWL8K_ENCR_SET_KEY;
4029 break;
4030 case WLAN_CIPHER_SUITE_TKIP:
4031 keymlen = MAX_ENCR_KEY_LENGTH + 2 * MIC_KEY_LENGTH;
4032 break;
4033 case WLAN_CIPHER_SUITE_CCMP:
4034 keymlen = key->keylen;
4035 break;
4036 default:
4037 rc = -ENOTSUPP;
4038 goto done;
4039 }
4040
4041 memcpy(cmd->key_material, key->key, keymlen);
4042 cmd->action = cpu_to_le32(action);
4043
4044 rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
4045done:
4046 kfree(cmd);
4047
4048 return rc;
4049}
4050
4051static int mwl8k_cmd_encryption_remove_key(struct ieee80211_hw *hw,
4052 struct ieee80211_vif *vif,
4053 u8 *addr,
4054 struct ieee80211_key_conf *key)
4055{
4056 struct mwl8k_cmd_set_key *cmd;
4057 int rc;
4058 struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif);
4059
4060 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
4061 if (cmd == NULL)
4062 return -ENOMEM;
4063
4064 rc = mwl8k_encryption_set_cmd_info(cmd, addr, key);
4065 if (rc < 0)
4066 goto done;
4067
4068 if (key->cipher == WLAN_CIPHER_SUITE_WEP40 ||
d981e059 4069 key->cipher == WLAN_CIPHER_SUITE_WEP104)
fcdc403c
NS		 4070 mwl8k_vif->wep_key_conf[key->keyidx].enabled = 0;
4071
4072 cmd->action = cpu_to_le32(MWL8K_ENCR_REMOVE_KEY);
4073
4074 rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
4075done:
4076 kfree(cmd);
4077
4078 return rc;
4079}
4080
4081static int mwl8k_set_key(struct ieee80211_hw *hw,
4082 enum set_key_cmd cmd_param,
4083 struct ieee80211_vif *vif,
4084 struct ieee80211_sta *sta,
4085 struct ieee80211_key_conf *key)
4086{
4087 int rc = 0;
4088 u8 encr_type;
4089 u8 *addr;
4090 struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif);
4091
4092 if (vif->type == NL80211_IFTYPE_STATION)
4093 return -EOPNOTSUPP;
4094
4095 if (sta == NULL)
4096 addr = hw->wiphy->perm_addr;
4097 else
4098 addr = sta->addr;
4099
4100 if (cmd_param == SET_KEY) {
fcdc403c
NS		 4101 rc = mwl8k_cmd_encryption_set_key(hw, vif, addr, key);
4102 if (rc)
4103 goto out;
4104
4105 if ((key->cipher == WLAN_CIPHER_SUITE_WEP40)
4106 || (key->cipher == WLAN_CIPHER_SUITE_WEP104))
4107 encr_type = MWL8K_UPDATE_ENCRYPTION_TYPE_WEP;
4108 else
4109 encr_type = MWL8K_UPDATE_ENCRYPTION_TYPE_MIXED;
4110
4111 rc = mwl8k_cmd_update_encryption_enable(hw, vif, addr,
4112 encr_type);
4113 if (rc)
4114 goto out;
4115
4116 mwl8k_vif->is_hw_crypto_enabled = true;
4117
4118 } else {
4119 rc = mwl8k_cmd_encryption_remove_key(hw, vif, addr, key);
4120
4121 if (rc)
4122 goto out;
fcdc403c
NS		 4123 }
4124out:
4125 return rc;
4126}
4127
55489b6e
LB		 4128/*
4129 * CMD_UPDATE_STADB.
4130 */
25d81b1e
LB		 4131struct ewc_ht_info {
4132 __le16 control1;
4133 __le16 control2;
4134 __le16 control3;
ba2d3587 4135} __packed;
25d81b1e
LB		 4136
4137struct peer_capability_info {
4138 /* Peer type - AP vs. STA. */
4139 __u8 peer_type;
4140
4141 /* Basic 802.11 capabilities from assoc resp. */
4142 __le16 basic_caps;
4143
4144 /* Set if peer supports 802.11n high throughput (HT). */
4145 __u8 ht_support;
4146
4147 /* Valid if HT is supported. */
4148 __le16 ht_caps;
4149 __u8 extended_ht_caps;
4150 struct ewc_ht_info ewc_info;
4151
4152 /* Legacy rate table. Intersection of our rates and peer rates. */
4153 __u8 legacy_rates[12];
4154
4155 /* HT rate table. Intersection of our rates and peer rates. */
4156 __u8 ht_rates[16];
4157 __u8 pad[16];
4158
4159 /* If set, interoperability mode, no proprietary extensions. */
4160 __u8 interop;
4161 __u8 pad2;
4162 __u8 station_id;
4163 __le16 amsdu_enabled;
ba2d3587 4164} __packed;
25d81b1e 4165
55489b6e
LB		 4166struct mwl8k_cmd_update_stadb {
4167 struct mwl8k_cmd_pkt header;
4168
4169 /* See STADB_ACTION_TYPE */
4170 __le32 action;
4171
4172 /* Peer MAC address */
4173 __u8 peer_addr[ETH_ALEN];
4174
4175 __le32 reserved;
4176
4177 /* Peer info - valid during add/update. */
4178 struct peer_capability_info peer_info;
ba2d3587 4179} __packed;
55489b6e 4180
a680400e
LB		 4181#define MWL8K_STA_DB_MODIFY_ENTRY 1
4182#define MWL8K_STA_DB_DEL_ENTRY 2
4183
4184/* Peer Entry flags - used to define the type of the peer node */
4185#define MWL8K_PEER_TYPE_ACCESSPOINT 2
4186
4187static int mwl8k_cmd_update_stadb_add(struct ieee80211_hw *hw,
c6e96010 4188 struct ieee80211_vif *vif,
13935e2c 4189 struct ieee80211_sta *sta)
55489b6e 4190{
55489b6e 4191 struct mwl8k_cmd_update_stadb *cmd;
a680400e 4192 struct peer_capability_info *p;
8707d026 4193 u32 rates;
55489b6e
LB		 4194 int rc;
4195
4196 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
4197 if (cmd == NULL)
4198 return -ENOMEM;
4199
4200 cmd->header.code = cpu_to_le16(MWL8K_CMD_UPDATE_STADB);
4201 cmd->header.length = cpu_to_le16(sizeof(*cmd));
a680400e 4202 cmd->action = cpu_to_le32(MWL8K_STA_DB_MODIFY_ENTRY);
13935e2c 4203 memcpy(cmd->peer_addr, sta->addr, ETH_ALEN);
55489b6e 4204
a680400e
LB		 4205 p = &cmd->peer_info;
4206 p->peer_type = MWL8K_PEER_TYPE_ACCESSPOINT;
4207 p->basic_caps = cpu_to_le16(vif->bss_conf.assoc_capability);
13935e2c 4208 p->ht_support = sta->ht_cap.ht_supported;
b603742f 4209 p->ht_caps = cpu_to_le16(sta->ht_cap.cap);
13935e2c
LB		 4210 p->extended_ht_caps = (sta->ht_cap.ampdu_factor & 3) |
4211 ((sta->ht_cap.ampdu_density & 7) << 2);
8707d026
LB		 4212 if (hw->conf.channel->band == IEEE80211_BAND_2GHZ)
4213 rates = sta->supp_rates[IEEE80211_BAND_2GHZ];
4214 else
4215 rates = sta->supp_rates[IEEE80211_BAND_5GHZ] << 5;
4216 legacy_rate_mask_to_array(p->legacy_rates, rates);
13935e2c 4217 memcpy(p->ht_rates, sta->ht_cap.mcs.rx_mask, 16);
a680400e
LB		 4218 p->interop = 1;
4219 p->amsdu_enabled = 0;
4220
4221 rc = mwl8k_post_cmd(hw, &cmd->header);
4222 kfree(cmd);
4223
4224 return rc ? rc : p->station_id;
4225}
4226
4227static int mwl8k_cmd_update_stadb_del(struct ieee80211_hw *hw,
4228 struct ieee80211_vif *vif, u8 *addr)
4229{
4230 struct mwl8k_cmd_update_stadb *cmd;
4231 int rc;
4232
4233 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
4234 if (cmd == NULL)
4235 return -ENOMEM;
4236
4237 cmd->header.code = cpu_to_le16(MWL8K_CMD_UPDATE_STADB);
4238 cmd->header.length = cpu_to_le16(sizeof(*cmd));
4239 cmd->action = cpu_to_le32(MWL8K_STA_DB_DEL_ENTRY);
bbfd9128 4240 memcpy(cmd->peer_addr, addr, ETH_ALEN);
55489b6e 4241
a680400e 4242 rc = mwl8k_post_cmd(hw, &cmd->header);
55489b6e
LB		 4243 kfree(cmd);
4244
4245 return rc;
4246}
4247
a66098da
LB		 4248
4249/*
4250 * Interrupt handling.
4251 */
4252static irqreturn_t mwl8k_interrupt(int irq, void *dev_id)
4253{
4254 struct ieee80211_hw *hw = dev_id;
4255 struct mwl8k_priv *priv = hw->priv;
4256 u32 status;
4257
4258 status = ioread32(priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
a66098da
LB		 4259 if (!status)
4260 return IRQ_NONE;
4261
1e9f9de3
LB		 4262 if (status & MWL8K_A2H_INT_TX_DONE) {
4263 status &= ~MWL8K_A2H_INT_TX_DONE;
4264 tasklet_schedule(&priv->poll_tx_task);
4265 }
4266
a66098da 4267 if (status & MWL8K_A2H_INT_RX_READY) {
67e2eb27
LB		 4268 status &= ~MWL8K_A2H_INT_RX_READY;
4269 tasklet_schedule(&priv->poll_rx_task);
a66098da
LB		 4270 }
4271
3aefc37e
NS		 4272 if (status & MWL8K_A2H_INT_BA_WATCHDOG) {
4273 status &= ~MWL8K_A2H_INT_BA_WATCHDOG;
4274 ieee80211_queue_work(hw, &priv->watchdog_ba_handle);
4275 }
4276
67e2eb27
LB		 4277 if (status)
4278 iowrite32(~status, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
4279
a66098da 4280 if (status & MWL8K_A2H_INT_OPC_DONE) {
618952a7 4281 if (priv->hostcmd_wait != NULL)
a66098da 4282 complete(priv->hostcmd_wait);
a66098da
LB		 4283 }
4284
4285 if (status & MWL8K_A2H_INT_QUEUE_EMPTY) {
618952a7 4286 if (!mutex_is_locked(&priv->fw_mutex) &&
88de754a 4287 priv->radio_on && priv->pending_tx_pkts)
618952a7 4288 mwl8k_tx_start(priv);
a66098da
LB		 4289 }
4290
4291 return IRQ_HANDLED;
4292}
4293
1e9f9de3
LB		 4294static void mwl8k_tx_poll(unsigned long data)
4295{
4296 struct ieee80211_hw *hw = (struct ieee80211_hw *)data;
4297 struct mwl8k_priv *priv = hw->priv;
4298 int limit;
4299 int i;
4300
4301 limit = 32;
4302
4303 spin_lock_bh(&priv->tx_lock);
4304
e600707b 4305 for (i = 0; i < mwl8k_tx_queues(priv); i++)
1e9f9de3
LB		 4306 limit -= mwl8k_txq_reclaim(hw, i, limit, 0);
4307
4308 if (!priv->pending_tx_pkts && priv->tx_wait != NULL) {
4309 complete(priv->tx_wait);
4310 priv->tx_wait = NULL;
4311 }
4312
4313 spin_unlock_bh(&priv->tx_lock);
4314
4315 if (limit) {
4316 writel(~MWL8K_A2H_INT_TX_DONE,
4317 priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
4318 } else {
4319 tasklet_schedule(&priv->poll_tx_task);
4320 }
4321}
4322
67e2eb27
LB		 4323static void mwl8k_rx_poll(unsigned long data)
4324{
4325 struct ieee80211_hw *hw = (struct ieee80211_hw *)data;
4326 struct mwl8k_priv *priv = hw->priv;
4327 int limit;
4328
4329 limit = 32;
4330 limit -= rxq_process(hw, 0, limit);
4331 limit -= rxq_refill(hw, 0, limit);
4332
4333 if (limit) {
4334 writel(~MWL8K_A2H_INT_RX_READY,
4335 priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
4336 } else {
4337 tasklet_schedule(&priv->poll_rx_task);
4338 }
4339}
4340
a66098da
LB		 4341
4342/*
4343 * Core driver operations.
4344 */
7bb45683 4345static void mwl8k_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
a66098da
LB		 4346{
4347 struct mwl8k_priv *priv = hw->priv;
4348 int index = skb_get_queue_mapping(skb);
a66098da 4349
9189c100 4350 if (!priv->radio_on) {
c96c31e4
JP		 4351 wiphy_debug(hw->wiphy,
4352 "dropped TX frame since radio disabled\n");
a66098da 4353 dev_kfree_skb(skb);
7bb45683 4354 return;
a66098da
LB		 4355 }
4356
7bb45683 4357 mwl8k_txq_xmit(hw, index, skb);
a66098da
LB		 4358}
4359
a66098da
LB		 4360static int mwl8k_start(struct ieee80211_hw *hw)
4361{
a66098da
LB		 4362 struct mwl8k_priv *priv = hw->priv;
4363 int rc;
4364
a0607fd3 4365 rc = request_irq(priv->pdev->irq, mwl8k_interrupt,
a66098da
LB		 4366 IRQF_SHARED, MWL8K_NAME, hw);
4367 if (rc) {
bf3ca7f7 4368 priv->irq = -1;
5db55844 4369 wiphy_err(hw->wiphy, "failed to register IRQ handler\n");
2ec610cb 4370 return -EIO;
a66098da 4371 }
bf3ca7f7 4372 priv->irq = priv->pdev->irq;
a66098da 4373
67e2eb27 4374 /* Enable TX reclaim and RX tasklets. */
1e9f9de3 4375 tasklet_enable(&priv->poll_tx_task);
67e2eb27 4376 tasklet_enable(&priv->poll_rx_task);
2ec610cb 4377
a66098da 4378 /* Enable interrupts */
c23b5a69 4379 iowrite32(MWL8K_A2H_EVENTS, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
12488e01
NS		 4380 iowrite32(MWL8K_A2H_EVENTS,
4381 priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK);
a66098da 4382
2ec610cb
LB		 4383 rc = mwl8k_fw_lock(hw);
4384 if (!rc) {
55489b6e 4385 rc = mwl8k_cmd_radio_enable(hw);
a66098da 4386
5e4cf166
LB		 4387 if (!priv->ap_fw) {
4388 if (!rc)
55489b6e 4389 rc = mwl8k_cmd_enable_sniffer(hw, 0);
a66098da 4390
5e4cf166
LB		 4391 if (!rc)
4392 rc = mwl8k_cmd_set_pre_scan(hw);
4393
4394 if (!rc)
4395 rc = mwl8k_cmd_set_post_scan(hw,
4396 "\x00\x00\x00\x00\x00\x00");
4397 }
2ec610cb
LB		 4398
4399 if (!rc)
55489b6e 4400 rc = mwl8k_cmd_set_rateadapt_mode(hw, 0);
a66098da 4401
2ec610cb 4402 if (!rc)
55489b6e 4403 rc = mwl8k_cmd_set_wmm_mode(hw, 0);
a66098da 4404
2ec610cb
LB		 4405 mwl8k_fw_unlock(hw);
4406 }
4407
4408 if (rc) {
4409 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
4410 free_irq(priv->pdev->irq, hw);
bf3ca7f7 4411 priv->irq = -1;
1e9f9de3 4412 tasklet_disable(&priv->poll_tx_task);
67e2eb27 4413 tasklet_disable(&priv->poll_rx_task);
2ec610cb 4414 }
a66098da
LB		 4415
4416 return rc;
4417}
4418
a66098da
LB		 4419static void mwl8k_stop(struct ieee80211_hw *hw)
4420{
a66098da
LB		 4421 struct mwl8k_priv *priv = hw->priv;
4422 int i;
4423
6b6accc3
YAP		 4424 if (!priv->hw_restart_in_progress)
4425 mwl8k_cmd_radio_disable(hw);
a66098da
LB		 4426
4427 ieee80211_stop_queues(hw);
4428
a66098da 4429 /* Disable interrupts */
a66098da 4430 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
bf3ca7f7
BC		 4431 if (priv->irq != -1) {
4432 free_irq(priv->pdev->irq, hw);
4433 priv->irq = -1;
4434 }
a66098da
LB		 4435
4436 /* Stop finalize join worker */
4437 cancel_work_sync(&priv->finalize_join_worker);
3aefc37e 4438 cancel_work_sync(&priv->watchdog_ba_handle);
a66098da
LB		 4439 if (priv->beacon_skb != NULL)
4440 dev_kfree_skb(priv->beacon_skb);
4441
67e2eb27 4442 /* Stop TX reclaim and RX tasklets. */
1e9f9de3 4443 tasklet_disable(&priv->poll_tx_task);
67e2eb27 4444 tasklet_disable(&priv->poll_rx_task);
a66098da 4445
a66098da 4446 /* Return all skbs to mac80211 */
e600707b 4447 for (i = 0; i < mwl8k_tx_queues(priv); i++)
efb7c49a 4448 mwl8k_txq_reclaim(hw, i, INT_MAX, 1);
a66098da
LB		 4449}
4450
0863ade8
BC		 4451static int mwl8k_reload_firmware(struct ieee80211_hw *hw, char *fw_image);
4452
a66098da 4453static int mwl8k_add_interface(struct ieee80211_hw *hw,
f5bb87cf 4454 struct ieee80211_vif *vif)
a66098da
LB		 4455{
4456 struct mwl8k_priv *priv = hw->priv;
4457 struct mwl8k_vif *mwl8k_vif;
ee0ddf18 4458 u32 macids_supported;
0863ade8
BC		 4459 int macid, rc;
4460 struct mwl8k_device_info *di;
a66098da 4461
a43c49a8
LB		 4462 /*
4463 * Reject interface creation if sniffer mode is active, as
4464 * STA operation is mutually exclusive with hardware sniffer
b64fe619 4465 * mode. (Sniffer mode is only used on STA firmware.)
a43c49a8
LB		 4466 */
4467 if (priv->sniffer_enabled) {
c96c31e4
JP		 4468 wiphy_info(hw->wiphy,
4469 "unable to create STA interface because sniffer mode is enabled\n");
a43c49a8
LB		 4470 return -EINVAL;
4471 }
4472
0863ade8 4473 di = priv->device_info;
ee0ddf18
LB		 4474 switch (vif->type) {
4475 case NL80211_IFTYPE_AP:
0863ade8
BC		 4476 if (!priv->ap_fw && di->fw_image_ap) {
4477 /* we must load the ap fw to meet this request */
4478 if (!list_empty(&priv->vif_list))
4479 return -EBUSY;
4480 rc = mwl8k_reload_firmware(hw, di->fw_image_ap);
4481 if (rc)
4482 return rc;
4483 }
ee0ddf18
LB		 4484 macids_supported = priv->ap_macids_supported;
4485 break;
4486 case NL80211_IFTYPE_STATION:
0863ade8
BC		 4487 if (priv->ap_fw && di->fw_image_sta) {
4488 /* we must load the sta fw to meet this request */
4489 if (!list_empty(&priv->vif_list))
4490 return -EBUSY;
4491 rc = mwl8k_reload_firmware(hw, di->fw_image_sta);
4492 if (rc)
4493 return rc;
4494 }
ee0ddf18
LB		 4495 macids_supported = priv->sta_macids_supported;
4496 break;
4497 default:
4498 return -EINVAL;
4499 }
4500
4501 macid = ffs(macids_supported & ~priv->macids_used);
4502 if (!macid--)
4503 return -EBUSY;
4504
f5bb87cf 4505 /* Setup driver private area. */
1ed32e4f 4506 mwl8k_vif = MWL8K_VIF(vif);
a66098da 4507 memset(mwl8k_vif, 0, sizeof(*mwl8k_vif));
f5bb87cf 4508 mwl8k_vif->vif = vif;
ee0ddf18 4509 mwl8k_vif->macid = macid;
a66098da 4510 mwl8k_vif->seqno = 0;
d9a07d49
NS		 4511 memcpy(mwl8k_vif->bssid, vif->addr, ETH_ALEN);
4512 mwl8k_vif->is_hw_crypto_enabled = false;
a66098da 4513
aa21d0f6
LB		 4514 /* Set the mac address. */
4515 mwl8k_cmd_set_mac_addr(hw, vif, vif->addr);
4516
4517 if (priv->ap_fw)
4518 mwl8k_cmd_set_new_stn_add_self(hw, vif);
4519
ee0ddf18 4520 priv->macids_used |= 1 << mwl8k_vif->macid;
f5bb87cf 4521 list_add_tail(&mwl8k_vif->list, &priv->vif_list);
a66098da
LB		 4522
4523 return 0;
4524}
4525
6b6accc3
YAP		 4526static void mwl8k_remove_vif(struct mwl8k_priv *priv, struct mwl8k_vif *vif)
4527{
4528 /* Has ieee80211_restart_hw re-added the removed interfaces? */
4529 if (!priv->macids_used)
4530 return;
4531
4532 priv->macids_used &= ~(1 << vif->macid);
4533 list_del(&vif->list);
4534}
4535
a66098da 4536static void mwl8k_remove_interface(struct ieee80211_hw *hw,
1ed32e4f 4537 struct ieee80211_vif *vif)
a66098da
LB		 4538{
4539 struct mwl8k_priv *priv = hw->priv;
f5bb87cf 4540 struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif);
a66098da 4541
b64fe619
LB		 4542 if (priv->ap_fw)
4543 mwl8k_cmd_set_new_stn_del(hw, vif, vif->addr);
4544
aa21d0f6 4545 mwl8k_cmd_set_mac_addr(hw, vif, "\x00\x00\x00\x00\x00\x00");
32060e1b 4546
6b6accc3
YAP		 4547 mwl8k_remove_vif(priv, mwl8k_vif);
4548}
4549
4550static void mwl8k_hw_restart_work(struct work_struct *work)
4551{
4552 struct mwl8k_priv *priv =
4553 container_of(work, struct mwl8k_priv, fw_reload);
4554 struct ieee80211_hw *hw = priv->hw;
4555 struct mwl8k_device_info *di;
4556 int rc;
4557
4558 /* If some command is waiting for a response, clear it */
4559 if (priv->hostcmd_wait != NULL) {
4560 complete(priv->hostcmd_wait);
4561 priv->hostcmd_wait = NULL;
4562 }
4563
4564 priv->hw_restart_owner = current;
4565 di = priv->device_info;
4566 mwl8k_fw_lock(hw);
4567
4568 if (priv->ap_fw)
4569 rc = mwl8k_reload_firmware(hw, di->fw_image_ap);
4570 else
4571 rc = mwl8k_reload_firmware(hw, di->fw_image_sta);
4572
4573 if (rc)
4574 goto fail;
4575
4576 priv->hw_restart_owner = NULL;
4577 priv->hw_restart_in_progress = false;
4578
4579 /*
4580 * This unlock will wake up the queues and
4581 * also opens the command path for other
4582 * commands
4583 */
4584 mwl8k_fw_unlock(hw);
4585
4586 ieee80211_restart_hw(hw);
4587
4588 wiphy_err(hw->wiphy, "Firmware restarted successfully\n");
4589
4590 return;
4591fail:
4592 mwl8k_fw_unlock(hw);
4593
4594 wiphy_err(hw->wiphy, "Firmware restart failed\n");
a66098da
LB		 4595}
4596
ee03a932 4597static int mwl8k_config(struct ieee80211_hw *hw, u32 changed)
a66098da 4598{
a66098da
LB		 4599 struct ieee80211_conf *conf = &hw->conf;
4600 struct mwl8k_priv *priv = hw->priv;
ee03a932 4601 int rc;
a66098da 4602
7595d67a 4603 if (conf->flags & IEEE80211_CONF_IDLE) {
55489b6e 4604 mwl8k_cmd_radio_disable(hw);
ee03a932 4605 return 0;
7595d67a
LB		 4606 }
4607
ee03a932
LB		 4608 rc = mwl8k_fw_lock(hw);
4609 if (rc)
4610 return rc;
a66098da 4611
55489b6e 4612 rc = mwl8k_cmd_radio_enable(hw);
ee03a932
LB		 4613 if (rc)
4614 goto out;
a66098da 4615
610677d2 4616 rc = mwl8k_cmd_set_rf_channel(hw, conf);
ee03a932
LB		 4617 if (rc)
4618 goto out;
4619
a66098da
LB		 4620 if (conf->power_level > 18)
4621 conf->power_level = 18;
a66098da 4622
08b06347 4623 if (priv->ap_fw) {
03217087
NS		 4624
4625 if (conf->flags & IEEE80211_CONF_CHANGE_POWER) {
4626 rc = mwl8k_cmd_tx_power(hw, conf, conf->power_level);
4627 if (rc)
4628 goto out;
4629 }
41fdf097 4630
da62b761
NS		 4631 rc = mwl8k_cmd_rf_antenna(hw, MWL8K_RF_ANTENNA_RX, 0x3);
4632 if (rc)
4633 wiphy_warn(hw->wiphy, "failed to set # of RX antennas");
4634 rc = mwl8k_cmd_rf_antenna(hw, MWL8K_RF_ANTENNA_TX, 0x7);
4635 if (rc)
4636 wiphy_warn(hw->wiphy, "failed to set # of TX antennas");
4637
08b06347 4638 } else {
41fdf097
NS		 4639 rc = mwl8k_cmd_rf_tx_power(hw, conf->power_level);
4640 if (rc)
4641 goto out;
08b06347
LB		 4642 rc = mwl8k_cmd_mimo_config(hw, 0x7, 0x7);
4643 }
a66098da 4644
ee03a932
LB		 4645out:
4646 mwl8k_fw_unlock(hw);
a66098da 4647
ee03a932 4648 return rc;
a66098da
LB		 4649}
4650
b64fe619
LB		 4651static void
4652mwl8k_bss_info_changed_sta(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
4653 struct ieee80211_bss_conf *info, u32 changed)
a66098da 4654{
a66098da 4655 struct mwl8k_priv *priv = hw->priv;
ba30c4a5 4656 u32 ap_legacy_rates = 0;
13935e2c 4657 u8 ap_mcs_rates[16];
3a980d0a
LB		 4658 int rc;
4659
c3cbbe8a 4660 if (mwl8k_fw_lock(hw))
3a980d0a 4661 return;
a66098da 4662
c3cbbe8a
LB		 4663 /*
4664 * No need to capture a beacon if we're no longer associated.
4665 */
4666 if ((changed & BSS_CHANGED_ASSOC) && !vif->bss_conf.assoc)
4667 priv->capture_beacon = false;
3a980d0a 4668
c3cbbe8a 4669 /*
13935e2c 4670 * Get the AP's legacy and MCS rates.
c3cbbe8a 4671 */
7dc6a7a7 4672 if (vif->bss_conf.assoc) {
c6e96010 4673 struct ieee80211_sta *ap;
c97470dd 4674
c6e96010 4675 rcu_read_lock();
c6e96010 4676
c3cbbe8a
LB		 4677 ap = ieee80211_find_sta(vif, vif->bss_conf.bssid);
4678 if (ap == NULL) {
4679 rcu_read_unlock();
c6e96010 4680 goto out;
c3cbbe8a
LB		 4681 }
4682
8707d026
LB		 4683 if (hw->conf.channel->band == IEEE80211_BAND_2GHZ) {
4684 ap_legacy_rates = ap->supp_rates[IEEE80211_BAND_2GHZ];
4685 } else {
4686 ap_legacy_rates =
4687 ap->supp_rates[IEEE80211_BAND_5GHZ] << 5;
4688 }
13935e2c 4689 memcpy(ap_mcs_rates, ap->ht_cap.mcs.rx_mask, 16);
c3cbbe8a
LB		 4690
4691 rcu_read_unlock();
4692 }
c6e96010 4693
c3cbbe8a 4694 if ((changed & BSS_CHANGED_ASSOC) && vif->bss_conf.assoc) {
13935e2c 4695 rc = mwl8k_cmd_set_rate(hw, vif, ap_legacy_rates, ap_mcs_rates);
3a980d0a
LB		 4696 if (rc)
4697 goto out;
a66098da 4698
b71ed2c6 4699 rc = mwl8k_cmd_use_fixed_rate_sta(hw);
3a980d0a
LB		 4700 if (rc)
4701 goto out;
c3cbbe8a 4702 }
a66098da 4703
c3cbbe8a 4704 if (changed & BSS_CHANGED_ERP_PREAMBLE) {
7dc6a7a7
LB		 4705 rc = mwl8k_set_radio_preamble(hw,
4706 vif->bss_conf.use_short_preamble);
3a980d0a
LB		 4707 if (rc)
4708 goto out;
c3cbbe8a 4709 }
a66098da 4710
c3cbbe8a 4711 if (changed & BSS_CHANGED_ERP_SLOT) {
7dc6a7a7 4712 rc = mwl8k_cmd_set_slot(hw, vif->bss_conf.use_short_slot);
3a980d0a
LB		 4713 if (rc)
4714 goto out;
c3cbbe8a 4715 }
a66098da 4716
c97470dd
LB		 4717 if (vif->bss_conf.assoc &&
4718 (changed & (BSS_CHANGED_ASSOC | BSS_CHANGED_ERP_CTS_PROT |
4719 BSS_CHANGED_HT))) {
c3cbbe8a 4720 rc = mwl8k_cmd_set_aid(hw, vif, ap_legacy_rates);
3a980d0a
LB		 4721 if (rc)
4722 goto out;
c3cbbe8a 4723 }
a66098da 4724
c3cbbe8a
LB		 4725 if (vif->bss_conf.assoc &&
4726 (changed & (BSS_CHANGED_ASSOC | BSS_CHANGED_BEACON_INT))) {
a66098da
LB		 4727 /*
4728 * Finalize the join. Tell rx handler to process
4729 * next beacon from our BSSID.
4730 */
0a11dfc3 4731 memcpy(priv->capture_bssid, vif->bss_conf.bssid, ETH_ALEN);
a66098da 4732 priv->capture_beacon = true;
a66098da
LB		 4733 }
4734
3a980d0a
LB		 4735out:
4736 mwl8k_fw_unlock(hw);
a66098da
LB		 4737}
4738
b64fe619
LB		 4739static void
4740mwl8k_bss_info_changed_ap(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
4741 struct ieee80211_bss_conf *info, u32 changed)
4742{
4743 int rc;
4744
4745 if (mwl8k_fw_lock(hw))
4746 return;
4747
4748 if (changed & BSS_CHANGED_ERP_PREAMBLE) {
4749 rc = mwl8k_set_radio_preamble(hw,
4750 vif->bss_conf.use_short_preamble);
4751 if (rc)
4752 goto out;
4753 }
4754
4755 if (changed & BSS_CHANGED_BASIC_RATES) {
4756 int idx;
4757 int rate;
4758
4759 /*
4760 * Use lowest supported basic rate for multicasts
4761 * and management frames (such as probe responses --
4762 * beacons will always go out at 1 Mb/s).
4763 */
4764 idx = ffs(vif->bss_conf.basic_rates);
8707d026
LB		 4765 if (idx)
4766 idx--;
4767
4768 if (hw->conf.channel->band == IEEE80211_BAND_2GHZ)
4769 rate = mwl8k_rates_24[idx].hw_value;
4770 else
4771 rate = mwl8k_rates_50[idx].hw_value;
b64fe619
LB		 4772
4773 mwl8k_cmd_use_fixed_rate_ap(hw, rate, rate);
4774 }
4775
4776 if (changed & (BSS_CHANGED_BEACON_INT | BSS_CHANGED_BEACON)) {
4777 struct sk_buff *skb;
4778
4779 skb = ieee80211_beacon_get(hw, vif);
4780 if (skb != NULL) {
aa21d0f6 4781 mwl8k_cmd_set_beacon(hw, vif, skb->data, skb->len);
b64fe619
LB		 4782 kfree_skb(skb);
4783 }
4784 }
4785
4786 if (changed & BSS_CHANGED_BEACON_ENABLED)
aa21d0f6 4787 mwl8k_cmd_bss_start(hw, vif, info->enable_beacon);
b64fe619
LB		 4788
4789out:
4790 mwl8k_fw_unlock(hw);
4791}
4792
4793static void
4794mwl8k_bss_info_changed(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
4795 struct ieee80211_bss_conf *info, u32 changed)
4796{
4797 struct mwl8k_priv *priv = hw->priv;
4798
4799 if (!priv->ap_fw)
4800 mwl8k_bss_info_changed_sta(hw, vif, info, changed);
4801 else
4802 mwl8k_bss_info_changed_ap(hw, vif, info, changed);
4803}
4804
e81cd2d6 4805static u64 mwl8k_prepare_multicast(struct ieee80211_hw *hw,
22bedad3 4806 struct netdev_hw_addr_list *mc_list)
e81cd2d6
LB		 4807{
4808 struct mwl8k_cmd_pkt *cmd;
4809
447ced07
LB		 4810 /*
4811 * Synthesize and return a command packet that programs the
4812 * hardware multicast address filter. At this point we don't
4813 * know whether FIF_ALLMULTI is being requested, but if it is,
4814 * we'll end up throwing this packet away and creating a new
4815 * one in mwl8k_configure_filter().
4816 */
22bedad3 4817 cmd = __mwl8k_cmd_mac_multicast_adr(hw, 0, mc_list);
e81cd2d6
LB		 4818
4819 return (unsigned long)cmd;
4820}
4821
a43c49a8
LB		 4822static int
4823mwl8k_configure_filter_sniffer(struct ieee80211_hw *hw,
4824 unsigned int changed_flags,
4825 unsigned int *total_flags)
4826{
4827 struct mwl8k_priv *priv = hw->priv;
4828
4829 /*
4830 * Hardware sniffer mode is mutually exclusive with STA
4831 * operation, so refuse to enable sniffer mode if a STA
4832 * interface is active.
4833 */
f5bb87cf 4834 if (!list_empty(&priv->vif_list)) {
a43c49a8 4835 if (net_ratelimit())
c96c31e4
JP		 4836 wiphy_info(hw->wiphy,
4837 "not enabling sniffer mode because STA interface is active\n");
a43c49a8
LB		 4838 return 0;
4839 }
4840
4841 if (!priv->sniffer_enabled) {
55489b6e 4842 if (mwl8k_cmd_enable_sniffer(hw, 1))
a43c49a8
LB		 4843 return 0;
4844 priv->sniffer_enabled = true;
4845 }
4846
4847 *total_flags &= FIF_PROMISC_IN_BSS | FIF_ALLMULTI |
4848 FIF_BCN_PRBRESP_PROMISC | FIF_CONTROL |
4849 FIF_OTHER_BSS;
4850
4851 return 1;
4852}
4853
f5bb87cf
LB		 4854static struct mwl8k_vif *mwl8k_first_vif(struct mwl8k_priv *priv)
4855{
4856 if (!list_empty(&priv->vif_list))
4857 return list_entry(priv->vif_list.next, struct mwl8k_vif, list);
4858
4859 return NULL;
4860}
4861
e6935ea1
LB		 4862static void mwl8k_configure_filter(struct ieee80211_hw *hw,
4863 unsigned int changed_flags,
4864 unsigned int *total_flags,
4865 u64 multicast)
4866{
4867 struct mwl8k_priv *priv = hw->priv;
a43c49a8
LB		 4868 struct mwl8k_cmd_pkt *cmd = (void *)(unsigned long)multicast;
4869
c0adae2c
LB		 4870 /*
4871 * AP firmware doesn't allow fine-grained control over
4872 * the receive filter.
4873 */
4874 if (priv->ap_fw) {
4875 *total_flags &= FIF_ALLMULTI | FIF_BCN_PRBRESP_PROMISC;
4876 kfree(cmd);
4877 return;
4878 }
4879
a43c49a8
LB		 4880 /*
4881 * Enable hardware sniffer mode if FIF_CONTROL or
4882 * FIF_OTHER_BSS is requested.
4883 */
4884 if (*total_flags & (FIF_CONTROL | FIF_OTHER_BSS) &&
4885 mwl8k_configure_filter_sniffer(hw, changed_flags, total_flags)) {
4886 kfree(cmd);
4887 return;
4888 }
a66098da 4889
e6935ea1 4890 /* Clear unsupported feature flags */
447ced07 4891 *total_flags &= FIF_ALLMULTI | FIF_BCN_PRBRESP_PROMISC;
a66098da 4892
90852f7a
LB		 4893 if (mwl8k_fw_lock(hw)) {
4894 kfree(cmd);
e6935ea1 4895 return;
90852f7a 4896 }
a66098da 4897
a43c49a8 4898 if (priv->sniffer_enabled) {
55489b6e 4899 mwl8k_cmd_enable_sniffer(hw, 0);
a43c49a8
LB		 4900 priv->sniffer_enabled = false;
4901 }
4902
e6935ea1 4903 if (changed_flags & FIF_BCN_PRBRESP_PROMISC) {
77165d88
LB		 4904 if (*total_flags & FIF_BCN_PRBRESP_PROMISC) {
4905 /*
4906 * Disable the BSS filter.
4907 */
e6935ea1 4908 mwl8k_cmd_set_pre_scan(hw);
77165d88 4909 } else {
f5bb87cf 4910 struct mwl8k_vif *mwl8k_vif;
0a11dfc3 4911 const u8 *bssid;
a94cc97e 4912
77165d88
LB		 4913 /*
4914 * Enable the BSS filter.
4915 *
4916 * If there is an active STA interface, use that
4917 * interface's BSSID, otherwise use a dummy one
4918 * (where the OUI part needs to be nonzero for
4919 * the BSSID to be accepted by POST_SCAN).
4920 */
f5bb87cf
LB		 4921 mwl8k_vif = mwl8k_first_vif(priv);
4922 if (mwl8k_vif != NULL)
4923 bssid = mwl8k_vif->vif->bss_conf.bssid;
4924 else
4925 bssid = "\x01\x00\x00\x00\x00\x00";
a94cc97e 4926
e6935ea1 4927 mwl8k_cmd_set_post_scan(hw, bssid);
a66098da
LB		 4928 }
4929 }
4930
447ced07
LB		 4931 /*
4932 * If FIF_ALLMULTI is being requested, throw away the command
4933 * packet that ->prepare_multicast() built and replace it with
4934 * a command packet that enables reception of all multicast
4935 * packets.
4936 */
4937 if (*total_flags & FIF_ALLMULTI) {
4938 kfree(cmd);
22bedad3 4939 cmd = __mwl8k_cmd_mac_multicast_adr(hw, 1, NULL);
447ced07
LB		 4940 }
4941
4942 if (cmd != NULL) {
4943 mwl8k_post_cmd(hw, cmd);
4944 kfree(cmd);
e6935ea1 4945 }
a66098da 4946
e6935ea1 4947 mwl8k_fw_unlock(hw);
a66098da
LB		 4948}
4949
a66098da
LB		 4950static int mwl8k_set_rts_threshold(struct ieee80211_hw *hw, u32 value)
4951{
c2c2b12a 4952 return mwl8k_cmd_set_rts_threshold(hw, value);
a66098da
LB		 4953}
4954
4a6967b8
JB		 4955static int mwl8k_sta_remove(struct ieee80211_hw *hw,
4956 struct ieee80211_vif *vif,
4957 struct ieee80211_sta *sta)
3f5610ff
LB		 4958{
4959 struct mwl8k_priv *priv = hw->priv;
4960
4a6967b8
JB		 4961 if (priv->ap_fw)
4962 return mwl8k_cmd_set_new_stn_del(hw, vif, sta->addr);
4963 else
4964 return mwl8k_cmd_update_stadb_del(hw, vif, sta->addr);
bbfd9128
LB		 4965}
4966
4a6967b8
JB		 4967static int mwl8k_sta_add(struct ieee80211_hw *hw,
4968 struct ieee80211_vif *vif,
4969 struct ieee80211_sta *sta)
bbfd9128
LB		 4970{
4971 struct mwl8k_priv *priv = hw->priv;
4a6967b8 4972 int ret;
fcdc403c
NS		 4973 int i;
4974 struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif);
4975 struct ieee80211_key_conf *key;
bbfd9128 4976
4a6967b8
JB		 4977 if (!priv->ap_fw) {
4978 ret = mwl8k_cmd_update_stadb_add(hw, vif, sta);
4979 if (ret >= 0) {
4980 MWL8K_STA(sta)->peer_id = ret;
17033543
NS		 4981 if (sta->ht_cap.ht_supported)
4982 MWL8K_STA(sta)->is_ampdu_allowed = true;
fcdc403c 4983 ret = 0;
4a6967b8 4984 }
bbfd9128 4985
d9a07d49
NS		 4986 } else {
4987 ret = mwl8k_cmd_set_new_stn_add(hw, vif, sta);
bbfd9128 4988 }
4a6967b8 4989
d9a07d49
NS		 4990 for (i = 0; i < NUM_WEP_KEYS; i++) {
4991 key = IEEE80211_KEY_CONF(mwl8k_vif->wep_key_conf[i].key);
4992 if (mwl8k_vif->wep_key_conf[i].enabled)
4993 mwl8k_set_key(hw, SET_KEY, vif, sta, key);
4994 }
fcdc403c 4995 return ret;
bbfd9128
LB		 4996}
4997
8a3a3c85
EP		 4998static int mwl8k_conf_tx(struct ieee80211_hw *hw,
4999 struct ieee80211_vif *vif, u16 queue,
a66098da
LB		 5000 const struct ieee80211_tx_queue_params *params)
5001{
3e4f542c 5002 struct mwl8k_priv *priv = hw->priv;
a66098da 5003 int rc;
a66098da 5004
3e4f542c
LB		 5005 rc = mwl8k_fw_lock(hw);
5006 if (!rc) {
e600707b 5007 BUG_ON(queue > MWL8K_TX_WMM_QUEUES - 1);
0863ade8
BC		 5008 memcpy(&priv->wmm_params[queue], params, sizeof(*params));
5009
3e4f542c 5010 if (!priv->wmm_enabled)
55489b6e 5011 rc = mwl8k_cmd_set_wmm_mode(hw, 1);
a66098da 5012
85c9205c 5013 if (!rc) {
e600707b 5014 int q = MWL8K_TX_WMM_QUEUES - 1 - queue;
85c9205c 5015 rc = mwl8k_cmd_set_edca_params(hw, q,
55489b6e
LB		 5016 params->cw_min,
5017 params->cw_max,
5018 params->aifs,
5019 params->txop);
85c9205c 5020 }
3e4f542c
LB		 5021
5022 mwl8k_fw_unlock(hw);
a66098da 5023 }
3e4f542c 5024
a66098da
LB		 5025 return rc;
5026}
5027
a66098da
LB		 5028static int mwl8k_get_stats(struct ieee80211_hw *hw,
5029 struct ieee80211_low_level_stats *stats)
5030{
55489b6e 5031 return mwl8k_cmd_get_stat(hw, stats);
a66098da
LB		 5032}
5033
0d462bbb
JL		 5034static int mwl8k_get_survey(struct ieee80211_hw *hw, int idx,
5035 struct survey_info *survey)
5036{
5037 struct mwl8k_priv *priv = hw->priv;
5038 struct ieee80211_conf *conf = &hw->conf;
5039
5040 if (idx != 0)
5041 return -ENOENT;
5042
5043 survey->channel = conf->channel;
5044 survey->filled = SURVEY_INFO_NOISE_DBM;
5045 survey->noise = priv->noise;
5046
5047 return 0;
5048}
5049
65f3ddcd
NS		 5050#define MAX_AMPDU_ATTEMPTS 5
5051
a2292d83
LB		 5052static int
5053mwl8k_ampdu_action(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
5054 enum ieee80211_ampdu_mlme_action action,
0b01f030
JB		 5055 struct ieee80211_sta *sta, u16 tid, u16 *ssn,
5056 u8 buf_size)
a2292d83 5057{
65f3ddcd
NS		 5058
5059 int i, rc = 0;
5060 struct mwl8k_priv *priv = hw->priv;
5061 struct mwl8k_ampdu_stream *stream;
5062 u8 *addr = sta->addr;
5063
5064 if (!(hw->flags & IEEE80211_HW_AMPDU_AGGREGATION))
5065 return -ENOTSUPP;
5066
5067 spin_lock(&priv->stream_lock);
5068 stream = mwl8k_lookup_stream(hw, addr, tid);
5069
a2292d83
LB		 5070 switch (action) {
5071 case IEEE80211_AMPDU_RX_START:
5072 case IEEE80211_AMPDU_RX_STOP:
65f3ddcd
NS		 5073 break;
5074 case IEEE80211_AMPDU_TX_START:
5075 /* By the time we get here the hw queues may contain outgoing
5076 * packets for this RA/TID that are not part of this BA
5077 * session. The hw will assign sequence numbers to these
5078 * packets as they go out. So if we query the hw for its next
5079 * sequence number and use that for the SSN here, it may end up
5080 * being wrong, which will lead to sequence number mismatch at
5081 * the recipient. To avoid this, we reset the sequence number
5082 * to O for the first MPDU in this BA stream.
5083 */
5084 *ssn = 0;
5085 if (stream == NULL) {
5086 /* This means that somebody outside this driver called
5087 * ieee80211_start_tx_ba_session. This is unexpected
5088 * because we do our own rate control. Just warn and
5089 * move on.
5090 */
5091 wiphy_warn(hw->wiphy, "Unexpected call to %s. "
5092 "Proceeding anyway.\n", __func__);
5093 stream = mwl8k_add_stream(hw, sta, tid);
5094 }
5095 if (stream == NULL) {
5096 wiphy_debug(hw->wiphy, "no free AMPDU streams\n");
5097 rc = -EBUSY;
5098 break;
5099 }
5100 stream->state = AMPDU_STREAM_IN_PROGRESS;
5101
5102 /* Release the lock before we do the time consuming stuff */
5103 spin_unlock(&priv->stream_lock);
5104 for (i = 0; i < MAX_AMPDU_ATTEMPTS; i++) {
5105 rc = mwl8k_check_ba(hw, stream);
5106
6b6accc3
YAP		 5107 /* If HW restart is in progress mwl8k_post_cmd will
5108 * return -EBUSY. Avoid retrying mwl8k_check_ba in
5109 * such cases
5110 */
5111 if (!rc || rc == -EBUSY)
65f3ddcd
NS		 5112 break;
5113 /*
5114 * HW queues take time to be flushed, give them
5115 * sufficient time
5116 */
5117
5118 msleep(1000);
5119 }
5120 spin_lock(&priv->stream_lock);
5121 if (rc) {
5122 wiphy_err(hw->wiphy, "Stream for tid %d busy after %d"
5123 " attempts\n", tid, MAX_AMPDU_ATTEMPTS);
5124 mwl8k_remove_stream(hw, stream);
5125 rc = -EBUSY;
5126 break;
5127 }
5128 ieee80211_start_tx_ba_cb_irqsafe(vif, addr, tid);
5129 break;
5130 case IEEE80211_AMPDU_TX_STOP:
eca107ff
YAP		 5131 if (stream) {
5132 if (stream->state == AMPDU_STREAM_ACTIVE) {
5133 spin_unlock(&priv->stream_lock);
5134 mwl8k_destroy_ba(hw, stream);
5135 spin_lock(&priv->stream_lock);
5136 }
5137 mwl8k_remove_stream(hw, stream);
65f3ddcd 5138 }
65f3ddcd
NS		 5139 ieee80211_stop_tx_ba_cb_irqsafe(vif, addr, tid);
5140 break;
5141 case IEEE80211_AMPDU_TX_OPERATIONAL:
5142 BUG_ON(stream == NULL);
5143 BUG_ON(stream->state != AMPDU_STREAM_IN_PROGRESS);
5144 spin_unlock(&priv->stream_lock);
5145 rc = mwl8k_create_ba(hw, stream, buf_size);
5146 spin_lock(&priv->stream_lock);
5147 if (!rc)
5148 stream->state = AMPDU_STREAM_ACTIVE;
5149 else {
5150 spin_unlock(&priv->stream_lock);
5151 mwl8k_destroy_ba(hw, stream);
5152 spin_lock(&priv->stream_lock);
5153 wiphy_debug(hw->wiphy,
5154 "Failed adding stream for sta %pM tid %d\n",
5155 addr, tid);
5156 mwl8k_remove_stream(hw, stream);
5157 }
5158 break;
5159
a2292d83 5160 default:
65f3ddcd 5161 rc = -ENOTSUPP;
a2292d83 5162 }
65f3ddcd
NS		 5163
5164 spin_unlock(&priv->stream_lock);
5165 return rc;
a2292d83
LB		 5166}
5167
a66098da
LB		 5168static const struct ieee80211_ops mwl8k_ops = {
5169 .tx = mwl8k_tx,
5170 .start = mwl8k_start,
5171 .stop = mwl8k_stop,
5172 .add_interface = mwl8k_add_interface,
5173 .remove_interface = mwl8k_remove_interface,
5174 .config = mwl8k_config,
a66098da 5175 .bss_info_changed = mwl8k_bss_info_changed,
3ac64bee 5176 .prepare_multicast = mwl8k_prepare_multicast,
a66098da 5177 .configure_filter = mwl8k_configure_filter,
fcdc403c 5178 .set_key = mwl8k_set_key,
a66098da 5179 .set_rts_threshold = mwl8k_set_rts_threshold,
4a6967b8
JB		 5180 .sta_add = mwl8k_sta_add,
5181 .sta_remove = mwl8k_sta_remove,
a66098da 5182 .conf_tx = mwl8k_conf_tx,
a66098da 5183 .get_stats = mwl8k_get_stats,
0d462bbb 5184 .get_survey = mwl8k_get_survey,
a2292d83 5185 .ampdu_action = mwl8k_ampdu_action,
a66098da
LB		 5186};
5187
a66098da
LB		 5188static void mwl8k_finalize_join_worker(struct work_struct *work)
5189{
5190 struct mwl8k_priv *priv =
5191 container_of(work, struct mwl8k_priv, finalize_join_worker);
5192 struct sk_buff *skb = priv->beacon_skb;
56007a02
JB		 5193 struct ieee80211_mgmt *mgmt = (void *)skb->data;
5194 int len = skb->len - offsetof(struct ieee80211_mgmt, u.beacon.variable);
5195 const u8 *tim = cfg80211_find_ie(WLAN_EID_TIM,
5196 mgmt->u.beacon.variable, len);
5197 int dtim_period = 1;
5198
5199 if (tim && tim[1] >= 2)
5200 dtim_period = tim[3];
a66098da 5201
56007a02 5202 mwl8k_cmd_finalize_join(priv->hw, skb->data, skb->len, dtim_period);
a66098da 5203
f5bb87cf 5204 dev_kfree_skb(skb);
a66098da
LB		 5205 priv->beacon_skb = NULL;
5206}
5207
bcb628d5 5208enum {
9e1b17ea
LB		 5209 MWL8363 = 0,
5210 MWL8687,
bcb628d5 5211 MWL8366,
6f6d1e9a
LB		 5212};
5213
8a7a578c 5214#define MWL8K_8366_AP_FW_API 2
952a0e96
BC		 5215#define _MWL8K_8366_AP_FW(api) "mwl8k/fmimage_8366_ap-" #api ".fw"
5216#define MWL8K_8366_AP_FW(api) _MWL8K_8366_AP_FW(api)
5217
bcb628d5 5218static struct mwl8k_device_info mwl8k_info_tbl[] __devinitdata = {
9e1b17ea
LB		 5219 [MWL8363] = {
5220 .part_name = "88w8363",
5221 .helper_image = "mwl8k/helper_8363.fw",
0863ade8 5222 .fw_image_sta = "mwl8k/fmimage_8363.fw",
9e1b17ea 5223 },
49eb691c 5224 [MWL8687] = {
bcb628d5
JL		 5225 .part_name = "88w8687",
5226 .helper_image = "mwl8k/helper_8687.fw",
0863ade8 5227 .fw_image_sta = "mwl8k/fmimage_8687.fw",
bcb628d5 5228 },
49eb691c 5229 [MWL8366] = {
bcb628d5
JL		 5230 .part_name = "88w8366",
5231 .helper_image = "mwl8k/helper_8366.fw",
0863ade8 5232 .fw_image_sta = "mwl8k/fmimage_8366.fw",
952a0e96
BC		 5233 .fw_image_ap = MWL8K_8366_AP_FW(MWL8K_8366_AP_FW_API),
5234 .fw_api_ap = MWL8K_8366_AP_FW_API,
89a91f4f 5235 .ap_rxd_ops = &rxd_8366_ap_ops,
bcb628d5 5236 },
45a390dd
LB		 5237};
5238
c92d4ede
LB		 5239MODULE_FIRMWARE("mwl8k/helper_8363.fw");
5240MODULE_FIRMWARE("mwl8k/fmimage_8363.fw");
5241MODULE_FIRMWARE("mwl8k/helper_8687.fw");
5242MODULE_FIRMWARE("mwl8k/fmimage_8687.fw");
5243MODULE_FIRMWARE("mwl8k/helper_8366.fw");
5244MODULE_FIRMWARE("mwl8k/fmimage_8366.fw");
952a0e96 5245MODULE_FIRMWARE(MWL8K_8366_AP_FW(MWL8K_8366_AP_FW_API));
c92d4ede 5246
45a390dd 5247static DEFINE_PCI_DEVICE_TABLE(mwl8k_pci_id_table) = {
e5868ba1 5248 { PCI_VDEVICE(MARVELL, 0x2a0a), .driver_data = MWL8363, },
9e1b17ea
LB		 5249 { PCI_VDEVICE(MARVELL, 0x2a0c), .driver_data = MWL8363, },
5250 { PCI_VDEVICE(MARVELL, 0x2a24), .driver_data = MWL8363, },
bcb628d5
JL		 5251 { PCI_VDEVICE(MARVELL, 0x2a2b), .driver_data = MWL8687, },
5252 { PCI_VDEVICE(MARVELL, 0x2a30), .driver_data = MWL8687, },
5253 { PCI_VDEVICE(MARVELL, 0x2a40), .driver_data = MWL8366, },
ca66527c 5254 { PCI_VDEVICE(MARVELL, 0x2a43), .driver_data = MWL8366, },
bcb628d5 5255 { },
45a390dd
LB		 5256};
5257MODULE_DEVICE_TABLE(pci, mwl8k_pci_id_table);
5258
99020471
BC		 5259static int mwl8k_request_alt_fw(struct mwl8k_priv *priv)
5260{
5261 int rc;
5262 printk(KERN_ERR "%s: Error requesting preferred fw %s.\n"
5263 "Trying alternative firmware %s\n", pci_name(priv->pdev),
5264 priv->fw_pref, priv->fw_alt);
5265 rc = mwl8k_request_fw(priv, priv->fw_alt, &priv->fw_ucode, true);
5266 if (rc) {
5267 printk(KERN_ERR "%s: Error requesting alt fw %s\n",
5268 pci_name(priv->pdev), priv->fw_alt);
5269 return rc;
5270 }
5271 return 0;
5272}
5273
5274static int mwl8k_firmware_load_success(struct mwl8k_priv *priv);
5275static void mwl8k_fw_state_machine(const struct firmware *fw, void *context)
5276{
5277 struct mwl8k_priv *priv = context;
5278 struct mwl8k_device_info *di = priv->device_info;
5279 int rc;
5280
5281 switch (priv->fw_state) {
5282 case FW_STATE_INIT:
5283 if (!fw) {
5284 printk(KERN_ERR "%s: Error requesting helper fw %s\n",
5285 pci_name(priv->pdev), di->helper_image);
5286 goto fail;
5287 }
5288 priv->fw_helper = fw;
5289 rc = mwl8k_request_fw(priv, priv->fw_pref, &priv->fw_ucode,
5290 true);
5291 if (rc && priv->fw_alt) {
5292 rc = mwl8k_request_alt_fw(priv);
5293 if (rc)
5294 goto fail;
5295 priv->fw_state = FW_STATE_LOADING_ALT;
5296 } else if (rc)
5297 goto fail;
5298 else
5299 priv->fw_state = FW_STATE_LOADING_PREF;
5300 break;
5301
5302 case FW_STATE_LOADING_PREF:
5303 if (!fw) {
5304 if (priv->fw_alt) {
5305 rc = mwl8k_request_alt_fw(priv);
5306 if (rc)
5307 goto fail;
5308 priv->fw_state = FW_STATE_LOADING_ALT;
5309 } else
5310 goto fail;
5311 } else {
5312 priv->fw_ucode = fw;
5313 rc = mwl8k_firmware_load_success(priv);
5314 if (rc)
5315 goto fail;
5316 else
5317 complete(&priv->firmware_loading_complete);
5318 }
5319 break;
5320
5321 case FW_STATE_LOADING_ALT:
5322 if (!fw) {
5323 printk(KERN_ERR "%s: Error requesting alt fw %s\n",
5324 pci_name(priv->pdev), di->helper_image);
5325 goto fail;
5326 }
5327 priv->fw_ucode = fw;
5328 rc = mwl8k_firmware_load_success(priv);
5329 if (rc)
5330 goto fail;
5331 else
5332 complete(&priv->firmware_loading_complete);
5333 break;
5334
5335 default:
5336 printk(KERN_ERR "%s: Unexpected firmware loading state: %d\n",
5337 MWL8K_NAME, priv->fw_state);
5338 BUG_ON(1);
5339 }
5340
5341 return;
5342
5343fail:
5344 priv->fw_state = FW_STATE_ERROR;
5345 complete(&priv->firmware_loading_complete);
5346 device_release_driver(&priv->pdev->dev);
5347 mwl8k_release_firmware(priv);
5348}
5349
6b6accc3 5350#define MAX_RESTART_ATTEMPTS 1
99020471
BC		 5351static int mwl8k_init_firmware(struct ieee80211_hw *hw, char *fw_image,
5352 bool nowait)
a66098da 5353{
3cc7772c 5354 struct mwl8k_priv *priv = hw->priv;
a66098da 5355 int rc;
6b6accc3 5356 int count = MAX_RESTART_ATTEMPTS;
be695fc4 5357
6b6accc3 5358retry:
be695fc4
LB		 5359 /* Reset firmware and hardware */
5360 mwl8k_hw_reset(priv);
5361
5362 /* Ask userland hotplug daemon for the device firmware */
99020471 5363 rc = mwl8k_request_firmware(priv, fw_image, nowait);
be695fc4 5364 if (rc) {
5db55844 5365 wiphy_err(hw->wiphy, "Firmware files not found\n");
3cc7772c 5366 return rc;
be695fc4
LB		 5367 }
5368
99020471
BC		 5369 if (nowait)
5370 return rc;
5371
be695fc4
LB		 5372 /* Load firmware into hardware */
5373 rc = mwl8k_load_firmware(hw);
3cc7772c 5374 if (rc)
5db55844 5375 wiphy_err(hw->wiphy, "Cannot start firmware\n");
be695fc4
LB		 5376
5377 /* Reclaim memory once firmware is successfully loaded */
5378 mwl8k_release_firmware(priv);
5379
6b6accc3
YAP		 5380 if (rc && count) {
5381 /* FW did not start successfully;
5382 * lets try one more time
5383 */
5384 count--;
5385 wiphy_err(hw->wiphy, "Trying to reload the firmware again\n");
5386 msleep(20);
5387 goto retry;
5388 }
5389
3cc7772c
BC		 5390 return rc;
5391}
5392
73b46320
BC		 5393static int mwl8k_init_txqs(struct ieee80211_hw *hw)
5394{
5395 struct mwl8k_priv *priv = hw->priv;
5396 int rc = 0;
5397 int i;
5398
e600707b 5399 for (i = 0; i < mwl8k_tx_queues(priv); i++) {
73b46320
BC		 5400 rc = mwl8k_txq_init(hw, i);
5401 if (rc)
5402 break;
5403 if (priv->ap_fw)
5404 iowrite32(priv->txq[i].txd_dma,
5405 priv->sram + priv->txq_offset[i]);
5406 }
5407 return rc;
5408}
5409
3cc7772c
BC		 5410/* initialize hw after successfully loading a firmware image */
5411static int mwl8k_probe_hw(struct ieee80211_hw *hw)
5412{
5413 struct mwl8k_priv *priv = hw->priv;
5414 int rc = 0;
5415 int i;
be695fc4 5416
91942230 5417 if (priv->ap_fw) {
89a91f4f 5418 priv->rxd_ops = priv->device_info->ap_rxd_ops;
91942230 5419 if (priv->rxd_ops == NULL) {
c96c31e4
JP		 5420 wiphy_err(hw->wiphy,
5421 "Driver does not have AP firmware image support for this hardware\n");
91942230
LB		 5422 goto err_stop_firmware;
5423 }
5424 } else {
89a91f4f 5425 priv->rxd_ops = &rxd_sta_ops;
91942230 5426 }
be695fc4
LB		 5427
5428 priv->sniffer_enabled = false;
5429 priv->wmm_enabled = false;
5430 priv->pending_tx_pkts = 0;
5431
a66098da
LB		 5432 rc = mwl8k_rxq_init(hw, 0);
5433 if (rc)
3cc7772c 5434 goto err_stop_firmware;
a66098da
LB		 5435 rxq_refill(hw, 0, INT_MAX);
5436
73b46320
BC		 5437 /* For the sta firmware, we need to know the dma addresses of tx queues
5438 * before sending MWL8K_CMD_GET_HW_SPEC. So we must initialize them
5439 * prior to issuing this command. But for the AP case, we learn the
5440 * total number of queues from the result CMD_GET_HW_SPEC, so for this
5441 * case we must initialize the tx queues after.
5442 */
8a7a578c 5443 priv->num_ampdu_queues = 0;
73b46320
BC		 5444 if (!priv->ap_fw) {
5445 rc = mwl8k_init_txqs(hw);
a66098da
LB		 5446 if (rc)
5447 goto err_free_queues;
5448 }
5449
5450 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
c23b5a69 5451 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
3aefc37e
NS		 5452 iowrite32(MWL8K_A2H_INT_TX_DONE|MWL8K_A2H_INT_RX_READY|
5453 MWL8K_A2H_INT_BA_WATCHDOG,
1e9f9de3 5454 priv->regs + MWL8K_HIU_A2H_INTERRUPT_CLEAR_SEL);
12488e01
NS		 5455 iowrite32(MWL8K_A2H_INT_OPC_DONE,
5456 priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK);
a66098da 5457
a0607fd3 5458 rc = request_irq(priv->pdev->irq, mwl8k_interrupt,
a66098da
LB		 5459 IRQF_SHARED, MWL8K_NAME, hw);
5460 if (rc) {
5db55844 5461 wiphy_err(hw->wiphy, "failed to register IRQ handler\n");
a66098da
LB		 5462 goto err_free_queues;
5463 }
5464
6b6accc3
YAP		 5465 /*
5466 * When hw restart is requested,
5467 * mac80211 will take care of clearing
5468 * the ampdu streams, so do not clear
5469 * the ampdu state here
5470 */
5471 if (!priv->hw_restart_in_progress)
5472 memset(priv->ampdu, 0, sizeof(priv->ampdu));
ac109fd0 5473
a66098da
LB		 5474 /*
5475 * Temporarily enable interrupts. Initial firmware host
c2c2b12a 5476 * commands use interrupts and avoid polling. Disable
a66098da
LB		 5477 * interrupts when done.
5478 */
c23b5a69 5479 iowrite32(MWL8K_A2H_EVENTS, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
a66098da
LB		 5480
5481 /* Get config data, mac addrs etc */
42fba21d
LB		 5482 if (priv->ap_fw) {
5483 rc = mwl8k_cmd_get_hw_spec_ap(hw);
73b46320
BC		 5484 if (!rc)
5485 rc = mwl8k_init_txqs(hw);
42fba21d
LB		 5486 if (!rc)
5487 rc = mwl8k_cmd_set_hw_spec(hw);
5488 } else {
5489 rc = mwl8k_cmd_get_hw_spec_sta(hw);
5490 }
a66098da 5491 if (rc) {
5db55844 5492 wiphy_err(hw->wiphy, "Cannot initialise firmware\n");
be695fc4 5493 goto err_free_irq;
a66098da
LB		 5494 }
5495
5496 /* Turn radio off */
55489b6e 5497 rc = mwl8k_cmd_radio_disable(hw);
a66098da 5498 if (rc) {
5db55844 5499 wiphy_err(hw->wiphy, "Cannot disable\n");
be695fc4 5500 goto err_free_irq;
a66098da
LB		 5501 }
5502
32060e1b 5503 /* Clear MAC address */
aa21d0f6 5504 rc = mwl8k_cmd_set_mac_addr(hw, NULL, "\x00\x00\x00\x00\x00\x00");
32060e1b 5505 if (rc) {
5db55844 5506 wiphy_err(hw->wiphy, "Cannot clear MAC address\n");
be695fc4 5507 goto err_free_irq;
32060e1b
LB		 5508 }
5509
a66098da 5510 /* Disable interrupts */
a66098da 5511 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
a66098da
LB		 5512 free_irq(priv->pdev->irq, hw);
5513
c96c31e4
JP		 5514 wiphy_info(hw->wiphy, "%s v%d, %pm, %s firmware %u.%u.%u.%u\n",
5515 priv->device_info->part_name,
5516 priv->hw_rev, hw->wiphy->perm_addr,
5517 priv->ap_fw ? "AP" : "STA",
5518 (priv->fw_rev >> 24) & 0xff, (priv->fw_rev >> 16) & 0xff,
5519 (priv->fw_rev >> 8) & 0xff, priv->fw_rev & 0xff);
a66098da
LB		 5520
5521 return 0;
5522
a66098da 5523err_free_irq:
a66098da 5524 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
a66098da
LB		 5525 free_irq(priv->pdev->irq, hw);
5526
5527err_free_queues:
e600707b 5528 for (i = 0; i < mwl8k_tx_queues(priv); i++)
a66098da
LB		 5529 mwl8k_txq_deinit(hw, i);
5530 mwl8k_rxq_deinit(hw, 0);
5531
3cc7772c
BC		 5532err_stop_firmware:
5533 mwl8k_hw_reset(priv);
5534
5535 return rc;
5536}
5537
5538/*
5539 * invoke mwl8k_reload_firmware to change the firmware image after the device
5540 * has already been registered
5541 */
5542static int mwl8k_reload_firmware(struct ieee80211_hw *hw, char *fw_image)
5543{
5544 int i, rc = 0;
5545 struct mwl8k_priv *priv = hw->priv;
6b6accc3 5546 struct mwl8k_vif *vif, *tmp_vif;
3cc7772c
BC		 5547
5548 mwl8k_stop(hw);
5549 mwl8k_rxq_deinit(hw, 0);
5550
6b6accc3
YAP		 5551 /*
5552 * All the existing interfaces are re-added by the ieee80211_reconfig;
5553 * which means driver should remove existing interfaces before calling
5554 * ieee80211_restart_hw
5555 */
5556 if (priv->hw_restart_in_progress)
5557 list_for_each_entry_safe(vif, tmp_vif, &priv->vif_list, list)
5558 mwl8k_remove_vif(priv, vif);
5559
e600707b 5560 for (i = 0; i < mwl8k_tx_queues(priv); i++)
3cc7772c
BC		 5561 mwl8k_txq_deinit(hw, i);
5562
99020471 5563 rc = mwl8k_init_firmware(hw, fw_image, false);
3cc7772c
BC		 5564 if (rc)
5565 goto fail;
5566
5567 rc = mwl8k_probe_hw(hw);
5568 if (rc)
5569 goto fail;
5570
6b6accc3
YAP		 5571 if (priv->hw_restart_in_progress)
5572 return rc;
5573
3cc7772c
BC		 5574 rc = mwl8k_start(hw);
5575 if (rc)
5576 goto fail;
5577
5578 rc = mwl8k_config(hw, ~0);
5579 if (rc)
5580 goto fail;
5581
e600707b 5582 for (i = 0; i < MWL8K_TX_WMM_QUEUES; i++) {
8a3a3c85 5583 rc = mwl8k_conf_tx(hw, NULL, i, &priv->wmm_params[i]);
3cc7772c
BC		 5584 if (rc)
5585 goto fail;
5586 }
5587
5588 return rc;
5589
5590fail:
5591 printk(KERN_WARNING "mwl8k: Failed to reload firmware image.\n");
5592 return rc;
5593}
5594
5595static int mwl8k_firmware_load_success(struct mwl8k_priv *priv)
5596{
5597 struct ieee80211_hw *hw = priv->hw;
5598 int i, rc;
5599
99020471
BC		 5600 rc = mwl8k_load_firmware(hw);
5601 mwl8k_release_firmware(priv);
5602 if (rc) {
5603 wiphy_err(hw->wiphy, "Cannot start firmware\n");
5604 return rc;
5605 }
5606
3cc7772c
BC		 5607 /*
5608 * Extra headroom is the size of the required DMA header
5609 * minus the size of the smallest 802.11 frame (CTS frame).
5610 */
5611 hw->extra_tx_headroom =
5612 sizeof(struct mwl8k_dma_data) - sizeof(struct ieee80211_cts);
5613
ff776cec
YAP		 5614 hw->extra_tx_headroom -= priv->ap_fw ? REDUCED_TX_HEADROOM : 0;
5615
3cc7772c
BC		 5616 hw->channel_change_time = 10;
5617
e600707b 5618 hw->queues = MWL8K_TX_WMM_QUEUES;
3cc7772c
BC		 5619
5620 /* Set rssi values to dBm */
0bf22c37 5621 hw->flags |= IEEE80211_HW_SIGNAL_DBM | IEEE80211_HW_HAS_RATE_CONTROL;
2a36a0ec
YAP		 5622
5623 /*
5624 * Ask mac80211 to not to trigger PS mode
5625 * based on PM bit of incoming frames.
5626 */
5627 if (priv->ap_fw)
5628 hw->flags |= IEEE80211_HW_AP_LINK_PS;
5629
3cc7772c
BC		 5630 hw->vif_data_size = sizeof(struct mwl8k_vif);
5631 hw->sta_data_size = sizeof(struct mwl8k_sta);
5632
5633 priv->macids_used = 0;
5634 INIT_LIST_HEAD(&priv->vif_list);
5635
5636 /* Set default radio state and preamble */
3db1cd5c
RR		 5637 priv->radio_on = false;
5638 priv->radio_short_preamble = false;
3cc7772c
BC		 5639
5640 /* Finalize join worker */
5641 INIT_WORK(&priv->finalize_join_worker, mwl8k_finalize_join_worker);
3aefc37e
NS		 5642 /* Handle watchdog ba events */
5643 INIT_WORK(&priv->watchdog_ba_handle, mwl8k_watchdog_ba_events);
6b6accc3
YAP		 5644 /* To reload the firmware if it crashes */
5645 INIT_WORK(&priv->fw_reload, mwl8k_hw_restart_work);
3cc7772c
BC		 5646
5647 /* TX reclaim and RX tasklets. */
5648 tasklet_init(&priv->poll_tx_task, mwl8k_tx_poll, (unsigned long)hw);
5649 tasklet_disable(&priv->poll_tx_task);
5650 tasklet_init(&priv->poll_rx_task, mwl8k_rx_poll, (unsigned long)hw);
5651 tasklet_disable(&priv->poll_rx_task);
5652
5653 /* Power management cookie */
5654 priv->cookie = pci_alloc_consistent(priv->pdev, 4, &priv->cookie_dma);
5655 if (priv->cookie == NULL)
5656 return -ENOMEM;
5657
5658 mutex_init(&priv->fw_mutex);
5659 priv->fw_mutex_owner = NULL;
5660 priv->fw_mutex_depth = 0;
5661 priv->hostcmd_wait = NULL;
5662
5663 spin_lock_init(&priv->tx_lock);
5664
ac109fd0
BC		 5665 spin_lock_init(&priv->stream_lock);
5666
3cc7772c
BC		 5667 priv->tx_wait = NULL;
5668
5669 rc = mwl8k_probe_hw(hw);
5670 if (rc)
5671 goto err_free_cookie;
5672
5673 hw->wiphy->interface_modes = 0;
5674 if (priv->ap_macids_supported || priv->device_info->fw_image_ap)
5675 hw->wiphy->interface_modes |= BIT(NL80211_IFTYPE_AP);
5676 if (priv->sta_macids_supported || priv->device_info->fw_image_sta)
5677 hw->wiphy->interface_modes |= BIT(NL80211_IFTYPE_STATION);
5678
5679 rc = ieee80211_register_hw(hw);
5680 if (rc) {
5681 wiphy_err(hw->wiphy, "Cannot register device\n");
5682 goto err_unprobe_hw;
5683 }
5684
5685 return 0;
5686
5687err_unprobe_hw:
e600707b 5688 for (i = 0; i < mwl8k_tx_queues(priv); i++)
3cc7772c
BC		 5689 mwl8k_txq_deinit(hw, i);
5690 mwl8k_rxq_deinit(hw, 0);
5691
be695fc4 5692err_free_cookie:
a66098da
LB		 5693 if (priv->cookie != NULL)
5694 pci_free_consistent(priv->pdev, 4,
5695 priv->cookie, priv->cookie_dma);
5696
3cc7772c
BC		 5697 return rc;
5698}
5699static int __devinit mwl8k_probe(struct pci_dev *pdev,
5700 const struct pci_device_id *id)
5701{
5702 static int printed_version;
5703 struct ieee80211_hw *hw;
5704 struct mwl8k_priv *priv;
0863ade8 5705 struct mwl8k_device_info *di;
3cc7772c
BC		 5706 int rc;
5707
5708 if (!printed_version) {
5709 printk(KERN_INFO "%s version %s\n", MWL8K_DESC, MWL8K_VERSION);
5710 printed_version = 1;
5711 }
5712
5713
5714 rc = pci_enable_device(pdev);
5715 if (rc) {
5716 printk(KERN_ERR "%s: Cannot enable new PCI device\n",
5717 MWL8K_NAME);
5718 return rc;
5719 }
5720
5721 rc = pci_request_regions(pdev, MWL8K_NAME);
5722 if (rc) {
5723 printk(KERN_ERR "%s: Cannot obtain PCI resources\n",
5724 MWL8K_NAME);
5725 goto err_disable_device;
5726 }
5727
5728 pci_set_master(pdev);
5729
5730
5731 hw = ieee80211_alloc_hw(sizeof(*priv), &mwl8k_ops);
5732 if (hw == NULL) {
5733 printk(KERN_ERR "%s: ieee80211 alloc failed\n", MWL8K_NAME);
5734 rc = -ENOMEM;
5735 goto err_free_reg;
5736 }
5737
5738 SET_IEEE80211_DEV(hw, &pdev->dev);
5739 pci_set_drvdata(pdev, hw);
5740
5741 priv = hw->priv;
5742 priv->hw = hw;
5743 priv->pdev = pdev;
5744 priv->device_info = &mwl8k_info_tbl[id->driver_data];
5745
5746
5747 priv->sram = pci_iomap(pdev, 0, 0x10000);
5748 if (priv->sram == NULL) {
5749 wiphy_err(hw->wiphy, "Cannot map device SRAM\n");
5750 goto err_iounmap;
5751 }
5752
5753 /*
5754 * If BAR0 is a 32 bit BAR, the register BAR will be BAR1.
5755 * If BAR0 is a 64 bit BAR, the register BAR will be BAR2.
5756 */
5757 priv->regs = pci_iomap(pdev, 1, 0x10000);
5758 if (priv->regs == NULL) {
5759 priv->regs = pci_iomap(pdev, 2, 0x10000);
5760 if (priv->regs == NULL) {
5761 wiphy_err(hw->wiphy, "Cannot map device registers\n");
5762 goto err_iounmap;
5763 }
5764 }
5765
0863ade8 5766 /*
99020471
BC		 5767 * Choose the initial fw image depending on user input. If a second
5768 * image is available, make it the alternative image that will be
5769 * loaded if the first one fails.
0863ade8 5770 */
99020471 5771 init_completion(&priv->firmware_loading_complete);
0863ade8 5772 di = priv->device_info;
99020471
BC		 5773 if (ap_mode_default && di->fw_image_ap) {
5774 priv->fw_pref = di->fw_image_ap;
5775 priv->fw_alt = di->fw_image_sta;
5776 } else if (!ap_mode_default && di->fw_image_sta) {
5777 priv->fw_pref = di->fw_image_sta;
5778 priv->fw_alt = di->fw_image_ap;
5779 } else if (ap_mode_default && !di->fw_image_ap && di->fw_image_sta) {
0863ade8 5780 printk(KERN_WARNING "AP fw is unavailable. Using STA fw.");
99020471 5781 priv->fw_pref = di->fw_image_sta;
0863ade8
BC		 5782 } else if (!ap_mode_default && !di->fw_image_sta && di->fw_image_ap) {
5783 printk(KERN_WARNING "STA fw is unavailable. Using AP fw.");
99020471
BC		 5784 priv->fw_pref = di->fw_image_ap;
5785 }
5786 rc = mwl8k_init_firmware(hw, priv->fw_pref, true);
3cc7772c
BC		 5787 if (rc)
5788 goto err_stop_firmware;
6b6accc3
YAP		 5789
5790 priv->hw_restart_in_progress = false;
5791
99020471 5792 return rc;
3cc7772c 5793
be695fc4
LB		 5794err_stop_firmware:
5795 mwl8k_hw_reset(priv);
be695fc4
LB		 5796
5797err_iounmap:
a66098da
LB		 5798 if (priv->regs != NULL)
5799 pci_iounmap(pdev, priv->regs);
5800
5b9482dd
LB		 5801 if (priv->sram != NULL)
5802 pci_iounmap(pdev, priv->sram);
5803
a66098da
LB		 5804 pci_set_drvdata(pdev, NULL);
5805 ieee80211_free_hw(hw);
5806
5807err_free_reg:
5808 pci_release_regions(pdev);
3db95e50
LB		 5809
5810err_disable_device:
a66098da
LB		 5811 pci_disable_device(pdev);
5812
5813 return rc;
5814}
5815
230f7af0 5816static void __devexit mwl8k_shutdown(struct pci_dev *pdev)
a66098da
LB		 5817{
5818 printk(KERN_ERR "===>%s(%u)\n", __func__, __LINE__);
5819}
5820
230f7af0 5821static void __devexit mwl8k_remove(struct pci_dev *pdev)
a66098da
LB		 5822{
5823 struct ieee80211_hw *hw = pci_get_drvdata(pdev);
5824 struct mwl8k_priv *priv;
5825 int i;
5826
5827 if (hw == NULL)
5828 return;
5829 priv = hw->priv;
5830
99020471
BC		 5831 wait_for_completion(&priv->firmware_loading_complete);
5832
5833 if (priv->fw_state == FW_STATE_ERROR) {
5834 mwl8k_hw_reset(priv);
5835 goto unmap;
5836 }
5837
a66098da
LB		 5838 ieee80211_stop_queues(hw);
5839
60aa569f
LB		 5840 ieee80211_unregister_hw(hw);
5841
67e2eb27 5842 /* Remove TX reclaim and RX tasklets. */
1e9f9de3 5843 tasklet_kill(&priv->poll_tx_task);
67e2eb27 5844 tasklet_kill(&priv->poll_rx_task);
a66098da 5845
a66098da
LB		 5846 /* Stop hardware */
5847 mwl8k_hw_reset(priv);
5848
5849 /* Return all skbs to mac80211 */
e600707b 5850 for (i = 0; i < mwl8k_tx_queues(priv); i++)
efb7c49a 5851 mwl8k_txq_reclaim(hw, i, INT_MAX, 1);
a66098da 5852
e600707b 5853 for (i = 0; i < mwl8k_tx_queues(priv); i++)
a66098da
LB		 5854 mwl8k_txq_deinit(hw, i);
5855
5856 mwl8k_rxq_deinit(hw, 0);
5857
c2c357ce 5858 pci_free_consistent(priv->pdev, 4, priv->cookie, priv->cookie_dma);
a66098da 5859
99020471 5860unmap:
a66098da 5861 pci_iounmap(pdev, priv->regs);
5b9482dd 5862 pci_iounmap(pdev, priv->sram);
a66098da
LB		 5863 pci_set_drvdata(pdev, NULL);
5864 ieee80211_free_hw(hw);
5865 pci_release_regions(pdev);
5866 pci_disable_device(pdev);
5867}
5868
5869static struct pci_driver mwl8k_driver = {
5870 .name = MWL8K_NAME,
45a390dd 5871 .id_table = mwl8k_pci_id_table,
a66098da
LB		 5872 .probe = mwl8k_probe,
5873 .remove = __devexit_p(mwl8k_remove),
5874 .shutdown = __devexit_p(mwl8k_shutdown),
5875};
5876
5877static int __init mwl8k_init(void)
5878{
5879 return pci_register_driver(&mwl8k_driver);
5880}
5881
5882static void __exit mwl8k_exit(void)
5883{
5884 pci_unregister_driver(&mwl8k_driver);
5885}
5886
5887module_init(mwl8k_init);
5888module_exit(mwl8k_exit);
c2c357ce
LB		 5889
5890MODULE_DESCRIPTION(MWL8K_DESC);
5891MODULE_VERSION(MWL8K_VERSION);
5892MODULE_AUTHOR("Lennert Buytenhek <buytenh@marvell.com>");
5893MODULE_LICENSE("GPL");
Linux kernel - Deliverables
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