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32ddf071 CL |
1 | #ifndef P54_H |
2 | #define P54_H | |
eff1a59c MW |
3 | |
4 | /* | |
5 | * Shared defines for all mac80211 Prism54 code | |
6 | * | |
7 | * Copyright (c) 2006, Michael Wu <flamingice@sourmilk.net> | |
8 | * | |
9 | * Based on the islsm (softmac prism54) driver, which is: | |
10 | * Copyright 2004-2006 Jean-Baptiste Note <jbnote@gmail.com>, et al. | |
11 | * | |
12 | * This program is free software; you can redistribute it and/or modify | |
13 | * it under the terms of the GNU General Public License version 2 as | |
14 | * published by the Free Software Foundation. | |
15 | */ | |
16 | ||
27df605e | 17 | enum p54_control_frame_types { |
5e73444e | 18 | P54_CONTROL_TYPE_SETUP = 0, |
27df605e JL |
19 | P54_CONTROL_TYPE_SCAN, |
20 | P54_CONTROL_TYPE_TRAP, | |
eff1a59c | 21 | P54_CONTROL_TYPE_DCFINIT, |
27df605e | 22 | P54_CONTROL_TYPE_RX_KEYCACHE, |
19c19d54 | 23 | P54_CONTROL_TYPE_TIM, |
27df605e JL |
24 | P54_CONTROL_TYPE_PSM, |
25 | P54_CONTROL_TYPE_TXCANCEL, | |
eff1a59c | 26 | P54_CONTROL_TYPE_TXDONE, |
27df605e | 27 | P54_CONTROL_TYPE_BURST, |
eff1a59c MW |
28 | P54_CONTROL_TYPE_STAT_READBACK, |
29 | P54_CONTROL_TYPE_BBP, | |
30 | P54_CONTROL_TYPE_EEPROM_READBACK, | |
19c19d54 CL |
31 | P54_CONTROL_TYPE_LED, |
32 | P54_CONTROL_TYPE_GPIO, | |
33 | P54_CONTROL_TYPE_TIMER, | |
34 | P54_CONTROL_TYPE_MODULATION, | |
35 | P54_CONTROL_TYPE_SYNTH_CONFIG, | |
36 | P54_CONTROL_TYPE_DETECTOR_VALUE, | |
37 | P54_CONTROL_TYPE_XBOW_SYNTH_CFG, | |
38 | P54_CONTROL_TYPE_CCE_QUIET, | |
39 | P54_CONTROL_TYPE_PSM_STA_UNLOCK, | |
27df605e JL |
40 | P54_CONTROL_TYPE_PCS, |
41 | P54_CONTROL_TYPE_BT_BALANCER = 28, | |
42 | P54_CONTROL_TYPE_GROUP_ADDRESS_TABLE = 30, | |
43 | P54_CONTROL_TYPE_ARPTABLE = 31, | |
44 | P54_CONTROL_TYPE_BT_OPTIONS = 35 | |
eff1a59c MW |
45 | }; |
46 | ||
63f2dc9f CL |
47 | #define P54_MAX_CTRL_FRAME_LEN 0x1000 |
48 | ||
0a5ec96a CL |
49 | #define P54_HDR_FLAG_CONTROL BIT(15) |
50 | #define P54_HDR_FLAG_CONTROL_OPSET (BIT(15) + BIT(0)) | |
51 | ||
27df605e JL |
52 | struct p54_hdr { |
53 | __le16 flags; | |
eff1a59c MW |
54 | __le16 len; |
55 | __le32 req_id; | |
27df605e JL |
56 | __le16 type; /* enum p54_control_frame_types */ |
57 | u8 rts_tries; | |
58 | u8 tries; | |
eff1a59c MW |
59 | u8 data[0]; |
60 | } __attribute__ ((packed)); | |
61 | ||
0a5ec96a CL |
62 | #define FREE_AFTER_TX(skb) \ |
63 | ((((struct p54_hdr *) ((struct sk_buff *) skb)->data)-> \ | |
64 | flags) == cpu_to_le16(P54_HDR_FLAG_CONTROL_OPSET)) | |
65 | ||
0fdd7c5d CL |
66 | struct p54_edcf_queue_param { |
67 | __le16 aifs; | |
68 | __le16 cwmin; | |
69 | __le16 cwmax; | |
70 | __le16 txop; | |
71 | } __attribute__ ((packed)); | |
72 | ||
69ba3e5d CL |
73 | struct p54_rssi_linear_approximation { |
74 | s16 mul; | |
75 | s16 add; | |
76 | s16 longbow_unkn; | |
77 | s16 longbow_unk2; | |
78 | }; | |
79 | ||
7cb77072 | 80 | #define EEPROM_READBACK_LEN 0x3fc |
eff1a59c MW |
81 | |
82 | #define ISL38XX_DEV_FIRMWARE_ADDR 0x20000 | |
83 | ||
2b80848e CL |
84 | #define FW_FMAC 0x464d4143 |
85 | #define FW_LM86 0x4c4d3836 | |
86 | #define FW_LM87 0x4c4d3837 | |
87 | #define FW_LM20 0x4c4d3230 | |
88 | ||
eff1a59c | 89 | struct p54_common { |
54fdb040 | 90 | struct ieee80211_hw *hw; |
eff1a59c MW |
91 | u32 rx_start; |
92 | u32 rx_end; | |
93 | struct sk_buff_head tx_queue; | |
0a5ec96a | 94 | void (*tx)(struct ieee80211_hw *dev, struct sk_buff *skb); |
eff1a59c MW |
95 | int (*open)(struct ieee80211_hw *dev); |
96 | void (*stop)(struct ieee80211_hw *dev); | |
97 | int mode; | |
4e416a6f CL |
98 | u16 rx_mtu; |
99 | u8 headroom; | |
100 | u8 tailroom; | |
6041e2a0 | 101 | struct mutex conf_mutex; |
4150c572 JB |
102 | u8 mac_addr[ETH_ALEN]; |
103 | u8 bssid[ETH_ALEN]; | |
78eb7484 CL |
104 | u8 rx_diversity_mask; |
105 | u8 tx_diversity_mask; | |
eff1a59c MW |
106 | struct pda_iq_autocal_entry *iq_autocal; |
107 | unsigned int iq_autocal_len; | |
108 | struct pda_channel_output_limit *output_limit; | |
109 | unsigned int output_limit_len; | |
110 | struct pda_pa_curve_data *curve_data; | |
69ba3e5d | 111 | struct p54_rssi_linear_approximation rssical_db[IEEE80211_NUM_BANDS]; |
78d57eb2 | 112 | unsigned int filter_flags; |
40333e4f | 113 | bool use_short_slot; |
7cb77072 | 114 | u16 rxhw; |
eff1a59c MW |
115 | u8 version; |
116 | unsigned int tx_hdr_len; | |
eff1a59c | 117 | unsigned int fw_var; |
2b80848e | 118 | unsigned int fw_interface; |
09adf284 | 119 | unsigned int output_power; |
a0db663f CL |
120 | u32 tsf_low32; |
121 | u32 tsf_high32; | |
ced09574 CL |
122 | u64 basic_rate_mask; |
123 | u16 wakeup_timer; | |
124 | u16 aid; | |
84df3ed3 | 125 | struct ieee80211_tx_queue_stats tx_stats[8]; |
0fdd7c5d | 126 | struct p54_edcf_queue_param qos_params[8]; |
cc6de669 | 127 | struct ieee80211_low_level_stats stats; |
54fdb040 | 128 | struct delayed_work work; |
e5ea92a7 | 129 | struct sk_buff *cached_beacon; |
cc6de669 | 130 | int noise; |
7cb77072 CL |
131 | void *eeprom; |
132 | struct completion eeprom_comp; | |
25900ef0 CL |
133 | u8 privacy_caps; |
134 | u8 rx_keycache_size; | |
eff1a59c MW |
135 | }; |
136 | ||
137 | int p54_rx(struct ieee80211_hw *dev, struct sk_buff *skb); | |
b92f30d6 | 138 | void p54_free_skb(struct ieee80211_hw *dev, struct sk_buff *skb); |
4e416a6f | 139 | int p54_parse_firmware(struct ieee80211_hw *dev, const struct firmware *fw); |
7cb77072 | 140 | int p54_read_eeprom(struct ieee80211_hw *dev); |
eff1a59c MW |
141 | struct ieee80211_hw *p54_init_common(size_t priv_data_len); |
142 | void p54_free_common(struct ieee80211_hw *dev); | |
143 | ||
32ddf071 | 144 | #endif /* P54_H */ |