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1da177e4 LT |
1 | /* |
2 | * | |
3 | * Copyright (C) 2002 Intersil Americas Inc. | |
4 | * Copyright (C) 2003-2004 Luis R. Rodriguez <mcgrof@ruslug.rutgers.edu>_ | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License as published by | |
8 | * the Free Software Foundation; either version 2 of the License | |
9 | * | |
10 | * This program is distributed in the hope that it will be useful, | |
11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
13 | * GNU General Public License for more details. | |
14 | * | |
15 | * You should have received a copy of the GNU General Public License | |
16 | * along with this program; if not, write to the Free Software | |
17 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
18 | * | |
19 | */ | |
20 | ||
1da177e4 LT |
21 | #include <linux/module.h> |
22 | #include <linux/types.h> | |
23 | #include <linux/delay.h> | |
24 | ||
25 | #include <asm/uaccess.h> | |
26 | #include <asm/io.h> | |
27 | ||
28 | #include "prismcompat.h" | |
29 | #include "isl_38xx.h" | |
30 | #include "islpci_dev.h" | |
31 | #include "islpci_mgt.h" | |
32 | ||
33 | /****************************************************************************** | |
34 | Device Interface & Control functions | |
35 | ******************************************************************************/ | |
36 | ||
37 | /** | |
38 | * isl38xx_disable_interrupts - disable all interrupts | |
39 | * @device: pci memory base address | |
40 | * | |
41 | * Instructs the device to disable all interrupt reporting by asserting | |
42 | * the IRQ line. New events may still show up in the interrupt identification | |
43 | * register located at offset %ISL38XX_INT_IDENT_REG. | |
44 | */ | |
45 | void | |
46 | isl38xx_disable_interrupts(void __iomem *device) | |
47 | { | |
48 | isl38xx_w32_flush(device, 0x00000000, ISL38XX_INT_EN_REG); | |
49 | udelay(ISL38XX_WRITEIO_DELAY); | |
50 | } | |
51 | ||
52 | void | |
53 | isl38xx_handle_sleep_request(isl38xx_control_block *control_block, | |
54 | int *powerstate, void __iomem *device_base) | |
55 | { | |
56 | /* device requests to go into sleep mode | |
57 | * check whether the transmit queues for data and management are empty */ | |
58 | if (isl38xx_in_queue(control_block, ISL38XX_CB_TX_DATA_LQ)) | |
59 | /* data tx queue not empty */ | |
60 | return; | |
61 | ||
62 | if (isl38xx_in_queue(control_block, ISL38XX_CB_TX_MGMTQ)) | |
63 | /* management tx queue not empty */ | |
64 | return; | |
65 | ||
66 | /* check also whether received frames are pending */ | |
67 | if (isl38xx_in_queue(control_block, ISL38XX_CB_RX_DATA_LQ)) | |
68 | /* data rx queue not empty */ | |
69 | return; | |
70 | ||
71 | if (isl38xx_in_queue(control_block, ISL38XX_CB_RX_MGMTQ)) | |
72 | /* management rx queue not empty */ | |
73 | return; | |
74 | ||
75 | #if VERBOSE > SHOW_ERROR_MESSAGES | |
76 | DEBUG(SHOW_TRACING, "Device going to sleep mode\n"); | |
77 | #endif | |
78 | ||
79 | /* all queues are empty, allow the device to go into sleep mode */ | |
80 | *powerstate = ISL38XX_PSM_POWERSAVE_STATE; | |
81 | ||
82 | /* assert the Sleep interrupt in the Device Interrupt Register */ | |
83 | isl38xx_w32_flush(device_base, ISL38XX_DEV_INT_SLEEP, | |
84 | ISL38XX_DEV_INT_REG); | |
85 | udelay(ISL38XX_WRITEIO_DELAY); | |
86 | } | |
87 | ||
88 | void | |
89 | isl38xx_handle_wakeup(isl38xx_control_block *control_block, | |
90 | int *powerstate, void __iomem *device_base) | |
91 | { | |
92 | /* device is in active state, update the powerstate flag */ | |
93 | *powerstate = ISL38XX_PSM_ACTIVE_STATE; | |
94 | ||
95 | /* now check whether there are frames pending for the card */ | |
96 | if (!isl38xx_in_queue(control_block, ISL38XX_CB_TX_DATA_LQ) | |
97 | && !isl38xx_in_queue(control_block, ISL38XX_CB_TX_MGMTQ)) | |
98 | return; | |
99 | ||
100 | #if VERBOSE > SHOW_ERROR_MESSAGES | |
101 | DEBUG(SHOW_ANYTHING, "Wake up handler trigger the device\n"); | |
102 | #endif | |
103 | ||
104 | /* either data or management transmit queue has a frame pending | |
105 | * trigger the device by setting the Update bit in the Device Int reg */ | |
106 | isl38xx_w32_flush(device_base, ISL38XX_DEV_INT_UPDATE, | |
107 | ISL38XX_DEV_INT_REG); | |
108 | udelay(ISL38XX_WRITEIO_DELAY); | |
109 | } | |
110 | ||
111 | void | |
112 | isl38xx_trigger_device(int asleep, void __iomem *device_base) | |
113 | { | |
1da177e4 LT |
114 | u32 reg, counter = 0; |
115 | ||
116 | #if VERBOSE > SHOW_ERROR_MESSAGES | |
05ab195c | 117 | struct timeval current_time; |
1da177e4 LT |
118 | DEBUG(SHOW_FUNCTION_CALLS, "isl38xx trigger device\n"); |
119 | #endif | |
120 | ||
121 | /* check whether the device is in power save mode */ | |
122 | if (asleep) { | |
123 | /* device is in powersave, trigger the device for wakeup */ | |
124 | #if VERBOSE > SHOW_ERROR_MESSAGES | |
125 | do_gettimeofday(¤t_time); | |
126 | DEBUG(SHOW_TRACING, "%08li.%08li Device wakeup triggered\n", | |
127 | current_time.tv_sec, (long)current_time.tv_usec); | |
1da177e4 LT |
128 | |
129 | DEBUG(SHOW_TRACING, "%08li.%08li Device register read %08x\n", | |
130 | current_time.tv_sec, (long)current_time.tv_usec, | |
131 | readl(device_base + ISL38XX_CTRL_STAT_REG)); | |
05ab195c | 132 | #endif |
1da177e4 LT |
133 | udelay(ISL38XX_WRITEIO_DELAY); |
134 | ||
135 | reg = readl(device_base + ISL38XX_INT_IDENT_REG); | |
136 | if (reg == 0xabadface) { | |
137 | #if VERBOSE > SHOW_ERROR_MESSAGES | |
138 | do_gettimeofday(¤t_time); | |
139 | DEBUG(SHOW_TRACING, | |
140 | "%08li.%08li Device register abadface\n", | |
141 | current_time.tv_sec, (long)current_time.tv_usec); | |
142 | #endif | |
143 | /* read the Device Status Register until Sleepmode bit is set */ | |
144 | while (reg = readl(device_base + ISL38XX_CTRL_STAT_REG), | |
145 | (reg & ISL38XX_CTRL_STAT_SLEEPMODE) == 0) { | |
146 | udelay(ISL38XX_WRITEIO_DELAY); | |
147 | counter++; | |
148 | } | |
149 | ||
05ab195c | 150 | #if VERBOSE > SHOW_ERROR_MESSAGES |
1da177e4 LT |
151 | DEBUG(SHOW_TRACING, |
152 | "%08li.%08li Device register read %08x\n", | |
153 | current_time.tv_sec, (long)current_time.tv_usec, | |
154 | readl(device_base + ISL38XX_CTRL_STAT_REG)); | |
05ab195c | 155 | #endif |
1da177e4 LT |
156 | udelay(ISL38XX_WRITEIO_DELAY); |
157 | ||
158 | #if VERBOSE > SHOW_ERROR_MESSAGES | |
159 | do_gettimeofday(¤t_time); | |
160 | DEBUG(SHOW_TRACING, | |
161 | "%08li.%08li Device asleep counter %i\n", | |
162 | current_time.tv_sec, (long)current_time.tv_usec, | |
163 | counter); | |
164 | #endif | |
165 | } | |
166 | /* assert the Wakeup interrupt in the Device Interrupt Register */ | |
167 | isl38xx_w32_flush(device_base, ISL38XX_DEV_INT_WAKEUP, | |
168 | ISL38XX_DEV_INT_REG); | |
169 | udelay(ISL38XX_WRITEIO_DELAY); | |
170 | ||
171 | /* perform another read on the Device Status Register */ | |
172 | reg = readl(device_base + ISL38XX_CTRL_STAT_REG); | |
173 | udelay(ISL38XX_WRITEIO_DELAY); | |
174 | ||
175 | #if VERBOSE > SHOW_ERROR_MESSAGES | |
176 | do_gettimeofday(¤t_time); | |
177 | DEBUG(SHOW_TRACING, "%08li.%08li Device register read %08x\n", | |
178 | current_time.tv_sec, (long)current_time.tv_usec, reg); | |
179 | #endif | |
180 | } else { | |
181 | /* device is (still) awake */ | |
182 | #if VERBOSE > SHOW_ERROR_MESSAGES | |
183 | DEBUG(SHOW_TRACING, "Device is in active state\n"); | |
184 | #endif | |
185 | /* trigger the device by setting the Update bit in the Device Int reg */ | |
186 | ||
187 | isl38xx_w32_flush(device_base, ISL38XX_DEV_INT_UPDATE, | |
188 | ISL38XX_DEV_INT_REG); | |
189 | udelay(ISL38XX_WRITEIO_DELAY); | |
190 | } | |
191 | } | |
192 | ||
193 | void | |
194 | isl38xx_interface_reset(void __iomem *device_base, dma_addr_t host_address) | |
195 | { | |
196 | #if VERBOSE > SHOW_ERROR_MESSAGES | |
197 | DEBUG(SHOW_FUNCTION_CALLS, "isl38xx_interface_reset\n"); | |
198 | #endif | |
199 | ||
200 | /* load the address of the control block in the device */ | |
201 | isl38xx_w32_flush(device_base, host_address, ISL38XX_CTRL_BLK_BASE_REG); | |
202 | udelay(ISL38XX_WRITEIO_DELAY); | |
203 | ||
204 | /* set the reset bit in the Device Interrupt Register */ | |
205 | isl38xx_w32_flush(device_base, ISL38XX_DEV_INT_RESET, ISL38XX_DEV_INT_REG); | |
206 | udelay(ISL38XX_WRITEIO_DELAY); | |
207 | ||
208 | /* enable the interrupt for detecting initialization */ | |
209 | ||
210 | /* Note: Do not enable other interrupts here. We want the | |
211 | * device to have come up first 100% before allowing any other | |
212 | * interrupts. */ | |
213 | isl38xx_w32_flush(device_base, ISL38XX_INT_IDENT_INIT, ISL38XX_INT_EN_REG); | |
214 | udelay(ISL38XX_WRITEIO_DELAY); /* allow complete full reset */ | |
215 | } | |
216 | ||
217 | void | |
218 | isl38xx_enable_common_interrupts(void __iomem *device_base) { | |
219 | u32 reg; | |
220 | reg = ( ISL38XX_INT_IDENT_UPDATE | | |
221 | ISL38XX_INT_IDENT_SLEEP | ISL38XX_INT_IDENT_WAKEUP); | |
222 | isl38xx_w32_flush(device_base, reg, ISL38XX_INT_EN_REG); | |
223 | udelay(ISL38XX_WRITEIO_DELAY); | |
224 | } | |
225 | ||
226 | int | |
227 | isl38xx_in_queue(isl38xx_control_block *cb, int queue) | |
228 | { | |
229 | const s32 delta = (le32_to_cpu(cb->driver_curr_frag[queue]) - | |
230 | le32_to_cpu(cb->device_curr_frag[queue])); | |
231 | ||
232 | /* determine the amount of fragments in the queue depending on the type | |
233 | * of the queue, either transmit or receive */ | |
234 | ||
235 | BUG_ON(delta < 0); /* driver ptr must be ahead of device ptr */ | |
236 | ||
237 | switch (queue) { | |
238 | /* send queues */ | |
239 | case ISL38XX_CB_TX_MGMTQ: | |
240 | BUG_ON(delta > ISL38XX_CB_MGMT_QSIZE); | |
241 | case ISL38XX_CB_TX_DATA_LQ: | |
242 | case ISL38XX_CB_TX_DATA_HQ: | |
243 | BUG_ON(delta > ISL38XX_CB_TX_QSIZE); | |
244 | return delta; | |
245 | break; | |
246 | ||
247 | /* receive queues */ | |
248 | case ISL38XX_CB_RX_MGMTQ: | |
249 | BUG_ON(delta > ISL38XX_CB_MGMT_QSIZE); | |
250 | return ISL38XX_CB_MGMT_QSIZE - delta; | |
251 | break; | |
252 | ||
253 | case ISL38XX_CB_RX_DATA_LQ: | |
254 | case ISL38XX_CB_RX_DATA_HQ: | |
255 | BUG_ON(delta > ISL38XX_CB_RX_QSIZE); | |
256 | return ISL38XX_CB_RX_QSIZE - delta; | |
257 | break; | |
258 | } | |
259 | BUG(); | |
260 | return 0; | |
261 | } |