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rt2x00: Protect queue control with mutex
[deliverable/linux.git] / drivers / net / wireless / rt2x00 / rt2500usb.c
CommitLineData
95ea3627 1/*
9c9a0d14 2 Copyright (C) 2004 - 2009 Ivo van Doorn <IvDoorn@gmail.com>
95ea3627
ID		 3 <http://rt2x00.serialmonkey.com>
4
5 This program is free software; you can redistribute it and/or modify
6 it under the terms of the GNU General Public License as published by
7 the Free Software Foundation; either version 2 of the License, or
8 (at your option) any later version.
9
10 This program is distributed in the hope that it will be useful,
11 but WITHOUT ANY WARRANTY; without even the implied warranty of
12 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 GNU General Public License for more details.
14
15 You should have received a copy of the GNU General Public License
16 along with this program; if not, write to the
17 Free Software Foundation, Inc.,
18 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
19 */
20
21/*
22 Module: rt2500usb
23 Abstract: rt2500usb device specific routines.
24 Supported chipsets: RT2570.
25 */
26
95ea3627
ID		 27#include <linux/delay.h>
28#include <linux/etherdevice.h>
29#include <linux/init.h>
30#include <linux/kernel.h>
31#include <linux/module.h>
5a0e3ad6 32#include <linux/slab.h>
95ea3627
ID		 33#include <linux/usb.h>
34
35#include "rt2x00.h"
36#include "rt2x00usb.h"
37#include "rt2500usb.h"
38
dddfb478
ID		 39/*
40 * Allow hardware encryption to be disabled.
41 */
cf553477 42static int modparam_nohwcrypt;
dddfb478
ID		 43module_param_named(nohwcrypt, modparam_nohwcrypt, bool, S_IRUGO);
44MODULE_PARM_DESC(nohwcrypt, "Disable hardware encryption.");
45
95ea3627
ID		 46/*
47 * Register access.
48 * All access to the CSR registers will go through the methods
49 * rt2500usb_register_read and rt2500usb_register_write.
50 * BBP and RF register require indirect register access,
51 * and use the CSR registers BBPCSR and RFCSR to achieve this.
52 * These indirect registers work with busy bits,
53 * and we will try maximal REGISTER_BUSY_COUNT times to access
54 * the register while taking a REGISTER_BUSY_DELAY us delay
55 * between each attampt. When the busy bit is still set at that time,
56 * the access attempt is considered to have failed,
57 * and we will print an error.
8ff48a8b 58 * If the csr_mutex is already held then the _lock variants must
3d82346c 59 * be used instead.
95ea3627 60 */
0e14f6d3 61static inline void rt2500usb_register_read(struct rt2x00_dev *rt2x00dev,
95ea3627
ID		 62 const unsigned int offset,
63 u16 *value)
64{
65 __le16 reg;
66 rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_READ,
67 USB_VENDOR_REQUEST_IN, offset,
c9c3b1a5 68 &reg, sizeof(reg), REGISTER_TIMEOUT);
95ea3627
ID		 69 *value = le16_to_cpu(reg);
70}
71
3d82346c
AB		 72static inline void rt2500usb_register_read_lock(struct rt2x00_dev *rt2x00dev,
73 const unsigned int offset,
74 u16 *value)
75{
76 __le16 reg;
77 rt2x00usb_vendor_req_buff_lock(rt2x00dev, USB_MULTI_READ,
78 USB_VENDOR_REQUEST_IN, offset,
c9c3b1a5 79 &reg, sizeof(reg), REGISTER_TIMEOUT);
3d82346c
AB		 80 *value = le16_to_cpu(reg);
81}
82
0e14f6d3 83static inline void rt2500usb_register_multiread(struct rt2x00_dev *rt2x00dev,
95ea3627
ID		 84 const unsigned int offset,
85 void *value, const u16 length)
86{
95ea3627
ID		 87 rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_READ,
88 USB_VENDOR_REQUEST_IN, offset,
bd394a74
ID		 89 value, length,
90 REGISTER_TIMEOUT16(length));
95ea3627
ID		 91}
92
0e14f6d3 93static inline void rt2500usb_register_write(struct rt2x00_dev *rt2x00dev,
95ea3627
ID		 94 const unsigned int offset,
95 u16 value)
96{
97 __le16 reg = cpu_to_le16(value);
98 rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_WRITE,
99 USB_VENDOR_REQUEST_OUT, offset,
c9c3b1a5 100 &reg, sizeof(reg), REGISTER_TIMEOUT);
95ea3627
ID		 101}
102
3d82346c
AB		 103static inline void rt2500usb_register_write_lock(struct rt2x00_dev *rt2x00dev,
104 const unsigned int offset,
105 u16 value)
106{
107 __le16 reg = cpu_to_le16(value);
108 rt2x00usb_vendor_req_buff_lock(rt2x00dev, USB_MULTI_WRITE,
109 USB_VENDOR_REQUEST_OUT, offset,
c9c3b1a5 110 &reg, sizeof(reg), REGISTER_TIMEOUT);
3d82346c
AB		 111}
112
0e14f6d3 113static inline void rt2500usb_register_multiwrite(struct rt2x00_dev *rt2x00dev,
95ea3627
ID		 114 const unsigned int offset,
115 void *value, const u16 length)
116{
95ea3627
ID		 117 rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_WRITE,
118 USB_VENDOR_REQUEST_OUT, offset,
bd394a74
ID		 119 value, length,
120 REGISTER_TIMEOUT16(length));
95ea3627
ID		 121}
122
c9c3b1a5
ID		 123static int rt2500usb_regbusy_read(struct rt2x00_dev *rt2x00dev,
124 const unsigned int offset,
125 struct rt2x00_field16 field,
126 u16 *reg)
95ea3627 127{
95ea3627
ID		 128 unsigned int i;
129
130 for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
c9c3b1a5
ID		 131 rt2500usb_register_read_lock(rt2x00dev, offset, reg);
132 if (!rt2x00_get_field16(*reg, field))
133 return 1;
95ea3627
ID		 134 udelay(REGISTER_BUSY_DELAY);
135 }
136
c9c3b1a5
ID		 137 ERROR(rt2x00dev, "Indirect register access failed: "
138 "offset=0x%.08x, value=0x%.08x\n", offset, *reg);
139 *reg = ~0;
140
141 return 0;
95ea3627
ID		 142}
143
c9c3b1a5
ID		 144#define WAIT_FOR_BBP(__dev, __reg) \
145 rt2500usb_regbusy_read((__dev), PHY_CSR8, PHY_CSR8_BUSY, (__reg))
146#define WAIT_FOR_RF(__dev, __reg) \
147 rt2500usb_regbusy_read((__dev), PHY_CSR10, PHY_CSR10_RF_BUSY, (__reg))
148
0e14f6d3 149static void rt2500usb_bbp_write(struct rt2x00_dev *rt2x00dev,
95ea3627
ID		 150 const unsigned int word, const u8 value)
151{
152 u16 reg;
153
8ff48a8b 154 mutex_lock(&rt2x00dev->csr_mutex);
3d82346c 155
95ea3627 156 /*
c9c3b1a5
ID		 157 * Wait until the BBP becomes available, afterwards we
158 * can safely write the new data into the register.
95ea3627 159 */
c9c3b1a5
ID		 160 if (WAIT_FOR_BBP(rt2x00dev, &reg)) {
161 reg = 0;
162 rt2x00_set_field16(&reg, PHY_CSR7_DATA, value);
163 rt2x00_set_field16(&reg, PHY_CSR7_REG_ID, word);
164 rt2x00_set_field16(&reg, PHY_CSR7_READ_CONTROL, 0);
3d82346c 165
c9c3b1a5
ID		 166 rt2500usb_register_write_lock(rt2x00dev, PHY_CSR7, reg);
167 }
99ade259 168
8ff48a8b 169 mutex_unlock(&rt2x00dev->csr_mutex);
95ea3627
ID		 170}
171
0e14f6d3 172static void rt2500usb_bbp_read(struct rt2x00_dev *rt2x00dev,
95ea3627
ID		 173 const unsigned int word, u8 *value)
174{
175 u16 reg;
176
8ff48a8b 177 mutex_lock(&rt2x00dev->csr_mutex);
3d82346c 178
95ea3627 179 /*
c9c3b1a5
ID		 180 * Wait until the BBP becomes available, afterwards we
181 * can safely write the read request into the register.
182 * After the data has been written, we wait until hardware
183 * returns the correct value, if at any time the register
184 * doesn't become available in time, reg will be 0xffffffff
185 * which means we return 0xff to the caller.
95ea3627 186 */
c9c3b1a5
ID		 187 if (WAIT_FOR_BBP(rt2x00dev, &reg)) {
188 reg = 0;
189 rt2x00_set_field16(&reg, PHY_CSR7_REG_ID, word);
190 rt2x00_set_field16(&reg, PHY_CSR7_READ_CONTROL, 1);
95ea3627 191
c9c3b1a5 192 rt2500usb_register_write_lock(rt2x00dev, PHY_CSR7, reg);
95ea3627 193
c9c3b1a5
ID		 194 if (WAIT_FOR_BBP(rt2x00dev, &reg))
195 rt2500usb_register_read_lock(rt2x00dev, PHY_CSR7, &reg);
196 }
95ea3627 197
95ea3627 198 *value = rt2x00_get_field16(reg, PHY_CSR7_DATA);
3d82346c 199
8ff48a8b 200 mutex_unlock(&rt2x00dev->csr_mutex);
95ea3627
ID		 201}
202
0e14f6d3 203static void rt2500usb_rf_write(struct rt2x00_dev *rt2x00dev,
95ea3627
ID		 204 const unsigned int word, const u32 value)
205{
206 u16 reg;
95ea3627 207
8ff48a8b 208 mutex_lock(&rt2x00dev->csr_mutex);
3d82346c 209
c9c3b1a5
ID		 210 /*
211 * Wait until the RF becomes available, afterwards we
212 * can safely write the new data into the register.
213 */
214 if (WAIT_FOR_RF(rt2x00dev, &reg)) {
215 reg = 0;
216 rt2x00_set_field16(&reg, PHY_CSR9_RF_VALUE, value);
217 rt2500usb_register_write_lock(rt2x00dev, PHY_CSR9, reg);
218
219 reg = 0;
220 rt2x00_set_field16(&reg, PHY_CSR10_RF_VALUE, value >> 16);
221 rt2x00_set_field16(&reg, PHY_CSR10_RF_NUMBER_OF_BITS, 20);
222 rt2x00_set_field16(&reg, PHY_CSR10_RF_IF_SELECT, 0);
223 rt2x00_set_field16(&reg, PHY_CSR10_RF_BUSY, 1);
224
225 rt2500usb_register_write_lock(rt2x00dev, PHY_CSR10, reg);
226 rt2x00_rf_write(rt2x00dev, word, value);
95ea3627
ID		 227 }
228
8ff48a8b 229 mutex_unlock(&rt2x00dev->csr_mutex);
95ea3627
ID		 230}
231
232#ifdef CONFIG_RT2X00_LIB_DEBUGFS
743b97ca
ID		 233static void _rt2500usb_register_read(struct rt2x00_dev *rt2x00dev,
234 const unsigned int offset,
235 u32 *value)
95ea3627 236{
743b97ca 237 rt2500usb_register_read(rt2x00dev, offset, (u16 *)value);
95ea3627
ID		 238}
239
743b97ca
ID		 240static void _rt2500usb_register_write(struct rt2x00_dev *rt2x00dev,
241 const unsigned int offset,
242 u32 value)
95ea3627 243{
743b97ca 244 rt2500usb_register_write(rt2x00dev, offset, value);
95ea3627
ID		 245}
246
247static const struct rt2x00debug rt2500usb_rt2x00debug = {
248 .owner = THIS_MODULE,
249 .csr = {
743b97ca
ID		 250 .read = _rt2500usb_register_read,
251 .write = _rt2500usb_register_write,
252 .flags = RT2X00DEBUGFS_OFFSET,
253 .word_base = CSR_REG_BASE,
95ea3627
ID		 254 .word_size = sizeof(u16),
255 .word_count = CSR_REG_SIZE / sizeof(u16),
256 },
257 .eeprom = {
258 .read = rt2x00_eeprom_read,
259 .write = rt2x00_eeprom_write,
743b97ca 260 .word_base = EEPROM_BASE,
95ea3627
ID		 261 .word_size = sizeof(u16),
262 .word_count = EEPROM_SIZE / sizeof(u16),
263 },
264 .bbp = {
265 .read = rt2500usb_bbp_read,
266 .write = rt2500usb_bbp_write,
743b97ca 267 .word_base = BBP_BASE,
95ea3627
ID		 268 .word_size = sizeof(u8),
269 .word_count = BBP_SIZE / sizeof(u8),
270 },
271 .rf = {
272 .read = rt2x00_rf_read,
273 .write = rt2500usb_rf_write,
743b97ca 274 .word_base = RF_BASE,
95ea3627
ID		 275 .word_size = sizeof(u32),
276 .word_count = RF_SIZE / sizeof(u32),
277 },
278};
279#endif /* CONFIG_RT2X00_LIB_DEBUGFS */
280
7396faf4
ID		 281static int rt2500usb_rfkill_poll(struct rt2x00_dev *rt2x00dev)
282{
283 u16 reg;
284
285 rt2500usb_register_read(rt2x00dev, MAC_CSR19, &reg);
286 return rt2x00_get_field32(reg, MAC_CSR19_BIT7);
287}
7396faf4 288
771fd565 289#ifdef CONFIG_RT2X00_LIB_LEDS
a2e1d52a 290static void rt2500usb_brightness_set(struct led_classdev *led_cdev,
a9450b70
ID		 291 enum led_brightness brightness)
292{
293 struct rt2x00_led *led =
294 container_of(led_cdev, struct rt2x00_led, led_dev);
295 unsigned int enabled = brightness != LED_OFF;
a2e1d52a 296 u16 reg;
a9450b70 297
a2e1d52a 298 rt2500usb_register_read(led->rt2x00dev, MAC_CSR20, &reg);
47b10cd1 299
a2e1d52a
ID		 300 if (led->type == LED_TYPE_RADIO || led->type == LED_TYPE_ASSOC)
301 rt2x00_set_field16(&reg, MAC_CSR20_LINK, enabled);
302 else if (led->type == LED_TYPE_ACTIVITY)
303 rt2x00_set_field16(&reg, MAC_CSR20_ACTIVITY, enabled);
304
305 rt2500usb_register_write(led->rt2x00dev, MAC_CSR20, reg);
306}
307
308static int rt2500usb_blink_set(struct led_classdev *led_cdev,
309 unsigned long *delay_on,
310 unsigned long *delay_off)
311{
312 struct rt2x00_led *led =
313 container_of(led_cdev, struct rt2x00_led, led_dev);
314 u16 reg;
315
316 rt2500usb_register_read(led->rt2x00dev, MAC_CSR21, &reg);
317 rt2x00_set_field16(&reg, MAC_CSR21_ON_PERIOD, *delay_on);
318 rt2x00_set_field16(&reg, MAC_CSR21_OFF_PERIOD, *delay_off);
319 rt2500usb_register_write(led->rt2x00dev, MAC_CSR21, reg);
a9450b70 320
a2e1d52a 321 return 0;
a9450b70 322}
475433be
ID		 323
324static void rt2500usb_init_led(struct rt2x00_dev *rt2x00dev,
325 struct rt2x00_led *led,
326 enum led_type type)
327{
328 led->rt2x00dev = rt2x00dev;
329 led->type = type;
330 led->led_dev.brightness_set = rt2500usb_brightness_set;
331 led->led_dev.blink_set = rt2500usb_blink_set;
332 led->flags = LED_INITIALIZED;
333}
771fd565 334#endif /* CONFIG_RT2X00_LIB_LEDS */
a9450b70 335
95ea3627
ID		 336/*
337 * Configuration handlers.
338 */
dddfb478
ID		 339
340/*
341 * rt2500usb does not differentiate between shared and pairwise
342 * keys, so we should use the same function for both key types.
343 */
344static int rt2500usb_config_key(struct rt2x00_dev *rt2x00dev,
345 struct rt2x00lib_crypto *crypto,
346 struct ieee80211_key_conf *key)
347{
dddfb478
ID		 348 u32 mask;
349 u16 reg;
75f64dd5 350 enum cipher curr_cipher;
dddfb478
ID		 351
352 if (crypto->cmd == SET_KEY) {
98ec6218
SG		 353 /*
354 * Disallow to set WEP key other than with index 0,
355 * it is known that not work at least on some hardware.
356 * SW crypto will be used in that case.
357 */
97359d12
JB		 358 if ((key->cipher == WLAN_CIPHER_SUITE_WEP40 ||
359 key->cipher == WLAN_CIPHER_SUITE_WEP104) &&
360 key->keyidx != 0)
98ec6218
SG		 361 return -EOPNOTSUPP;
362
dddfb478
ID		 363 /*
364 * Pairwise key will always be entry 0, but this
365 * could collide with a shared key on the same
366 * position...
367 */
368 mask = TXRX_CSR0_KEY_ID.bit_mask;
369
370 rt2500usb_register_read(rt2x00dev, TXRX_CSR0, &reg);
75f64dd5 371 curr_cipher = rt2x00_get_field16(reg, TXRX_CSR0_ALGORITHM);
dddfb478
ID		 372 reg &= mask;
373
374 if (reg && reg == mask)
375 return -ENOSPC;
376
377 reg = rt2x00_get_field16(reg, TXRX_CSR0_KEY_ID);
378
379 key->hw_key_idx += reg ? ffz(reg) : 0;
75f64dd5
OZ		 380 /*
381 * Hardware requires that all keys use the same cipher
382 * (e.g. TKIP-only, AES-only, but not TKIP+AES).
383 * If this is not the first key, compare the cipher with the
384 * first one and fall back to SW crypto if not the same.
385 */
386 if (key->hw_key_idx > 0 && crypto->cipher != curr_cipher)
387 return -EOPNOTSUPP;
dddfb478 388
1279f5ed 389 rt2500usb_register_multiwrite(rt2x00dev, KEY_ENTRY(key->hw_key_idx),
96b61baf 390 crypto->key, sizeof(crypto->key));
dddfb478
ID		 391
392 /*
393 * The driver does not support the IV/EIV generation
f3d340c1 394 * in hardware. However it demands the data to be provided
3ad2f3fb 395 * both separately as well as inside the frame.
f3d340c1
ID		 396 * We already provided the CONFIG_CRYPTO_COPY_IV to rt2x00lib
397 * to ensure rt2x00lib will not strip the data from the
398 * frame after the copy, now we must tell mac80211
dddfb478
ID		 399 * to generate the IV/EIV data.
400 */
401 key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
402 key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
403 }
404
405 /*
406 * TXRX_CSR0_KEY_ID contains only single-bit fields to indicate
407 * a particular key is valid.
408 */
409 rt2500usb_register_read(rt2x00dev, TXRX_CSR0, &reg);
410 rt2x00_set_field16(&reg, TXRX_CSR0_ALGORITHM, crypto->cipher);
411 rt2x00_set_field16(&reg, TXRX_CSR0_IV_OFFSET, IEEE80211_HEADER);
412
413 mask = rt2x00_get_field16(reg, TXRX_CSR0_KEY_ID);
414 if (crypto->cmd == SET_KEY)
415 mask |= 1 << key->hw_key_idx;
416 else if (crypto->cmd == DISABLE_KEY)
417 mask &= ~(1 << key->hw_key_idx);
418 rt2x00_set_field16(&reg, TXRX_CSR0_KEY_ID, mask);
419 rt2500usb_register_write(rt2x00dev, TXRX_CSR0, reg);
420
421 return 0;
422}
423
3a643d24
ID		 424static void rt2500usb_config_filter(struct rt2x00_dev *rt2x00dev,
425 const unsigned int filter_flags)
426{
427 u16 reg;
428
429 /*
430 * Start configuration steps.
431 * Note that the version error will always be dropped
432 * and broadcast frames will always be accepted since
433 * there is no filter for it at this time.
434 */
435 rt2500usb_register_read(rt2x00dev, TXRX_CSR2, &reg);
436 rt2x00_set_field16(&reg, TXRX_CSR2_DROP_CRC,
437 !(filter_flags & FIF_FCSFAIL));
438 rt2x00_set_field16(&reg, TXRX_CSR2_DROP_PHYSICAL,
439 !(filter_flags & FIF_PLCPFAIL));
440 rt2x00_set_field16(&reg, TXRX_CSR2_DROP_CONTROL,
441 !(filter_flags & FIF_CONTROL));
442 rt2x00_set_field16(&reg, TXRX_CSR2_DROP_NOT_TO_ME,
443 !(filter_flags & FIF_PROMISC_IN_BSS));
444 rt2x00_set_field16(&reg, TXRX_CSR2_DROP_TODS,
e0b005fa
ID		 445 !(filter_flags & FIF_PROMISC_IN_BSS) &&
446 !rt2x00dev->intf_ap_count);
3a643d24
ID		 447 rt2x00_set_field16(&reg, TXRX_CSR2_DROP_VERSION_ERROR, 1);
448 rt2x00_set_field16(&reg, TXRX_CSR2_DROP_MULTICAST,
449 !(filter_flags & FIF_ALLMULTI));
450 rt2x00_set_field16(&reg, TXRX_CSR2_DROP_BROADCAST, 0);
451 rt2500usb_register_write(rt2x00dev, TXRX_CSR2, reg);
452}
453
6bb40dd1
ID		 454static void rt2500usb_config_intf(struct rt2x00_dev *rt2x00dev,
455 struct rt2x00_intf *intf,
456 struct rt2x00intf_conf *conf,
457 const unsigned int flags)
95ea3627 458{
6bb40dd1 459 unsigned int bcn_preload;
95ea3627
ID		 460 u16 reg;
461
6bb40dd1 462 if (flags & CONFIG_UPDATE_TYPE) {
6bb40dd1
ID		 463 /*
464 * Enable beacon config
465 */
bad13639 466 bcn_preload = PREAMBLE + GET_DURATION(IEEE80211_HEADER, 20);
6bb40dd1
ID		 467 rt2500usb_register_read(rt2x00dev, TXRX_CSR20, &reg);
468 rt2x00_set_field16(&reg, TXRX_CSR20_OFFSET, bcn_preload >> 6);
469 rt2x00_set_field16(&reg, TXRX_CSR20_BCN_EXPECT_WINDOW,
05c914fe 470 2 * (conf->type != NL80211_IFTYPE_STATION));
6bb40dd1 471 rt2500usb_register_write(rt2x00dev, TXRX_CSR20, reg);
95ea3627 472
6bb40dd1
ID		 473 /*
474 * Enable synchronisation.
475 */
476 rt2500usb_register_read(rt2x00dev, TXRX_CSR18, &reg);
477 rt2x00_set_field16(&reg, TXRX_CSR18_OFFSET, 0);
478 rt2500usb_register_write(rt2x00dev, TXRX_CSR18, reg);
479
480 rt2500usb_register_read(rt2x00dev, TXRX_CSR19, &reg);
fd3c91c5 481 rt2x00_set_field16(&reg, TXRX_CSR19_TSF_COUNT, 1);
6bb40dd1 482 rt2x00_set_field16(&reg, TXRX_CSR19_TSF_SYNC, conf->sync);
fd3c91c5 483 rt2x00_set_field16(&reg, TXRX_CSR19_TBCN, 1);
6bb40dd1
ID		 484 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
485 }
95ea3627 486
6bb40dd1
ID		 487 if (flags & CONFIG_UPDATE_MAC)
488 rt2500usb_register_multiwrite(rt2x00dev, MAC_CSR2, conf->mac,
489 (3 * sizeof(__le16)));
490
491 if (flags & CONFIG_UPDATE_BSSID)
492 rt2500usb_register_multiwrite(rt2x00dev, MAC_CSR5, conf->bssid,
493 (3 * sizeof(__le16)));
95ea3627
ID		 494}
495
3a643d24 496static void rt2500usb_config_erp(struct rt2x00_dev *rt2x00dev,
02044643
HS		 497 struct rt2x00lib_erp *erp,
498 u32 changed)
95ea3627 499{
95ea3627 500 u16 reg;
95ea3627 501
02044643
HS		 502 if (changed & BSS_CHANGED_ERP_PREAMBLE) {
503 rt2500usb_register_read(rt2x00dev, TXRX_CSR10, &reg);
504 rt2x00_set_field16(&reg, TXRX_CSR10_AUTORESPOND_PREAMBLE,
505 !!erp->short_preamble);
506 rt2500usb_register_write(rt2x00dev, TXRX_CSR10, reg);
507 }
95ea3627 508
02044643
HS		 509 if (changed & BSS_CHANGED_BASIC_RATES)
510 rt2500usb_register_write(rt2x00dev, TXRX_CSR11,
511 erp->basic_rates);
95ea3627 512
02044643
HS		 513 if (changed & BSS_CHANGED_BEACON_INT) {
514 rt2500usb_register_read(rt2x00dev, TXRX_CSR18, &reg);
515 rt2x00_set_field16(&reg, TXRX_CSR18_INTERVAL,
516 erp->beacon_int * 4);
517 rt2500usb_register_write(rt2x00dev, TXRX_CSR18, reg);
518 }
8a566afe 519
02044643
HS		 520 if (changed & BSS_CHANGED_ERP_SLOT) {
521 rt2500usb_register_write(rt2x00dev, MAC_CSR10, erp->slot_time);
522 rt2500usb_register_write(rt2x00dev, MAC_CSR11, erp->sifs);
523 rt2500usb_register_write(rt2x00dev, MAC_CSR12, erp->eifs);
524 }
95ea3627
ID		 525}
526
e4ea1c40
ID		 527static void rt2500usb_config_ant(struct rt2x00_dev *rt2x00dev,
528 struct antenna_setup *ant)
95ea3627
ID		 529{
530 u8 r2;
531 u8 r14;
532 u16 csr5;
533 u16 csr6;
534
a4fe07d9
ID		 535 /*
536 * We should never come here because rt2x00lib is supposed
537 * to catch this and send us the correct antenna explicitely.
538 */
539 BUG_ON(ant->rx == ANTENNA_SW_DIVERSITY ||
540 ant->tx == ANTENNA_SW_DIVERSITY);
541
95ea3627
ID		 542 rt2500usb_bbp_read(rt2x00dev, 2, &r2);
543 rt2500usb_bbp_read(rt2x00dev, 14, &r14);
544 rt2500usb_register_read(rt2x00dev, PHY_CSR5, &csr5);
545 rt2500usb_register_read(rt2x00dev, PHY_CSR6, &csr6);
546
547 /*
548 * Configure the TX antenna.
549 */
addc81bd 550 switch (ant->tx) {
95ea3627
ID		 551 case ANTENNA_HW_DIVERSITY:
552 rt2x00_set_field8(&r2, BBP_R2_TX_ANTENNA, 1);
553 rt2x00_set_field16(&csr5, PHY_CSR5_CCK, 1);
554 rt2x00_set_field16(&csr6, PHY_CSR6_OFDM, 1);
555 break;
556 case ANTENNA_A:
557 rt2x00_set_field8(&r2, BBP_R2_TX_ANTENNA, 0);
558 rt2x00_set_field16(&csr5, PHY_CSR5_CCK, 0);
559 rt2x00_set_field16(&csr6, PHY_CSR6_OFDM, 0);
560 break;
561 case ANTENNA_B:
a4fe07d9 562 default:
95ea3627
ID		 563 rt2x00_set_field8(&r2, BBP_R2_TX_ANTENNA, 2);
564 rt2x00_set_field16(&csr5, PHY_CSR5_CCK, 2);
565 rt2x00_set_field16(&csr6, PHY_CSR6_OFDM, 2);
566 break;
567 }
568
569 /*
570 * Configure the RX antenna.
571 */
addc81bd 572 switch (ant->rx) {
95ea3627
ID		 573 case ANTENNA_HW_DIVERSITY:
574 rt2x00_set_field8(&r14, BBP_R14_RX_ANTENNA, 1);
575 break;
576 case ANTENNA_A:
577 rt2x00_set_field8(&r14, BBP_R14_RX_ANTENNA, 0);
578 break;
579 case ANTENNA_B:
a4fe07d9 580 default:
95ea3627
ID		 581 rt2x00_set_field8(&r14, BBP_R14_RX_ANTENNA, 2);
582 break;
583 }
584
585 /*
586 * RT2525E and RT5222 need to flip TX I/Q
587 */
5122d898 588 if (rt2x00_rf(rt2x00dev, RF2525E) || rt2x00_rf(rt2x00dev, RF5222)) {
95ea3627
ID		 589 rt2x00_set_field8(&r2, BBP_R2_TX_IQ_FLIP, 1);
590 rt2x00_set_field16(&csr5, PHY_CSR5_CCK_FLIP, 1);
591 rt2x00_set_field16(&csr6, PHY_CSR6_OFDM_FLIP, 1);
592
593 /*
594 * RT2525E does not need RX I/Q Flip.
595 */
5122d898 596 if (rt2x00_rf(rt2x00dev, RF2525E))
95ea3627
ID		 597 rt2x00_set_field8(&r14, BBP_R14_RX_IQ_FLIP, 0);
598 } else {
599 rt2x00_set_field16(&csr5, PHY_CSR5_CCK_FLIP, 0);
600 rt2x00_set_field16(&csr6, PHY_CSR6_OFDM_FLIP, 0);
601 }
602
603 rt2500usb_bbp_write(rt2x00dev, 2, r2);
604 rt2500usb_bbp_write(rt2x00dev, 14, r14);
605 rt2500usb_register_write(rt2x00dev, PHY_CSR5, csr5);
606 rt2500usb_register_write(rt2x00dev, PHY_CSR6, csr6);
607}
608
e4ea1c40
ID		 609static void rt2500usb_config_channel(struct rt2x00_dev *rt2x00dev,
610 struct rf_channel *rf, const int txpower)
611{
612 /*
613 * Set TXpower.
614 */
615 rt2x00_set_field32(&rf->rf3, RF3_TXPOWER, TXPOWER_TO_DEV(txpower));
616
617 /*
618 * For RT2525E we should first set the channel to half band higher.
619 */
5122d898 620 if (rt2x00_rf(rt2x00dev, RF2525E)) {
e4ea1c40
ID		 621 static const u32 vals[] = {
622 0x000008aa, 0x000008ae, 0x000008ae, 0x000008b2,
623 0x000008b2, 0x000008b6, 0x000008b6, 0x000008ba,
624 0x000008ba, 0x000008be, 0x000008b7, 0x00000902,
625 0x00000902, 0x00000906
626 };
627
628 rt2500usb_rf_write(rt2x00dev, 2, vals[rf->channel - 1]);
629 if (rf->rf4)
630 rt2500usb_rf_write(rt2x00dev, 4, rf->rf4);
631 }
632
633 rt2500usb_rf_write(rt2x00dev, 1, rf->rf1);
634 rt2500usb_rf_write(rt2x00dev, 2, rf->rf2);
635 rt2500usb_rf_write(rt2x00dev, 3, rf->rf3);
636 if (rf->rf4)
637 rt2500usb_rf_write(rt2x00dev, 4, rf->rf4);
638}
639
640static void rt2500usb_config_txpower(struct rt2x00_dev *rt2x00dev,
641 const int txpower)
642{
643 u32 rf3;
644
645 rt2x00_rf_read(rt2x00dev, 3, &rf3);
646 rt2x00_set_field32(&rf3, RF3_TXPOWER, TXPOWER_TO_DEV(txpower));
647 rt2500usb_rf_write(rt2x00dev, 3, rf3);
648}
649
7d7f19cc
ID		 650static void rt2500usb_config_ps(struct rt2x00_dev *rt2x00dev,
651 struct rt2x00lib_conf *libconf)
652{
653 enum dev_state state =
654 (libconf->conf->flags & IEEE80211_CONF_PS) ?
655 STATE_SLEEP : STATE_AWAKE;
656 u16 reg;
657
658 if (state == STATE_SLEEP) {
659 rt2500usb_register_read(rt2x00dev, MAC_CSR18, &reg);
660 rt2x00_set_field16(&reg, MAC_CSR18_DELAY_AFTER_BEACON,
6b347bff 661 rt2x00dev->beacon_int - 20);
7d7f19cc
ID		 662 rt2x00_set_field16(&reg, MAC_CSR18_BEACONS_BEFORE_WAKEUP,
663 libconf->conf->listen_interval - 1);
664
665 /* We must first disable autowake before it can be enabled */
666 rt2x00_set_field16(&reg, MAC_CSR18_AUTO_WAKE, 0);
667 rt2500usb_register_write(rt2x00dev, MAC_CSR18, reg);
668
669 rt2x00_set_field16(&reg, MAC_CSR18_AUTO_WAKE, 1);
670 rt2500usb_register_write(rt2x00dev, MAC_CSR18, reg);
5731858d
GW		 671 } else {
672 rt2500usb_register_read(rt2x00dev, MAC_CSR18, &reg);
673 rt2x00_set_field16(&reg, MAC_CSR18_AUTO_WAKE, 0);
674 rt2500usb_register_write(rt2x00dev, MAC_CSR18, reg);
7d7f19cc
ID		 675 }
676
677 rt2x00dev->ops->lib->set_device_state(rt2x00dev, state);
678}
679
95ea3627 680static void rt2500usb_config(struct rt2x00_dev *rt2x00dev,
6bb40dd1
ID		 681 struct rt2x00lib_conf *libconf,
682 const unsigned int flags)
95ea3627 683{
e4ea1c40 684 if (flags & IEEE80211_CONF_CHANGE_CHANNEL)
5c58ee51
ID		 685 rt2500usb_config_channel(rt2x00dev, &libconf->rf,
686 libconf->conf->power_level);
e4ea1c40
ID		 687 if ((flags & IEEE80211_CONF_CHANGE_POWER) &&
688 !(flags & IEEE80211_CONF_CHANGE_CHANNEL))
5c58ee51
ID		 689 rt2500usb_config_txpower(rt2x00dev,
690 libconf->conf->power_level);
7d7f19cc
ID		 691 if (flags & IEEE80211_CONF_CHANGE_PS)
692 rt2500usb_config_ps(rt2x00dev, libconf);
95ea3627
ID		 693}
694
95ea3627
ID		 695/*
696 * Link tuning
697 */
ebcf26da
ID		 698static void rt2500usb_link_stats(struct rt2x00_dev *rt2x00dev,
699 struct link_qual *qual)
95ea3627
ID		 700{
701 u16 reg;
702
703 /*
704 * Update FCS error count from register.
705 */
706 rt2500usb_register_read(rt2x00dev, STA_CSR0, &reg);
ebcf26da 707 qual->rx_failed = rt2x00_get_field16(reg, STA_CSR0_FCS_ERROR);
95ea3627
ID		 708
709 /*
710 * Update False CCA count from register.
711 */
712 rt2500usb_register_read(rt2x00dev, STA_CSR3, &reg);
ebcf26da 713 qual->false_cca = rt2x00_get_field16(reg, STA_CSR3_FALSE_CCA_ERROR);
95ea3627
ID		 714}
715
5352ff65
ID		 716static void rt2500usb_reset_tuner(struct rt2x00_dev *rt2x00dev,
717 struct link_qual *qual)
95ea3627
ID		 718{
719 u16 eeprom;
720 u16 value;
721
722 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R24, &eeprom);
723 value = rt2x00_get_field16(eeprom, EEPROM_BBPTUNE_R24_LOW);
724 rt2500usb_bbp_write(rt2x00dev, 24, value);
725
726 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R25, &eeprom);
727 value = rt2x00_get_field16(eeprom, EEPROM_BBPTUNE_R25_LOW);
728 rt2500usb_bbp_write(rt2x00dev, 25, value);
729
730 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R61, &eeprom);
731 value = rt2x00_get_field16(eeprom, EEPROM_BBPTUNE_R61_LOW);
732 rt2500usb_bbp_write(rt2x00dev, 61, value);
733
734 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_VGC, &eeprom);
735 value = rt2x00_get_field16(eeprom, EEPROM_BBPTUNE_VGCUPPER);
736 rt2500usb_bbp_write(rt2x00dev, 17, value);
737
5352ff65 738 qual->vgc_level = value;
95ea3627
ID		 739}
740
5450b7e2
ID		 741/*
742 * Queue handlers.
743 */
744static void rt2500usb_start_queue(struct data_queue *queue)
745{
746 struct rt2x00_dev *rt2x00dev = queue->rt2x00dev;
747 u16 reg;
748
749 switch (queue->qid) {
750 case QID_RX:
751 rt2500usb_register_read(rt2x00dev, TXRX_CSR2, &reg);
752 rt2x00_set_field16(&reg, TXRX_CSR2_DISABLE_RX, 0);
753 rt2500usb_register_write(rt2x00dev, TXRX_CSR2, reg);
754 break;
755 case QID_BEACON:
756 rt2500usb_register_read(rt2x00dev, TXRX_CSR19, &reg);
757 rt2x00_set_field16(&reg, TXRX_CSR19_TSF_COUNT, 1);
758 rt2x00_set_field16(&reg, TXRX_CSR19_TBCN, 1);
759 rt2x00_set_field16(&reg, TXRX_CSR19_BEACON_GEN, 1);
760 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
761 break;
762 default:
763 break;
764 }
765}
766
767static void rt2500usb_stop_queue(struct data_queue *queue)
768{
769 struct rt2x00_dev *rt2x00dev = queue->rt2x00dev;
770 u16 reg;
771
772 switch (queue->qid) {
773 case QID_RX:
774 rt2500usb_register_read(rt2x00dev, TXRX_CSR2, &reg);
775 rt2x00_set_field16(&reg, TXRX_CSR2_DISABLE_RX, 1);
776 rt2500usb_register_write(rt2x00dev, TXRX_CSR2, reg);
777 break;
778 case QID_BEACON:
779 rt2500usb_register_read(rt2x00dev, TXRX_CSR19, &reg);
780 rt2x00_set_field16(&reg, TXRX_CSR19_TSF_COUNT, 0);
781 rt2x00_set_field16(&reg, TXRX_CSR19_TBCN, 0);
782 rt2x00_set_field16(&reg, TXRX_CSR19_BEACON_GEN, 0);
783 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
784 break;
785 default:
786 break;
787 }
788
789 rt2x00usb_stop_queue(queue);
790}
791
95ea3627
ID		 792/*
793 * Initialization functions.
794 */
795static int rt2500usb_init_registers(struct rt2x00_dev *rt2x00dev)
796{
797 u16 reg;
798
799 rt2x00usb_vendor_request_sw(rt2x00dev, USB_DEVICE_MODE, 0x0001,
800 USB_MODE_TEST, REGISTER_TIMEOUT);
801 rt2x00usb_vendor_request_sw(rt2x00dev, USB_SINGLE_WRITE, 0x0308,
802 0x00f0, REGISTER_TIMEOUT);
803
804 rt2500usb_register_read(rt2x00dev, TXRX_CSR2, &reg);
805 rt2x00_set_field16(&reg, TXRX_CSR2_DISABLE_RX, 1);
806 rt2500usb_register_write(rt2x00dev, TXRX_CSR2, reg);
807
808 rt2500usb_register_write(rt2x00dev, MAC_CSR13, 0x1111);
809 rt2500usb_register_write(rt2x00dev, MAC_CSR14, 0x1e11);
810
811 rt2500usb_register_read(rt2x00dev, MAC_CSR1, &reg);
812 rt2x00_set_field16(&reg, MAC_CSR1_SOFT_RESET, 1);
813 rt2x00_set_field16(&reg, MAC_CSR1_BBP_RESET, 1);
814 rt2x00_set_field16(&reg, MAC_CSR1_HOST_READY, 0);
815 rt2500usb_register_write(rt2x00dev, MAC_CSR1, reg);
816
817 rt2500usb_register_read(rt2x00dev, MAC_CSR1, &reg);
818 rt2x00_set_field16(&reg, MAC_CSR1_SOFT_RESET, 0);
819 rt2x00_set_field16(&reg, MAC_CSR1_BBP_RESET, 0);
820 rt2x00_set_field16(&reg, MAC_CSR1_HOST_READY, 0);
821 rt2500usb_register_write(rt2x00dev, MAC_CSR1, reg);
822
823 rt2500usb_register_read(rt2x00dev, TXRX_CSR5, &reg);
824 rt2x00_set_field16(&reg, TXRX_CSR5_BBP_ID0, 13);
825 rt2x00_set_field16(&reg, TXRX_CSR5_BBP_ID0_VALID, 1);
826 rt2x00_set_field16(&reg, TXRX_CSR5_BBP_ID1, 12);
827 rt2x00_set_field16(&reg, TXRX_CSR5_BBP_ID1_VALID, 1);
828 rt2500usb_register_write(rt2x00dev, TXRX_CSR5, reg);
829
830 rt2500usb_register_read(rt2x00dev, TXRX_CSR6, &reg);
831 rt2x00_set_field16(&reg, TXRX_CSR6_BBP_ID0, 10);
832 rt2x00_set_field16(&reg, TXRX_CSR6_BBP_ID0_VALID, 1);
833 rt2x00_set_field16(&reg, TXRX_CSR6_BBP_ID1, 11);
834 rt2x00_set_field16(&reg, TXRX_CSR6_BBP_ID1_VALID, 1);
835 rt2500usb_register_write(rt2x00dev, TXRX_CSR6, reg);
836
837 rt2500usb_register_read(rt2x00dev, TXRX_CSR7, &reg);
838 rt2x00_set_field16(&reg, TXRX_CSR7_BBP_ID0, 7);
839 rt2x00_set_field16(&reg, TXRX_CSR7_BBP_ID0_VALID, 1);
840 rt2x00_set_field16(&reg, TXRX_CSR7_BBP_ID1, 6);
841 rt2x00_set_field16(&reg, TXRX_CSR7_BBP_ID1_VALID, 1);
842 rt2500usb_register_write(rt2x00dev, TXRX_CSR7, reg);
843
844 rt2500usb_register_read(rt2x00dev, TXRX_CSR8, &reg);
845 rt2x00_set_field16(&reg, TXRX_CSR8_BBP_ID0, 5);
846 rt2x00_set_field16(&reg, TXRX_CSR8_BBP_ID0_VALID, 1);
847 rt2x00_set_field16(&reg, TXRX_CSR8_BBP_ID1, 0);
848 rt2x00_set_field16(&reg, TXRX_CSR8_BBP_ID1_VALID, 0);
849 rt2500usb_register_write(rt2x00dev, TXRX_CSR8, reg);
850
1f909162
ID		 851 rt2500usb_register_read(rt2x00dev, TXRX_CSR19, &reg);
852 rt2x00_set_field16(&reg, TXRX_CSR19_TSF_COUNT, 0);
853 rt2x00_set_field16(&reg, TXRX_CSR19_TSF_SYNC, 0);
854 rt2x00_set_field16(&reg, TXRX_CSR19_TBCN, 0);
855 rt2x00_set_field16(&reg, TXRX_CSR19_BEACON_GEN, 0);
856 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
857
95ea3627
ID		 858 rt2500usb_register_write(rt2x00dev, TXRX_CSR21, 0xe78f);
859 rt2500usb_register_write(rt2x00dev, MAC_CSR9, 0xff1d);
860
861 if (rt2x00dev->ops->lib->set_device_state(rt2x00dev, STATE_AWAKE))
862 return -EBUSY;
863
864 rt2500usb_register_read(rt2x00dev, MAC_CSR1, &reg);
865 rt2x00_set_field16(&reg, MAC_CSR1_SOFT_RESET, 0);
866 rt2x00_set_field16(&reg, MAC_CSR1_BBP_RESET, 0);
867 rt2x00_set_field16(&reg, MAC_CSR1_HOST_READY, 1);
868 rt2500usb_register_write(rt2x00dev, MAC_CSR1, reg);
869
5122d898 870 if (rt2x00_rev(rt2x00dev) >= RT2570_VERSION_C) {
95ea3627 871 rt2500usb_register_read(rt2x00dev, PHY_CSR2, &reg);
ddc827f9 872 rt2x00_set_field16(&reg, PHY_CSR2_LNA, 0);
95ea3627 873 } else {
ddc827f9
ID		 874 reg = 0;
875 rt2x00_set_field16(&reg, PHY_CSR2_LNA, 1);
876 rt2x00_set_field16(&reg, PHY_CSR2_LNA_MODE, 3);
95ea3627
ID		 877 }
878 rt2500usb_register_write(rt2x00dev, PHY_CSR2, reg);
879
880 rt2500usb_register_write(rt2x00dev, MAC_CSR11, 0x0002);
881 rt2500usb_register_write(rt2x00dev, MAC_CSR22, 0x0053);
882 rt2500usb_register_write(rt2x00dev, MAC_CSR15, 0x01ee);
883 rt2500usb_register_write(rt2x00dev, MAC_CSR16, 0x0000);
884
885 rt2500usb_register_read(rt2x00dev, MAC_CSR8, &reg);
886 rt2x00_set_field16(&reg, MAC_CSR8_MAX_FRAME_UNIT,
887 rt2x00dev->rx->data_size);
888 rt2500usb_register_write(rt2x00dev, MAC_CSR8, reg);
889
890 rt2500usb_register_read(rt2x00dev, TXRX_CSR0, &reg);
ac59b496 891 rt2x00_set_field16(&reg, TXRX_CSR0_ALGORITHM, CIPHER_NONE);
95ea3627 892 rt2x00_set_field16(&reg, TXRX_CSR0_IV_OFFSET, IEEE80211_HEADER);
dddfb478 893 rt2x00_set_field16(&reg, TXRX_CSR0_KEY_ID, 0);
95ea3627
ID		 894 rt2500usb_register_write(rt2x00dev, TXRX_CSR0, reg);
895
896 rt2500usb_register_read(rt2x00dev, MAC_CSR18, &reg);
897 rt2x00_set_field16(&reg, MAC_CSR18_DELAY_AFTER_BEACON, 90);
898 rt2500usb_register_write(rt2x00dev, MAC_CSR18, reg);
899
900 rt2500usb_register_read(rt2x00dev, PHY_CSR4, &reg);
901 rt2x00_set_field16(&reg, PHY_CSR4_LOW_RF_LE, 1);
902 rt2500usb_register_write(rt2x00dev, PHY_CSR4, reg);
903
904 rt2500usb_register_read(rt2x00dev, TXRX_CSR1, &reg);
905 rt2x00_set_field16(&reg, TXRX_CSR1_AUTO_SEQUENCE, 1);
906 rt2500usb_register_write(rt2x00dev, TXRX_CSR1, reg);
907
908 return 0;
909}
910
2b08da3f 911static int rt2500usb_wait_bbp_ready(struct rt2x00_dev *rt2x00dev)
95ea3627
ID		 912{
913 unsigned int i;
95ea3627 914 u8 value;
95ea3627
ID		 915
916 for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
917 rt2500usb_bbp_read(rt2x00dev, 0, &value);
918 if ((value != 0xff) && (value != 0x00))
2b08da3f 919 return 0;
95ea3627
ID		 920 udelay(REGISTER_BUSY_DELAY);
921 }
922
923 ERROR(rt2x00dev, "BBP register access failed, aborting.\n");
924 return -EACCES;
2b08da3f
ID		 925}
926
927static int rt2500usb_init_bbp(struct rt2x00_dev *rt2x00dev)
928{
929 unsigned int i;
930 u16 eeprom;
931 u8 value;
932 u8 reg_id;
933
934 if (unlikely(rt2500usb_wait_bbp_ready(rt2x00dev)))
935 return -EACCES;
95ea3627 936
95ea3627
ID		 937 rt2500usb_bbp_write(rt2x00dev, 3, 0x02);
938 rt2500usb_bbp_write(rt2x00dev, 4, 0x19);
939 rt2500usb_bbp_write(rt2x00dev, 14, 0x1c);
940 rt2500usb_bbp_write(rt2x00dev, 15, 0x30);
941 rt2500usb_bbp_write(rt2x00dev, 16, 0xac);
942 rt2500usb_bbp_write(rt2x00dev, 18, 0x18);
943 rt2500usb_bbp_write(rt2x00dev, 19, 0xff);
944 rt2500usb_bbp_write(rt2x00dev, 20, 0x1e);
945 rt2500usb_bbp_write(rt2x00dev, 21, 0x08);
946 rt2500usb_bbp_write(rt2x00dev, 22, 0x08);
947 rt2500usb_bbp_write(rt2x00dev, 23, 0x08);
948 rt2500usb_bbp_write(rt2x00dev, 24, 0x80);
949 rt2500usb_bbp_write(rt2x00dev, 25, 0x50);
950 rt2500usb_bbp_write(rt2x00dev, 26, 0x08);
951 rt2500usb_bbp_write(rt2x00dev, 27, 0x23);
952 rt2500usb_bbp_write(rt2x00dev, 30, 0x10);
953 rt2500usb_bbp_write(rt2x00dev, 31, 0x2b);
954 rt2500usb_bbp_write(rt2x00dev, 32, 0xb9);
955 rt2500usb_bbp_write(rt2x00dev, 34, 0x12);
956 rt2500usb_bbp_write(rt2x00dev, 35, 0x50);
957 rt2500usb_bbp_write(rt2x00dev, 39, 0xc4);
958 rt2500usb_bbp_write(rt2x00dev, 40, 0x02);
959 rt2500usb_bbp_write(rt2x00dev, 41, 0x60);
960 rt2500usb_bbp_write(rt2x00dev, 53, 0x10);
961 rt2500usb_bbp_write(rt2x00dev, 54, 0x18);
962 rt2500usb_bbp_write(rt2x00dev, 56, 0x08);
963 rt2500usb_bbp_write(rt2x00dev, 57, 0x10);
964 rt2500usb_bbp_write(rt2x00dev, 58, 0x08);
965 rt2500usb_bbp_write(rt2x00dev, 61, 0x60);
966 rt2500usb_bbp_write(rt2x00dev, 62, 0x10);
967 rt2500usb_bbp_write(rt2x00dev, 75, 0xff);
968
95ea3627
ID		 969 for (i = 0; i < EEPROM_BBP_SIZE; i++) {
970 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBP_START + i, &eeprom);
971
972 if (eeprom != 0xffff && eeprom != 0x0000) {
973 reg_id = rt2x00_get_field16(eeprom, EEPROM_BBP_REG_ID);
974 value = rt2x00_get_field16(eeprom, EEPROM_BBP_VALUE);
95ea3627
ID		 975 rt2500usb_bbp_write(rt2x00dev, reg_id, value);
976 }
977 }
95ea3627
ID		 978
979 return 0;
980}
981
982/*
983 * Device state switch handlers.
984 */
95ea3627
ID		 985static int rt2500usb_enable_radio(struct rt2x00_dev *rt2x00dev)
986{
987 /*
988 * Initialize all registers.
989 */
2b08da3f
ID		 990 if (unlikely(rt2500usb_init_registers(rt2x00dev) ||
991 rt2500usb_init_bbp(rt2x00dev)))
95ea3627 992 return -EIO;
95ea3627 993
95ea3627
ID		 994 return 0;
995}
996
997static void rt2500usb_disable_radio(struct rt2x00_dev *rt2x00dev)
998{
95ea3627
ID		 999 rt2500usb_register_write(rt2x00dev, MAC_CSR13, 0x2121);
1000 rt2500usb_register_write(rt2x00dev, MAC_CSR14, 0x2121);
1001
1002 /*
1003 * Disable synchronisation.
1004 */
1005 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, 0);
1006
1007 rt2x00usb_disable_radio(rt2x00dev);
1008}
1009
1010static int rt2500usb_set_state(struct rt2x00_dev *rt2x00dev,
1011 enum dev_state state)
1012{
1013 u16 reg;
1014 u16 reg2;
1015 unsigned int i;
1016 char put_to_sleep;
1017 char bbp_state;
1018 char rf_state;
1019
1020 put_to_sleep = (state != STATE_AWAKE);
1021
1022 reg = 0;
1023 rt2x00_set_field16(&reg, MAC_CSR17_BBP_DESIRE_STATE, state);
1024 rt2x00_set_field16(&reg, MAC_CSR17_RF_DESIRE_STATE, state);
1025 rt2x00_set_field16(&reg, MAC_CSR17_PUT_TO_SLEEP, put_to_sleep);
1026 rt2500usb_register_write(rt2x00dev, MAC_CSR17, reg);
1027 rt2x00_set_field16(&reg, MAC_CSR17_SET_STATE, 1);
1028 rt2500usb_register_write(rt2x00dev, MAC_CSR17, reg);
1029
1030 /*
1031 * Device is not guaranteed to be in the requested state yet.
1032 * We must wait until the register indicates that the
1033 * device has entered the correct state.
1034 */
1035 for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
1036 rt2500usb_register_read(rt2x00dev, MAC_CSR17, &reg2);
1037 bbp_state = rt2x00_get_field16(reg2, MAC_CSR17_BBP_CURR_STATE);
1038 rf_state = rt2x00_get_field16(reg2, MAC_CSR17_RF_CURR_STATE);
1039 if (bbp_state == state && rf_state == state)
1040 return 0;
1041 rt2500usb_register_write(rt2x00dev, MAC_CSR17, reg);
1042 msleep(30);
1043 }
1044
95ea3627
ID		 1045 return -EBUSY;
1046}
1047
1048static int rt2500usb_set_device_state(struct rt2x00_dev *rt2x00dev,
1049 enum dev_state state)
1050{
1051 int retval = 0;
1052
1053 switch (state) {
1054 case STATE_RADIO_ON:
1055 retval = rt2500usb_enable_radio(rt2x00dev);
1056 break;
1057 case STATE_RADIO_OFF:
1058 rt2500usb_disable_radio(rt2x00dev);
1059 break;
2b08da3f 1060 case STATE_RADIO_IRQ_ON:
78e256c9 1061 case STATE_RADIO_IRQ_ON_ISR:
2b08da3f 1062 case STATE_RADIO_IRQ_OFF:
78e256c9 1063 case STATE_RADIO_IRQ_OFF_ISR:
2b08da3f 1064 /* No support, but no error either */
95ea3627
ID		 1065 break;
1066 case STATE_DEEP_SLEEP:
1067 case STATE_SLEEP:
1068 case STATE_STANDBY:
1069 case STATE_AWAKE:
1070 retval = rt2500usb_set_state(rt2x00dev, state);
1071 break;
1072 default:
1073 retval = -ENOTSUPP;
1074 break;
1075 }
1076
2b08da3f
ID		 1077 if (unlikely(retval))
1078 ERROR(rt2x00dev, "Device failed to enter state %d (%d).\n",
1079 state, retval);
1080
95ea3627
ID		 1081 return retval;
1082}
1083
1084/*
1085 * TX descriptor initialization
1086 */
93331458 1087static void rt2500usb_write_tx_desc(struct queue_entry *entry,
61486e0f 1088 struct txentry_desc *txdesc)
95ea3627 1089{
93331458
ID		 1090 struct skb_frame_desc *skbdesc = get_skb_frame_desc(entry->skb);
1091 __le32 *txd = (__le32 *) entry->skb->data;
95ea3627
ID		 1092 u32 word;
1093
1094 /*
1095 * Start writing the descriptor words.
1096 */
e01f1ec3
GW		 1097 rt2x00_desc_read(txd, 0, &word);
1098 rt2x00_set_field32(&word, TXD_W0_RETRY_LIMIT, txdesc->retry_limit);
1099 rt2x00_set_field32(&word, TXD_W0_MORE_FRAG,
1100 test_bit(ENTRY_TXD_MORE_FRAG, &txdesc->flags));
1101 rt2x00_set_field32(&word, TXD_W0_ACK,
1102 test_bit(ENTRY_TXD_ACK, &txdesc->flags));
1103 rt2x00_set_field32(&word, TXD_W0_TIMESTAMP,
1104 test_bit(ENTRY_TXD_REQ_TIMESTAMP, &txdesc->flags));
1105 rt2x00_set_field32(&word, TXD_W0_OFDM,
1106 (txdesc->rate_mode == RATE_MODE_OFDM));
1107 rt2x00_set_field32(&word, TXD_W0_NEW_SEQ,
1108 test_bit(ENTRY_TXD_FIRST_FRAGMENT, &txdesc->flags));
1109 rt2x00_set_field32(&word, TXD_W0_IFS, txdesc->ifs);
1110 rt2x00_set_field32(&word, TXD_W0_DATABYTE_COUNT, txdesc->length);
1111 rt2x00_set_field32(&word, TXD_W0_CIPHER, !!txdesc->cipher);
1112 rt2x00_set_field32(&word, TXD_W0_KEY_ID, txdesc->key_idx);
1113 rt2x00_desc_write(txd, 0, word);
1114
95ea3627 1115 rt2x00_desc_read(txd, 1, &word);
dddfb478 1116 rt2x00_set_field32(&word, TXD_W1_IV_OFFSET, txdesc->iv_offset);
2b23cdaa
HS		 1117 rt2x00_set_field32(&word, TXD_W1_AIFS, entry->queue->aifs);
1118 rt2x00_set_field32(&word, TXD_W1_CWMIN, entry->queue->cw_min);
1119 rt2x00_set_field32(&word, TXD_W1_CWMAX, entry->queue->cw_max);
95ea3627
ID		 1120 rt2x00_desc_write(txd, 1, word);
1121
1122 rt2x00_desc_read(txd, 2, &word);
181d6902
ID		 1123 rt2x00_set_field32(&word, TXD_W2_PLCP_SIGNAL, txdesc->signal);
1124 rt2x00_set_field32(&word, TXD_W2_PLCP_SERVICE, txdesc->service);
1125 rt2x00_set_field32(&word, TXD_W2_PLCP_LENGTH_LOW, txdesc->length_low);
1126 rt2x00_set_field32(&word, TXD_W2_PLCP_LENGTH_HIGH, txdesc->length_high);
95ea3627
ID		 1127 rt2x00_desc_write(txd, 2, word);
1128
dddfb478
ID		 1129 if (test_bit(ENTRY_TXD_ENCRYPT, &txdesc->flags)) {
1130 _rt2x00_desc_write(txd, 3, skbdesc->iv[0]);
1131 _rt2x00_desc_write(txd, 4, skbdesc->iv[1]);
1132 }
1133
85b7a8b3
GW		 1134 /*
1135 * Register descriptor details in skb frame descriptor.
1136 */
0b8004aa 1137 skbdesc->flags |= SKBDESC_DESC_IN_SKB;
85b7a8b3
GW		 1138 skbdesc->desc = txd;
1139 skbdesc->desc_len = TXD_DESC_SIZE;
95ea3627
ID		 1140}
1141
bd88a781
ID		 1142/*
1143 * TX data initialization
1144 */
1145static void rt2500usb_beacondone(struct urb *urb);
1146
f224f4ef
GW		 1147static void rt2500usb_write_beacon(struct queue_entry *entry,
1148 struct txentry_desc *txdesc)
bd88a781
ID		 1149{
1150 struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev;
1151 struct usb_device *usb_dev = to_usb_device_intf(rt2x00dev->dev);
1152 struct queue_entry_priv_usb_bcn *bcn_priv = entry->priv_data;
f1ca2167 1153 int pipe = usb_sndbulkpipe(usb_dev, entry->queue->usb_endpoint);
bd88a781 1154 int length;
d61cb266 1155 u16 reg, reg0;
bd88a781 1156
bd88a781
ID		 1157 /*
1158 * Disable beaconing while we are reloading the beacon data,
1159 * otherwise we might be sending out invalid data.
1160 */
1161 rt2500usb_register_read(rt2x00dev, TXRX_CSR19, &reg);
bd88a781
ID		 1162 rt2x00_set_field16(&reg, TXRX_CSR19_BEACON_GEN, 0);
1163 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
1164
0b8004aa
GW		 1165 /*
1166 * Add space for the descriptor in front of the skb.
1167 */
1168 skb_push(entry->skb, TXD_DESC_SIZE);
1169 memset(entry->skb->data, 0, TXD_DESC_SIZE);
1170
5c3b685c
GW		 1171 /*
1172 * Write the TX descriptor for the beacon.
1173 */
93331458 1174 rt2500usb_write_tx_desc(entry, txdesc);
5c3b685c
GW		 1175
1176 /*
1177 * Dump beacon to userspace through debugfs.
1178 */
1179 rt2x00debug_dump_frame(rt2x00dev, DUMP_FRAME_BEACON, entry->skb);
1180
bd88a781
ID		 1181 /*
1182 * USB devices cannot blindly pass the skb->len as the
1183 * length of the data to usb_fill_bulk_urb. Pass the skb
1184 * to the driver to determine what the length should be.
1185 */
f1ca2167 1186 length = rt2x00dev->ops->lib->get_tx_data_len(entry);
bd88a781
ID		 1187
1188 usb_fill_bulk_urb(bcn_priv->urb, usb_dev, pipe,
1189 entry->skb->data, length, rt2500usb_beacondone,
1190 entry);
1191
1192 /*
1193 * Second we need to create the guardian byte.
1194 * We only need a single byte, so lets recycle
1195 * the 'flags' field we are not using for beacons.
1196 */
1197 bcn_priv->guardian_data = 0;
1198 usb_fill_bulk_urb(bcn_priv->guardian_urb, usb_dev, pipe,
1199 &bcn_priv->guardian_data, 1, rt2500usb_beacondone,
1200 entry);
1201
1202 /*
1203 * Send out the guardian byte.
1204 */
1205 usb_submit_urb(bcn_priv->guardian_urb, GFP_ATOMIC);
d61cb266
GW		 1206
1207 /*
1208 * Enable beaconing again.
1209 */
1210 rt2x00_set_field16(&reg, TXRX_CSR19_TSF_COUNT, 1);
1211 rt2x00_set_field16(&reg, TXRX_CSR19_TBCN, 1);
1212 reg0 = reg;
1213 rt2x00_set_field16(&reg, TXRX_CSR19_BEACON_GEN, 1);
1214 /*
1215 * Beacon generation will fail initially.
1216 * To prevent this we need to change the TXRX_CSR19
1217 * register several times (reg0 is the same as reg
1218 * except for TXRX_CSR19_BEACON_GEN, which is 0 in reg0
1219 * and 1 in reg).
1220 */
1221 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
1222 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg0);
1223 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
1224 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg0);
1225 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
bd88a781
ID		 1226}
1227
f1ca2167 1228static int rt2500usb_get_tx_data_len(struct queue_entry *entry)
dd9fa2d2
ID		 1229{
1230 int length;
1231
1232 /*
1233 * The length _must_ be a multiple of 2,
1234 * but it must _not_ be a multiple of the USB packet size.
1235 */
f1ca2167
ID		 1236 length = roundup(entry->skb->len, 2);
1237 length += (2 * !(length % entry->queue->usb_maxpacket));
dd9fa2d2
ID		 1238
1239 return length;
1240}
1241
95ea3627
ID		 1242/*
1243 * RX control handlers
1244 */
181d6902
ID		 1245static void rt2500usb_fill_rxdone(struct queue_entry *entry,
1246 struct rxdone_entry_desc *rxdesc)
95ea3627 1247{
dddfb478 1248 struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev;
b8be63ff 1249 struct queue_entry_priv_usb *entry_priv = entry->priv_data;
181d6902
ID		 1250 struct skb_frame_desc *skbdesc = get_skb_frame_desc(entry->skb);
1251 __le32 *rxd =
1252 (__le32 *)(entry->skb->data +
b8be63ff
ID		 1253 (entry_priv->urb->actual_length -
1254 entry->queue->desc_size));
95ea3627
ID		 1255 u32 word0;
1256 u32 word1;
1257
f855c10b 1258 /*
a26cbc65
GW		 1259 * Copy descriptor to the skbdesc->desc buffer, making it safe from moving of
1260 * frame data in rt2x00usb.
f855c10b 1261 */
a26cbc65 1262 memcpy(skbdesc->desc, rxd, skbdesc->desc_len);
70a96109 1263 rxd = (__le32 *)skbdesc->desc;
f855c10b
ID		 1264
1265 /*
70a96109 1266 * It is now safe to read the descriptor on all architectures.
f855c10b 1267 */
95ea3627
ID		 1268 rt2x00_desc_read(rxd, 0, &word0);
1269 rt2x00_desc_read(rxd, 1, &word1);
1270
4150c572 1271 if (rt2x00_get_field32(word0, RXD_W0_CRC_ERROR))
181d6902 1272 rxdesc->flags |= RX_FLAG_FAILED_FCS_CRC;
4150c572 1273 if (rt2x00_get_field32(word0, RXD_W0_PHYSICAL_ERROR))
181d6902 1274 rxdesc->flags |= RX_FLAG_FAILED_PLCP_CRC;
95ea3627 1275
78b8f3b0
GW		 1276 rxdesc->cipher = rt2x00_get_field32(word0, RXD_W0_CIPHER);
1277 if (rt2x00_get_field32(word0, RXD_W0_CIPHER_ERROR))
1278 rxdesc->cipher_status = RX_CRYPTO_FAIL_KEY;
dddfb478
ID		 1279
1280 if (rxdesc->cipher != CIPHER_NONE) {
1281 _rt2x00_desc_read(rxd, 2, &rxdesc->iv[0]);
1282 _rt2x00_desc_read(rxd, 3, &rxdesc->iv[1]);
74415edb
ID		 1283 rxdesc->dev_flags |= RXDONE_CRYPTO_IV;
1284
dddfb478
ID		 1285 /* ICV is located at the end of frame */
1286
f3d340c1 1287 rxdesc->flags |= RX_FLAG_MMIC_STRIPPED;
dddfb478
ID		 1288 if (rxdesc->cipher_status == RX_CRYPTO_SUCCESS)
1289 rxdesc->flags |= RX_FLAG_DECRYPTED;
1290 else if (rxdesc->cipher_status == RX_CRYPTO_FAIL_MIC)
1291 rxdesc->flags |= RX_FLAG_MMIC_ERROR;
1292 }
1293
95ea3627
ID		 1294 /*
1295 * Obtain the status about this packet.
89993890
ID		 1296 * When frame was received with an OFDM bitrate,
1297 * the signal is the PLCP value. If it was received with
1298 * a CCK bitrate the signal is the rate in 100kbit/s.
95ea3627 1299 */
181d6902 1300 rxdesc->signal = rt2x00_get_field32(word1, RXD_W1_SIGNAL);
dddfb478
ID		 1301 rxdesc->rssi =
1302 rt2x00_get_field32(word1, RXD_W1_RSSI) - rt2x00dev->rssi_offset;
181d6902 1303 rxdesc->size = rt2x00_get_field32(word0, RXD_W0_DATABYTE_COUNT);
19d30e02 1304
19d30e02
ID		 1305 if (rt2x00_get_field32(word0, RXD_W0_OFDM))
1306 rxdesc->dev_flags |= RXDONE_SIGNAL_PLCP;
6c6aa3c0
ID		 1307 else
1308 rxdesc->dev_flags |= RXDONE_SIGNAL_BITRATE;
19d30e02
ID		 1309 if (rt2x00_get_field32(word0, RXD_W0_MY_BSS))
1310 rxdesc->dev_flags |= RXDONE_MY_BSS;
7d1de806 1311
2ae23854
MN		 1312 /*
1313 * Adjust the skb memory window to the frame boundaries.
1314 */
2ae23854 1315 skb_trim(entry->skb, rxdesc->size);
95ea3627
ID		 1316}
1317
1318/*
1319 * Interrupt functions.
1320 */
1321static void rt2500usb_beacondone(struct urb *urb)
1322{
181d6902 1323 struct queue_entry *entry = (struct queue_entry *)urb->context;
b8be63ff 1324 struct queue_entry_priv_usb_bcn *bcn_priv = entry->priv_data;
95ea3627 1325
0262ab0d 1326 if (!test_bit(DEVICE_STATE_ENABLED_RADIO, &entry->queue->rt2x00dev->flags))
95ea3627
ID		 1327 return;
1328
1329 /*
1330 * Check if this was the guardian beacon,
1331 * if that was the case we need to send the real beacon now.
1332 * Otherwise we should free the sk_buffer, the device
1333 * should be doing the rest of the work now.
1334 */
b8be63ff
ID		 1335 if (bcn_priv->guardian_urb == urb) {
1336 usb_submit_urb(bcn_priv->urb, GFP_ATOMIC);
1337 } else if (bcn_priv->urb == urb) {
181d6902
ID		 1338 dev_kfree_skb(entry->skb);
1339 entry->skb = NULL;
95ea3627
ID		 1340 }
1341}
1342
1343/*
1344 * Device probe functions.
1345 */
1346static int rt2500usb_validate_eeprom(struct rt2x00_dev *rt2x00dev)
1347{
1348 u16 word;
1349 u8 *mac;
6bb40dd1 1350 u8 bbp;
95ea3627
ID		 1351
1352 rt2x00usb_eeprom_read(rt2x00dev, rt2x00dev->eeprom, EEPROM_SIZE);
1353
1354 /*
1355 * Start validation of the data that has been read.
1356 */
1357 mac = rt2x00_eeprom_addr(rt2x00dev, EEPROM_MAC_ADDR_0);
1358 if (!is_valid_ether_addr(mac)) {
1359 random_ether_addr(mac);
e174961c 1360 EEPROM(rt2x00dev, "MAC: %pM\n", mac);
95ea3627
ID		 1361 }
1362
1363 rt2x00_eeprom_read(rt2x00dev, EEPROM_ANTENNA, &word);
1364 if (word == 0xffff) {
1365 rt2x00_set_field16(&word, EEPROM_ANTENNA_NUM, 2);
362f3b6b
ID		 1366 rt2x00_set_field16(&word, EEPROM_ANTENNA_TX_DEFAULT,
1367 ANTENNA_SW_DIVERSITY);
1368 rt2x00_set_field16(&word, EEPROM_ANTENNA_RX_DEFAULT,
1369 ANTENNA_SW_DIVERSITY);
1370 rt2x00_set_field16(&word, EEPROM_ANTENNA_LED_MODE,
1371 LED_MODE_DEFAULT);
95ea3627
ID		 1372 rt2x00_set_field16(&word, EEPROM_ANTENNA_DYN_TXAGC, 0);
1373 rt2x00_set_field16(&word, EEPROM_ANTENNA_HARDWARE_RADIO, 0);
1374 rt2x00_set_field16(&word, EEPROM_ANTENNA_RF_TYPE, RF2522);
1375 rt2x00_eeprom_write(rt2x00dev, EEPROM_ANTENNA, word);
1376 EEPROM(rt2x00dev, "Antenna: 0x%04x\n", word);
1377 }
1378
1379 rt2x00_eeprom_read(rt2x00dev, EEPROM_NIC, &word);
1380 if (word == 0xffff) {
1381 rt2x00_set_field16(&word, EEPROM_NIC_CARDBUS_ACCEL, 0);
1382 rt2x00_set_field16(&word, EEPROM_NIC_DYN_BBP_TUNE, 0);
1383 rt2x00_set_field16(&word, EEPROM_NIC_CCK_TX_POWER, 0);
1384 rt2x00_eeprom_write(rt2x00dev, EEPROM_NIC, word);
1385 EEPROM(rt2x00dev, "NIC: 0x%04x\n", word);
1386 }
1387
1388 rt2x00_eeprom_read(rt2x00dev, EEPROM_CALIBRATE_OFFSET, &word);
1389 if (word == 0xffff) {
1390 rt2x00_set_field16(&word, EEPROM_CALIBRATE_OFFSET_RSSI,
1391 DEFAULT_RSSI_OFFSET);
1392 rt2x00_eeprom_write(rt2x00dev, EEPROM_CALIBRATE_OFFSET, word);
1393 EEPROM(rt2x00dev, "Calibrate offset: 0x%04x\n", word);
1394 }
1395
1396 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE, &word);
1397 if (word == 0xffff) {
1398 rt2x00_set_field16(&word, EEPROM_BBPTUNE_THRESHOLD, 45);
1399 rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE, word);
1400 EEPROM(rt2x00dev, "BBPtune: 0x%04x\n", word);
1401 }
1402
6bb40dd1
ID		 1403 /*
1404 * Switch lower vgc bound to current BBP R17 value,
1405 * lower the value a bit for better quality.
1406 */
1407 rt2500usb_bbp_read(rt2x00dev, 17, &bbp);
1408 bbp -= 6;
1409
95ea3627
ID		 1410 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_VGC, &word);
1411 if (word == 0xffff) {
1412 rt2x00_set_field16(&word, EEPROM_BBPTUNE_VGCUPPER, 0x40);
6bb40dd1 1413 rt2x00_set_field16(&word, EEPROM_BBPTUNE_VGCLOWER, bbp);
95ea3627
ID		 1414 rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_VGC, word);
1415 EEPROM(rt2x00dev, "BBPtune vgc: 0x%04x\n", word);
8d8acd46
ID		 1416 } else {
1417 rt2x00_set_field16(&word, EEPROM_BBPTUNE_VGCLOWER, bbp);
1418 rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_VGC, word);
95ea3627
ID		 1419 }
1420
1421 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R17, &word);
1422 if (word == 0xffff) {
1423 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R17_LOW, 0x48);
1424 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R17_HIGH, 0x41);
1425 rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_R17, word);
1426 EEPROM(rt2x00dev, "BBPtune r17: 0x%04x\n", word);
1427 }
1428
1429 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R24, &word);
1430 if (word == 0xffff) {
1431 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R24_LOW, 0x40);
1432 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R24_HIGH, 0x80);
1433 rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_R24, word);
1434 EEPROM(rt2x00dev, "BBPtune r24: 0x%04x\n", word);
1435 }
1436
1437 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R25, &word);
1438 if (word == 0xffff) {
1439 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R25_LOW, 0x40);
1440 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R25_HIGH, 0x50);
1441 rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_R25, word);
1442 EEPROM(rt2x00dev, "BBPtune r25: 0x%04x\n", word);
1443 }
1444
1445 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R61, &word);
1446 if (word == 0xffff) {
1447 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R61_LOW, 0x60);
1448 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R61_HIGH, 0x6d);
1449 rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_R61, word);
1450 EEPROM(rt2x00dev, "BBPtune r61: 0x%04x\n", word);
1451 }
1452
1453 return 0;
1454}
1455
1456static int rt2500usb_init_eeprom(struct rt2x00_dev *rt2x00dev)
1457{
1458 u16 reg;
1459 u16 value;
1460 u16 eeprom;
1461
1462 /*
1463 * Read EEPROM word for configuration.
1464 */
1465 rt2x00_eeprom_read(rt2x00dev, EEPROM_ANTENNA, &eeprom);
1466
1467 /*
1468 * Identify RF chipset.
1469 */
1470 value = rt2x00_get_field16(eeprom, EEPROM_ANTENNA_RF_TYPE);
1471 rt2500usb_register_read(rt2x00dev, MAC_CSR0, &reg);
1472 rt2x00_set_chip(rt2x00dev, RT2570, value, reg);
1473
49e721ec 1474 if (((reg & 0xfff0) != 0) || ((reg & 0x0000000f) == 0)) {
95ea3627
ID		 1475 ERROR(rt2x00dev, "Invalid RT chipset detected.\n");
1476 return -ENODEV;
1477 }
1478
5122d898
GW		 1479 if (!rt2x00_rf(rt2x00dev, RF2522) &&
1480 !rt2x00_rf(rt2x00dev, RF2523) &&
1481 !rt2x00_rf(rt2x00dev, RF2524) &&
1482 !rt2x00_rf(rt2x00dev, RF2525) &&
1483 !rt2x00_rf(rt2x00dev, RF2525E) &&
1484 !rt2x00_rf(rt2x00dev, RF5222)) {
95ea3627
ID		 1485 ERROR(rt2x00dev, "Invalid RF chipset detected.\n");
1486 return -ENODEV;
1487 }
1488
1489 /*
1490 * Identify default antenna configuration.
1491 */
addc81bd 1492 rt2x00dev->default_ant.tx =
95ea3627 1493 rt2x00_get_field16(eeprom, EEPROM_ANTENNA_TX_DEFAULT);
addc81bd 1494 rt2x00dev->default_ant.rx =
95ea3627
ID		 1495 rt2x00_get_field16(eeprom, EEPROM_ANTENNA_RX_DEFAULT);
1496
addc81bd
ID		 1497 /*
1498 * When the eeprom indicates SW_DIVERSITY use HW_DIVERSITY instead.
1499 * I am not 100% sure about this, but the legacy drivers do not
1500 * indicate antenna swapping in software is required when
1501 * diversity is enabled.
1502 */
1503 if (rt2x00dev->default_ant.tx == ANTENNA_SW_DIVERSITY)
1504 rt2x00dev->default_ant.tx = ANTENNA_HW_DIVERSITY;
1505 if (rt2x00dev->default_ant.rx == ANTENNA_SW_DIVERSITY)
1506 rt2x00dev->default_ant.rx = ANTENNA_HW_DIVERSITY;
1507
95ea3627
ID		 1508 /*
1509 * Store led mode, for correct led behaviour.
1510 */
771fd565 1511#ifdef CONFIG_RT2X00_LIB_LEDS
a9450b70
ID		 1512 value = rt2x00_get_field16(eeprom, EEPROM_ANTENNA_LED_MODE);
1513
475433be 1514 rt2500usb_init_led(rt2x00dev, &rt2x00dev->led_radio, LED_TYPE_RADIO);
3d3e451f
ID		 1515 if (value == LED_MODE_TXRX_ACTIVITY ||
1516 value == LED_MODE_DEFAULT ||
1517 value == LED_MODE_ASUS)
475433be
ID		 1518 rt2500usb_init_led(rt2x00dev, &rt2x00dev->led_qual,
1519 LED_TYPE_ACTIVITY);
771fd565 1520#endif /* CONFIG_RT2X00_LIB_LEDS */
95ea3627 1521
7396faf4
ID		 1522 /*
1523 * Detect if this device has an hardware controlled radio.
1524 */
7396faf4
ID		 1525 if (rt2x00_get_field16(eeprom, EEPROM_ANTENNA_HARDWARE_RADIO))
1526 __set_bit(CONFIG_SUPPORT_HW_BUTTON, &rt2x00dev->flags);
7396faf4 1527
95ea3627
ID		 1528 /*
1529 * Read the RSSI <-> dBm offset information.
1530 */
1531 rt2x00_eeprom_read(rt2x00dev, EEPROM_CALIBRATE_OFFSET, &eeprom);
1532 rt2x00dev->rssi_offset =
1533 rt2x00_get_field16(eeprom, EEPROM_CALIBRATE_OFFSET_RSSI);
1534
1535 return 0;
1536}
1537
1538/*
1539 * RF value list for RF2522
1540 * Supports: 2.4 GHz
1541 */
1542static const struct rf_channel rf_vals_bg_2522[] = {
1543 { 1, 0x00002050, 0x000c1fda, 0x00000101, 0 },
1544 { 2, 0x00002050, 0x000c1fee, 0x00000101, 0 },
1545 { 3, 0x00002050, 0x000c2002, 0x00000101, 0 },
1546 { 4, 0x00002050, 0x000c2016, 0x00000101, 0 },
1547 { 5, 0x00002050, 0x000c202a, 0x00000101, 0 },
1548 { 6, 0x00002050, 0x000c203e, 0x00000101, 0 },
1549 { 7, 0x00002050, 0x000c2052, 0x00000101, 0 },
1550 { 8, 0x00002050, 0x000c2066, 0x00000101, 0 },
1551 { 9, 0x00002050, 0x000c207a, 0x00000101, 0 },
1552 { 10, 0x00002050, 0x000c208e, 0x00000101, 0 },
1553 { 11, 0x00002050, 0x000c20a2, 0x00000101, 0 },
1554 { 12, 0x00002050, 0x000c20b6, 0x00000101, 0 },
1555 { 13, 0x00002050, 0x000c20ca, 0x00000101, 0 },
1556 { 14, 0x00002050, 0x000c20fa, 0x00000101, 0 },
1557};
1558
1559/*
1560 * RF value list for RF2523
1561 * Supports: 2.4 GHz
1562 */
1563static const struct rf_channel rf_vals_bg_2523[] = {
1564 { 1, 0x00022010, 0x00000c9e, 0x000e0111, 0x00000a1b },
1565 { 2, 0x00022010, 0x00000ca2, 0x000e0111, 0x00000a1b },
1566 { 3, 0x00022010, 0x00000ca6, 0x000e0111, 0x00000a1b },
1567 { 4, 0x00022010, 0x00000caa, 0x000e0111, 0x00000a1b },
1568 { 5, 0x00022010, 0x00000cae, 0x000e0111, 0x00000a1b },
1569 { 6, 0x00022010, 0x00000cb2, 0x000e0111, 0x00000a1b },
1570 { 7, 0x00022010, 0x00000cb6, 0x000e0111, 0x00000a1b },
1571 { 8, 0x00022010, 0x00000cba, 0x000e0111, 0x00000a1b },
1572 { 9, 0x00022010, 0x00000cbe, 0x000e0111, 0x00000a1b },
1573 { 10, 0x00022010, 0x00000d02, 0x000e0111, 0x00000a1b },
1574 { 11, 0x00022010, 0x00000d06, 0x000e0111, 0x00000a1b },
1575 { 12, 0x00022010, 0x00000d0a, 0x000e0111, 0x00000a1b },
1576 { 13, 0x00022010, 0x00000d0e, 0x000e0111, 0x00000a1b },
1577 { 14, 0x00022010, 0x00000d1a, 0x000e0111, 0x00000a03 },
1578};
1579
1580/*
1581 * RF value list for RF2524
1582 * Supports: 2.4 GHz
1583 */
1584static const struct rf_channel rf_vals_bg_2524[] = {
1585 { 1, 0x00032020, 0x00000c9e, 0x00000101, 0x00000a1b },
1586 { 2, 0x00032020, 0x00000ca2, 0x00000101, 0x00000a1b },
1587 { 3, 0x00032020, 0x00000ca6, 0x00000101, 0x00000a1b },
1588 { 4, 0x00032020, 0x00000caa, 0x00000101, 0x00000a1b },
1589 { 5, 0x00032020, 0x00000cae, 0x00000101, 0x00000a1b },
1590 { 6, 0x00032020, 0x00000cb2, 0x00000101, 0x00000a1b },
1591 { 7, 0x00032020, 0x00000cb6, 0x00000101, 0x00000a1b },
1592 { 8, 0x00032020, 0x00000cba, 0x00000101, 0x00000a1b },
1593 { 9, 0x00032020, 0x00000cbe, 0x00000101, 0x00000a1b },
1594 { 10, 0x00032020, 0x00000d02, 0x00000101, 0x00000a1b },
1595 { 11, 0x00032020, 0x00000d06, 0x00000101, 0x00000a1b },
1596 { 12, 0x00032020, 0x00000d0a, 0x00000101, 0x00000a1b },
1597 { 13, 0x00032020, 0x00000d0e, 0x00000101, 0x00000a1b },
1598 { 14, 0x00032020, 0x00000d1a, 0x00000101, 0x00000a03 },
1599};
1600
1601/*
1602 * RF value list for RF2525
1603 * Supports: 2.4 GHz
1604 */
1605static const struct rf_channel rf_vals_bg_2525[] = {
1606 { 1, 0x00022020, 0x00080c9e, 0x00060111, 0x00000a1b },
1607 { 2, 0x00022020, 0x00080ca2, 0x00060111, 0x00000a1b },
1608 { 3, 0x00022020, 0x00080ca6, 0x00060111, 0x00000a1b },
1609 { 4, 0x00022020, 0x00080caa, 0x00060111, 0x00000a1b },
1610 { 5, 0x00022020, 0x00080cae, 0x00060111, 0x00000a1b },
1611 { 6, 0x00022020, 0x00080cb2, 0x00060111, 0x00000a1b },
1612 { 7, 0x00022020, 0x00080cb6, 0x00060111, 0x00000a1b },
1613 { 8, 0x00022020, 0x00080cba, 0x00060111, 0x00000a1b },
1614 { 9, 0x00022020, 0x00080cbe, 0x00060111, 0x00000a1b },
1615 { 10, 0x00022020, 0x00080d02, 0x00060111, 0x00000a1b },
1616 { 11, 0x00022020, 0x00080d06, 0x00060111, 0x00000a1b },
1617 { 12, 0x00022020, 0x00080d0a, 0x00060111, 0x00000a1b },
1618 { 13, 0x00022020, 0x00080d0e, 0x00060111, 0x00000a1b },
1619 { 14, 0x00022020, 0x00080d1a, 0x00060111, 0x00000a03 },
1620};
1621
1622/*
1623 * RF value list for RF2525e
1624 * Supports: 2.4 GHz
1625 */
1626static const struct rf_channel rf_vals_bg_2525e[] = {
1627 { 1, 0x00022010, 0x0000089a, 0x00060111, 0x00000e1b },
1628 { 2, 0x00022010, 0x0000089e, 0x00060111, 0x00000e07 },
1629 { 3, 0x00022010, 0x0000089e, 0x00060111, 0x00000e1b },
1630 { 4, 0x00022010, 0x000008a2, 0x00060111, 0x00000e07 },
1631 { 5, 0x00022010, 0x000008a2, 0x00060111, 0x00000e1b },
1632 { 6, 0x00022010, 0x000008a6, 0x00060111, 0x00000e07 },
1633 { 7, 0x00022010, 0x000008a6, 0x00060111, 0x00000e1b },
1634 { 8, 0x00022010, 0x000008aa, 0x00060111, 0x00000e07 },
1635 { 9, 0x00022010, 0x000008aa, 0x00060111, 0x00000e1b },
1636 { 10, 0x00022010, 0x000008ae, 0x00060111, 0x00000e07 },
1637 { 11, 0x00022010, 0x000008ae, 0x00060111, 0x00000e1b },
1638 { 12, 0x00022010, 0x000008b2, 0x00060111, 0x00000e07 },
1639 { 13, 0x00022010, 0x000008b2, 0x00060111, 0x00000e1b },
1640 { 14, 0x00022010, 0x000008b6, 0x00060111, 0x00000e23 },
1641};
1642
1643/*
1644 * RF value list for RF5222
1645 * Supports: 2.4 GHz & 5.2 GHz
1646 */
1647static const struct rf_channel rf_vals_5222[] = {
1648 { 1, 0x00022020, 0x00001136, 0x00000101, 0x00000a0b },
1649 { 2, 0x00022020, 0x0000113a, 0x00000101, 0x00000a0b },
1650 { 3, 0x00022020, 0x0000113e, 0x00000101, 0x00000a0b },
1651 { 4, 0x00022020, 0x00001182, 0x00000101, 0x00000a0b },
1652 { 5, 0x00022020, 0x00001186, 0x00000101, 0x00000a0b },
1653 { 6, 0x00022020, 0x0000118a, 0x00000101, 0x00000a0b },
1654 { 7, 0x00022020, 0x0000118e, 0x00000101, 0x00000a0b },
1655 { 8, 0x00022020, 0x00001192, 0x00000101, 0x00000a0b },
1656 { 9, 0x00022020, 0x00001196, 0x00000101, 0x00000a0b },
1657 { 10, 0x00022020, 0x0000119a, 0x00000101, 0x00000a0b },
1658 { 11, 0x00022020, 0x0000119e, 0x00000101, 0x00000a0b },
1659 { 12, 0x00022020, 0x000011a2, 0x00000101, 0x00000a0b },
1660 { 13, 0x00022020, 0x000011a6, 0x00000101, 0x00000a0b },
1661 { 14, 0x00022020, 0x000011ae, 0x00000101, 0x00000a1b },
1662
1663 /* 802.11 UNI / HyperLan 2 */
1664 { 36, 0x00022010, 0x00018896, 0x00000101, 0x00000a1f },
1665 { 40, 0x00022010, 0x0001889a, 0x00000101, 0x00000a1f },
1666 { 44, 0x00022010, 0x0001889e, 0x00000101, 0x00000a1f },
1667 { 48, 0x00022010, 0x000188a2, 0x00000101, 0x00000a1f },
1668 { 52, 0x00022010, 0x000188a6, 0x00000101, 0x00000a1f },
1669 { 66, 0x00022010, 0x000188aa, 0x00000101, 0x00000a1f },
1670 { 60, 0x00022010, 0x000188ae, 0x00000101, 0x00000a1f },
1671 { 64, 0x00022010, 0x000188b2, 0x00000101, 0x00000a1f },
1672
1673 /* 802.11 HyperLan 2 */
1674 { 100, 0x00022010, 0x00008802, 0x00000101, 0x00000a0f },
1675 { 104, 0x00022010, 0x00008806, 0x00000101, 0x00000a0f },
1676 { 108, 0x00022010, 0x0000880a, 0x00000101, 0x00000a0f },
1677 { 112, 0x00022010, 0x0000880e, 0x00000101, 0x00000a0f },
1678 { 116, 0x00022010, 0x00008812, 0x00000101, 0x00000a0f },
1679 { 120, 0x00022010, 0x00008816, 0x00000101, 0x00000a0f },
1680 { 124, 0x00022010, 0x0000881a, 0x00000101, 0x00000a0f },
1681 { 128, 0x00022010, 0x0000881e, 0x00000101, 0x00000a0f },
1682 { 132, 0x00022010, 0x00008822, 0x00000101, 0x00000a0f },
1683 { 136, 0x00022010, 0x00008826, 0x00000101, 0x00000a0f },
1684
1685 /* 802.11 UNII */
1686 { 140, 0x00022010, 0x0000882a, 0x00000101, 0x00000a0f },
1687 { 149, 0x00022020, 0x000090a6, 0x00000101, 0x00000a07 },
1688 { 153, 0x00022020, 0x000090ae, 0x00000101, 0x00000a07 },
1689 { 157, 0x00022020, 0x000090b6, 0x00000101, 0x00000a07 },
1690 { 161, 0x00022020, 0x000090be, 0x00000101, 0x00000a07 },
1691};
1692
8c5e7a5f 1693static int rt2500usb_probe_hw_mode(struct rt2x00_dev *rt2x00dev)
95ea3627
ID		 1694{
1695 struct hw_mode_spec *spec = &rt2x00dev->spec;
8c5e7a5f
ID		 1696 struct channel_info *info;
1697 char *tx_power;
95ea3627
ID		 1698 unsigned int i;
1699
1700 /*
1701 * Initialize all hw fields.
5a5b6ed6
HS		 1702 *
1703 * Don't set IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING unless we are
1704 * capable of sending the buffered frames out after the DTIM
1705 * transmission using rt2x00lib_beacondone. This will send out
1706 * multicast and broadcast traffic immediately instead of buffering it
1707 * infinitly and thus dropping it after some time.
95ea3627
ID		 1708 */
1709 rt2x00dev->hw->flags =
95ea3627 1710 IEEE80211_HW_RX_INCLUDES_FCS |
4be8c387
JB		 1711 IEEE80211_HW_SIGNAL_DBM |
1712 IEEE80211_HW_SUPPORTS_PS |
1713 IEEE80211_HW_PS_NULLFUNC_STACK;
566bfe5a 1714
14a3bf89 1715 SET_IEEE80211_DEV(rt2x00dev->hw, rt2x00dev->dev);
95ea3627
ID		 1716 SET_IEEE80211_PERM_ADDR(rt2x00dev->hw,
1717 rt2x00_eeprom_addr(rt2x00dev,
1718 EEPROM_MAC_ADDR_0));
1719
95ea3627
ID		 1720 /*
1721 * Initialize hw_mode information.
1722 */
31562e80
ID		 1723 spec->supported_bands = SUPPORT_BAND_2GHZ;
1724 spec->supported_rates = SUPPORT_RATE_CCK | SUPPORT_RATE_OFDM;
95ea3627 1725
5122d898 1726 if (rt2x00_rf(rt2x00dev, RF2522)) {
95ea3627
ID		 1727 spec->num_channels = ARRAY_SIZE(rf_vals_bg_2522);
1728 spec->channels = rf_vals_bg_2522;
5122d898 1729 } else if (rt2x00_rf(rt2x00dev, RF2523)) {
95ea3627
ID		 1730 spec->num_channels = ARRAY_SIZE(rf_vals_bg_2523);
1731 spec->channels = rf_vals_bg_2523;
5122d898 1732 } else if (rt2x00_rf(rt2x00dev, RF2524)) {
95ea3627
ID		 1733 spec->num_channels = ARRAY_SIZE(rf_vals_bg_2524);
1734 spec->channels = rf_vals_bg_2524;
5122d898 1735 } else if (rt2x00_rf(rt2x00dev, RF2525)) {
95ea3627
ID		 1736 spec->num_channels = ARRAY_SIZE(rf_vals_bg_2525);
1737 spec->channels = rf_vals_bg_2525;
5122d898 1738 } else if (rt2x00_rf(rt2x00dev, RF2525E)) {
95ea3627
ID		 1739 spec->num_channels = ARRAY_SIZE(rf_vals_bg_2525e);
1740 spec->channels = rf_vals_bg_2525e;
5122d898 1741 } else if (rt2x00_rf(rt2x00dev, RF5222)) {
31562e80 1742 spec->supported_bands |= SUPPORT_BAND_5GHZ;
95ea3627
ID		 1743 spec->num_channels = ARRAY_SIZE(rf_vals_5222);
1744 spec->channels = rf_vals_5222;
95ea3627 1745 }
8c5e7a5f
ID		 1746
1747 /*
1748 * Create channel information array
1749 */
baeb2ffa 1750 info = kcalloc(spec->num_channels, sizeof(*info), GFP_KERNEL);
8c5e7a5f
ID		 1751 if (!info)
1752 return -ENOMEM;
1753
1754 spec->channels_info = info;
1755
1756 tx_power = rt2x00_eeprom_addr(rt2x00dev, EEPROM_TXPOWER_START);
8d1331b3
ID		 1757 for (i = 0; i < 14; i++) {
1758 info[i].max_power = MAX_TXPOWER;
1759 info[i].default_power1 = TXPOWER_FROM_DEV(tx_power[i]);
1760 }
8c5e7a5f
ID		 1761
1762 if (spec->num_channels > 14) {
8d1331b3
ID		 1763 for (i = 14; i < spec->num_channels; i++) {
1764 info[i].max_power = MAX_TXPOWER;
1765 info[i].default_power1 = DEFAULT_TXPOWER;
1766 }
8c5e7a5f
ID		 1767 }
1768
1769 return 0;
95ea3627
ID		 1770}
1771
1772static int rt2500usb_probe_hw(struct rt2x00_dev *rt2x00dev)
1773{
1774 int retval;
1775
1776 /*
1777 * Allocate eeprom data.
1778 */
1779 retval = rt2500usb_validate_eeprom(rt2x00dev);
1780 if (retval)
1781 return retval;
1782
1783 retval = rt2500usb_init_eeprom(rt2x00dev);
1784 if (retval)
1785 return retval;
1786
1787 /*
1788 * Initialize hw specifications.
1789 */
8c5e7a5f
ID		 1790 retval = rt2500usb_probe_hw_mode(rt2x00dev);
1791 if (retval)
1792 return retval;
95ea3627
ID		 1793
1794 /*
181d6902 1795 * This device requires the atim queue
95ea3627 1796 */
181d6902
ID		 1797 __set_bit(DRIVER_REQUIRE_ATIM_QUEUE, &rt2x00dev->flags);
1798 __set_bit(DRIVER_REQUIRE_BEACON_GUARD, &rt2x00dev->flags);
dddfb478
ID		 1799 if (!modparam_nohwcrypt) {
1800 __set_bit(CONFIG_SUPPORT_HW_CRYPTO, &rt2x00dev->flags);
3f787bd6 1801 __set_bit(DRIVER_REQUIRE_COPY_IV, &rt2x00dev->flags);
dddfb478 1802 }
c965c74b 1803 __set_bit(DRIVER_SUPPORT_WATCHDOG, &rt2x00dev->flags);
95ea3627
ID		 1804
1805 /*
1806 * Set the rssi offset.
1807 */
1808 rt2x00dev->rssi_offset = DEFAULT_RSSI_OFFSET;
1809
1810 return 0;
1811}
1812
95ea3627
ID		 1813static const struct ieee80211_ops rt2500usb_mac80211_ops = {
1814 .tx = rt2x00mac_tx,
4150c572
JB		 1815 .start = rt2x00mac_start,
1816 .stop = rt2x00mac_stop,
95ea3627
ID		 1817 .add_interface = rt2x00mac_add_interface,
1818 .remove_interface = rt2x00mac_remove_interface,
1819 .config = rt2x00mac_config,
3a643d24 1820 .configure_filter = rt2x00mac_configure_filter,
930c06f2 1821 .set_tim = rt2x00mac_set_tim,
dddfb478 1822 .set_key = rt2x00mac_set_key,
d8147f9d
ID		 1823 .sw_scan_start = rt2x00mac_sw_scan_start,
1824 .sw_scan_complete = rt2x00mac_sw_scan_complete,
95ea3627 1825 .get_stats = rt2x00mac_get_stats,
471b3efd 1826 .bss_info_changed = rt2x00mac_bss_info_changed,
95ea3627 1827 .conf_tx = rt2x00mac_conf_tx,
e47a5cdd 1828 .rfkill_poll = rt2x00mac_rfkill_poll,
f44df18c 1829 .flush = rt2x00mac_flush,
95ea3627
ID		 1830};
1831
1832static const struct rt2x00lib_ops rt2500usb_rt2x00_ops = {
1833 .probe_hw = rt2500usb_probe_hw,
1834 .initialize = rt2x00usb_initialize,
1835 .uninitialize = rt2x00usb_uninitialize,
798b7adb 1836 .clear_entry = rt2x00usb_clear_entry,
95ea3627 1837 .set_device_state = rt2500usb_set_device_state,
7396faf4 1838 .rfkill_poll = rt2500usb_rfkill_poll,
95ea3627
ID		 1839 .link_stats = rt2500usb_link_stats,
1840 .reset_tuner = rt2500usb_reset_tuner,
c965c74b 1841 .watchdog = rt2x00usb_watchdog,
dbba306f
ID		 1842 .start_queue = rt2500usb_start_queue,
1843 .kick_queue = rt2x00usb_kick_queue,
1844 .stop_queue = rt2500usb_stop_queue,
95ea3627 1845 .write_tx_desc = rt2500usb_write_tx_desc,
bd88a781 1846 .write_beacon = rt2500usb_write_beacon,
dd9fa2d2 1847 .get_tx_data_len = rt2500usb_get_tx_data_len,
95ea3627 1848 .fill_rxdone = rt2500usb_fill_rxdone,
dddfb478
ID		 1849 .config_shared_key = rt2500usb_config_key,
1850 .config_pairwise_key = rt2500usb_config_key,
3a643d24 1851 .config_filter = rt2500usb_config_filter,
6bb40dd1 1852 .config_intf = rt2500usb_config_intf,
72810379 1853 .config_erp = rt2500usb_config_erp,
e4ea1c40 1854 .config_ant = rt2500usb_config_ant,
95ea3627
ID		 1855 .config = rt2500usb_config,
1856};
1857
181d6902 1858static const struct data_queue_desc rt2500usb_queue_rx = {
efd2f271 1859 .entry_num = 32,
181d6902
ID		 1860 .data_size = DATA_FRAME_SIZE,
1861 .desc_size = RXD_DESC_SIZE,
b8be63ff 1862 .priv_size = sizeof(struct queue_entry_priv_usb),
181d6902
ID		 1863};
1864
1865static const struct data_queue_desc rt2500usb_queue_tx = {
efd2f271 1866 .entry_num = 32,
181d6902
ID		 1867 .data_size = DATA_FRAME_SIZE,
1868 .desc_size = TXD_DESC_SIZE,
b8be63ff 1869 .priv_size = sizeof(struct queue_entry_priv_usb),
181d6902
ID		 1870};
1871
1872static const struct data_queue_desc rt2500usb_queue_bcn = {
efd2f271 1873 .entry_num = 1,
181d6902
ID		 1874 .data_size = MGMT_FRAME_SIZE,
1875 .desc_size = TXD_DESC_SIZE,
1876 .priv_size = sizeof(struct queue_entry_priv_usb_bcn),
1877};
1878
1879static const struct data_queue_desc rt2500usb_queue_atim = {
efd2f271 1880 .entry_num = 8,
181d6902
ID		 1881 .data_size = DATA_FRAME_SIZE,
1882 .desc_size = TXD_DESC_SIZE,
b8be63ff 1883 .priv_size = sizeof(struct queue_entry_priv_usb),
181d6902
ID		 1884};
1885
95ea3627 1886static const struct rt2x00_ops rt2500usb_ops = {
04d0362e
GW		 1887 .name = KBUILD_MODNAME,
1888 .max_sta_intf = 1,
1889 .max_ap_intf = 1,
1890 .eeprom_size = EEPROM_SIZE,
1891 .rf_size = RF_SIZE,
1892 .tx_queues = NUM_TX_QUEUES,
e6218cc4 1893 .extra_tx_headroom = TXD_DESC_SIZE,
04d0362e
GW		 1894 .rx = &rt2500usb_queue_rx,
1895 .tx = &rt2500usb_queue_tx,
1896 .bcn = &rt2500usb_queue_bcn,
1897 .atim = &rt2500usb_queue_atim,
1898 .lib = &rt2500usb_rt2x00_ops,
1899 .hw = &rt2500usb_mac80211_ops,
95ea3627 1900#ifdef CONFIG_RT2X00_LIB_DEBUGFS
04d0362e 1901 .debugfs = &rt2500usb_rt2x00debug,
95ea3627
ID		 1902#endif /* CONFIG_RT2X00_LIB_DEBUGFS */
1903};
1904
1905/*
1906 * rt2500usb module information.
1907 */
1908static struct usb_device_id rt2500usb_device_table[] = {
1909 /* ASUS */
1910 { USB_DEVICE(0x0b05, 0x1706), USB_DEVICE_DATA(&rt2500usb_ops) },
1911 { USB_DEVICE(0x0b05, 0x1707), USB_DEVICE_DATA(&rt2500usb_ops) },
1912 /* Belkin */
1913 { USB_DEVICE(0x050d, 0x7050), USB_DEVICE_DATA(&rt2500usb_ops) },
1914 { USB_DEVICE(0x050d, 0x7051), USB_DEVICE_DATA(&rt2500usb_ops) },
1915 { USB_DEVICE(0x050d, 0x705a), USB_DEVICE_DATA(&rt2500usb_ops) },
1916 /* Cisco Systems */
1917 { USB_DEVICE(0x13b1, 0x000d), USB_DEVICE_DATA(&rt2500usb_ops) },
1918 { USB_DEVICE(0x13b1, 0x0011), USB_DEVICE_DATA(&rt2500usb_ops) },
1919 { USB_DEVICE(0x13b1, 0x001a), USB_DEVICE_DATA(&rt2500usb_ops) },
9eb77ab0
XVP		 1920 /* CNet */
1921 { USB_DEVICE(0x1371, 0x9022), USB_DEVICE_DATA(&rt2500usb_ops) },
95ea3627
ID		 1922 /* Conceptronic */
1923 { USB_DEVICE(0x14b2, 0x3c02), USB_DEVICE_DATA(&rt2500usb_ops) },
1924 /* D-LINK */
1925 { USB_DEVICE(0x2001, 0x3c00), USB_DEVICE_DATA(&rt2500usb_ops) },
1926 /* Gigabyte */
1927 { USB_DEVICE(0x1044, 0x8001), USB_DEVICE_DATA(&rt2500usb_ops) },
1928 { USB_DEVICE(0x1044, 0x8007), USB_DEVICE_DATA(&rt2500usb_ops) },
1929 /* Hercules */
1930 { USB_DEVICE(0x06f8, 0xe000), USB_DEVICE_DATA(&rt2500usb_ops) },
1931 /* Melco */
db433feb 1932 { USB_DEVICE(0x0411, 0x005e), USB_DEVICE_DATA(&rt2500usb_ops) },
95ea3627
ID		 1933 { USB_DEVICE(0x0411, 0x0066), USB_DEVICE_DATA(&rt2500usb_ops) },
1934 { USB_DEVICE(0x0411, 0x0067), USB_DEVICE_DATA(&rt2500usb_ops) },
1935 { USB_DEVICE(0x0411, 0x008b), USB_DEVICE_DATA(&rt2500usb_ops) },
1936 { USB_DEVICE(0x0411, 0x0097), USB_DEVICE_DATA(&rt2500usb_ops) },
95ea3627
ID		 1937 /* MSI */
1938 { USB_DEVICE(0x0db0, 0x6861), USB_DEVICE_DATA(&rt2500usb_ops) },
1939 { USB_DEVICE(0x0db0, 0x6865), USB_DEVICE_DATA(&rt2500usb_ops) },
1940 { USB_DEVICE(0x0db0, 0x6869), USB_DEVICE_DATA(&rt2500usb_ops) },
1941 /* Ralink */
1942 { USB_DEVICE(0x148f, 0x1706), USB_DEVICE_DATA(&rt2500usb_ops) },
1943 { USB_DEVICE(0x148f, 0x2570), USB_DEVICE_DATA(&rt2500usb_ops) },
1944 { USB_DEVICE(0x148f, 0x2573), USB_DEVICE_DATA(&rt2500usb_ops) },
1945 { USB_DEVICE(0x148f, 0x9020), USB_DEVICE_DATA(&rt2500usb_ops) },
9eb77ab0
XVP		 1946 /* Sagem */
1947 { USB_DEVICE(0x079b, 0x004b), USB_DEVICE_DATA(&rt2500usb_ops) },
95ea3627
ID		 1948 /* Siemens */
1949 { USB_DEVICE(0x0681, 0x3c06), USB_DEVICE_DATA(&rt2500usb_ops) },
1950 /* SMC */
1951 { USB_DEVICE(0x0707, 0xee13), USB_DEVICE_DATA(&rt2500usb_ops) },
1952 /* Spairon */
1953 { USB_DEVICE(0x114b, 0x0110), USB_DEVICE_DATA(&rt2500usb_ops) },
9eb77ab0
XVP		 1954 /* SURECOM */
1955 { USB_DEVICE(0x0769, 0x11f3), USB_DEVICE_DATA(&rt2500usb_ops) },
95ea3627
ID		 1956 /* Trust */
1957 { USB_DEVICE(0x0eb0, 0x9020), USB_DEVICE_DATA(&rt2500usb_ops) },
9eb77ab0
XVP		 1958 /* VTech */
1959 { USB_DEVICE(0x0f88, 0x3012), USB_DEVICE_DATA(&rt2500usb_ops) },
95ea3627
ID		 1960 /* Zinwell */
1961 { USB_DEVICE(0x5a57, 0x0260), USB_DEVICE_DATA(&rt2500usb_ops) },
1962 { 0, }
1963};
1964
1965MODULE_AUTHOR(DRV_PROJECT);
1966MODULE_VERSION(DRV_VERSION);
1967MODULE_DESCRIPTION("Ralink RT2500 USB Wireless LAN driver.");
1968MODULE_SUPPORTED_DEVICE("Ralink RT2570 USB chipset based cards");
1969MODULE_DEVICE_TABLE(usb, rt2500usb_device_table);
1970MODULE_LICENSE("GPL");
1971
1972static struct usb_driver rt2500usb_driver = {
2360157c 1973 .name = KBUILD_MODNAME,
95ea3627
ID		 1974 .id_table = rt2500usb_device_table,
1975 .probe = rt2x00usb_probe,
1976 .disconnect = rt2x00usb_disconnect,
1977 .suspend = rt2x00usb_suspend,
1978 .resume = rt2x00usb_resume,
1979};
1980
1981static int __init rt2500usb_init(void)
1982{
1983 return usb_register(&rt2500usb_driver);
1984}
1985
1986static void __exit rt2500usb_exit(void)
1987{
1988 usb_deregister(&rt2500usb_driver);
1989}
1990
1991module_init(rt2500usb_init);
1992module_exit(rt2500usb_exit);
Linux kernel - Deliverables
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