[deliverable/linux.git] / drivers / net / wireless / rtl8187.h

/*
 * Definitions for RTL8187 hardware
 *
 * Copyright 2007 Michael Wu <flamingice@sourmilk.net>
 * Copyright 2007 Andrea Merello <andreamrl@tiscali.it>
 *
 * Based on the r8187 driver, which is:
 * Copyright 2005 Andrea Merello <andreamrl@tiscali.it>, et al.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */

#ifndef RTL8187_H
#define RTL8187_H

#include "rtl818x.h"

#define RTL8187_EEPROM_TXPWR_BASE	0x05
#define RTL8187_EEPROM_MAC_ADDR		0x07
#define RTL8187_EEPROM_TXPWR_CHAN_1	0x16	/* 3 channels */
#define RTL8187_EEPROM_TXPWR_CHAN_6	0x1B	/* 2 channels */
#define RTL8187_EEPROM_TXPWR_CHAN_4	0x3D	/* 2 channels */

#define RTL8187_REQT_READ	0xC0
#define RTL8187_REQT_WRITE	0x40
#define RTL8187_REQ_GET_REG	0x05
#define RTL8187_REQ_SET_REG	0x05

#define RTL8187_MAX_RX		0x9C4

struct rtl8187_rx_info {
	struct urb *urb;
	struct ieee80211_hw *dev;
};

struct rtl8187_rx_hdr {
	__le32 flags;
	u8 noise;
	u8 signal;
	u8 agc;
	u8 reserved;
	__le64 mac_time;
} __attribute__((packed));

struct rtl8187b_rx_hdr {
	__le32 flags;
	__le64 mac_time;
	u8 sq;
	u8 rssi;
	u8 agc;
	u8 flags2;
	__le16 snr_long2end;
	s8 pwdb_g12;
	u8 fot;
} __attribute__((packed));

/* {rtl8187,rtl8187b}_tx_info is in skb */

struct rtl8187_tx_hdr {
	__le32 flags;
	__le16 rts_duration;
	__le16 len;
	__le32 retry;
} __attribute__((packed));

struct rtl8187b_tx_hdr {
	__le32 flags;
	__le16 rts_duration;
	__le16 len;
	__le32 unused_1;
	__le16 unused_2;
	__le16 tx_duration;
	__le32 unused_3;
	__le32 retry;
	__le32 unused_4[2];
} __attribute__((packed));

enum {
	DEVICE_RTL8187,
	DEVICE_RTL8187B
};

struct rtl8187_priv {
	/* common between rtl818x drivers */
	struct rtl818x_csr *map;
	const struct rtl818x_rf_ops *rf;
	struct ieee80211_vif *vif;
	int mode;
	/* The mutex protects the TX loopback state.
	 * Any attempt to set channels concurrently locks the device.
	 */
	struct mutex conf_mutex;

	/* rtl8187 specific */
	struct ieee80211_channel channels[14];
	struct ieee80211_rate rates[12];
	struct ieee80211_supported_band band;
	struct usb_device *udev;
	u32 rx_conf;
	u16 txpwr_base;
	u16 seqno;
	u8 asic_rev;
	u8 is_rtl8187b;
	enum {
		RTL8187BvB,
		RTL8187BvD,
		RTL8187BvE
	} hw_rev;
	struct sk_buff_head rx_queue;
	u8 signal;
	u8 quality;
	u8 noise;
};

void rtl8187_write_phy(struct ieee80211_hw *dev, u8 addr, u32 data);

static inline u8 rtl818x_ioread8_idx(struct rtl8187_priv *priv,
				     u8 *addr, u8 idx)
{
	u8 val;

	usb_control_msg(priv->udev, usb_rcvctrlpipe(priv->udev, 0),
			RTL8187_REQ_GET_REG, RTL8187_REQT_READ,
			(unsigned long)addr, idx & 0x03, &val,
			sizeof(val), HZ / 2);

	return val;
}

static inline u8 rtl818x_ioread8(struct rtl8187_priv *priv, u8 *addr)
{
	return rtl818x_ioread8_idx(priv, addr, 0);
}

static inline u16 rtl818x_ioread16_idx(struct rtl8187_priv *priv,
				       __le16 *addr, u8 idx)
{
	__le16 val;

	usb_control_msg(priv->udev, usb_rcvctrlpipe(priv->udev, 0),
			RTL8187_REQ_GET_REG, RTL8187_REQT_READ,
			(unsigned long)addr, idx & 0x03, &val,
			sizeof(val), HZ / 2);

	return le16_to_cpu(val);
}

static inline u16 rtl818x_ioread16(struct rtl8187_priv *priv, __le16 *addr)
{
	return rtl818x_ioread16_idx(priv, addr, 0);
}

static inline u32 rtl818x_ioread32_idx(struct rtl8187_priv *priv,
				       __le32 *addr, u8 idx)
{
	__le32 val;

	usb_control_msg(priv->udev, usb_rcvctrlpipe(priv->udev, 0),
			RTL8187_REQ_GET_REG, RTL8187_REQT_READ,
			(unsigned long)addr, idx & 0x03, &val,
			sizeof(val), HZ / 2);

	return le32_to_cpu(val);
}

static inline u32 rtl818x_ioread32(struct rtl8187_priv *priv, __le32 *addr)
{
	return rtl818x_ioread32_idx(priv, addr, 0);
}

static inline void rtl818x_iowrite8_idx(struct rtl8187_priv *priv,
					u8 *addr, u8 val, u8 idx)
{
	usb_control_msg(priv->udev, usb_sndctrlpipe(priv->udev, 0),
			RTL8187_REQ_SET_REG, RTL8187_REQT_WRITE,
			(unsigned long)addr, idx & 0x03, &val,
			sizeof(val), HZ / 2);
}

static inline void rtl818x_iowrite8(struct rtl8187_priv *priv, u8 *addr, u8 val)
{
	rtl818x_iowrite8_idx(priv, addr, val, 0);
}

static inline void rtl818x_iowrite16_idx(struct rtl8187_priv *priv,
					 __le16 *addr, u16 val, u8 idx)
{
	__le16 buf = cpu_to_le16(val);

	usb_control_msg(priv->udev, usb_sndctrlpipe(priv->udev, 0),
			RTL8187_REQ_SET_REG, RTL8187_REQT_WRITE,
			(unsigned long)addr, idx & 0x03, &buf, sizeof(buf),
			HZ / 2);
}

static inline void rtl818x_iowrite16(struct rtl8187_priv *priv, __le16 *addr,
				     u16 val)
{
	rtl818x_iowrite16_idx(priv, addr, val, 0);
}

static inline void rtl818x_iowrite32_idx(struct rtl8187_priv *priv,
					 __le32 *addr, u32 val, u8 idx)
{
	__le32 buf = cpu_to_le32(val);

	usb_control_msg(priv->udev, usb_sndctrlpipe(priv->udev, 0),
			RTL8187_REQ_SET_REG, RTL8187_REQT_WRITE,
			(unsigned long)addr, idx & 0x03, &buf, sizeof(buf),
			HZ / 2);
}

static inline void rtl818x_iowrite32(struct rtl8187_priv *priv, __le32 *addr,
				     u32 val)
{
	rtl818x_iowrite32_idx(priv, addr, val, 0);
}

#endif /* RTL8187_H */
Commit	Line	Data
0aec00ae JL	1	/*
	2	* Definitions for RTL8187 hardware
	3	*
	4	* Copyright 2007 Michael Wu <flamingice@sourmilk.net>
	5	* Copyright 2007 Andrea Merello <andreamrl@tiscali.it>
	6	*
	7	* Based on the r8187 driver, which is:
	8	* Copyright 2005 Andrea Merello <andreamrl@tiscali.it>, et al.
	9	*
	10	* This program is free software; you can redistribute it and/or modify
	11	* it under the terms of the GNU General Public License version 2 as
	12	* published by the Free Software Foundation.
	13	*/
	14
605bebe2 MW	15	#ifndef RTL8187_H
	16	#define RTL8187_H
	17
	18	#include "rtl818x.h"
	19
	20	#define RTL8187_EEPROM_TXPWR_BASE 0x05
	21	#define RTL8187_EEPROM_MAC_ADDR 0x07
	22	#define RTL8187_EEPROM_TXPWR_CHAN_1 0x16 /* 3 channels */
	23	#define RTL8187_EEPROM_TXPWR_CHAN_6 0x1B /* 2 channels */
	24	#define RTL8187_EEPROM_TXPWR_CHAN_4 0x3D /* 2 channels */
	25
	26	#define RTL8187_REQT_READ 0xC0
	27	#define RTL8187_REQT_WRITE 0x40
	28	#define RTL8187_REQ_GET_REG 0x05
	29	#define RTL8187_REQ_SET_REG 0x05
	30
	31	#define RTL8187_MAX_RX 0x9C4
	32
	33	struct rtl8187_rx_info {
	34	struct urb *urb;
	35	struct ieee80211_hw *dev;
	36	};
	37
	38	struct rtl8187_rx_hdr {
4150c572	39	__le32 flags;
605bebe2 MW	40	u8 noise;
	41	u8 signal;
	42	u8 agc;
	43	u8 reserved;
	44	__le64 mac_time;
	45	} __attribute__((packed));
	46
c44ac0b9	47	struct rtl8187b_rx_hdr {
605bebe2	48	__le32 flags;
c44ac0b9	49	__le64 mac_time;
0ccd58fc LF	50	u8 sq;
0ccd58fc LF	51	u8 rssi;
c44ac0b9	52	u8 agc;
0ccd58fc LF	53	u8 flags2;
	54	__le16 snr_long2end;
	55	s8 pwdb_g12;
	56	u8 fot;
c44ac0b9 HTL	57	} __attribute__((packed));
	58
	59	/* {rtl8187,rtl8187b}_tx_info is in skb */
	60
c44ac0b9 HTL	61	struct rtl8187_tx_hdr {
c44ac0b9 HTL	62	__le32 flags;
605bebe2 MW	63	__le16 rts_duration;
	64	__le16 len;
	65	__le32 retry;
	66	} __attribute__((packed));
	67
c44ac0b9 HTL	68	struct rtl8187b_tx_hdr {
	69	__le32 flags;
	70	__le16 rts_duration;
	71	__le16 len;
	72	__le32 unused_1;
	73	__le16 unused_2;
	74	__le16 tx_duration;
	75	__le32 unused_3;
	76	__le32 retry;
	77	__le32 unused_4[2];
	78	} __attribute__((packed));
	79
	80	enum {
	81	DEVICE_RTL8187,
	82	DEVICE_RTL8187B
	83	};
	84
605bebe2 MW	85	struct rtl8187_priv {
	86	/* common between rtl818x drivers */
	87	struct rtl818x_csr *map;
f6532111	88	const struct rtl818x_rf_ops *rf;
32bfd35d	89	struct ieee80211_vif *vif;
605bebe2	90	int mode;
7dcdd073 LF	91	/* The mutex protects the TX loopback state.
	92	* Any attempt to set channels concurrently locks the device.
	93	*/
	94	struct mutex conf_mutex;
605bebe2 MW	95
	96	/* rtl8187 specific */
	97	struct ieee80211_channel channels[14];
	98	struct ieee80211_rate rates[12];
8318d78a	99	struct ieee80211_supported_band band;
605bebe2	100	struct usb_device *udev;
4150c572	101	u32 rx_conf;
605bebe2	102	u16 txpwr_base;
1f690d7b	103	u16 seqno;
605bebe2	104	u8 asic_rev;
c44ac0b9 HTL	105	u8 is_rtl8187b;
	106	enum {
	107	RTL8187BvB,
	108	RTL8187BvD,
	109	RTL8187BvE
	110	} hw_rev;
605bebe2	111	struct sk_buff_head rx_queue;
c44ac0b9 HTL	112	u8 signal;
	113	u8 quality;
	114	u8 noise;
605bebe2 MW	115	};
	116
	117	void rtl8187_write_phy(struct ieee80211_hw *dev, u8 addr, u32 data);
	118
c44ac0b9 HTL	119	static inline u8 rtl818x_ioread8_idx(struct rtl8187_priv *priv,
c44ac0b9 HTL	120	u8 *addr, u8 idx)
605bebe2 MW	121	{
	122	u8 val;
	123
	124	usb_control_msg(priv->udev, usb_rcvctrlpipe(priv->udev, 0),
	125	RTL8187_REQ_GET_REG, RTL8187_REQT_READ,
c44ac0b9 HTL	126	(unsigned long)addr, idx & 0x03, &val,
c44ac0b9 HTL	127	sizeof(val), HZ / 2);
605bebe2 MW	128
	129	return val;
	130	}
	131
c44ac0b9 HTL	132	static inline u8 rtl818x_ioread8(struct rtl8187_priv priv, u8 addr)
	133	{
	134	return rtl818x_ioread8_idx(priv, addr, 0);
	135	}
	136
	137	static inline u16 rtl818x_ioread16_idx(struct rtl8187_priv *priv,
	138	__le16 *addr, u8 idx)
605bebe2 MW	139	{
	140	__le16 val;
	141
	142	usb_control_msg(priv->udev, usb_rcvctrlpipe(priv->udev, 0),
	143	RTL8187_REQ_GET_REG, RTL8187_REQT_READ,
c44ac0b9 HTL	144	(unsigned long)addr, idx & 0x03, &val,
c44ac0b9 HTL	145	sizeof(val), HZ / 2);
605bebe2 MW	146
	147	return le16_to_cpu(val);
	148	}
	149
c44ac0b9 HTL	150	static inline u16 rtl818x_ioread16(struct rtl8187_priv priv, __le16 addr)
	151	{
	152	return rtl818x_ioread16_idx(priv, addr, 0);
	153	}
	154
	155	static inline u32 rtl818x_ioread32_idx(struct rtl8187_priv *priv,
	156	__le32 *addr, u8 idx)
605bebe2 MW	157	{
	158	__le32 val;
	159
	160	usb_control_msg(priv->udev, usb_rcvctrlpipe(priv->udev, 0),
	161	RTL8187_REQ_GET_REG, RTL8187_REQT_READ,
c44ac0b9 HTL	162	(unsigned long)addr, idx & 0x03, &val,
c44ac0b9 HTL	163	sizeof(val), HZ / 2);
605bebe2 MW	164
	165	return le32_to_cpu(val);
	166	}
	167
c44ac0b9 HTL	168	static inline u32 rtl818x_ioread32(struct rtl8187_priv priv, __le32 addr)
	169	{
	170	return rtl818x_ioread32_idx(priv, addr, 0);
	171	}
	172
	173	static inline void rtl818x_iowrite8_idx(struct rtl8187_priv *priv,
	174	u8 *addr, u8 val, u8 idx)
605bebe2 MW	175	{
	176	usb_control_msg(priv->udev, usb_sndctrlpipe(priv->udev, 0),
	177	RTL8187_REQ_SET_REG, RTL8187_REQT_WRITE,
c44ac0b9 HTL	178	(unsigned long)addr, idx & 0x03, &val,
	179	sizeof(val), HZ / 2);
	180	}
	181
	182	static inline void rtl818x_iowrite8(struct rtl8187_priv priv, u8 addr, u8 val)
	183	{
	184	rtl818x_iowrite8_idx(priv, addr, val, 0);
605bebe2 MW	185	}
605bebe2 MW	186
c44ac0b9 HTL	187	static inline void rtl818x_iowrite16_idx(struct rtl8187_priv *priv,
c44ac0b9 HTL	188	__le16 *addr, u16 val, u8 idx)
605bebe2 MW	189	{
	190	__le16 buf = cpu_to_le16(val);
	191
	192	usb_control_msg(priv->udev, usb_sndctrlpipe(priv->udev, 0),
	193	RTL8187_REQ_SET_REG, RTL8187_REQT_WRITE,
c44ac0b9 HTL	194	(unsigned long)addr, idx & 0x03, &buf, sizeof(buf),
c44ac0b9 HTL	195	HZ / 2);
605bebe2 MW	196	}
605bebe2 MW	197
c44ac0b9 HTL	198	static inline void rtl818x_iowrite16(struct rtl8187_priv priv, __le16 addr,
	199	u16 val)
	200	{
	201	rtl818x_iowrite16_idx(priv, addr, val, 0);
	202	}
	203
	204	static inline void rtl818x_iowrite32_idx(struct rtl8187_priv *priv,
	205	__le32 *addr, u32 val, u8 idx)
605bebe2 MW	206	{
	207	__le32 buf = cpu_to_le32(val);
	208
	209	usb_control_msg(priv->udev, usb_sndctrlpipe(priv->udev, 0),
	210	RTL8187_REQ_SET_REG, RTL8187_REQT_WRITE,
c44ac0b9 HTL	211	(unsigned long)addr, idx & 0x03, &buf, sizeof(buf),
	212	HZ / 2);
	213	}
	214
	215	static inline void rtl818x_iowrite32(struct rtl8187_priv priv, __le32 addr,
	216	u32 val)
	217	{
	218	rtl818x_iowrite32_idx(priv, addr, val, 0);
605bebe2 MW	219	}
	220
	221	#endif /* RTL8187_H */