Commit | Line | Data |
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1da177e4 LT |
1 | /* |
2 | * WaveLAN ISA driver | |
3 | * | |
4 | * Jean II - HPLB '96 | |
5 | * | |
6 | * Reorganisation and extension of the driver. | |
7 | * Original copyright follows (also see the end of this file). | |
8 | * See wavelan.p.h for details. | |
9 | * | |
10 | * | |
11 | * | |
12 | * AT&T GIS (nee NCR) WaveLAN card: | |
13 | * An Ethernet-like radio transceiver | |
14 | * controlled by an Intel 82586 coprocessor. | |
15 | */ | |
16 | ||
17 | #include "wavelan.p.h" /* Private header */ | |
18 | ||
19 | /************************* MISC SUBROUTINES **************************/ | |
20 | /* | |
21 | * Subroutines which won't fit in one of the following category | |
22 | * (WaveLAN modem or i82586) | |
23 | */ | |
24 | ||
25 | /*------------------------------------------------------------------*/ | |
26 | /* | |
27 | * Translate irq number to PSA irq parameter | |
28 | */ | |
29 | static u8 wv_irq_to_psa(int irq) | |
30 | { | |
0a92dd0a | 31 | if (irq < 0 || irq >= ARRAY_SIZE(irqvals)) |
1da177e4 LT |
32 | return 0; |
33 | ||
34 | return irqvals[irq]; | |
35 | } | |
36 | ||
37 | /*------------------------------------------------------------------*/ | |
38 | /* | |
39 | * Translate PSA irq parameter to irq number | |
40 | */ | |
41 | static int __init wv_psa_to_irq(u8 irqval) | |
42 | { | |
43 | int irq; | |
44 | ||
0a92dd0a | 45 | for (irq = 0; irq < ARRAY_SIZE(irqvals); irq++) |
1da177e4 LT |
46 | if (irqvals[irq] == irqval) |
47 | return irq; | |
48 | ||
49 | return -1; | |
50 | } | |
51 | ||
1da177e4 LT |
52 | /********************* HOST ADAPTER SUBROUTINES *********************/ |
53 | /* | |
54 | * Useful subroutines to manage the WaveLAN ISA interface | |
55 | * | |
56 | * One major difference with the PCMCIA hardware (except the port mapping) | |
57 | * is that we have to keep the state of the Host Control Register | |
58 | * because of the interrupt enable & bus size flags. | |
59 | */ | |
60 | ||
61 | /*------------------------------------------------------------------*/ | |
62 | /* | |
63 | * Read from card's Host Adaptor Status Register. | |
64 | */ | |
65 | static inline u16 hasr_read(unsigned long ioaddr) | |
66 | { | |
67 | return (inw(HASR(ioaddr))); | |
68 | } /* hasr_read */ | |
69 | ||
70 | /*------------------------------------------------------------------*/ | |
71 | /* | |
72 | * Write to card's Host Adapter Command Register. | |
73 | */ | |
74 | static inline void hacr_write(unsigned long ioaddr, u16 hacr) | |
75 | { | |
76 | outw(hacr, HACR(ioaddr)); | |
77 | } /* hacr_write */ | |
78 | ||
79 | /*------------------------------------------------------------------*/ | |
80 | /* | |
81 | * Write to card's Host Adapter Command Register. Include a delay for | |
82 | * those times when it is needed. | |
83 | */ | |
858119e1 | 84 | static void hacr_write_slow(unsigned long ioaddr, u16 hacr) |
1da177e4 LT |
85 | { |
86 | hacr_write(ioaddr, hacr); | |
87 | /* delay might only be needed sometimes */ | |
88 | mdelay(1); | |
89 | } /* hacr_write_slow */ | |
90 | ||
91 | /*------------------------------------------------------------------*/ | |
92 | /* | |
93 | * Set the channel attention bit. | |
94 | */ | |
95 | static inline void set_chan_attn(unsigned long ioaddr, u16 hacr) | |
96 | { | |
97 | hacr_write(ioaddr, hacr | HACR_CA); | |
98 | } /* set_chan_attn */ | |
99 | ||
100 | /*------------------------------------------------------------------*/ | |
101 | /* | |
102 | * Reset, and then set host adaptor into default mode. | |
103 | */ | |
104 | static inline void wv_hacr_reset(unsigned long ioaddr) | |
105 | { | |
106 | hacr_write_slow(ioaddr, HACR_RESET); | |
107 | hacr_write(ioaddr, HACR_DEFAULT); | |
108 | } /* wv_hacr_reset */ | |
109 | ||
110 | /*------------------------------------------------------------------*/ | |
111 | /* | |
112 | * Set the I/O transfer over the ISA bus to 8-bit mode | |
113 | */ | |
114 | static inline void wv_16_off(unsigned long ioaddr, u16 hacr) | |
115 | { | |
116 | hacr &= ~HACR_16BITS; | |
117 | hacr_write(ioaddr, hacr); | |
118 | } /* wv_16_off */ | |
119 | ||
120 | /*------------------------------------------------------------------*/ | |
121 | /* | |
122 | * Set the I/O transfer over the ISA bus to 8-bit mode | |
123 | */ | |
124 | static inline void wv_16_on(unsigned long ioaddr, u16 hacr) | |
125 | { | |
126 | hacr |= HACR_16BITS; | |
127 | hacr_write(ioaddr, hacr); | |
128 | } /* wv_16_on */ | |
129 | ||
130 | /*------------------------------------------------------------------*/ | |
131 | /* | |
132 | * Disable interrupts on the WaveLAN hardware. | |
133 | * (called by wv_82586_stop()) | |
134 | */ | |
135 | static inline void wv_ints_off(struct net_device * dev) | |
136 | { | |
524ad0a7 | 137 | net_local *lp = netdev_priv(dev); |
1da177e4 LT |
138 | unsigned long ioaddr = dev->base_addr; |
139 | ||
140 | lp->hacr &= ~HACR_INTRON; | |
141 | hacr_write(ioaddr, lp->hacr); | |
142 | } /* wv_ints_off */ | |
143 | ||
144 | /*------------------------------------------------------------------*/ | |
145 | /* | |
146 | * Enable interrupts on the WaveLAN hardware. | |
147 | * (called by wv_hw_reset()) | |
148 | */ | |
149 | static inline void wv_ints_on(struct net_device * dev) | |
150 | { | |
524ad0a7 | 151 | net_local *lp = netdev_priv(dev); |
1da177e4 LT |
152 | unsigned long ioaddr = dev->base_addr; |
153 | ||
154 | lp->hacr |= HACR_INTRON; | |
155 | hacr_write(ioaddr, lp->hacr); | |
156 | } /* wv_ints_on */ | |
157 | ||
158 | /******************* MODEM MANAGEMENT SUBROUTINES *******************/ | |
159 | /* | |
160 | * Useful subroutines to manage the modem of the WaveLAN | |
161 | */ | |
162 | ||
163 | /*------------------------------------------------------------------*/ | |
164 | /* | |
165 | * Read the Parameter Storage Area from the WaveLAN card's memory | |
166 | */ | |
167 | /* | |
168 | * Read bytes from the PSA. | |
169 | */ | |
170 | static void psa_read(unsigned long ioaddr, u16 hacr, int o, /* offset in PSA */ | |
171 | u8 * b, /* buffer to fill */ | |
172 | int n) | |
173 | { /* size to read */ | |
174 | wv_16_off(ioaddr, hacr); | |
175 | ||
176 | while (n-- > 0) { | |
177 | outw(o, PIOR2(ioaddr)); | |
178 | o++; | |
179 | *b++ = inb(PIOP2(ioaddr)); | |
180 | } | |
181 | ||
182 | wv_16_on(ioaddr, hacr); | |
183 | } /* psa_read */ | |
184 | ||
185 | /*------------------------------------------------------------------*/ | |
186 | /* | |
187 | * Write the Parameter Storage Area to the WaveLAN card's memory. | |
188 | */ | |
189 | static void psa_write(unsigned long ioaddr, u16 hacr, int o, /* Offset in PSA */ | |
190 | u8 * b, /* Buffer in memory */ | |
191 | int n) | |
192 | { /* Length of buffer */ | |
193 | int count = 0; | |
194 | ||
195 | wv_16_off(ioaddr, hacr); | |
196 | ||
197 | while (n-- > 0) { | |
198 | outw(o, PIOR2(ioaddr)); | |
199 | o++; | |
200 | ||
201 | outb(*b, PIOP2(ioaddr)); | |
202 | b++; | |
203 | ||
204 | /* Wait for the memory to finish its write cycle */ | |
205 | count = 0; | |
206 | while ((count++ < 100) && | |
207 | (hasr_read(ioaddr) & HASR_PSA_BUSY)) mdelay(1); | |
208 | } | |
209 | ||
210 | wv_16_on(ioaddr, hacr); | |
211 | } /* psa_write */ | |
212 | ||
213 | #ifdef SET_PSA_CRC | |
214 | /*------------------------------------------------------------------*/ | |
215 | /* | |
216 | * Calculate the PSA CRC | |
217 | * Thanks to Valster, Nico <NVALSTER@wcnd.nl.lucent.com> for the code | |
218 | * NOTE: By specifying a length including the CRC position the | |
219 | * returned value should be zero. (i.e. a correct checksum in the PSA) | |
220 | * | |
221 | * The Windows drivers don't use the CRC, but the AP and the PtP tool | |
222 | * depend on it. | |
223 | */ | |
858119e1 | 224 | static u16 psa_crc(u8 * psa, /* The PSA */ |
1da177e4 LT |
225 | int size) |
226 | { /* Number of short for CRC */ | |
227 | int byte_cnt; /* Loop on the PSA */ | |
228 | u16 crc_bytes = 0; /* Data in the PSA */ | |
229 | int bit_cnt; /* Loop on the bits of the short */ | |
230 | ||
231 | for (byte_cnt = 0; byte_cnt < size; byte_cnt++) { | |
232 | crc_bytes ^= psa[byte_cnt]; /* Its an xor */ | |
233 | ||
234 | for (bit_cnt = 1; bit_cnt < 9; bit_cnt++) { | |
235 | if (crc_bytes & 0x0001) | |
236 | crc_bytes = (crc_bytes >> 1) ^ 0xA001; | |
237 | else | |
238 | crc_bytes >>= 1; | |
239 | } | |
240 | } | |
241 | ||
242 | return crc_bytes; | |
243 | } /* psa_crc */ | |
244 | #endif /* SET_PSA_CRC */ | |
245 | ||
246 | /*------------------------------------------------------------------*/ | |
247 | /* | |
248 | * update the checksum field in the Wavelan's PSA | |
249 | */ | |
250 | static void update_psa_checksum(struct net_device * dev, unsigned long ioaddr, u16 hacr) | |
251 | { | |
252 | #ifdef SET_PSA_CRC | |
253 | psa_t psa; | |
254 | u16 crc; | |
255 | ||
256 | /* read the parameter storage area */ | |
257 | psa_read(ioaddr, hacr, 0, (unsigned char *) &psa, sizeof(psa)); | |
258 | ||
259 | /* update the checksum */ | |
260 | crc = psa_crc((unsigned char *) &psa, | |
261 | sizeof(psa) - sizeof(psa.psa_crc[0]) - | |
262 | sizeof(psa.psa_crc[1]) | |
263 | - sizeof(psa.psa_crc_status)); | |
264 | ||
265 | psa.psa_crc[0] = crc & 0xFF; | |
266 | psa.psa_crc[1] = (crc & 0xFF00) >> 8; | |
267 | ||
268 | /* Write it ! */ | |
269 | psa_write(ioaddr, hacr, (char *) &psa.psa_crc - (char *) &psa, | |
270 | (unsigned char *) &psa.psa_crc, 2); | |
271 | ||
272 | #ifdef DEBUG_IOCTL_INFO | |
273 | printk(KERN_DEBUG "%s: update_psa_checksum(): crc = 0x%02x%02x\n", | |
274 | dev->name, psa.psa_crc[0], psa.psa_crc[1]); | |
275 | ||
276 | /* Check again (luxury !) */ | |
277 | crc = psa_crc((unsigned char *) &psa, | |
278 | sizeof(psa) - sizeof(psa.psa_crc_status)); | |
279 | ||
280 | if (crc != 0) | |
281 | printk(KERN_WARNING | |
282 | "%s: update_psa_checksum(): CRC does not agree with PSA data (even after recalculating)\n", | |
283 | dev->name); | |
284 | #endif /* DEBUG_IOCTL_INFO */ | |
285 | #endif /* SET_PSA_CRC */ | |
286 | } /* update_psa_checksum */ | |
287 | ||
288 | /*------------------------------------------------------------------*/ | |
289 | /* | |
290 | * Write 1 byte to the MMC. | |
291 | */ | |
858119e1 | 292 | static void mmc_out(unsigned long ioaddr, u16 o, u8 d) |
1da177e4 LT |
293 | { |
294 | int count = 0; | |
295 | ||
296 | /* Wait for MMC to go idle */ | |
297 | while ((count++ < 100) && (inw(HASR(ioaddr)) & HASR_MMC_BUSY)) | |
298 | udelay(10); | |
299 | ||
300 | outw((u16) (((u16) d << 8) | (o << 1) | 1), MMCR(ioaddr)); | |
301 | } | |
302 | ||
303 | /*------------------------------------------------------------------*/ | |
304 | /* | |
305 | * Routine to write bytes to the Modem Management Controller. | |
306 | * We start at the end because it is the way it should be! | |
307 | */ | |
858119e1 | 308 | static void mmc_write(unsigned long ioaddr, u8 o, u8 * b, int n) |
1da177e4 LT |
309 | { |
310 | o += n; | |
311 | b += n; | |
312 | ||
313 | while (n-- > 0) | |
314 | mmc_out(ioaddr, --o, *(--b)); | |
315 | } /* mmc_write */ | |
316 | ||
317 | /*------------------------------------------------------------------*/ | |
318 | /* | |
319 | * Read a byte from the MMC. | |
320 | * Optimised version for 1 byte, avoid using memory. | |
321 | */ | |
858119e1 | 322 | static u8 mmc_in(unsigned long ioaddr, u16 o) |
1da177e4 LT |
323 | { |
324 | int count = 0; | |
325 | ||
326 | while ((count++ < 100) && (inw(HASR(ioaddr)) & HASR_MMC_BUSY)) | |
327 | udelay(10); | |
328 | outw(o << 1, MMCR(ioaddr)); | |
329 | ||
330 | while ((count++ < 100) && (inw(HASR(ioaddr)) & HASR_MMC_BUSY)) | |
331 | udelay(10); | |
332 | return (u8) (inw(MMCR(ioaddr)) >> 8); | |
333 | } | |
334 | ||
335 | /*------------------------------------------------------------------*/ | |
336 | /* | |
337 | * Routine to read bytes from the Modem Management Controller. | |
338 | * The implementation is complicated by a lack of address lines, | |
339 | * which prevents decoding of the low-order bit. | |
340 | * (code has just been moved in the above function) | |
341 | * We start at the end because it is the way it should be! | |
342 | */ | |
343 | static inline void mmc_read(unsigned long ioaddr, u8 o, u8 * b, int n) | |
344 | { | |
345 | o += n; | |
346 | b += n; | |
347 | ||
348 | while (n-- > 0) | |
349 | *(--b) = mmc_in(ioaddr, --o); | |
350 | } /* mmc_read */ | |
351 | ||
352 | /*------------------------------------------------------------------*/ | |
353 | /* | |
354 | * Get the type of encryption available. | |
355 | */ | |
356 | static inline int mmc_encr(unsigned long ioaddr) | |
357 | { /* I/O port of the card */ | |
358 | int temp; | |
359 | ||
360 | temp = mmc_in(ioaddr, mmroff(0, mmr_des_avail)); | |
361 | if ((temp != MMR_DES_AVAIL_DES) && (temp != MMR_DES_AVAIL_AES)) | |
362 | return 0; | |
363 | else | |
364 | return temp; | |
365 | } | |
366 | ||
367 | /*------------------------------------------------------------------*/ | |
368 | /* | |
369 | * Wait for the frequency EEPROM to complete a command. | |
370 | * I hope this one will be optimally inlined. | |
371 | */ | |
372 | static inline void fee_wait(unsigned long ioaddr, /* I/O port of the card */ | |
373 | int delay, /* Base delay to wait for */ | |
374 | int number) | |
375 | { /* Number of time to wait */ | |
376 | int count = 0; /* Wait only a limited time */ | |
377 | ||
378 | while ((count++ < number) && | |
379 | (mmc_in(ioaddr, mmroff(0, mmr_fee_status)) & | |
380 | MMR_FEE_STATUS_BUSY)) udelay(delay); | |
381 | } | |
382 | ||
383 | /*------------------------------------------------------------------*/ | |
384 | /* | |
385 | * Read bytes from the Frequency EEPROM (frequency select cards). | |
386 | */ | |
387 | static void fee_read(unsigned long ioaddr, /* I/O port of the card */ | |
388 | u16 o, /* destination offset */ | |
389 | u16 * b, /* data buffer */ | |
390 | int n) | |
391 | { /* number of registers */ | |
392 | b += n; /* Position at the end of the area */ | |
393 | ||
394 | /* Write the address */ | |
395 | mmc_out(ioaddr, mmwoff(0, mmw_fee_addr), o + n - 1); | |
396 | ||
397 | /* Loop on all buffer */ | |
398 | while (n-- > 0) { | |
399 | /* Write the read command */ | |
400 | mmc_out(ioaddr, mmwoff(0, mmw_fee_ctrl), | |
401 | MMW_FEE_CTRL_READ); | |
402 | ||
403 | /* Wait until EEPROM is ready (should be quick). */ | |
404 | fee_wait(ioaddr, 10, 100); | |
405 | ||
406 | /* Read the value. */ | |
407 | *--b = ((mmc_in(ioaddr, mmroff(0, mmr_fee_data_h)) << 8) | | |
408 | mmc_in(ioaddr, mmroff(0, mmr_fee_data_l))); | |
409 | } | |
410 | } | |
411 | ||
1da177e4 LT |
412 | |
413 | /*------------------------------------------------------------------*/ | |
414 | /* | |
415 | * Write bytes from the Frequency EEPROM (frequency select cards). | |
416 | * This is a bit complicated, because the frequency EEPROM has to | |
417 | * be unprotected and the write enabled. | |
418 | * Jean II | |
419 | */ | |
420 | static void fee_write(unsigned long ioaddr, /* I/O port of the card */ | |
421 | u16 o, /* destination offset */ | |
422 | u16 * b, /* data buffer */ | |
423 | int n) | |
424 | { /* number of registers */ | |
425 | b += n; /* Position at the end of the area. */ | |
426 | ||
427 | #ifdef EEPROM_IS_PROTECTED /* disabled */ | |
428 | #ifdef DOESNT_SEEM_TO_WORK /* disabled */ | |
429 | /* Ask to read the protected register */ | |
430 | mmc_out(ioaddr, mmwoff(0, mmw_fee_ctrl), MMW_FEE_CTRL_PRREAD); | |
431 | ||
432 | fee_wait(ioaddr, 10, 100); | |
433 | ||
434 | /* Read the protected register. */ | |
435 | printk("Protected 2: %02X-%02X\n", | |
436 | mmc_in(ioaddr, mmroff(0, mmr_fee_data_h)), | |
437 | mmc_in(ioaddr, mmroff(0, mmr_fee_data_l))); | |
438 | #endif /* DOESNT_SEEM_TO_WORK */ | |
439 | ||
440 | /* Enable protected register. */ | |
441 | mmc_out(ioaddr, mmwoff(0, mmw_fee_addr), MMW_FEE_ADDR_EN); | |
442 | mmc_out(ioaddr, mmwoff(0, mmw_fee_ctrl), MMW_FEE_CTRL_PREN); | |
443 | ||
444 | fee_wait(ioaddr, 10, 100); | |
445 | ||
446 | /* Unprotect area. */ | |
447 | mmc_out(ioaddr, mmwoff(0, mmw_fee_addr), o + n); | |
448 | mmc_out(ioaddr, mmwoff(0, mmw_fee_ctrl), MMW_FEE_CTRL_PRWRITE); | |
449 | #ifdef DOESNT_SEEM_TO_WORK /* disabled */ | |
450 | /* or use: */ | |
451 | mmc_out(ioaddr, mmwoff(0, mmw_fee_ctrl), MMW_FEE_CTRL_PRCLEAR); | |
452 | #endif /* DOESNT_SEEM_TO_WORK */ | |
453 | ||
454 | fee_wait(ioaddr, 10, 100); | |
455 | #endif /* EEPROM_IS_PROTECTED */ | |
456 | ||
457 | /* Write enable. */ | |
458 | mmc_out(ioaddr, mmwoff(0, mmw_fee_addr), MMW_FEE_ADDR_EN); | |
459 | mmc_out(ioaddr, mmwoff(0, mmw_fee_ctrl), MMW_FEE_CTRL_WREN); | |
460 | ||
461 | fee_wait(ioaddr, 10, 100); | |
462 | ||
463 | /* Write the EEPROM address. */ | |
464 | mmc_out(ioaddr, mmwoff(0, mmw_fee_addr), o + n - 1); | |
465 | ||
466 | /* Loop on all buffer */ | |
467 | while (n-- > 0) { | |
468 | /* Write the value. */ | |
469 | mmc_out(ioaddr, mmwoff(0, mmw_fee_data_h), (*--b) >> 8); | |
470 | mmc_out(ioaddr, mmwoff(0, mmw_fee_data_l), *b & 0xFF); | |
471 | ||
472 | /* Write the write command. */ | |
473 | mmc_out(ioaddr, mmwoff(0, mmw_fee_ctrl), | |
474 | MMW_FEE_CTRL_WRITE); | |
475 | ||
476 | /* WaveLAN documentation says to wait at least 10 ms for EEBUSY = 0 */ | |
477 | mdelay(10); | |
478 | fee_wait(ioaddr, 10, 100); | |
479 | } | |
480 | ||
481 | /* Write disable. */ | |
482 | mmc_out(ioaddr, mmwoff(0, mmw_fee_addr), MMW_FEE_ADDR_DS); | |
483 | mmc_out(ioaddr, mmwoff(0, mmw_fee_ctrl), MMW_FEE_CTRL_WDS); | |
484 | ||
485 | fee_wait(ioaddr, 10, 100); | |
486 | ||
487 | #ifdef EEPROM_IS_PROTECTED /* disabled */ | |
488 | /* Reprotect EEPROM. */ | |
489 | mmc_out(ioaddr, mmwoff(0, mmw_fee_addr), 0x00); | |
490 | mmc_out(ioaddr, mmwoff(0, mmw_fee_ctrl), MMW_FEE_CTRL_PRWRITE); | |
491 | ||
492 | fee_wait(ioaddr, 10, 100); | |
493 | #endif /* EEPROM_IS_PROTECTED */ | |
494 | } | |
1da177e4 LT |
495 | |
496 | /************************ I82586 SUBROUTINES *************************/ | |
497 | /* | |
498 | * Useful subroutines to manage the Ethernet controller | |
499 | */ | |
500 | ||
501 | /*------------------------------------------------------------------*/ | |
502 | /* | |
503 | * Read bytes from the on-board RAM. | |
504 | * Why does inlining this function make it fail? | |
505 | */ | |
506 | static /*inline */ void obram_read(unsigned long ioaddr, | |
507 | u16 o, u8 * b, int n) | |
508 | { | |
509 | outw(o, PIOR1(ioaddr)); | |
510 | insw(PIOP1(ioaddr), (unsigned short *) b, (n + 1) >> 1); | |
511 | } | |
512 | ||
513 | /*------------------------------------------------------------------*/ | |
514 | /* | |
515 | * Write bytes to the on-board RAM. | |
516 | */ | |
517 | static inline void obram_write(unsigned long ioaddr, u16 o, u8 * b, int n) | |
518 | { | |
519 | outw(o, PIOR1(ioaddr)); | |
520 | outsw(PIOP1(ioaddr), (unsigned short *) b, (n + 1) >> 1); | |
521 | } | |
522 | ||
523 | /*------------------------------------------------------------------*/ | |
524 | /* | |
525 | * Acknowledge the reading of the status issued by the i82586. | |
526 | */ | |
527 | static void wv_ack(struct net_device * dev) | |
528 | { | |
524ad0a7 | 529 | net_local *lp = netdev_priv(dev); |
1da177e4 LT |
530 | unsigned long ioaddr = dev->base_addr; |
531 | u16 scb_cs; | |
532 | int i; | |
533 | ||
534 | obram_read(ioaddr, scboff(OFFSET_SCB, scb_status), | |
535 | (unsigned char *) &scb_cs, sizeof(scb_cs)); | |
536 | scb_cs &= SCB_ST_INT; | |
537 | ||
538 | if (scb_cs == 0) | |
539 | return; | |
540 | ||
541 | obram_write(ioaddr, scboff(OFFSET_SCB, scb_command), | |
542 | (unsigned char *) &scb_cs, sizeof(scb_cs)); | |
543 | ||
544 | set_chan_attn(ioaddr, lp->hacr); | |
545 | ||
546 | for (i = 1000; i > 0; i--) { | |
547 | obram_read(ioaddr, scboff(OFFSET_SCB, scb_command), | |
548 | (unsigned char *) &scb_cs, sizeof(scb_cs)); | |
549 | if (scb_cs == 0) | |
550 | break; | |
551 | ||
552 | udelay(10); | |
553 | } | |
554 | udelay(100); | |
555 | ||
556 | #ifdef DEBUG_CONFIG_ERROR | |
557 | if (i <= 0) | |
558 | printk(KERN_INFO | |
559 | "%s: wv_ack(): board not accepting command.\n", | |
560 | dev->name); | |
561 | #endif | |
562 | } | |
563 | ||
564 | /*------------------------------------------------------------------*/ | |
565 | /* | |
566 | * Set channel attention bit and busy wait until command has | |
567 | * completed, then acknowledge completion of the command. | |
568 | */ | |
858119e1 | 569 | static int wv_synchronous_cmd(struct net_device * dev, const char *str) |
1da177e4 | 570 | { |
524ad0a7 | 571 | net_local *lp = netdev_priv(dev); |
1da177e4 LT |
572 | unsigned long ioaddr = dev->base_addr; |
573 | u16 scb_cmd; | |
574 | ach_t cb; | |
575 | int i; | |
576 | ||
577 | scb_cmd = SCB_CMD_CUC & SCB_CMD_CUC_GO; | |
578 | obram_write(ioaddr, scboff(OFFSET_SCB, scb_command), | |
579 | (unsigned char *) &scb_cmd, sizeof(scb_cmd)); | |
580 | ||
581 | set_chan_attn(ioaddr, lp->hacr); | |
582 | ||
583 | for (i = 1000; i > 0; i--) { | |
584 | obram_read(ioaddr, OFFSET_CU, (unsigned char *) &cb, | |
585 | sizeof(cb)); | |
586 | if (cb.ac_status & AC_SFLD_C) | |
587 | break; | |
588 | ||
589 | udelay(10); | |
590 | } | |
591 | udelay(100); | |
592 | ||
593 | if (i <= 0 || !(cb.ac_status & AC_SFLD_OK)) { | |
594 | #ifdef DEBUG_CONFIG_ERROR | |
595 | printk(KERN_INFO "%s: %s failed; status = 0x%x\n", | |
596 | dev->name, str, cb.ac_status); | |
597 | #endif | |
598 | #ifdef DEBUG_I82586_SHOW | |
599 | wv_scb_show(ioaddr); | |
600 | #endif | |
601 | return -1; | |
602 | } | |
603 | ||
604 | /* Ack the status */ | |
605 | wv_ack(dev); | |
606 | ||
607 | return 0; | |
608 | } | |
609 | ||
610 | /*------------------------------------------------------------------*/ | |
611 | /* | |
612 | * Configuration commands completion interrupt. | |
613 | * Check if done, and if OK. | |
614 | */ | |
858119e1 | 615 | static int |
1da177e4 LT |
616 | wv_config_complete(struct net_device * dev, unsigned long ioaddr, net_local * lp) |
617 | { | |
618 | unsigned short mcs_addr; | |
619 | unsigned short status; | |
620 | int ret; | |
621 | ||
622 | #ifdef DEBUG_INTERRUPT_TRACE | |
623 | printk(KERN_DEBUG "%s: ->wv_config_complete()\n", dev->name); | |
624 | #endif | |
625 | ||
626 | mcs_addr = lp->tx_first_in_use + sizeof(ac_tx_t) + sizeof(ac_nop_t) | |
627 | + sizeof(tbd_t) + sizeof(ac_cfg_t) + sizeof(ac_ias_t); | |
628 | ||
629 | /* Read the status of the last command (set mc list). */ | |
630 | obram_read(ioaddr, acoff(mcs_addr, ac_status), | |
631 | (unsigned char *) &status, sizeof(status)); | |
632 | ||
633 | /* If not completed -> exit */ | |
634 | if ((status & AC_SFLD_C) == 0) | |
635 | ret = 0; /* Not ready to be scrapped */ | |
636 | else { | |
637 | #ifdef DEBUG_CONFIG_ERROR | |
638 | unsigned short cfg_addr; | |
639 | unsigned short ias_addr; | |
640 | ||
641 | /* Check mc_config command */ | |
642 | if ((status & AC_SFLD_OK) != AC_SFLD_OK) | |
643 | printk(KERN_INFO | |
644 | "%s: wv_config_complete(): set_multicast_address failed; status = 0x%x\n", | |
645 | dev->name, status); | |
646 | ||
647 | /* check ia-config command */ | |
648 | ias_addr = mcs_addr - sizeof(ac_ias_t); | |
649 | obram_read(ioaddr, acoff(ias_addr, ac_status), | |
650 | (unsigned char *) &status, sizeof(status)); | |
651 | if ((status & AC_SFLD_OK) != AC_SFLD_OK) | |
652 | printk(KERN_INFO | |
653 | "%s: wv_config_complete(): set_MAC_address failed; status = 0x%x\n", | |
654 | dev->name, status); | |
655 | ||
656 | /* Check config command. */ | |
657 | cfg_addr = ias_addr - sizeof(ac_cfg_t); | |
658 | obram_read(ioaddr, acoff(cfg_addr, ac_status), | |
659 | (unsigned char *) &status, sizeof(status)); | |
660 | if ((status & AC_SFLD_OK) != AC_SFLD_OK) | |
661 | printk(KERN_INFO | |
662 | "%s: wv_config_complete(): configure failed; status = 0x%x\n", | |
663 | dev->name, status); | |
664 | #endif /* DEBUG_CONFIG_ERROR */ | |
665 | ||
666 | ret = 1; /* Ready to be scrapped */ | |
667 | } | |
668 | ||
669 | #ifdef DEBUG_INTERRUPT_TRACE | |
670 | printk(KERN_DEBUG "%s: <-wv_config_complete() - %d\n", dev->name, | |
671 | ret); | |
672 | #endif | |
673 | return ret; | |
674 | } | |
675 | ||
676 | /*------------------------------------------------------------------*/ | |
677 | /* | |
678 | * Command completion interrupt. | |
679 | * Reclaim as many freed tx buffers as we can. | |
680 | * (called in wavelan_interrupt()). | |
681 | * Note : the spinlock is already grabbed for us. | |
682 | */ | |
683 | static int wv_complete(struct net_device * dev, unsigned long ioaddr, net_local * lp) | |
684 | { | |
685 | int nreaped = 0; | |
686 | ||
687 | #ifdef DEBUG_INTERRUPT_TRACE | |
688 | printk(KERN_DEBUG "%s: ->wv_complete()\n", dev->name); | |
689 | #endif | |
690 | ||
691 | /* Loop on all the transmit buffers */ | |
692 | while (lp->tx_first_in_use != I82586NULL) { | |
693 | unsigned short tx_status; | |
694 | ||
695 | /* Read the first transmit buffer */ | |
696 | obram_read(ioaddr, acoff(lp->tx_first_in_use, ac_status), | |
697 | (unsigned char *) &tx_status, | |
698 | sizeof(tx_status)); | |
699 | ||
700 | /* If not completed -> exit */ | |
701 | if ((tx_status & AC_SFLD_C) == 0) | |
702 | break; | |
703 | ||
704 | /* Hack for reconfiguration */ | |
705 | if (tx_status == 0xFFFF) | |
706 | if (!wv_config_complete(dev, ioaddr, lp)) | |
707 | break; /* Not completed */ | |
708 | ||
709 | /* We now remove this buffer */ | |
710 | nreaped++; | |
711 | --lp->tx_n_in_use; | |
712 | ||
713 | /* | |
714 | if (lp->tx_n_in_use > 0) | |
715 | printk("%c", "0123456789abcdefghijk"[lp->tx_n_in_use]); | |
716 | */ | |
717 | ||
718 | /* Was it the last one? */ | |
719 | if (lp->tx_n_in_use <= 0) | |
720 | lp->tx_first_in_use = I82586NULL; | |
721 | else { | |
722 | /* Next one in the chain */ | |
723 | lp->tx_first_in_use += TXBLOCKZ; | |
724 | if (lp->tx_first_in_use >= | |
725 | OFFSET_CU + | |
726 | NTXBLOCKS * TXBLOCKZ) lp->tx_first_in_use -= | |
727 | NTXBLOCKS * TXBLOCKZ; | |
728 | } | |
729 | ||
730 | /* Hack for reconfiguration */ | |
731 | if (tx_status == 0xFFFF) | |
732 | continue; | |
733 | ||
734 | /* Now, check status of the finished command */ | |
735 | if (tx_status & AC_SFLD_OK) { | |
736 | int ncollisions; | |
737 | ||
738 | lp->stats.tx_packets++; | |
739 | ncollisions = tx_status & AC_SFLD_MAXCOL; | |
740 | lp->stats.collisions += ncollisions; | |
741 | #ifdef DEBUG_TX_INFO | |
742 | if (ncollisions > 0) | |
743 | printk(KERN_DEBUG | |
744 | "%s: wv_complete(): tx completed after %d collisions.\n", | |
745 | dev->name, ncollisions); | |
746 | #endif | |
747 | } else { | |
748 | lp->stats.tx_errors++; | |
749 | if (tx_status & AC_SFLD_S10) { | |
750 | lp->stats.tx_carrier_errors++; | |
751 | #ifdef DEBUG_TX_FAIL | |
752 | printk(KERN_DEBUG | |
753 | "%s: wv_complete(): tx error: no CS.\n", | |
754 | dev->name); | |
755 | #endif | |
756 | } | |
757 | if (tx_status & AC_SFLD_S9) { | |
758 | lp->stats.tx_carrier_errors++; | |
759 | #ifdef DEBUG_TX_FAIL | |
760 | printk(KERN_DEBUG | |
761 | "%s: wv_complete(): tx error: lost CTS.\n", | |
762 | dev->name); | |
763 | #endif | |
764 | } | |
765 | if (tx_status & AC_SFLD_S8) { | |
766 | lp->stats.tx_fifo_errors++; | |
767 | #ifdef DEBUG_TX_FAIL | |
768 | printk(KERN_DEBUG | |
769 | "%s: wv_complete(): tx error: slow DMA.\n", | |
770 | dev->name); | |
771 | #endif | |
772 | } | |
773 | if (tx_status & AC_SFLD_S6) { | |
774 | lp->stats.tx_heartbeat_errors++; | |
775 | #ifdef DEBUG_TX_FAIL | |
776 | printk(KERN_DEBUG | |
777 | "%s: wv_complete(): tx error: heart beat.\n", | |
778 | dev->name); | |
779 | #endif | |
780 | } | |
781 | if (tx_status & AC_SFLD_S5) { | |
782 | lp->stats.tx_aborted_errors++; | |
783 | #ifdef DEBUG_TX_FAIL | |
784 | printk(KERN_DEBUG | |
785 | "%s: wv_complete(): tx error: too many collisions.\n", | |
786 | dev->name); | |
787 | #endif | |
788 | } | |
789 | } | |
790 | ||
791 | #ifdef DEBUG_TX_INFO | |
792 | printk(KERN_DEBUG | |
793 | "%s: wv_complete(): tx completed, tx_status 0x%04x\n", | |
794 | dev->name, tx_status); | |
795 | #endif | |
796 | } | |
797 | ||
798 | #ifdef DEBUG_INTERRUPT_INFO | |
799 | if (nreaped > 1) | |
800 | printk(KERN_DEBUG "%s: wv_complete(): reaped %d\n", | |
801 | dev->name, nreaped); | |
802 | #endif | |
803 | ||
804 | /* | |
805 | * Inform upper layers. | |
806 | */ | |
807 | if (lp->tx_n_in_use < NTXBLOCKS - 1) { | |
808 | netif_wake_queue(dev); | |
809 | } | |
810 | #ifdef DEBUG_INTERRUPT_TRACE | |
811 | printk(KERN_DEBUG "%s: <-wv_complete()\n", dev->name); | |
812 | #endif | |
813 | return nreaped; | |
814 | } | |
815 | ||
816 | /*------------------------------------------------------------------*/ | |
817 | /* | |
818 | * Reconfigure the i82586, or at least ask for it. | |
819 | * Because wv_82586_config uses a transmission buffer, we must do it | |
820 | * when we are sure that there is one left, so we do it now | |
821 | * or in wavelan_packet_xmit() (I can't find any better place, | |
822 | * wavelan_interrupt is not an option), so you may experience | |
823 | * delays sometimes. | |
824 | */ | |
858119e1 | 825 | static void wv_82586_reconfig(struct net_device * dev) |
1da177e4 | 826 | { |
524ad0a7 | 827 | net_local *lp = netdev_priv(dev); |
1da177e4 LT |
828 | unsigned long flags; |
829 | ||
830 | /* Arm the flag, will be cleard in wv_82586_config() */ | |
831 | lp->reconfig_82586 = 1; | |
832 | ||
833 | /* Check if we can do it now ! */ | |
834 | if((netif_running(dev)) && !(netif_queue_stopped(dev))) { | |
835 | spin_lock_irqsave(&lp->spinlock, flags); | |
836 | /* May fail */ | |
837 | wv_82586_config(dev); | |
838 | spin_unlock_irqrestore(&lp->spinlock, flags); | |
839 | } | |
840 | else { | |
841 | #ifdef DEBUG_CONFIG_INFO | |
842 | printk(KERN_DEBUG | |
843 | "%s: wv_82586_reconfig(): delayed (state = %lX)\n", | |
844 | dev->name, dev->state); | |
845 | #endif | |
846 | } | |
847 | } | |
848 | ||
849 | /********************* DEBUG & INFO SUBROUTINES *********************/ | |
850 | /* | |
851 | * This routine is used in the code to show information for debugging. | |
852 | * Most of the time, it dumps the contents of hardware structures. | |
853 | */ | |
854 | ||
855 | #ifdef DEBUG_PSA_SHOW | |
856 | /*------------------------------------------------------------------*/ | |
857 | /* | |
858 | * Print the formatted contents of the Parameter Storage Area. | |
859 | */ | |
860 | static void wv_psa_show(psa_t * p) | |
861 | { | |
862 | printk(KERN_DEBUG "##### WaveLAN PSA contents: #####\n"); | |
863 | printk(KERN_DEBUG "psa_io_base_addr_1: 0x%02X %02X %02X %02X\n", | |
864 | p->psa_io_base_addr_1, | |
865 | p->psa_io_base_addr_2, | |
866 | p->psa_io_base_addr_3, p->psa_io_base_addr_4); | |
867 | printk(KERN_DEBUG "psa_rem_boot_addr_1: 0x%02X %02X %02X\n", | |
868 | p->psa_rem_boot_addr_1, | |
869 | p->psa_rem_boot_addr_2, p->psa_rem_boot_addr_3); | |
870 | printk(KERN_DEBUG "psa_holi_params: 0x%02x, ", p->psa_holi_params); | |
871 | printk("psa_int_req_no: %d\n", p->psa_int_req_no); | |
872 | #ifdef DEBUG_SHOW_UNUSED | |
e174961c | 873 | printk(KERN_DEBUG "psa_unused0[]: %pM\n", p->psa_unused0); |
1da177e4 | 874 | #endif /* DEBUG_SHOW_UNUSED */ |
e174961c JB |
875 | printk(KERN_DEBUG "psa_univ_mac_addr[]: %pM\n", p->psa_univ_mac_addr); |
876 | printk(KERN_DEBUG "psa_local_mac_addr[]: %pM\n", p->psa_local_mac_addr); | |
1da177e4 LT |
877 | printk(KERN_DEBUG "psa_univ_local_sel: %d, ", |
878 | p->psa_univ_local_sel); | |
879 | printk("psa_comp_number: %d, ", p->psa_comp_number); | |
880 | printk("psa_thr_pre_set: 0x%02x\n", p->psa_thr_pre_set); | |
881 | printk(KERN_DEBUG "psa_feature_select/decay_prm: 0x%02x, ", | |
882 | p->psa_feature_select); | |
883 | printk("psa_subband/decay_update_prm: %d\n", p->psa_subband); | |
884 | printk(KERN_DEBUG "psa_quality_thr: 0x%02x, ", p->psa_quality_thr); | |
885 | printk("psa_mod_delay: 0x%02x\n", p->psa_mod_delay); | |
886 | printk(KERN_DEBUG "psa_nwid: 0x%02x%02x, ", p->psa_nwid[0], | |
887 | p->psa_nwid[1]); | |
888 | printk("psa_nwid_select: %d\n", p->psa_nwid_select); | |
889 | printk(KERN_DEBUG "psa_encryption_select: %d, ", | |
890 | p->psa_encryption_select); | |
891 | printk | |
892 | ("psa_encryption_key[]: %02x:%02x:%02x:%02x:%02x:%02x:%02x:%02x\n", | |
893 | p->psa_encryption_key[0], p->psa_encryption_key[1], | |
894 | p->psa_encryption_key[2], p->psa_encryption_key[3], | |
895 | p->psa_encryption_key[4], p->psa_encryption_key[5], | |
896 | p->psa_encryption_key[6], p->psa_encryption_key[7]); | |
897 | printk(KERN_DEBUG "psa_databus_width: %d\n", p->psa_databus_width); | |
898 | printk(KERN_DEBUG "psa_call_code/auto_squelch: 0x%02x, ", | |
899 | p->psa_call_code[0]); | |
900 | printk | |
901 | ("psa_call_code[]: %02X:%02X:%02X:%02X:%02X:%02X:%02X:%02X\n", | |
902 | p->psa_call_code[0], p->psa_call_code[1], p->psa_call_code[2], | |
903 | p->psa_call_code[3], p->psa_call_code[4], p->psa_call_code[5], | |
904 | p->psa_call_code[6], p->psa_call_code[7]); | |
905 | #ifdef DEBUG_SHOW_UNUSED | |
d5251aea | 906 | printk(KERN_DEBUG "psa_reserved[]: %02X:%02X\n", |
1da177e4 | 907 | p->psa_reserved[0], |
d5251aea | 908 | p->psa_reserved[1]); |
1da177e4 LT |
909 | #endif /* DEBUG_SHOW_UNUSED */ |
910 | printk(KERN_DEBUG "psa_conf_status: %d, ", p->psa_conf_status); | |
911 | printk("psa_crc: 0x%02x%02x, ", p->psa_crc[0], p->psa_crc[1]); | |
912 | printk("psa_crc_status: 0x%02x\n", p->psa_crc_status); | |
913 | } /* wv_psa_show */ | |
914 | #endif /* DEBUG_PSA_SHOW */ | |
915 | ||
916 | #ifdef DEBUG_MMC_SHOW | |
917 | /*------------------------------------------------------------------*/ | |
918 | /* | |
919 | * Print the formatted status of the Modem Management Controller. | |
920 | * This function needs to be completed. | |
921 | */ | |
922 | static void wv_mmc_show(struct net_device * dev) | |
923 | { | |
924 | unsigned long ioaddr = dev->base_addr; | |
524ad0a7 | 925 | net_local *lp = netdev_priv(dev); |
1da177e4 LT |
926 | mmr_t m; |
927 | ||
928 | /* Basic check */ | |
929 | if (hasr_read(ioaddr) & HASR_NO_CLK) { | |
930 | printk(KERN_WARNING | |
931 | "%s: wv_mmc_show: modem not connected\n", | |
932 | dev->name); | |
933 | return; | |
934 | } | |
935 | ||
936 | /* Read the mmc */ | |
937 | mmc_out(ioaddr, mmwoff(0, mmw_freeze), 1); | |
938 | mmc_read(ioaddr, 0, (u8 *) & m, sizeof(m)); | |
939 | mmc_out(ioaddr, mmwoff(0, mmw_freeze), 0); | |
940 | ||
1da177e4 LT |
941 | /* Don't forget to update statistics */ |
942 | lp->wstats.discard.nwid += | |
943 | (m.mmr_wrong_nwid_h << 8) | m.mmr_wrong_nwid_l; | |
1da177e4 LT |
944 | |
945 | printk(KERN_DEBUG "##### WaveLAN modem status registers: #####\n"); | |
946 | #ifdef DEBUG_SHOW_UNUSED | |
947 | printk(KERN_DEBUG | |
948 | "mmc_unused0[]: %02X:%02X:%02X:%02X:%02X:%02X:%02X:%02X\n", | |
949 | m.mmr_unused0[0], m.mmr_unused0[1], m.mmr_unused0[2], | |
950 | m.mmr_unused0[3], m.mmr_unused0[4], m.mmr_unused0[5], | |
951 | m.mmr_unused0[6], m.mmr_unused0[7]); | |
952 | #endif /* DEBUG_SHOW_UNUSED */ | |
953 | printk(KERN_DEBUG "Encryption algorithm: %02X - Status: %02X\n", | |
954 | m.mmr_des_avail, m.mmr_des_status); | |
955 | #ifdef DEBUG_SHOW_UNUSED | |
956 | printk(KERN_DEBUG "mmc_unused1[]: %02X:%02X:%02X:%02X:%02X\n", | |
957 | m.mmr_unused1[0], | |
958 | m.mmr_unused1[1], | |
959 | m.mmr_unused1[2], m.mmr_unused1[3], m.mmr_unused1[4]); | |
960 | #endif /* DEBUG_SHOW_UNUSED */ | |
961 | printk(KERN_DEBUG "dce_status: 0x%x [%s%s%s%s]\n", | |
962 | m.mmr_dce_status, | |
963 | (m. | |
964 | mmr_dce_status & MMR_DCE_STATUS_RX_BUSY) ? | |
965 | "energy detected," : "", | |
966 | (m. | |
967 | mmr_dce_status & MMR_DCE_STATUS_LOOPT_IND) ? | |
968 | "loop test indicated," : "", | |
969 | (m. | |
970 | mmr_dce_status & MMR_DCE_STATUS_TX_BUSY) ? | |
971 | "transmitter on," : "", | |
972 | (m. | |
973 | mmr_dce_status & MMR_DCE_STATUS_JBR_EXPIRED) ? | |
974 | "jabber timer expired," : ""); | |
975 | printk(KERN_DEBUG "Dsp ID: %02X\n", m.mmr_dsp_id); | |
976 | #ifdef DEBUG_SHOW_UNUSED | |
977 | printk(KERN_DEBUG "mmc_unused2[]: %02X:%02X\n", | |
978 | m.mmr_unused2[0], m.mmr_unused2[1]); | |
979 | #endif /* DEBUG_SHOW_UNUSED */ | |
980 | printk(KERN_DEBUG "# correct_nwid: %d, # wrong_nwid: %d\n", | |
981 | (m.mmr_correct_nwid_h << 8) | m.mmr_correct_nwid_l, | |
982 | (m.mmr_wrong_nwid_h << 8) | m.mmr_wrong_nwid_l); | |
983 | printk(KERN_DEBUG "thr_pre_set: 0x%x [current signal %s]\n", | |
984 | m.mmr_thr_pre_set & MMR_THR_PRE_SET, | |
985 | (m. | |
986 | mmr_thr_pre_set & MMR_THR_PRE_SET_CUR) ? "above" : | |
987 | "below"); | |
988 | printk(KERN_DEBUG "signal_lvl: %d [%s], ", | |
989 | m.mmr_signal_lvl & MMR_SIGNAL_LVL, | |
990 | (m. | |
991 | mmr_signal_lvl & MMR_SIGNAL_LVL_VALID) ? "new msg" : | |
992 | "no new msg"); | |
993 | printk("silence_lvl: %d [%s], ", | |
994 | m.mmr_silence_lvl & MMR_SILENCE_LVL, | |
995 | (m. | |
996 | mmr_silence_lvl & MMR_SILENCE_LVL_VALID) ? "update done" : | |
997 | "no new update"); | |
998 | printk("sgnl_qual: 0x%x [%s]\n", m.mmr_sgnl_qual & MMR_SGNL_QUAL, | |
999 | (m. | |
1000 | mmr_sgnl_qual & MMR_SGNL_QUAL_ANT) ? "Antenna 1" : | |
1001 | "Antenna 0"); | |
1002 | #ifdef DEBUG_SHOW_UNUSED | |
1003 | printk(KERN_DEBUG "netw_id_l: %x\n", m.mmr_netw_id_l); | |
1004 | #endif /* DEBUG_SHOW_UNUSED */ | |
1005 | } /* wv_mmc_show */ | |
1006 | #endif /* DEBUG_MMC_SHOW */ | |
1007 | ||
1008 | #ifdef DEBUG_I82586_SHOW | |
1009 | /*------------------------------------------------------------------*/ | |
1010 | /* | |
1011 | * Print the last block of the i82586 memory. | |
1012 | */ | |
1013 | static void wv_scb_show(unsigned long ioaddr) | |
1014 | { | |
1015 | scb_t scb; | |
1016 | ||
1017 | obram_read(ioaddr, OFFSET_SCB, (unsigned char *) &scb, | |
1018 | sizeof(scb)); | |
1019 | ||
1020 | printk(KERN_DEBUG "##### WaveLAN system control block: #####\n"); | |
1021 | ||
1022 | printk(KERN_DEBUG "status: "); | |
1023 | printk("stat 0x%x[%s%s%s%s] ", | |
1024 | (scb. | |
1025 | scb_status & (SCB_ST_CX | SCB_ST_FR | SCB_ST_CNA | | |
1026 | SCB_ST_RNR)) >> 12, | |
1027 | (scb. | |
1028 | scb_status & SCB_ST_CX) ? "command completion interrupt," : | |
1029 | "", (scb.scb_status & SCB_ST_FR) ? "frame received," : "", | |
1030 | (scb. | |
1031 | scb_status & SCB_ST_CNA) ? "command unit not active," : "", | |
1032 | (scb. | |
1033 | scb_status & SCB_ST_RNR) ? "receiving unit not ready," : | |
1034 | ""); | |
1035 | printk("cus 0x%x[%s%s%s] ", (scb.scb_status & SCB_ST_CUS) >> 8, | |
1036 | ((scb.scb_status & SCB_ST_CUS) == | |
1037 | SCB_ST_CUS_IDLE) ? "idle" : "", | |
1038 | ((scb.scb_status & SCB_ST_CUS) == | |
1039 | SCB_ST_CUS_SUSP) ? "suspended" : "", | |
1040 | ((scb.scb_status & SCB_ST_CUS) == | |
1041 | SCB_ST_CUS_ACTV) ? "active" : ""); | |
1042 | printk("rus 0x%x[%s%s%s%s]\n", (scb.scb_status & SCB_ST_RUS) >> 4, | |
1043 | ((scb.scb_status & SCB_ST_RUS) == | |
1044 | SCB_ST_RUS_IDLE) ? "idle" : "", | |
1045 | ((scb.scb_status & SCB_ST_RUS) == | |
1046 | SCB_ST_RUS_SUSP) ? "suspended" : "", | |
1047 | ((scb.scb_status & SCB_ST_RUS) == | |
1048 | SCB_ST_RUS_NRES) ? "no resources" : "", | |
1049 | ((scb.scb_status & SCB_ST_RUS) == | |
1050 | SCB_ST_RUS_RDY) ? "ready" : ""); | |
1051 | ||
1052 | printk(KERN_DEBUG "command: "); | |
1053 | printk("ack 0x%x[%s%s%s%s] ", | |
1054 | (scb. | |
1055 | scb_command & (SCB_CMD_ACK_CX | SCB_CMD_ACK_FR | | |
1056 | SCB_CMD_ACK_CNA | SCB_CMD_ACK_RNR)) >> 12, | |
1057 | (scb. | |
1058 | scb_command & SCB_CMD_ACK_CX) ? "ack cmd completion," : "", | |
1059 | (scb. | |
1060 | scb_command & SCB_CMD_ACK_FR) ? "ack frame received," : "", | |
1061 | (scb. | |
1062 | scb_command & SCB_CMD_ACK_CNA) ? "ack CU not active," : "", | |
1063 | (scb. | |
1064 | scb_command & SCB_CMD_ACK_RNR) ? "ack RU not ready," : ""); | |
1065 | printk("cuc 0x%x[%s%s%s%s%s] ", | |
1066 | (scb.scb_command & SCB_CMD_CUC) >> 8, | |
1067 | ((scb.scb_command & SCB_CMD_CUC) == | |
1068 | SCB_CMD_CUC_NOP) ? "nop" : "", | |
1069 | ((scb.scb_command & SCB_CMD_CUC) == | |
1070 | SCB_CMD_CUC_GO) ? "start cbl_offset" : "", | |
1071 | ((scb.scb_command & SCB_CMD_CUC) == | |
1072 | SCB_CMD_CUC_RES) ? "resume execution" : "", | |
1073 | ((scb.scb_command & SCB_CMD_CUC) == | |
1074 | SCB_CMD_CUC_SUS) ? "suspend execution" : "", | |
1075 | ((scb.scb_command & SCB_CMD_CUC) == | |
1076 | SCB_CMD_CUC_ABT) ? "abort execution" : ""); | |
1077 | printk("ruc 0x%x[%s%s%s%s%s]\n", | |
1078 | (scb.scb_command & SCB_CMD_RUC) >> 4, | |
1079 | ((scb.scb_command & SCB_CMD_RUC) == | |
1080 | SCB_CMD_RUC_NOP) ? "nop" : "", | |
1081 | ((scb.scb_command & SCB_CMD_RUC) == | |
1082 | SCB_CMD_RUC_GO) ? "start rfa_offset" : "", | |
1083 | ((scb.scb_command & SCB_CMD_RUC) == | |
1084 | SCB_CMD_RUC_RES) ? "resume reception" : "", | |
1085 | ((scb.scb_command & SCB_CMD_RUC) == | |
1086 | SCB_CMD_RUC_SUS) ? "suspend reception" : "", | |
1087 | ((scb.scb_command & SCB_CMD_RUC) == | |
1088 | SCB_CMD_RUC_ABT) ? "abort reception" : ""); | |
1089 | ||
1090 | printk(KERN_DEBUG "cbl_offset 0x%x ", scb.scb_cbl_offset); | |
1091 | printk("rfa_offset 0x%x\n", scb.scb_rfa_offset); | |
1092 | ||
1093 | printk(KERN_DEBUG "crcerrs %d ", scb.scb_crcerrs); | |
1094 | printk("alnerrs %d ", scb.scb_alnerrs); | |
1095 | printk("rscerrs %d ", scb.scb_rscerrs); | |
1096 | printk("ovrnerrs %d\n", scb.scb_ovrnerrs); | |
1097 | } | |
1098 | ||
1099 | /*------------------------------------------------------------------*/ | |
1100 | /* | |
1101 | * Print the formatted status of the i82586's receive unit. | |
1102 | */ | |
1103 | static void wv_ru_show(struct net_device * dev) | |
1104 | { | |
1da177e4 LT |
1105 | printk(KERN_DEBUG |
1106 | "##### WaveLAN i82586 receiver unit status: #####\n"); | |
1107 | printk(KERN_DEBUG "ru:"); | |
1108 | /* | |
1109 | * Not implemented yet | |
1110 | */ | |
1111 | printk("\n"); | |
1112 | } /* wv_ru_show */ | |
1113 | ||
1114 | /*------------------------------------------------------------------*/ | |
1115 | /* | |
1116 | * Display info about one control block of the i82586 memory. | |
1117 | */ | |
1118 | static void wv_cu_show_one(struct net_device * dev, net_local * lp, int i, u16 p) | |
1119 | { | |
1120 | unsigned long ioaddr; | |
1121 | ac_tx_t actx; | |
1122 | ||
1123 | ioaddr = dev->base_addr; | |
1124 | ||
1125 | printk("%d: 0x%x:", i, p); | |
1126 | ||
1127 | obram_read(ioaddr, p, (unsigned char *) &actx, sizeof(actx)); | |
1128 | printk(" status=0x%x,", actx.tx_h.ac_status); | |
1129 | printk(" command=0x%x,", actx.tx_h.ac_command); | |
1130 | ||
1131 | /* | |
1132 | { | |
1133 | tbd_t tbd; | |
1134 | ||
1135 | obram_read(ioaddr, actx.tx_tbd_offset, (unsigned char *)&tbd, sizeof(tbd)); | |
1136 | printk(" tbd_status=0x%x,", tbd.tbd_status); | |
1137 | } | |
1138 | */ | |
1139 | ||
1140 | printk("|"); | |
1141 | } | |
1142 | ||
1143 | /*------------------------------------------------------------------*/ | |
1144 | /* | |
1145 | * Print status of the command unit of the i82586. | |
1146 | */ | |
1147 | static void wv_cu_show(struct net_device * dev) | |
1148 | { | |
524ad0a7 | 1149 | net_local *lp = netdev_priv(dev); |
1da177e4 LT |
1150 | unsigned int i; |
1151 | u16 p; | |
1152 | ||
1153 | printk(KERN_DEBUG | |
1154 | "##### WaveLAN i82586 command unit status: #####\n"); | |
1155 | ||
1156 | printk(KERN_DEBUG); | |
1157 | for (i = 0, p = lp->tx_first_in_use; i < NTXBLOCKS; i++) { | |
1158 | wv_cu_show_one(dev, lp, i, p); | |
1159 | ||
1160 | p += TXBLOCKZ; | |
1161 | if (p >= OFFSET_CU + NTXBLOCKS * TXBLOCKZ) | |
1162 | p -= NTXBLOCKS * TXBLOCKZ; | |
1163 | } | |
1164 | printk("\n"); | |
1165 | } | |
1166 | #endif /* DEBUG_I82586_SHOW */ | |
1167 | ||
1168 | #ifdef DEBUG_DEVICE_SHOW | |
1169 | /*------------------------------------------------------------------*/ | |
1170 | /* | |
1171 | * Print the formatted status of the WaveLAN PCMCIA device driver. | |
1172 | */ | |
1173 | static void wv_dev_show(struct net_device * dev) | |
1174 | { | |
1175 | printk(KERN_DEBUG "dev:"); | |
1176 | printk(" state=%lX,", dev->state); | |
1177 | printk(" trans_start=%ld,", dev->trans_start); | |
1178 | printk(" flags=0x%x,", dev->flags); | |
1179 | printk("\n"); | |
1180 | } /* wv_dev_show */ | |
1181 | ||
1182 | /*------------------------------------------------------------------*/ | |
1183 | /* | |
1184 | * Print the formatted status of the WaveLAN PCMCIA device driver's | |
1185 | * private information. | |
1186 | */ | |
1187 | static void wv_local_show(struct net_device * dev) | |
1188 | { | |
1189 | net_local *lp; | |
1190 | ||
524ad0a7 | 1191 | lp = netdev_priv(dev); |
1da177e4 LT |
1192 | |
1193 | printk(KERN_DEBUG "local:"); | |
1194 | printk(" tx_n_in_use=%d,", lp->tx_n_in_use); | |
1195 | printk(" hacr=0x%x,", lp->hacr); | |
1196 | printk(" rx_head=0x%x,", lp->rx_head); | |
1197 | printk(" rx_last=0x%x,", lp->rx_last); | |
1198 | printk(" tx_first_free=0x%x,", lp->tx_first_free); | |
1199 | printk(" tx_first_in_use=0x%x,", lp->tx_first_in_use); | |
1200 | printk("\n"); | |
1201 | } /* wv_local_show */ | |
1202 | #endif /* DEBUG_DEVICE_SHOW */ | |
1203 | ||
1204 | #if defined(DEBUG_RX_INFO) || defined(DEBUG_TX_INFO) | |
1205 | /*------------------------------------------------------------------*/ | |
1206 | /* | |
1207 | * Dump packet header (and content if necessary) on the screen | |
1208 | */ | |
1209 | static inline void wv_packet_info(u8 * p, /* Packet to dump */ | |
1210 | int length, /* Length of the packet */ | |
1211 | char *msg1, /* Name of the device */ | |
1212 | char *msg2) | |
1213 | { /* Name of the function */ | |
1214 | int i; | |
1215 | int maxi; | |
1216 | ||
1217 | printk(KERN_DEBUG | |
e174961c JB |
1218 | "%s: %s(): dest %pM, length %d\n", |
1219 | msg1, msg2, p, length); | |
1da177e4 | 1220 | printk(KERN_DEBUG |
e174961c JB |
1221 | "%s: %s(): src %pM, type 0x%02X%02X\n", |
1222 | msg1, msg2, &p[6], p[12], p[13]); | |
1da177e4 LT |
1223 | |
1224 | #ifdef DEBUG_PACKET_DUMP | |
1225 | ||
1226 | printk(KERN_DEBUG "data=\""); | |
1227 | ||
1228 | if ((maxi = length) > DEBUG_PACKET_DUMP) | |
1229 | maxi = DEBUG_PACKET_DUMP; | |
1230 | for (i = 14; i < maxi; i++) | |
1231 | if (p[i] >= ' ' && p[i] <= '~') | |
1232 | printk(" %c", p[i]); | |
1233 | else | |
1234 | printk("%02X", p[i]); | |
1235 | if (maxi < length) | |
1236 | printk(".."); | |
1237 | printk("\"\n"); | |
1238 | printk(KERN_DEBUG "\n"); | |
1239 | #endif /* DEBUG_PACKET_DUMP */ | |
1240 | } | |
1241 | #endif /* defined(DEBUG_RX_INFO) || defined(DEBUG_TX_INFO) */ | |
1242 | ||
1243 | /*------------------------------------------------------------------*/ | |
1244 | /* | |
1245 | * This is the information which is displayed by the driver at startup. | |
1246 | * There are lots of flags for configuring it to your liking. | |
1247 | */ | |
858119e1 | 1248 | static void wv_init_info(struct net_device * dev) |
1da177e4 LT |
1249 | { |
1250 | short ioaddr = dev->base_addr; | |
524ad0a7 | 1251 | net_local *lp = netdev_priv(dev); |
1da177e4 | 1252 | psa_t psa; |
1da177e4 LT |
1253 | |
1254 | /* Read the parameter storage area */ | |
1255 | psa_read(ioaddr, lp->hacr, 0, (unsigned char *) &psa, sizeof(psa)); | |
1256 | ||
1257 | #ifdef DEBUG_PSA_SHOW | |
1258 | wv_psa_show(&psa); | |
1259 | #endif | |
1260 | #ifdef DEBUG_MMC_SHOW | |
1261 | wv_mmc_show(dev); | |
1262 | #endif | |
1263 | #ifdef DEBUG_I82586_SHOW | |
1264 | wv_cu_show(dev); | |
1265 | #endif | |
1266 | ||
1267 | #ifdef DEBUG_BASIC_SHOW | |
1268 | /* Now, let's go for the basic stuff. */ | |
e174961c JB |
1269 | printk(KERN_NOTICE "%s: WaveLAN at %#x, %pM, IRQ %d", |
1270 | dev->name, ioaddr, dev->dev_addr, dev->irq); | |
1da177e4 LT |
1271 | |
1272 | /* Print current network ID. */ | |
1273 | if (psa.psa_nwid_select) | |
1274 | printk(", nwid 0x%02X-%02X", psa.psa_nwid[0], | |
1275 | psa.psa_nwid[1]); | |
1276 | else | |
1277 | printk(", nwid off"); | |
1278 | ||
1279 | /* If 2.00 card */ | |
1280 | if (!(mmc_in(ioaddr, mmroff(0, mmr_fee_status)) & | |
1281 | (MMR_FEE_STATUS_DWLD | MMR_FEE_STATUS_BUSY))) { | |
1282 | unsigned short freq; | |
1283 | ||
1284 | /* Ask the EEPROM to read the frequency from the first area. */ | |
1285 | fee_read(ioaddr, 0x00, &freq, 1); | |
1286 | ||
1287 | /* Print frequency */ | |
1288 | printk(", 2.00, %ld", (freq >> 6) + 2400L); | |
1289 | ||
1290 | /* Hack! */ | |
1291 | if (freq & 0x20) | |
1292 | printk(".5"); | |
1293 | } else { | |
1294 | printk(", PC"); | |
1295 | switch (psa.psa_comp_number) { | |
1296 | case PSA_COMP_PC_AT_915: | |
1297 | case PSA_COMP_PC_AT_2400: | |
1298 | printk("-AT"); | |
1299 | break; | |
1300 | case PSA_COMP_PC_MC_915: | |
1301 | case PSA_COMP_PC_MC_2400: | |
1302 | printk("-MC"); | |
1303 | break; | |
1304 | case PSA_COMP_PCMCIA_915: | |
1305 | printk("MCIA"); | |
1306 | break; | |
1307 | default: | |
1308 | printk("?"); | |
1309 | } | |
1310 | printk(", "); | |
1311 | switch (psa.psa_subband) { | |
1312 | case PSA_SUBBAND_915: | |
1313 | printk("915"); | |
1314 | break; | |
1315 | case PSA_SUBBAND_2425: | |
1316 | printk("2425"); | |
1317 | break; | |
1318 | case PSA_SUBBAND_2460: | |
1319 | printk("2460"); | |
1320 | break; | |
1321 | case PSA_SUBBAND_2484: | |
1322 | printk("2484"); | |
1323 | break; | |
1324 | case PSA_SUBBAND_2430_5: | |
1325 | printk("2430.5"); | |
1326 | break; | |
1327 | default: | |
1328 | printk("?"); | |
1329 | } | |
1330 | } | |
1331 | ||
1332 | printk(" MHz\n"); | |
1333 | #endif /* DEBUG_BASIC_SHOW */ | |
1334 | ||
1335 | #ifdef DEBUG_VERSION_SHOW | |
1336 | /* Print version information */ | |
1337 | printk(KERN_NOTICE "%s", version); | |
1338 | #endif | |
1339 | } /* wv_init_info */ | |
1340 | ||
1341 | /********************* IOCTL, STATS & RECONFIG *********************/ | |
1342 | /* | |
1343 | * We found here routines that are called by Linux on different | |
1344 | * occasions after the configuration and not for transmitting data | |
1345 | * These may be called when the user use ifconfig, /proc/net/dev | |
1346 | * or wireless extensions | |
1347 | */ | |
1348 | ||
1349 | /*------------------------------------------------------------------*/ | |
1350 | /* | |
1351 | * Get the current Ethernet statistics. This may be called with the | |
1352 | * card open or closed. | |
1353 | * Used when the user read /proc/net/dev | |
1354 | */ | |
1355 | static en_stats *wavelan_get_stats(struct net_device * dev) | |
1356 | { | |
1357 | #ifdef DEBUG_IOCTL_TRACE | |
1358 | printk(KERN_DEBUG "%s: <>wavelan_get_stats()\n", dev->name); | |
1359 | #endif | |
1360 | ||
524ad0a7 | 1361 | return &((net_local *)netdev_priv(dev))->stats; |
1da177e4 LT |
1362 | } |
1363 | ||
1364 | /*------------------------------------------------------------------*/ | |
1365 | /* | |
1366 | * Set or clear the multicast filter for this adaptor. | |
1367 | * num_addrs == -1 Promiscuous mode, receive all packets | |
1368 | * num_addrs == 0 Normal mode, clear multicast list | |
1369 | * num_addrs > 0 Multicast mode, receive normal and MC packets, | |
1370 | * and do best-effort filtering. | |
1371 | */ | |
1372 | static void wavelan_set_multicast_list(struct net_device * dev) | |
1373 | { | |
524ad0a7 | 1374 | net_local *lp = netdev_priv(dev); |
1da177e4 LT |
1375 | |
1376 | #ifdef DEBUG_IOCTL_TRACE | |
1377 | printk(KERN_DEBUG "%s: ->wavelan_set_multicast_list()\n", | |
1378 | dev->name); | |
1379 | #endif | |
1380 | ||
1381 | #ifdef DEBUG_IOCTL_INFO | |
1382 | printk(KERN_DEBUG | |
1383 | "%s: wavelan_set_multicast_list(): setting Rx mode %02X to %d addresses.\n", | |
1384 | dev->name, dev->flags, dev->mc_count); | |
1385 | #endif | |
1386 | ||
1387 | /* Are we asking for promiscuous mode, | |
1388 | * or all multicast addresses (we don't have that!) | |
1389 | * or too many multicast addresses for the hardware filter? */ | |
1390 | if ((dev->flags & IFF_PROMISC) || | |
1391 | (dev->flags & IFF_ALLMULTI) || | |
1392 | (dev->mc_count > I82586_MAX_MULTICAST_ADDRESSES)) { | |
1393 | /* | |
1394 | * Enable promiscuous mode: receive all packets. | |
1395 | */ | |
1396 | if (!lp->promiscuous) { | |
1397 | lp->promiscuous = 1; | |
1398 | lp->mc_count = 0; | |
1399 | ||
1400 | wv_82586_reconfig(dev); | |
1da177e4 LT |
1401 | } |
1402 | } else | |
1403 | /* Are there multicast addresses to send? */ | |
1404 | if (dev->mc_list != (struct dev_mc_list *) NULL) { | |
1405 | /* | |
1406 | * Disable promiscuous mode, but receive all packets | |
1407 | * in multicast list | |
1408 | */ | |
1409 | #ifdef MULTICAST_AVOID | |
1410 | if (lp->promiscuous || (dev->mc_count != lp->mc_count)) | |
1411 | #endif | |
1412 | { | |
1413 | lp->promiscuous = 0; | |
1414 | lp->mc_count = dev->mc_count; | |
1415 | ||
1416 | wv_82586_reconfig(dev); | |
1417 | } | |
1418 | } else { | |
1419 | /* | |
1420 | * Switch to normal mode: disable promiscuous mode and | |
1421 | * clear the multicast list. | |
1422 | */ | |
1423 | if (lp->promiscuous || lp->mc_count == 0) { | |
1424 | lp->promiscuous = 0; | |
1425 | lp->mc_count = 0; | |
1426 | ||
1427 | wv_82586_reconfig(dev); | |
1428 | } | |
1429 | } | |
1430 | #ifdef DEBUG_IOCTL_TRACE | |
1431 | printk(KERN_DEBUG "%s: <-wavelan_set_multicast_list()\n", | |
1432 | dev->name); | |
1433 | #endif | |
1434 | } | |
1435 | ||
1436 | /*------------------------------------------------------------------*/ | |
1437 | /* | |
1438 | * This function doesn't exist. | |
1439 | * (Note : it was a nice way to test the reconfigure stuff...) | |
1440 | */ | |
1441 | #ifdef SET_MAC_ADDRESS | |
1442 | static int wavelan_set_mac_address(struct net_device * dev, void *addr) | |
1443 | { | |
1444 | struct sockaddr *mac = addr; | |
1445 | ||
1446 | /* Copy the address. */ | |
1447 | memcpy(dev->dev_addr, mac->sa_data, WAVELAN_ADDR_SIZE); | |
1448 | ||
1449 | /* Reconfigure the beast. */ | |
1450 | wv_82586_reconfig(dev); | |
1451 | ||
1452 | return 0; | |
1453 | } | |
1454 | #endif /* SET_MAC_ADDRESS */ | |
1455 | ||
1da177e4 LT |
1456 | |
1457 | /*------------------------------------------------------------------*/ | |
1458 | /* | |
1459 | * Frequency setting (for hardware capable of it) | |
1460 | * It's a bit complicated and you don't really want to look into it. | |
1461 | * (called in wavelan_ioctl) | |
1462 | */ | |
858119e1 | 1463 | static int wv_set_frequency(unsigned long ioaddr, /* I/O port of the card */ |
1da177e4 LT |
1464 | iw_freq * frequency) |
1465 | { | |
1466 | const int BAND_NUM = 10; /* Number of bands */ | |
1467 | long freq = 0L; /* offset to 2.4 GHz in .5 MHz */ | |
1468 | #ifdef DEBUG_IOCTL_INFO | |
1469 | int i; | |
1470 | #endif | |
1471 | ||
1472 | /* Setting by frequency */ | |
1473 | /* Theoretically, you may set any frequency between | |
1474 | * the two limits with a 0.5 MHz precision. In practice, | |
1475 | * I don't want you to have trouble with local regulations. | |
1476 | */ | |
1477 | if ((frequency->e == 1) && | |
1478 | (frequency->m >= (int) 2.412e8) | |
1479 | && (frequency->m <= (int) 2.487e8)) { | |
1480 | freq = ((frequency->m / 10000) - 24000L) / 5; | |
1481 | } | |
1482 | ||
1483 | /* Setting by channel (same as wfreqsel) */ | |
1484 | /* Warning: each channel is 22 MHz wide, so some of the channels | |
1485 | * will interfere. */ | |
1486 | if ((frequency->e == 0) && (frequency->m < BAND_NUM)) { | |
1487 | /* Get frequency offset. */ | |
1488 | freq = channel_bands[frequency->m] >> 1; | |
1489 | } | |
1490 | ||
1491 | /* Verify that the frequency is allowed. */ | |
1492 | if (freq != 0L) { | |
1493 | u16 table[10]; /* Authorized frequency table */ | |
1494 | ||
1495 | /* Read the frequency table. */ | |
1496 | fee_read(ioaddr, 0x71, table, 10); | |
1497 | ||
1498 | #ifdef DEBUG_IOCTL_INFO | |
1499 | printk(KERN_DEBUG "Frequency table: "); | |
1500 | for (i = 0; i < 10; i++) { | |
1501 | printk(" %04X", table[i]); | |
1502 | } | |
1503 | printk("\n"); | |
1504 | #endif | |
1505 | ||
1506 | /* Look in the table to see whether the frequency is allowed. */ | |
1507 | if (!(table[9 - ((freq - 24) / 16)] & | |
1508 | (1 << ((freq - 24) % 16)))) return -EINVAL; /* not allowed */ | |
1509 | } else | |
1510 | return -EINVAL; | |
1511 | ||
1512 | /* if we get a usable frequency */ | |
1513 | if (freq != 0L) { | |
1514 | unsigned short area[16]; | |
1515 | unsigned short dac[2]; | |
1516 | unsigned short area_verify[16]; | |
1517 | unsigned short dac_verify[2]; | |
1518 | /* Corresponding gain (in the power adjust value table) | |
1519 | * See AT&T WaveLAN Data Manual, REF 407-024689/E, page 3-8 | |
1520 | * and WCIN062D.DOC, page 6.2.9. */ | |
1521 | unsigned short power_limit[] = { 40, 80, 120, 160, 0 }; | |
1522 | int power_band = 0; /* Selected band */ | |
1523 | unsigned short power_adjust; /* Correct value */ | |
1524 | ||
1525 | /* Search for the gain. */ | |
1526 | power_band = 0; | |
1527 | while ((freq > power_limit[power_band]) && | |
1528 | (power_limit[++power_band] != 0)); | |
1529 | ||
1530 | /* Read the first area. */ | |
1531 | fee_read(ioaddr, 0x00, area, 16); | |
1532 | ||
1533 | /* Read the DAC. */ | |
1534 | fee_read(ioaddr, 0x60, dac, 2); | |
1535 | ||
1536 | /* Read the new power adjust value. */ | |
1537 | fee_read(ioaddr, 0x6B - (power_band >> 1), &power_adjust, | |
1538 | 1); | |
1539 | if (power_band & 0x1) | |
1540 | power_adjust >>= 8; | |
1541 | else | |
1542 | power_adjust &= 0xFF; | |
1543 | ||
1544 | #ifdef DEBUG_IOCTL_INFO | |
1545 | printk(KERN_DEBUG "WaveLAN EEPROM Area 1: "); | |
1546 | for (i = 0; i < 16; i++) { | |
1547 | printk(" %04X", area[i]); | |
1548 | } | |
1549 | printk("\n"); | |
1550 | ||
1551 | printk(KERN_DEBUG "WaveLAN EEPROM DAC: %04X %04X\n", | |
1552 | dac[0], dac[1]); | |
1553 | #endif | |
1554 | ||
1555 | /* Frequency offset (for info only) */ | |
1556 | area[0] = ((freq << 5) & 0xFFE0) | (area[0] & 0x1F); | |
1557 | ||
1558 | /* Receiver Principle main divider coefficient */ | |
1559 | area[3] = (freq >> 1) + 2400L - 352L; | |
1560 | area[2] = ((freq & 0x1) << 4) | (area[2] & 0xFFEF); | |
1561 | ||
1562 | /* Transmitter Main divider coefficient */ | |
1563 | area[13] = (freq >> 1) + 2400L; | |
1564 | area[12] = ((freq & 0x1) << 4) | (area[2] & 0xFFEF); | |
1565 | ||
1566 | /* Other parts of the area are flags, bit streams or unused. */ | |
1567 | ||
1568 | /* Set the value in the DAC. */ | |
1569 | dac[1] = ((power_adjust >> 1) & 0x7F) | (dac[1] & 0xFF80); | |
1570 | dac[0] = ((power_adjust & 0x1) << 4) | (dac[0] & 0xFFEF); | |
1571 | ||
1572 | /* Write the first area. */ | |
1573 | fee_write(ioaddr, 0x00, area, 16); | |
1574 | ||
1575 | /* Write the DAC. */ | |
1576 | fee_write(ioaddr, 0x60, dac, 2); | |
1577 | ||
1578 | /* We now should verify here that the writing of the EEPROM went OK. */ | |
1579 | ||
1580 | /* Reread the first area. */ | |
1581 | fee_read(ioaddr, 0x00, area_verify, 16); | |
1582 | ||
1583 | /* Reread the DAC. */ | |
1584 | fee_read(ioaddr, 0x60, dac_verify, 2); | |
1585 | ||
1586 | /* Compare. */ | |
1587 | if (memcmp(area, area_verify, 16 * 2) || | |
1588 | memcmp(dac, dac_verify, 2 * 2)) { | |
1589 | #ifdef DEBUG_IOCTL_ERROR | |
1590 | printk(KERN_INFO | |
1591 | "WaveLAN: wv_set_frequency: unable to write new frequency to EEPROM(?).\n"); | |
1592 | #endif | |
1593 | return -EOPNOTSUPP; | |
1594 | } | |
1595 | ||
1596 | /* We must download the frequency parameters to the | |
1597 | * synthesizers (from the EEPROM - area 1) | |
1598 | * Note: as the EEPROM is automatically decremented, we set the end | |
1599 | * if the area... */ | |
1600 | mmc_out(ioaddr, mmwoff(0, mmw_fee_addr), 0x0F); | |
1601 | mmc_out(ioaddr, mmwoff(0, mmw_fee_ctrl), | |
1602 | MMW_FEE_CTRL_READ | MMW_FEE_CTRL_DWLD); | |
1603 | ||
1604 | /* Wait until the download is finished. */ | |
1605 | fee_wait(ioaddr, 100, 100); | |
1606 | ||
1607 | /* We must now download the power adjust value (gain) to | |
1608 | * the synthesizers (from the EEPROM - area 7 - DAC). */ | |
1609 | mmc_out(ioaddr, mmwoff(0, mmw_fee_addr), 0x61); | |
1610 | mmc_out(ioaddr, mmwoff(0, mmw_fee_ctrl), | |
1611 | MMW_FEE_CTRL_READ | MMW_FEE_CTRL_DWLD); | |
1612 | ||
1613 | /* Wait for the download to finish. */ | |
1614 | fee_wait(ioaddr, 100, 100); | |
1615 | ||
1616 | #ifdef DEBUG_IOCTL_INFO | |
1617 | /* Verification of what we have done */ | |
1618 | ||
1619 | printk(KERN_DEBUG "WaveLAN EEPROM Area 1: "); | |
1620 | for (i = 0; i < 16; i++) { | |
1621 | printk(" %04X", area_verify[i]); | |
1622 | } | |
1623 | printk("\n"); | |
1624 | ||
1625 | printk(KERN_DEBUG "WaveLAN EEPROM DAC: %04X %04X\n", | |
1626 | dac_verify[0], dac_verify[1]); | |
1627 | #endif | |
1628 | ||
1629 | return 0; | |
1630 | } else | |
1631 | return -EINVAL; /* Bah, never get there... */ | |
1632 | } | |
1633 | ||
1634 | /*------------------------------------------------------------------*/ | |
1635 | /* | |
1636 | * Give the list of available frequencies. | |
1637 | */ | |
858119e1 | 1638 | static int wv_frequency_list(unsigned long ioaddr, /* I/O port of the card */ |
1da177e4 LT |
1639 | iw_freq * list, /* List of frequencies to fill */ |
1640 | int max) | |
1641 | { /* Maximum number of frequencies */ | |
1642 | u16 table[10]; /* Authorized frequency table */ | |
1643 | long freq = 0L; /* offset to 2.4 GHz in .5 MHz + 12 MHz */ | |
1644 | int i; /* index in the table */ | |
1645 | int c = 0; /* Channel number */ | |
1646 | ||
1647 | /* Read the frequency table. */ | |
1648 | fee_read(ioaddr, 0x71 /* frequency table */ , table, 10); | |
1649 | ||
1650 | /* Check all frequencies. */ | |
1651 | i = 0; | |
1652 | for (freq = 0; freq < 150; freq++) | |
1653 | /* Look in the table if the frequency is allowed */ | |
1654 | if (table[9 - (freq / 16)] & (1 << (freq % 16))) { | |
1655 | /* Compute approximate channel number */ | |
0a92dd0a | 1656 | while ((c < ARRAY_SIZE(channel_bands)) && |
a192491a | 1657 | (((channel_bands[c] >> 1) - 24) < freq)) |
1da177e4 LT |
1658 | c++; |
1659 | list[i].i = c; /* Set the list index */ | |
1660 | ||
1661 | /* put in the list */ | |
1662 | list[i].m = (((freq + 24) * 5) + 24000L) * 10000; | |
1663 | list[i++].e = 1; | |
1664 | ||
1665 | /* Check number. */ | |
1666 | if (i >= max) | |
1667 | return (i); | |
1668 | } | |
1669 | ||
1670 | return (i); | |
1671 | } | |
1672 | ||
1673 | #ifdef IW_WIRELESS_SPY | |
1674 | /*------------------------------------------------------------------*/ | |
1675 | /* | |
1676 | * Gather wireless spy statistics: for each packet, compare the source | |
1677 | * address with our list, and if they match, get the statistics. | |
1678 | * Sorry, but this function really needs the wireless extensions. | |
1679 | */ | |
1680 | static inline void wl_spy_gather(struct net_device * dev, | |
1681 | u8 * mac, /* MAC address */ | |
1682 | u8 * stats) /* Statistics to gather */ | |
1683 | { | |
1684 | struct iw_quality wstats; | |
1685 | ||
1686 | wstats.qual = stats[2] & MMR_SGNL_QUAL; | |
1687 | wstats.level = stats[0] & MMR_SIGNAL_LVL; | |
1688 | wstats.noise = stats[1] & MMR_SILENCE_LVL; | |
1689 | wstats.updated = 0x7; | |
1690 | ||
1691 | /* Update spy records */ | |
1692 | wireless_spy_update(dev, mac, &wstats); | |
1693 | } | |
1694 | #endif /* IW_WIRELESS_SPY */ | |
1695 | ||
1696 | #ifdef HISTOGRAM | |
1697 | /*------------------------------------------------------------------*/ | |
1698 | /* | |
1699 | * This function calculates a histogram of the signal level. | |
1700 | * As the noise is quite constant, it's like doing it on the SNR. | |
1701 | * We have defined a set of interval (lp->his_range), and each time | |
1702 | * the level goes in that interval, we increment the count (lp->his_sum). | |
1703 | * With this histogram you may detect if one WaveLAN is really weak, | |
1704 | * or you may also calculate the mean and standard deviation of the level. | |
1705 | */ | |
1706 | static inline void wl_his_gather(struct net_device * dev, u8 * stats) | |
1707 | { /* Statistics to gather */ | |
524ad0a7 | 1708 | net_local *lp = netdev_priv(dev); |
1da177e4 LT |
1709 | u8 level = stats[0] & MMR_SIGNAL_LVL; |
1710 | int i; | |
1711 | ||
1712 | /* Find the correct interval. */ | |
1713 | i = 0; | |
1714 | while ((i < (lp->his_number - 1)) | |
1715 | && (level >= lp->his_range[i++])); | |
1716 | ||
1717 | /* Increment interval counter. */ | |
1718 | (lp->his_sum[i])++; | |
1719 | } | |
1720 | #endif /* HISTOGRAM */ | |
1721 | ||
1722 | /*------------------------------------------------------------------*/ | |
1723 | /* | |
1724 | * Wireless Handler : get protocol name | |
1725 | */ | |
1726 | static int wavelan_get_name(struct net_device *dev, | |
1727 | struct iw_request_info *info, | |
1728 | union iwreq_data *wrqu, | |
1729 | char *extra) | |
1730 | { | |
1731 | strcpy(wrqu->name, "WaveLAN"); | |
1732 | return 0; | |
1733 | } | |
1734 | ||
1735 | /*------------------------------------------------------------------*/ | |
1736 | /* | |
1737 | * Wireless Handler : set NWID | |
1738 | */ | |
1739 | static int wavelan_set_nwid(struct net_device *dev, | |
1740 | struct iw_request_info *info, | |
1741 | union iwreq_data *wrqu, | |
1742 | char *extra) | |
1743 | { | |
1744 | unsigned long ioaddr = dev->base_addr; | |
524ad0a7 | 1745 | net_local *lp = netdev_priv(dev); /* lp is not unused */ |
1da177e4 LT |
1746 | psa_t psa; |
1747 | mm_t m; | |
1748 | unsigned long flags; | |
1749 | int ret = 0; | |
1750 | ||
1751 | /* Disable interrupts and save flags. */ | |
1752 | spin_lock_irqsave(&lp->spinlock, flags); | |
1753 | ||
1754 | /* Set NWID in WaveLAN. */ | |
1755 | if (!wrqu->nwid.disabled) { | |
1756 | /* Set NWID in psa */ | |
1757 | psa.psa_nwid[0] = (wrqu->nwid.value & 0xFF00) >> 8; | |
1758 | psa.psa_nwid[1] = wrqu->nwid.value & 0xFF; | |
1759 | psa.psa_nwid_select = 0x01; | |
1760 | psa_write(ioaddr, lp->hacr, | |
1761 | (char *) psa.psa_nwid - (char *) &psa, | |
1762 | (unsigned char *) psa.psa_nwid, 3); | |
1763 | ||
1764 | /* Set NWID in mmc. */ | |
1765 | m.w.mmw_netw_id_l = psa.psa_nwid[1]; | |
1766 | m.w.mmw_netw_id_h = psa.psa_nwid[0]; | |
1767 | mmc_write(ioaddr, | |
1768 | (char *) &m.w.mmw_netw_id_l - | |
1769 | (char *) &m, | |
1770 | (unsigned char *) &m.w.mmw_netw_id_l, 2); | |
1771 | mmc_out(ioaddr, mmwoff(0, mmw_loopt_sel), 0x00); | |
1772 | } else { | |
1773 | /* Disable NWID in the psa. */ | |
1774 | psa.psa_nwid_select = 0x00; | |
1775 | psa_write(ioaddr, lp->hacr, | |
1776 | (char *) &psa.psa_nwid_select - | |
1777 | (char *) &psa, | |
1778 | (unsigned char *) &psa.psa_nwid_select, | |
1779 | 1); | |
1780 | ||
1781 | /* Disable NWID in the mmc (no filtering). */ | |
1782 | mmc_out(ioaddr, mmwoff(0, mmw_loopt_sel), | |
1783 | MMW_LOOPT_SEL_DIS_NWID); | |
1784 | } | |
1785 | /* update the Wavelan checksum */ | |
1786 | update_psa_checksum(dev, ioaddr, lp->hacr); | |
1787 | ||
1788 | /* Enable interrupts and restore flags. */ | |
1789 | spin_unlock_irqrestore(&lp->spinlock, flags); | |
1790 | ||
1791 | return ret; | |
1792 | } | |
1793 | ||
1794 | /*------------------------------------------------------------------*/ | |
1795 | /* | |
1796 | * Wireless Handler : get NWID | |
1797 | */ | |
1798 | static int wavelan_get_nwid(struct net_device *dev, | |
1799 | struct iw_request_info *info, | |
1800 | union iwreq_data *wrqu, | |
1801 | char *extra) | |
1802 | { | |
1803 | unsigned long ioaddr = dev->base_addr; | |
524ad0a7 | 1804 | net_local *lp = netdev_priv(dev); /* lp is not unused */ |
1da177e4 LT |
1805 | psa_t psa; |
1806 | unsigned long flags; | |
1807 | int ret = 0; | |
1808 | ||
1809 | /* Disable interrupts and save flags. */ | |
1810 | spin_lock_irqsave(&lp->spinlock, flags); | |
1811 | ||
1812 | /* Read the NWID. */ | |
1813 | psa_read(ioaddr, lp->hacr, | |
1814 | (char *) psa.psa_nwid - (char *) &psa, | |
1815 | (unsigned char *) psa.psa_nwid, 3); | |
1816 | wrqu->nwid.value = (psa.psa_nwid[0] << 8) + psa.psa_nwid[1]; | |
1817 | wrqu->nwid.disabled = !(psa.psa_nwid_select); | |
1818 | wrqu->nwid.fixed = 1; /* Superfluous */ | |
1819 | ||
1820 | /* Enable interrupts and restore flags. */ | |
1821 | spin_unlock_irqrestore(&lp->spinlock, flags); | |
1822 | ||
1823 | return ret; | |
1824 | } | |
1825 | ||
1826 | /*------------------------------------------------------------------*/ | |
1827 | /* | |
1828 | * Wireless Handler : set frequency | |
1829 | */ | |
1830 | static int wavelan_set_freq(struct net_device *dev, | |
1831 | struct iw_request_info *info, | |
1832 | union iwreq_data *wrqu, | |
1833 | char *extra) | |
1834 | { | |
1835 | unsigned long ioaddr = dev->base_addr; | |
524ad0a7 | 1836 | net_local *lp = netdev_priv(dev); /* lp is not unused */ |
1da177e4 LT |
1837 | unsigned long flags; |
1838 | int ret; | |
1839 | ||
1840 | /* Disable interrupts and save flags. */ | |
1841 | spin_lock_irqsave(&lp->spinlock, flags); | |
1842 | ||
1843 | /* Attempt to recognise 2.00 cards (2.4 GHz frequency selectable). */ | |
1844 | if (!(mmc_in(ioaddr, mmroff(0, mmr_fee_status)) & | |
1845 | (MMR_FEE_STATUS_DWLD | MMR_FEE_STATUS_BUSY))) | |
1846 | ret = wv_set_frequency(ioaddr, &(wrqu->freq)); | |
1847 | else | |
1848 | ret = -EOPNOTSUPP; | |
1849 | ||
1850 | /* Enable interrupts and restore flags. */ | |
1851 | spin_unlock_irqrestore(&lp->spinlock, flags); | |
1852 | ||
1853 | return ret; | |
1854 | } | |
1855 | ||
1856 | /*------------------------------------------------------------------*/ | |
1857 | /* | |
1858 | * Wireless Handler : get frequency | |
1859 | */ | |
1860 | static int wavelan_get_freq(struct net_device *dev, | |
1861 | struct iw_request_info *info, | |
1862 | union iwreq_data *wrqu, | |
1863 | char *extra) | |
1864 | { | |
1865 | unsigned long ioaddr = dev->base_addr; | |
524ad0a7 | 1866 | net_local *lp = netdev_priv(dev); /* lp is not unused */ |
1da177e4 LT |
1867 | psa_t psa; |
1868 | unsigned long flags; | |
1869 | int ret = 0; | |
1870 | ||
1871 | /* Disable interrupts and save flags. */ | |
1872 | spin_lock_irqsave(&lp->spinlock, flags); | |
1873 | ||
1874 | /* Attempt to recognise 2.00 cards (2.4 GHz frequency selectable). | |
1875 | * Does it work for everybody, especially old cards? */ | |
1876 | if (!(mmc_in(ioaddr, mmroff(0, mmr_fee_status)) & | |
1877 | (MMR_FEE_STATUS_DWLD | MMR_FEE_STATUS_BUSY))) { | |
1878 | unsigned short freq; | |
1879 | ||
1880 | /* Ask the EEPROM to read the frequency from the first area. */ | |
1881 | fee_read(ioaddr, 0x00, &freq, 1); | |
1882 | wrqu->freq.m = ((freq >> 5) * 5 + 24000L) * 10000; | |
1883 | wrqu->freq.e = 1; | |
1884 | } else { | |
1885 | psa_read(ioaddr, lp->hacr, | |
1886 | (char *) &psa.psa_subband - (char *) &psa, | |
1887 | (unsigned char *) &psa.psa_subband, 1); | |
1888 | ||
1889 | if (psa.psa_subband <= 4) { | |
1890 | wrqu->freq.m = fixed_bands[psa.psa_subband]; | |
1891 | wrqu->freq.e = (psa.psa_subband != 0); | |
1892 | } else | |
1893 | ret = -EOPNOTSUPP; | |
1894 | } | |
1895 | ||
1896 | /* Enable interrupts and restore flags. */ | |
1897 | spin_unlock_irqrestore(&lp->spinlock, flags); | |
1898 | ||
1899 | return ret; | |
1900 | } | |
1901 | ||
1902 | /*------------------------------------------------------------------*/ | |
1903 | /* | |
1904 | * Wireless Handler : set level threshold | |
1905 | */ | |
1906 | static int wavelan_set_sens(struct net_device *dev, | |
1907 | struct iw_request_info *info, | |
1908 | union iwreq_data *wrqu, | |
1909 | char *extra) | |
1910 | { | |
1911 | unsigned long ioaddr = dev->base_addr; | |
524ad0a7 | 1912 | net_local *lp = netdev_priv(dev); /* lp is not unused */ |
1da177e4 LT |
1913 | psa_t psa; |
1914 | unsigned long flags; | |
1915 | int ret = 0; | |
1916 | ||
1917 | /* Disable interrupts and save flags. */ | |
1918 | spin_lock_irqsave(&lp->spinlock, flags); | |
1919 | ||
1920 | /* Set the level threshold. */ | |
1921 | /* We should complain loudly if wrqu->sens.fixed = 0, because we | |
1922 | * can't set auto mode... */ | |
1923 | psa.psa_thr_pre_set = wrqu->sens.value & 0x3F; | |
1924 | psa_write(ioaddr, lp->hacr, | |
1925 | (char *) &psa.psa_thr_pre_set - (char *) &psa, | |
1926 | (unsigned char *) &psa.psa_thr_pre_set, 1); | |
1927 | /* update the Wavelan checksum */ | |
1928 | update_psa_checksum(dev, ioaddr, lp->hacr); | |
1929 | mmc_out(ioaddr, mmwoff(0, mmw_thr_pre_set), | |
1930 | psa.psa_thr_pre_set); | |
1931 | ||
1932 | /* Enable interrupts and restore flags. */ | |
1933 | spin_unlock_irqrestore(&lp->spinlock, flags); | |
1934 | ||
1935 | return ret; | |
1936 | } | |
1937 | ||
1938 | /*------------------------------------------------------------------*/ | |
1939 | /* | |
1940 | * Wireless Handler : get level threshold | |
1941 | */ | |
1942 | static int wavelan_get_sens(struct net_device *dev, | |
1943 | struct iw_request_info *info, | |
1944 | union iwreq_data *wrqu, | |
1945 | char *extra) | |
1946 | { | |
1947 | unsigned long ioaddr = dev->base_addr; | |
524ad0a7 | 1948 | net_local *lp = netdev_priv(dev); /* lp is not unused */ |
1da177e4 LT |
1949 | psa_t psa; |
1950 | unsigned long flags; | |
1951 | int ret = 0; | |
1952 | ||
1953 | /* Disable interrupts and save flags. */ | |
1954 | spin_lock_irqsave(&lp->spinlock, flags); | |
1955 | ||
1956 | /* Read the level threshold. */ | |
1957 | psa_read(ioaddr, lp->hacr, | |
1958 | (char *) &psa.psa_thr_pre_set - (char *) &psa, | |
1959 | (unsigned char *) &psa.psa_thr_pre_set, 1); | |
1960 | wrqu->sens.value = psa.psa_thr_pre_set & 0x3F; | |
1961 | wrqu->sens.fixed = 1; | |
1962 | ||
1963 | /* Enable interrupts and restore flags. */ | |
1964 | spin_unlock_irqrestore(&lp->spinlock, flags); | |
1965 | ||
1966 | return ret; | |
1967 | } | |
1968 | ||
1969 | /*------------------------------------------------------------------*/ | |
1970 | /* | |
1971 | * Wireless Handler : set encryption key | |
1972 | */ | |
1973 | static int wavelan_set_encode(struct net_device *dev, | |
1974 | struct iw_request_info *info, | |
1975 | union iwreq_data *wrqu, | |
1976 | char *extra) | |
1977 | { | |
1978 | unsigned long ioaddr = dev->base_addr; | |
524ad0a7 | 1979 | net_local *lp = netdev_priv(dev); /* lp is not unused */ |
1da177e4 LT |
1980 | unsigned long flags; |
1981 | psa_t psa; | |
1982 | int ret = 0; | |
1983 | ||
1984 | /* Disable interrupts and save flags. */ | |
1985 | spin_lock_irqsave(&lp->spinlock, flags); | |
1986 | ||
1987 | /* Check if capable of encryption */ | |
1988 | if (!mmc_encr(ioaddr)) { | |
1989 | ret = -EOPNOTSUPP; | |
1990 | } | |
1991 | ||
1992 | /* Check the size of the key */ | |
1993 | if((wrqu->encoding.length != 8) && (wrqu->encoding.length != 0)) { | |
1994 | ret = -EINVAL; | |
1995 | } | |
1996 | ||
1997 | if(!ret) { | |
1998 | /* Basic checking... */ | |
1999 | if (wrqu->encoding.length == 8) { | |
2000 | /* Copy the key in the driver */ | |
2001 | memcpy(psa.psa_encryption_key, extra, | |
2002 | wrqu->encoding.length); | |
2003 | psa.psa_encryption_select = 1; | |
2004 | ||
2005 | psa_write(ioaddr, lp->hacr, | |
2006 | (char *) &psa.psa_encryption_select - | |
2007 | (char *) &psa, | |
2008 | (unsigned char *) &psa. | |
2009 | psa_encryption_select, 8 + 1); | |
2010 | ||
2011 | mmc_out(ioaddr, mmwoff(0, mmw_encr_enable), | |
2012 | MMW_ENCR_ENABLE_EN | MMW_ENCR_ENABLE_MODE); | |
2013 | mmc_write(ioaddr, mmwoff(0, mmw_encr_key), | |
2014 | (unsigned char *) &psa. | |
2015 | psa_encryption_key, 8); | |
2016 | } | |
2017 | ||
2018 | /* disable encryption */ | |
2019 | if (wrqu->encoding.flags & IW_ENCODE_DISABLED) { | |
2020 | psa.psa_encryption_select = 0; | |
2021 | psa_write(ioaddr, lp->hacr, | |
2022 | (char *) &psa.psa_encryption_select - | |
2023 | (char *) &psa, | |
2024 | (unsigned char *) &psa. | |
2025 | psa_encryption_select, 1); | |
2026 | ||
2027 | mmc_out(ioaddr, mmwoff(0, mmw_encr_enable), 0); | |
2028 | } | |
2029 | /* update the Wavelan checksum */ | |
2030 | update_psa_checksum(dev, ioaddr, lp->hacr); | |
2031 | } | |
2032 | ||
2033 | /* Enable interrupts and restore flags. */ | |
2034 | spin_unlock_irqrestore(&lp->spinlock, flags); | |
2035 | ||
2036 | return ret; | |
2037 | } | |
2038 | ||
2039 | /*------------------------------------------------------------------*/ | |
2040 | /* | |
2041 | * Wireless Handler : get encryption key | |
2042 | */ | |
2043 | static int wavelan_get_encode(struct net_device *dev, | |
2044 | struct iw_request_info *info, | |
2045 | union iwreq_data *wrqu, | |
2046 | char *extra) | |
2047 | { | |
2048 | unsigned long ioaddr = dev->base_addr; | |
524ad0a7 | 2049 | net_local *lp = netdev_priv(dev); /* lp is not unused */ |
1da177e4 LT |
2050 | psa_t psa; |
2051 | unsigned long flags; | |
2052 | int ret = 0; | |
2053 | ||
2054 | /* Disable interrupts and save flags. */ | |
2055 | spin_lock_irqsave(&lp->spinlock, flags); | |
2056 | ||
2057 | /* Check if encryption is available */ | |
2058 | if (!mmc_encr(ioaddr)) { | |
2059 | ret = -EOPNOTSUPP; | |
2060 | } else { | |
2061 | /* Read the encryption key */ | |
2062 | psa_read(ioaddr, lp->hacr, | |
2063 | (char *) &psa.psa_encryption_select - | |
2064 | (char *) &psa, | |
2065 | (unsigned char *) &psa. | |
2066 | psa_encryption_select, 1 + 8); | |
2067 | ||
2068 | /* encryption is enabled ? */ | |
2069 | if (psa.psa_encryption_select) | |
2070 | wrqu->encoding.flags = IW_ENCODE_ENABLED; | |
2071 | else | |
2072 | wrqu->encoding.flags = IW_ENCODE_DISABLED; | |
2073 | wrqu->encoding.flags |= mmc_encr(ioaddr); | |
2074 | ||
2075 | /* Copy the key to the user buffer */ | |
2076 | wrqu->encoding.length = 8; | |
2077 | memcpy(extra, psa.psa_encryption_key, wrqu->encoding.length); | |
2078 | } | |
2079 | ||
2080 | /* Enable interrupts and restore flags. */ | |
2081 | spin_unlock_irqrestore(&lp->spinlock, flags); | |
2082 | ||
2083 | return ret; | |
2084 | } | |
2085 | ||
2086 | /*------------------------------------------------------------------*/ | |
2087 | /* | |
2088 | * Wireless Handler : get range info | |
2089 | */ | |
2090 | static int wavelan_get_range(struct net_device *dev, | |
2091 | struct iw_request_info *info, | |
2092 | union iwreq_data *wrqu, | |
2093 | char *extra) | |
2094 | { | |
2095 | unsigned long ioaddr = dev->base_addr; | |
524ad0a7 | 2096 | net_local *lp = netdev_priv(dev); /* lp is not unused */ |
1da177e4 LT |
2097 | struct iw_range *range = (struct iw_range *) extra; |
2098 | unsigned long flags; | |
2099 | int ret = 0; | |
2100 | ||
2101 | /* Set the length (very important for backward compatibility) */ | |
2102 | wrqu->data.length = sizeof(struct iw_range); | |
2103 | ||
2104 | /* Set all the info we don't care or don't know about to zero */ | |
2105 | memset(range, 0, sizeof(struct iw_range)); | |
2106 | ||
2107 | /* Set the Wireless Extension versions */ | |
2108 | range->we_version_compiled = WIRELESS_EXT; | |
2109 | range->we_version_source = 9; | |
2110 | ||
2111 | /* Set information in the range struct. */ | |
2112 | range->throughput = 1.6 * 1000 * 1000; /* don't argue on this ! */ | |
2113 | range->min_nwid = 0x0000; | |
2114 | range->max_nwid = 0xFFFF; | |
2115 | ||
2116 | range->sensitivity = 0x3F; | |
2117 | range->max_qual.qual = MMR_SGNL_QUAL; | |
2118 | range->max_qual.level = MMR_SIGNAL_LVL; | |
2119 | range->max_qual.noise = MMR_SILENCE_LVL; | |
2120 | range->avg_qual.qual = MMR_SGNL_QUAL; /* Always max */ | |
2121 | /* Need to get better values for those two */ | |
2122 | range->avg_qual.level = 30; | |
2123 | range->avg_qual.noise = 8; | |
2124 | ||
2125 | range->num_bitrates = 1; | |
2126 | range->bitrate[0] = 2000000; /* 2 Mb/s */ | |
2127 | ||
2128 | /* Event capability (kernel + driver) */ | |
2129 | range->event_capa[0] = (IW_EVENT_CAPA_MASK(0x8B02) | | |
2130 | IW_EVENT_CAPA_MASK(0x8B04)); | |
2131 | range->event_capa[1] = IW_EVENT_CAPA_K_1; | |
2132 | ||
2133 | /* Disable interrupts and save flags. */ | |
2134 | spin_lock_irqsave(&lp->spinlock, flags); | |
2135 | ||
2136 | /* Attempt to recognise 2.00 cards (2.4 GHz frequency selectable). */ | |
2137 | if (!(mmc_in(ioaddr, mmroff(0, mmr_fee_status)) & | |
2138 | (MMR_FEE_STATUS_DWLD | MMR_FEE_STATUS_BUSY))) { | |
2139 | range->num_channels = 10; | |
2140 | range->num_frequency = wv_frequency_list(ioaddr, range->freq, | |
2141 | IW_MAX_FREQUENCIES); | |
2142 | } else | |
2143 | range->num_channels = range->num_frequency = 0; | |
2144 | ||
2145 | /* Encryption supported ? */ | |
2146 | if (mmc_encr(ioaddr)) { | |
2147 | range->encoding_size[0] = 8; /* DES = 64 bits key */ | |
2148 | range->num_encoding_sizes = 1; | |
2149 | range->max_encoding_tokens = 1; /* Only one key possible */ | |
2150 | } else { | |
2151 | range->num_encoding_sizes = 0; | |
2152 | range->max_encoding_tokens = 0; | |
2153 | } | |
2154 | ||
2155 | /* Enable interrupts and restore flags. */ | |
2156 | spin_unlock_irqrestore(&lp->spinlock, flags); | |
2157 | ||
2158 | return ret; | |
2159 | } | |
2160 | ||
2161 | /*------------------------------------------------------------------*/ | |
2162 | /* | |
2163 | * Wireless Private Handler : set quality threshold | |
2164 | */ | |
2165 | static int wavelan_set_qthr(struct net_device *dev, | |
2166 | struct iw_request_info *info, | |
2167 | union iwreq_data *wrqu, | |
2168 | char *extra) | |
2169 | { | |
2170 | unsigned long ioaddr = dev->base_addr; | |
524ad0a7 | 2171 | net_local *lp = netdev_priv(dev); /* lp is not unused */ |
1da177e4 LT |
2172 | psa_t psa; |
2173 | unsigned long flags; | |
2174 | ||
2175 | /* Disable interrupts and save flags. */ | |
2176 | spin_lock_irqsave(&lp->spinlock, flags); | |
2177 | ||
2178 | psa.psa_quality_thr = *(extra) & 0x0F; | |
2179 | psa_write(ioaddr, lp->hacr, | |
2180 | (char *) &psa.psa_quality_thr - (char *) &psa, | |
2181 | (unsigned char *) &psa.psa_quality_thr, 1); | |
2182 | /* update the Wavelan checksum */ | |
2183 | update_psa_checksum(dev, ioaddr, lp->hacr); | |
2184 | mmc_out(ioaddr, mmwoff(0, mmw_quality_thr), | |
2185 | psa.psa_quality_thr); | |
2186 | ||
2187 | /* Enable interrupts and restore flags. */ | |
2188 | spin_unlock_irqrestore(&lp->spinlock, flags); | |
2189 | ||
2190 | return 0; | |
2191 | } | |
2192 | ||
2193 | /*------------------------------------------------------------------*/ | |
2194 | /* | |
2195 | * Wireless Private Handler : get quality threshold | |
2196 | */ | |
2197 | static int wavelan_get_qthr(struct net_device *dev, | |
2198 | struct iw_request_info *info, | |
2199 | union iwreq_data *wrqu, | |
2200 | char *extra) | |
2201 | { | |
2202 | unsigned long ioaddr = dev->base_addr; | |
524ad0a7 | 2203 | net_local *lp = netdev_priv(dev); /* lp is not unused */ |
1da177e4 LT |
2204 | psa_t psa; |
2205 | unsigned long flags; | |
2206 | ||
2207 | /* Disable interrupts and save flags. */ | |
2208 | spin_lock_irqsave(&lp->spinlock, flags); | |
2209 | ||
2210 | psa_read(ioaddr, lp->hacr, | |
2211 | (char *) &psa.psa_quality_thr - (char *) &psa, | |
2212 | (unsigned char *) &psa.psa_quality_thr, 1); | |
2213 | *(extra) = psa.psa_quality_thr & 0x0F; | |
2214 | ||
2215 | /* Enable interrupts and restore flags. */ | |
2216 | spin_unlock_irqrestore(&lp->spinlock, flags); | |
2217 | ||
2218 | return 0; | |
2219 | } | |
2220 | ||
2221 | #ifdef HISTOGRAM | |
2222 | /*------------------------------------------------------------------*/ | |
2223 | /* | |
2224 | * Wireless Private Handler : set histogram | |
2225 | */ | |
2226 | static int wavelan_set_histo(struct net_device *dev, | |
2227 | struct iw_request_info *info, | |
2228 | union iwreq_data *wrqu, | |
2229 | char *extra) | |
2230 | { | |
524ad0a7 | 2231 | net_local *lp = netdev_priv(dev); /* lp is not unused */ |
1da177e4 LT |
2232 | |
2233 | /* Check the number of intervals. */ | |
2234 | if (wrqu->data.length > 16) { | |
2235 | return(-E2BIG); | |
2236 | } | |
2237 | ||
2238 | /* Disable histo while we copy the addresses. | |
2239 | * As we don't disable interrupts, we need to do this */ | |
2240 | lp->his_number = 0; | |
2241 | ||
2242 | /* Are there ranges to copy? */ | |
2243 | if (wrqu->data.length > 0) { | |
2244 | /* Copy interval ranges to the driver */ | |
2245 | memcpy(lp->his_range, extra, wrqu->data.length); | |
2246 | ||
2247 | { | |
2248 | int i; | |
2249 | printk(KERN_DEBUG "Histo :"); | |
2250 | for(i = 0; i < wrqu->data.length; i++) | |
2251 | printk(" %d", lp->his_range[i]); | |
2252 | printk("\n"); | |
2253 | } | |
2254 | ||
2255 | /* Reset result structure. */ | |
2256 | memset(lp->his_sum, 0x00, sizeof(long) * 16); | |
2257 | } | |
2258 | ||
2259 | /* Now we can set the number of ranges */ | |
2260 | lp->his_number = wrqu->data.length; | |
2261 | ||
2262 | return(0); | |
2263 | } | |
2264 | ||
2265 | /*------------------------------------------------------------------*/ | |
2266 | /* | |
2267 | * Wireless Private Handler : get histogram | |
2268 | */ | |
2269 | static int wavelan_get_histo(struct net_device *dev, | |
2270 | struct iw_request_info *info, | |
2271 | union iwreq_data *wrqu, | |
2272 | char *extra) | |
2273 | { | |
524ad0a7 | 2274 | net_local *lp = netdev_priv(dev); /* lp is not unused */ |
1da177e4 LT |
2275 | |
2276 | /* Set the number of intervals. */ | |
2277 | wrqu->data.length = lp->his_number; | |
2278 | ||
2279 | /* Give back the distribution statistics */ | |
2280 | if(lp->his_number > 0) | |
2281 | memcpy(extra, lp->his_sum, sizeof(long) * lp->his_number); | |
2282 | ||
2283 | return(0); | |
2284 | } | |
2285 | #endif /* HISTOGRAM */ | |
2286 | ||
2287 | /*------------------------------------------------------------------*/ | |
2288 | /* | |
2289 | * Structures to export the Wireless Handlers | |
2290 | */ | |
2291 | ||
2292 | static const iw_handler wavelan_handler[] = | |
2293 | { | |
2294 | NULL, /* SIOCSIWNAME */ | |
2295 | wavelan_get_name, /* SIOCGIWNAME */ | |
2296 | wavelan_set_nwid, /* SIOCSIWNWID */ | |
2297 | wavelan_get_nwid, /* SIOCGIWNWID */ | |
2298 | wavelan_set_freq, /* SIOCSIWFREQ */ | |
2299 | wavelan_get_freq, /* SIOCGIWFREQ */ | |
2300 | NULL, /* SIOCSIWMODE */ | |
2301 | NULL, /* SIOCGIWMODE */ | |
2302 | wavelan_set_sens, /* SIOCSIWSENS */ | |
2303 | wavelan_get_sens, /* SIOCGIWSENS */ | |
2304 | NULL, /* SIOCSIWRANGE */ | |
2305 | wavelan_get_range, /* SIOCGIWRANGE */ | |
2306 | NULL, /* SIOCSIWPRIV */ | |
2307 | NULL, /* SIOCGIWPRIV */ | |
2308 | NULL, /* SIOCSIWSTATS */ | |
2309 | NULL, /* SIOCGIWSTATS */ | |
2310 | iw_handler_set_spy, /* SIOCSIWSPY */ | |
2311 | iw_handler_get_spy, /* SIOCGIWSPY */ | |
2312 | iw_handler_set_thrspy, /* SIOCSIWTHRSPY */ | |
2313 | iw_handler_get_thrspy, /* SIOCGIWTHRSPY */ | |
2314 | NULL, /* SIOCSIWAP */ | |
2315 | NULL, /* SIOCGIWAP */ | |
2316 | NULL, /* -- hole -- */ | |
2317 | NULL, /* SIOCGIWAPLIST */ | |
2318 | NULL, /* -- hole -- */ | |
2319 | NULL, /* -- hole -- */ | |
2320 | NULL, /* SIOCSIWESSID */ | |
2321 | NULL, /* SIOCGIWESSID */ | |
2322 | NULL, /* SIOCSIWNICKN */ | |
2323 | NULL, /* SIOCGIWNICKN */ | |
2324 | NULL, /* -- hole -- */ | |
2325 | NULL, /* -- hole -- */ | |
2326 | NULL, /* SIOCSIWRATE */ | |
2327 | NULL, /* SIOCGIWRATE */ | |
2328 | NULL, /* SIOCSIWRTS */ | |
2329 | NULL, /* SIOCGIWRTS */ | |
2330 | NULL, /* SIOCSIWFRAG */ | |
2331 | NULL, /* SIOCGIWFRAG */ | |
2332 | NULL, /* SIOCSIWTXPOW */ | |
2333 | NULL, /* SIOCGIWTXPOW */ | |
2334 | NULL, /* SIOCSIWRETRY */ | |
2335 | NULL, /* SIOCGIWRETRY */ | |
2336 | /* Bummer ! Why those are only at the end ??? */ | |
2337 | wavelan_set_encode, /* SIOCSIWENCODE */ | |
2338 | wavelan_get_encode, /* SIOCGIWENCODE */ | |
2339 | }; | |
2340 | ||
2341 | static const iw_handler wavelan_private_handler[] = | |
2342 | { | |
2343 | wavelan_set_qthr, /* SIOCIWFIRSTPRIV */ | |
2344 | wavelan_get_qthr, /* SIOCIWFIRSTPRIV + 1 */ | |
2345 | #ifdef HISTOGRAM | |
2346 | wavelan_set_histo, /* SIOCIWFIRSTPRIV + 2 */ | |
2347 | wavelan_get_histo, /* SIOCIWFIRSTPRIV + 3 */ | |
2348 | #endif /* HISTOGRAM */ | |
2349 | }; | |
2350 | ||
2351 | static const struct iw_priv_args wavelan_private_args[] = { | |
2352 | /*{ cmd, set_args, get_args, name } */ | |
2353 | { SIOCSIPQTHR, IW_PRIV_TYPE_BYTE | IW_PRIV_SIZE_FIXED | 1, 0, "setqualthr" }, | |
2354 | { SIOCGIPQTHR, 0, IW_PRIV_TYPE_BYTE | IW_PRIV_SIZE_FIXED | 1, "getqualthr" }, | |
2355 | { SIOCSIPHISTO, IW_PRIV_TYPE_BYTE | 16, 0, "sethisto" }, | |
2356 | { SIOCGIPHISTO, 0, IW_PRIV_TYPE_INT | 16, "gethisto" }, | |
2357 | }; | |
2358 | ||
2359 | static const struct iw_handler_def wavelan_handler_def = | |
2360 | { | |
ff8ac609 DC |
2361 | .num_standard = ARRAY_SIZE(wavelan_handler), |
2362 | .num_private = ARRAY_SIZE(wavelan_private_handler), | |
2363 | .num_private_args = ARRAY_SIZE(wavelan_private_args), | |
1da177e4 LT |
2364 | .standard = wavelan_handler, |
2365 | .private = wavelan_private_handler, | |
2366 | .private_args = wavelan_private_args, | |
2367 | .get_wireless_stats = wavelan_get_wireless_stats, | |
2368 | }; | |
2369 | ||
2370 | /*------------------------------------------------------------------*/ | |
2371 | /* | |
2372 | * Get wireless statistics. | |
2373 | * Called by /proc/net/wireless | |
2374 | */ | |
2375 | static iw_stats *wavelan_get_wireless_stats(struct net_device * dev) | |
2376 | { | |
2377 | unsigned long ioaddr = dev->base_addr; | |
524ad0a7 | 2378 | net_local *lp = netdev_priv(dev); |
1da177e4 LT |
2379 | mmr_t m; |
2380 | iw_stats *wstats; | |
2381 | unsigned long flags; | |
2382 | ||
2383 | #ifdef DEBUG_IOCTL_TRACE | |
2384 | printk(KERN_DEBUG "%s: ->wavelan_get_wireless_stats()\n", | |
2385 | dev->name); | |
2386 | #endif | |
2387 | ||
2388 | /* Check */ | |
2389 | if (lp == (net_local *) NULL) | |
2390 | return (iw_stats *) NULL; | |
2391 | ||
2392 | /* Disable interrupts and save flags. */ | |
2393 | spin_lock_irqsave(&lp->spinlock, flags); | |
2394 | ||
2395 | wstats = &lp->wstats; | |
2396 | ||
2397 | /* Get data from the mmc. */ | |
2398 | mmc_out(ioaddr, mmwoff(0, mmw_freeze), 1); | |
2399 | ||
2400 | mmc_read(ioaddr, mmroff(0, mmr_dce_status), &m.mmr_dce_status, 1); | |
2401 | mmc_read(ioaddr, mmroff(0, mmr_wrong_nwid_l), &m.mmr_wrong_nwid_l, | |
2402 | 2); | |
2403 | mmc_read(ioaddr, mmroff(0, mmr_thr_pre_set), &m.mmr_thr_pre_set, | |
2404 | 4); | |
2405 | ||
2406 | mmc_out(ioaddr, mmwoff(0, mmw_freeze), 0); | |
2407 | ||
2408 | /* Copy data to wireless stuff. */ | |
2409 | wstats->status = m.mmr_dce_status & MMR_DCE_STATUS; | |
2410 | wstats->qual.qual = m.mmr_sgnl_qual & MMR_SGNL_QUAL; | |
2411 | wstats->qual.level = m.mmr_signal_lvl & MMR_SIGNAL_LVL; | |
2412 | wstats->qual.noise = m.mmr_silence_lvl & MMR_SILENCE_LVL; | |
2413 | wstats->qual.updated = (((m. mmr_signal_lvl & MMR_SIGNAL_LVL_VALID) >> 7) | |
2414 | | ((m.mmr_signal_lvl & MMR_SIGNAL_LVL_VALID) >> 6) | |
2415 | | ((m.mmr_silence_lvl & MMR_SILENCE_LVL_VALID) >> 5)); | |
2416 | wstats->discard.nwid += (m.mmr_wrong_nwid_h << 8) | m.mmr_wrong_nwid_l; | |
2417 | wstats->discard.code = 0L; | |
2418 | wstats->discard.misc = 0L; | |
2419 | ||
2420 | /* Enable interrupts and restore flags. */ | |
2421 | spin_unlock_irqrestore(&lp->spinlock, flags); | |
2422 | ||
2423 | #ifdef DEBUG_IOCTL_TRACE | |
2424 | printk(KERN_DEBUG "%s: <-wavelan_get_wireless_stats()\n", | |
2425 | dev->name); | |
2426 | #endif | |
2427 | return &lp->wstats; | |
2428 | } | |
1da177e4 LT |
2429 | |
2430 | /************************* PACKET RECEPTION *************************/ | |
2431 | /* | |
2432 | * This part deals with receiving the packets. | |
2433 | * The interrupt handler gets an interrupt when a packet has been | |
2434 | * successfully received and calls this part. | |
2435 | */ | |
2436 | ||
2437 | /*------------------------------------------------------------------*/ | |
2438 | /* | |
2439 | * This routine does the actual copying of data (including the Ethernet | |
2440 | * header structure) from the WaveLAN card to an sk_buff chain that | |
2441 | * will be passed up to the network interface layer. NOTE: we | |
2442 | * currently don't handle trailer protocols (neither does the rest of | |
2443 | * the network interface), so if that is needed, it will (at least in | |
2444 | * part) be added here. The contents of the receive ring buffer are | |
2445 | * copied to a message chain that is then passed to the kernel. | |
2446 | * | |
2447 | * Note: if any errors occur, the packet is "dropped on the floor". | |
2448 | * (called by wv_packet_rcv()) | |
2449 | */ | |
858119e1 | 2450 | static void |
1da177e4 LT |
2451 | wv_packet_read(struct net_device * dev, u16 buf_off, int sksize) |
2452 | { | |
524ad0a7 | 2453 | net_local *lp = netdev_priv(dev); |
1da177e4 LT |
2454 | unsigned long ioaddr = dev->base_addr; |
2455 | struct sk_buff *skb; | |
2456 | ||
2457 | #ifdef DEBUG_RX_TRACE | |
2458 | printk(KERN_DEBUG "%s: ->wv_packet_read(0x%X, %d)\n", | |
2459 | dev->name, buf_off, sksize); | |
2460 | #endif | |
2461 | ||
2462 | /* Allocate buffer for the data */ | |
2463 | if ((skb = dev_alloc_skb(sksize)) == (struct sk_buff *) NULL) { | |
2464 | #ifdef DEBUG_RX_ERROR | |
2465 | printk(KERN_INFO | |
2466 | "%s: wv_packet_read(): could not alloc_skb(%d, GFP_ATOMIC).\n", | |
2467 | dev->name, sksize); | |
2468 | #endif | |
2469 | lp->stats.rx_dropped++; | |
2470 | return; | |
2471 | } | |
2472 | ||
1da177e4 LT |
2473 | /* Copy the packet to the buffer. */ |
2474 | obram_read(ioaddr, buf_off, skb_put(skb, sksize), sksize); | |
2475 | skb->protocol = eth_type_trans(skb, dev); | |
2476 | ||
2477 | #ifdef DEBUG_RX_INFO | |
98e399f8 ACM |
2478 | wv_packet_info(skb_mac_header(skb), sksize, dev->name, |
2479 | "wv_packet_read"); | |
1da177e4 LT |
2480 | #endif /* DEBUG_RX_INFO */ |
2481 | ||
2482 | /* Statistics-gathering and associated stuff. | |
2483 | * It seem a bit messy with all the define, but it's really | |
2484 | * simple... */ | |
2485 | if ( | |
2486 | #ifdef IW_WIRELESS_SPY /* defined in iw_handler.h */ | |
2487 | (lp->spy_data.spy_number > 0) || | |
2488 | #endif /* IW_WIRELESS_SPY */ | |
2489 | #ifdef HISTOGRAM | |
2490 | (lp->his_number > 0) || | |
2491 | #endif /* HISTOGRAM */ | |
2492 | 0) { | |
2493 | u8 stats[3]; /* signal level, noise level, signal quality */ | |
2494 | ||
2495 | /* Read signal level, silence level and signal quality bytes */ | |
2496 | /* Note: in the PCMCIA hardware, these are part of the frame. | |
2497 | * It seems that for the ISA hardware, it's nowhere to be | |
2498 | * found in the frame, so I'm obliged to do this (it has a | |
2499 | * side effect on /proc/net/wireless). | |
2500 | * Any ideas? | |
2501 | */ | |
2502 | mmc_out(ioaddr, mmwoff(0, mmw_freeze), 1); | |
2503 | mmc_read(ioaddr, mmroff(0, mmr_signal_lvl), stats, 3); | |
2504 | mmc_out(ioaddr, mmwoff(0, mmw_freeze), 0); | |
2505 | ||
2506 | #ifdef DEBUG_RX_INFO | |
2507 | printk(KERN_DEBUG | |
2508 | "%s: wv_packet_read(): Signal level %d/63, Silence level %d/63, signal quality %d/16\n", | |
2509 | dev->name, stats[0] & 0x3F, stats[1] & 0x3F, | |
2510 | stats[2] & 0x0F); | |
2511 | #endif | |
2512 | ||
2513 | /* Spying stuff */ | |
2514 | #ifdef IW_WIRELESS_SPY | |
98e399f8 | 2515 | wl_spy_gather(dev, skb_mac_header(skb) + WAVELAN_ADDR_SIZE, |
1da177e4 LT |
2516 | stats); |
2517 | #endif /* IW_WIRELESS_SPY */ | |
2518 | #ifdef HISTOGRAM | |
2519 | wl_his_gather(dev, stats); | |
2520 | #endif /* HISTOGRAM */ | |
2521 | } | |
2522 | ||
2523 | /* | |
2524 | * Hand the packet to the network module. | |
2525 | */ | |
2526 | netif_rx(skb); | |
2527 | ||
2528 | /* Keep statistics up to date */ | |
1da177e4 LT |
2529 | lp->stats.rx_packets++; |
2530 | lp->stats.rx_bytes += sksize; | |
2531 | ||
2532 | #ifdef DEBUG_RX_TRACE | |
2533 | printk(KERN_DEBUG "%s: <-wv_packet_read()\n", dev->name); | |
2534 | #endif | |
2535 | } | |
2536 | ||
2537 | /*------------------------------------------------------------------*/ | |
2538 | /* | |
2539 | * Transfer as many packets as we can | |
2540 | * from the device RAM. | |
2541 | * (called in wavelan_interrupt()). | |
2542 | * Note : the spinlock is already grabbed for us. | |
2543 | */ | |
858119e1 | 2544 | static void wv_receive(struct net_device * dev) |
1da177e4 LT |
2545 | { |
2546 | unsigned long ioaddr = dev->base_addr; | |
524ad0a7 | 2547 | net_local *lp = netdev_priv(dev); |
1da177e4 LT |
2548 | fd_t fd; |
2549 | rbd_t rbd; | |
2550 | int nreaped = 0; | |
2551 | ||
2552 | #ifdef DEBUG_RX_TRACE | |
2553 | printk(KERN_DEBUG "%s: ->wv_receive()\n", dev->name); | |
2554 | #endif | |
2555 | ||
2556 | /* Loop on each received packet. */ | |
2557 | for (;;) { | |
2558 | obram_read(ioaddr, lp->rx_head, (unsigned char *) &fd, | |
2559 | sizeof(fd)); | |
2560 | ||
2561 | /* Note about the status : | |
2562 | * It start up to be 0 (the value we set). Then, when the RU | |
2563 | * grab the buffer to prepare for reception, it sets the | |
2564 | * FD_STATUS_B flag. When the RU has finished receiving the | |
2565 | * frame, it clears FD_STATUS_B, set FD_STATUS_C to indicate | |
2566 | * completion and set the other flags to indicate the eventual | |
2567 | * errors. FD_STATUS_OK indicates that the reception was OK. | |
2568 | */ | |
2569 | ||
2570 | /* If the current frame is not complete, we have reached the end. */ | |
2571 | if ((fd.fd_status & FD_STATUS_C) != FD_STATUS_C) | |
2572 | break; /* This is how we exit the loop. */ | |
2573 | ||
2574 | nreaped++; | |
2575 | ||
2576 | /* Check whether frame was correctly received. */ | |
2577 | if ((fd.fd_status & FD_STATUS_OK) == FD_STATUS_OK) { | |
2578 | /* Does the frame contain a pointer to the data? Let's check. */ | |
2579 | if (fd.fd_rbd_offset != I82586NULL) { | |
2580 | /* Read the receive buffer descriptor */ | |
2581 | obram_read(ioaddr, fd.fd_rbd_offset, | |
2582 | (unsigned char *) &rbd, | |
2583 | sizeof(rbd)); | |
2584 | ||
2585 | #ifdef DEBUG_RX_ERROR | |
2586 | if ((rbd.rbd_status & RBD_STATUS_EOF) != | |
2587 | RBD_STATUS_EOF) printk(KERN_INFO | |
2588 | "%s: wv_receive(): missing EOF flag.\n", | |
2589 | dev->name); | |
2590 | ||
2591 | if ((rbd.rbd_status & RBD_STATUS_F) != | |
2592 | RBD_STATUS_F) printk(KERN_INFO | |
2593 | "%s: wv_receive(): missing F flag.\n", | |
2594 | dev->name); | |
2595 | #endif /* DEBUG_RX_ERROR */ | |
2596 | ||
2597 | /* Read the packet and transmit to Linux */ | |
2598 | wv_packet_read(dev, rbd.rbd_bufl, | |
2599 | rbd. | |
2600 | rbd_status & | |
2601 | RBD_STATUS_ACNT); | |
2602 | } | |
2603 | #ifdef DEBUG_RX_ERROR | |
2604 | else /* if frame has no data */ | |
2605 | printk(KERN_INFO | |
2606 | "%s: wv_receive(): frame has no data.\n", | |
2607 | dev->name); | |
2608 | #endif | |
2609 | } else { /* If reception was no successful */ | |
2610 | ||
2611 | lp->stats.rx_errors++; | |
2612 | ||
2613 | #ifdef DEBUG_RX_INFO | |
2614 | printk(KERN_DEBUG | |
2615 | "%s: wv_receive(): frame not received successfully (%X).\n", | |
2616 | dev->name, fd.fd_status); | |
2617 | #endif | |
2618 | ||
2619 | #ifdef DEBUG_RX_ERROR | |
2620 | if ((fd.fd_status & FD_STATUS_S6) != 0) | |
2621 | printk(KERN_INFO | |
2622 | "%s: wv_receive(): no EOF flag.\n", | |
2623 | dev->name); | |
2624 | #endif | |
2625 | ||
2626 | if ((fd.fd_status & FD_STATUS_S7) != 0) { | |
2627 | lp->stats.rx_length_errors++; | |
2628 | #ifdef DEBUG_RX_FAIL | |
2629 | printk(KERN_DEBUG | |
2630 | "%s: wv_receive(): frame too short.\n", | |
2631 | dev->name); | |
2632 | #endif | |
2633 | } | |
2634 | ||
2635 | if ((fd.fd_status & FD_STATUS_S8) != 0) { | |
2636 | lp->stats.rx_over_errors++; | |
2637 | #ifdef DEBUG_RX_FAIL | |
2638 | printk(KERN_DEBUG | |
2639 | "%s: wv_receive(): rx DMA overrun.\n", | |
2640 | dev->name); | |
2641 | #endif | |
2642 | } | |
2643 | ||
2644 | if ((fd.fd_status & FD_STATUS_S9) != 0) { | |
2645 | lp->stats.rx_fifo_errors++; | |
2646 | #ifdef DEBUG_RX_FAIL | |
2647 | printk(KERN_DEBUG | |
2648 | "%s: wv_receive(): ran out of resources.\n", | |
2649 | dev->name); | |
2650 | #endif | |
2651 | } | |
2652 | ||
2653 | if ((fd.fd_status & FD_STATUS_S10) != 0) { | |
2654 | lp->stats.rx_frame_errors++; | |
2655 | #ifdef DEBUG_RX_FAIL | |
2656 | printk(KERN_DEBUG | |
2657 | "%s: wv_receive(): alignment error.\n", | |
2658 | dev->name); | |
2659 | #endif | |
2660 | } | |
2661 | ||
2662 | if ((fd.fd_status & FD_STATUS_S11) != 0) { | |
2663 | lp->stats.rx_crc_errors++; | |
2664 | #ifdef DEBUG_RX_FAIL | |
2665 | printk(KERN_DEBUG | |
2666 | "%s: wv_receive(): CRC error.\n", | |
2667 | dev->name); | |
2668 | #endif | |
2669 | } | |
2670 | } | |
2671 | ||
2672 | fd.fd_status = 0; | |
2673 | obram_write(ioaddr, fdoff(lp->rx_head, fd_status), | |
2674 | (unsigned char *) &fd.fd_status, | |
2675 | sizeof(fd.fd_status)); | |
2676 | ||
2677 | fd.fd_command = FD_COMMAND_EL; | |
2678 | obram_write(ioaddr, fdoff(lp->rx_head, fd_command), | |
2679 | (unsigned char *) &fd.fd_command, | |
2680 | sizeof(fd.fd_command)); | |
2681 | ||
2682 | fd.fd_command = 0; | |
2683 | obram_write(ioaddr, fdoff(lp->rx_last, fd_command), | |
2684 | (unsigned char *) &fd.fd_command, | |
2685 | sizeof(fd.fd_command)); | |
2686 | ||
2687 | lp->rx_last = lp->rx_head; | |
2688 | lp->rx_head = fd.fd_link_offset; | |
2689 | } /* for(;;) -> loop on all frames */ | |
2690 | ||
2691 | #ifdef DEBUG_RX_INFO | |
2692 | if (nreaped > 1) | |
2693 | printk(KERN_DEBUG "%s: wv_receive(): reaped %d\n", | |
2694 | dev->name, nreaped); | |
2695 | #endif | |
2696 | #ifdef DEBUG_RX_TRACE | |
2697 | printk(KERN_DEBUG "%s: <-wv_receive()\n", dev->name); | |
2698 | #endif | |
2699 | } | |
2700 | ||
2701 | /*********************** PACKET TRANSMISSION ***********************/ | |
2702 | /* | |
2703 | * This part deals with sending packets through the WaveLAN. | |
2704 | * | |
2705 | */ | |
2706 | ||
2707 | /*------------------------------------------------------------------*/ | |
2708 | /* | |
2709 | * This routine fills in the appropriate registers and memory | |
2710 | * locations on the WaveLAN card and starts the card off on | |
2711 | * the transmit. | |
2712 | * | |
2713 | * The principle: | |
2714 | * Each block contains a transmit command, a NOP command, | |
2715 | * a transmit block descriptor and a buffer. | |
2716 | * The CU read the transmit block which point to the tbd, | |
2717 | * read the tbd and the content of the buffer. | |
2718 | * When it has finish with it, it goes to the next command | |
2719 | * which in our case is the NOP. The NOP points on itself, | |
2720 | * so the CU stop here. | |
2721 | * When we add the next block, we modify the previous nop | |
2722 | * to make it point on the new tx command. | |
2723 | * Simple, isn't it ? | |
2724 | * | |
2725 | * (called in wavelan_packet_xmit()) | |
2726 | */ | |
858119e1 | 2727 | static int wv_packet_write(struct net_device * dev, void *buf, short length) |
1da177e4 | 2728 | { |
524ad0a7 | 2729 | net_local *lp = netdev_priv(dev); |
1da177e4 LT |
2730 | unsigned long ioaddr = dev->base_addr; |
2731 | unsigned short txblock; | |
2732 | unsigned short txpred; | |
2733 | unsigned short tx_addr; | |
2734 | unsigned short nop_addr; | |
2735 | unsigned short tbd_addr; | |
2736 | unsigned short buf_addr; | |
2737 | ac_tx_t tx; | |
2738 | ac_nop_t nop; | |
2739 | tbd_t tbd; | |
2740 | int clen = length; | |
2741 | unsigned long flags; | |
2742 | ||
2743 | #ifdef DEBUG_TX_TRACE | |
2744 | printk(KERN_DEBUG "%s: ->wv_packet_write(%d)\n", dev->name, | |
2745 | length); | |
2746 | #endif | |
2747 | ||
2748 | spin_lock_irqsave(&lp->spinlock, flags); | |
2749 | ||
2750 | /* Check nothing bad has happened */ | |
2751 | if (lp->tx_n_in_use == (NTXBLOCKS - 1)) { | |
2752 | #ifdef DEBUG_TX_ERROR | |
2753 | printk(KERN_INFO "%s: wv_packet_write(): Tx queue full.\n", | |
2754 | dev->name); | |
2755 | #endif | |
2756 | spin_unlock_irqrestore(&lp->spinlock, flags); | |
2757 | return 1; | |
2758 | } | |
2759 | ||
2760 | /* Calculate addresses of next block and previous block. */ | |
2761 | txblock = lp->tx_first_free; | |
2762 | txpred = txblock - TXBLOCKZ; | |
2763 | if (txpred < OFFSET_CU) | |
2764 | txpred += NTXBLOCKS * TXBLOCKZ; | |
2765 | lp->tx_first_free += TXBLOCKZ; | |
2766 | if (lp->tx_first_free >= OFFSET_CU + NTXBLOCKS * TXBLOCKZ) | |
2767 | lp->tx_first_free -= NTXBLOCKS * TXBLOCKZ; | |
2768 | ||
2769 | lp->tx_n_in_use++; | |
2770 | ||
2771 | /* Calculate addresses of the different parts of the block. */ | |
2772 | tx_addr = txblock; | |
2773 | nop_addr = tx_addr + sizeof(tx); | |
2774 | tbd_addr = nop_addr + sizeof(nop); | |
2775 | buf_addr = tbd_addr + sizeof(tbd); | |
2776 | ||
2777 | /* | |
2778 | * Transmit command | |
2779 | */ | |
2780 | tx.tx_h.ac_status = 0; | |
2781 | obram_write(ioaddr, toff(ac_tx_t, tx_addr, tx_h.ac_status), | |
2782 | (unsigned char *) &tx.tx_h.ac_status, | |
2783 | sizeof(tx.tx_h.ac_status)); | |
2784 | ||
2785 | /* | |
2786 | * NOP command | |
2787 | */ | |
2788 | nop.nop_h.ac_status = 0; | |
2789 | obram_write(ioaddr, toff(ac_nop_t, nop_addr, nop_h.ac_status), | |
2790 | (unsigned char *) &nop.nop_h.ac_status, | |
2791 | sizeof(nop.nop_h.ac_status)); | |
2792 | nop.nop_h.ac_link = nop_addr; | |
2793 | obram_write(ioaddr, toff(ac_nop_t, nop_addr, nop_h.ac_link), | |
2794 | (unsigned char *) &nop.nop_h.ac_link, | |
2795 | sizeof(nop.nop_h.ac_link)); | |
2796 | ||
2797 | /* | |
2798 | * Transmit buffer descriptor | |
2799 | */ | |
2800 | tbd.tbd_status = TBD_STATUS_EOF | (TBD_STATUS_ACNT & clen); | |
2801 | tbd.tbd_next_bd_offset = I82586NULL; | |
2802 | tbd.tbd_bufl = buf_addr; | |
2803 | tbd.tbd_bufh = 0; | |
2804 | obram_write(ioaddr, tbd_addr, (unsigned char *) &tbd, sizeof(tbd)); | |
2805 | ||
2806 | /* | |
2807 | * Data | |
2808 | */ | |
2809 | obram_write(ioaddr, buf_addr, buf, length); | |
2810 | ||
2811 | /* | |
2812 | * Overwrite the predecessor NOP link | |
2813 | * so that it points to this txblock. | |
2814 | */ | |
2815 | nop_addr = txpred + sizeof(tx); | |
2816 | nop.nop_h.ac_status = 0; | |
2817 | obram_write(ioaddr, toff(ac_nop_t, nop_addr, nop_h.ac_status), | |
2818 | (unsigned char *) &nop.nop_h.ac_status, | |
2819 | sizeof(nop.nop_h.ac_status)); | |
2820 | nop.nop_h.ac_link = txblock; | |
2821 | obram_write(ioaddr, toff(ac_nop_t, nop_addr, nop_h.ac_link), | |
2822 | (unsigned char *) &nop.nop_h.ac_link, | |
2823 | sizeof(nop.nop_h.ac_link)); | |
2824 | ||
2825 | /* Make sure the watchdog will keep quiet for a while */ | |
2826 | dev->trans_start = jiffies; | |
2827 | ||
2828 | /* Keep stats up to date. */ | |
2829 | lp->stats.tx_bytes += length; | |
2830 | ||
2831 | if (lp->tx_first_in_use == I82586NULL) | |
2832 | lp->tx_first_in_use = txblock; | |
2833 | ||
2834 | if (lp->tx_n_in_use < NTXBLOCKS - 1) | |
2835 | netif_wake_queue(dev); | |
2836 | ||
2837 | spin_unlock_irqrestore(&lp->spinlock, flags); | |
2838 | ||
2839 | #ifdef DEBUG_TX_INFO | |
2840 | wv_packet_info((u8 *) buf, length, dev->name, | |
2841 | "wv_packet_write"); | |
2842 | #endif /* DEBUG_TX_INFO */ | |
2843 | ||
2844 | #ifdef DEBUG_TX_TRACE | |
2845 | printk(KERN_DEBUG "%s: <-wv_packet_write()\n", dev->name); | |
2846 | #endif | |
2847 | ||
2848 | return 0; | |
2849 | } | |
2850 | ||
2851 | /*------------------------------------------------------------------*/ | |
2852 | /* | |
2853 | * This routine is called when we want to send a packet (NET3 callback) | |
2854 | * In this routine, we check if the harware is ready to accept | |
2855 | * the packet. We also prevent reentrance. Then we call the function | |
2856 | * to send the packet. | |
2857 | */ | |
2858 | static int wavelan_packet_xmit(struct sk_buff *skb, struct net_device * dev) | |
2859 | { | |
524ad0a7 | 2860 | net_local *lp = netdev_priv(dev); |
1da177e4 | 2861 | unsigned long flags; |
aa95abef | 2862 | char data[ETH_ZLEN]; |
1da177e4 LT |
2863 | |
2864 | #ifdef DEBUG_TX_TRACE | |
2865 | printk(KERN_DEBUG "%s: ->wavelan_packet_xmit(0x%X)\n", dev->name, | |
2866 | (unsigned) skb); | |
2867 | #endif | |
2868 | ||
2869 | /* | |
2870 | * Block a timer-based transmit from overlapping. | |
2871 | * In other words, prevent reentering this routine. | |
2872 | */ | |
2873 | netif_stop_queue(dev); | |
2874 | ||
2875 | /* If somebody has asked to reconfigure the controller, | |
2876 | * we can do it now. | |
2877 | */ | |
2878 | if (lp->reconfig_82586) { | |
2879 | spin_lock_irqsave(&lp->spinlock, flags); | |
2880 | wv_82586_config(dev); | |
2881 | spin_unlock_irqrestore(&lp->spinlock, flags); | |
2882 | /* Check that we can continue */ | |
2883 | if (lp->tx_n_in_use == (NTXBLOCKS - 1)) | |
2884 | return 1; | |
2885 | } | |
2886 | #ifdef DEBUG_TX_ERROR | |
2887 | if (skb->next) | |
2888 | printk(KERN_INFO "skb has next\n"); | |
2889 | #endif | |
2890 | ||
2891 | /* Do we need some padding? */ | |
2892 | /* Note : on wireless the propagation time is in the order of 1us, | |
2893 | * and we don't have the Ethernet specific requirement of beeing | |
2894 | * able to detect collisions, therefore in theory we don't really | |
2895 | * need to pad. Jean II */ | |
2896 | if (skb->len < ETH_ZLEN) { | |
aa95abef | 2897 | memset(data, 0, ETH_ZLEN); |
d626f62b | 2898 | skb_copy_from_linear_data(skb, data, skb->len); |
aa95abef AC |
2899 | /* Write packet on the card */ |
2900 | if(wv_packet_write(dev, data, ETH_ZLEN)) | |
2901 | return 1; /* We failed */ | |
1da177e4 | 2902 | } |
aa95abef | 2903 | else if(wv_packet_write(dev, skb->data, skb->len)) |
1da177e4 LT |
2904 | return 1; /* We failed */ |
2905 | ||
aa95abef | 2906 | |
1da177e4 LT |
2907 | dev_kfree_skb(skb); |
2908 | ||
2909 | #ifdef DEBUG_TX_TRACE | |
2910 | printk(KERN_DEBUG "%s: <-wavelan_packet_xmit()\n", dev->name); | |
2911 | #endif | |
2912 | return 0; | |
2913 | } | |
2914 | ||
2915 | /*********************** HARDWARE CONFIGURATION ***********************/ | |
2916 | /* | |
2917 | * This part does the real job of starting and configuring the hardware. | |
2918 | */ | |
2919 | ||
2920 | /*--------------------------------------------------------------------*/ | |
2921 | /* | |
2922 | * Routine to initialize the Modem Management Controller. | |
2923 | * (called by wv_hw_reset()) | |
2924 | */ | |
858119e1 | 2925 | static int wv_mmc_init(struct net_device * dev) |
1da177e4 LT |
2926 | { |
2927 | unsigned long ioaddr = dev->base_addr; | |
524ad0a7 | 2928 | net_local *lp = netdev_priv(dev); |
1da177e4 LT |
2929 | psa_t psa; |
2930 | mmw_t m; | |
2931 | int configured; | |
2932 | ||
2933 | #ifdef DEBUG_CONFIG_TRACE | |
2934 | printk(KERN_DEBUG "%s: ->wv_mmc_init()\n", dev->name); | |
2935 | #endif | |
2936 | ||
2937 | /* Read the parameter storage area. */ | |
2938 | psa_read(ioaddr, lp->hacr, 0, (unsigned char *) &psa, sizeof(psa)); | |
2939 | ||
2940 | #ifdef USE_PSA_CONFIG | |
2941 | configured = psa.psa_conf_status & 1; | |
2942 | #else | |
2943 | configured = 0; | |
2944 | #endif | |
2945 | ||
2946 | /* Is the PSA is not configured */ | |
2947 | if (!configured) { | |
2948 | /* User will be able to configure NWID later (with iwconfig). */ | |
2949 | psa.psa_nwid[0] = 0; | |
2950 | psa.psa_nwid[1] = 0; | |
2951 | ||
2952 | /* no NWID checking since NWID is not set */ | |
2953 | psa.psa_nwid_select = 0; | |
2954 | ||
2955 | /* Disable encryption */ | |
2956 | psa.psa_encryption_select = 0; | |
2957 | ||
2958 | /* Set to standard values: | |
2959 | * 0x04 for AT, | |
2960 | * 0x01 for MCA, | |
2961 | * 0x04 for PCMCIA and 2.00 card (AT&T 407-024689/E document) | |
2962 | */ | |
2963 | if (psa.psa_comp_number & 1) | |
2964 | psa.psa_thr_pre_set = 0x01; | |
2965 | else | |
2966 | psa.psa_thr_pre_set = 0x04; | |
2967 | psa.psa_quality_thr = 0x03; | |
2968 | ||
2969 | /* It is configured */ | |
2970 | psa.psa_conf_status |= 1; | |
2971 | ||
2972 | #ifdef USE_PSA_CONFIG | |
2973 | /* Write the psa. */ | |
2974 | psa_write(ioaddr, lp->hacr, | |
2975 | (char *) psa.psa_nwid - (char *) &psa, | |
2976 | (unsigned char *) psa.psa_nwid, 4); | |
2977 | psa_write(ioaddr, lp->hacr, | |
2978 | (char *) &psa.psa_thr_pre_set - (char *) &psa, | |
2979 | (unsigned char *) &psa.psa_thr_pre_set, 1); | |
2980 | psa_write(ioaddr, lp->hacr, | |
2981 | (char *) &psa.psa_quality_thr - (char *) &psa, | |
2982 | (unsigned char *) &psa.psa_quality_thr, 1); | |
2983 | psa_write(ioaddr, lp->hacr, | |
2984 | (char *) &psa.psa_conf_status - (char *) &psa, | |
2985 | (unsigned char *) &psa.psa_conf_status, 1); | |
2986 | /* update the Wavelan checksum */ | |
2987 | update_psa_checksum(dev, ioaddr, lp->hacr); | |
2988 | #endif | |
2989 | } | |
2990 | ||
2991 | /* Zero the mmc structure. */ | |
2992 | memset(&m, 0x00, sizeof(m)); | |
2993 | ||
2994 | /* Copy PSA info to the mmc. */ | |
2995 | m.mmw_netw_id_l = psa.psa_nwid[1]; | |
2996 | m.mmw_netw_id_h = psa.psa_nwid[0]; | |
2997 | ||
2998 | if (psa.psa_nwid_select & 1) | |
2999 | m.mmw_loopt_sel = 0x00; | |
3000 | else | |
3001 | m.mmw_loopt_sel = MMW_LOOPT_SEL_DIS_NWID; | |
3002 | ||
3003 | memcpy(&m.mmw_encr_key, &psa.psa_encryption_key, | |
3004 | sizeof(m.mmw_encr_key)); | |
3005 | ||
3006 | if (psa.psa_encryption_select) | |
3007 | m.mmw_encr_enable = | |
3008 | MMW_ENCR_ENABLE_EN | MMW_ENCR_ENABLE_MODE; | |
3009 | else | |
3010 | m.mmw_encr_enable = 0; | |
3011 | ||
3012 | m.mmw_thr_pre_set = psa.psa_thr_pre_set & 0x3F; | |
3013 | m.mmw_quality_thr = psa.psa_quality_thr & 0x0F; | |
3014 | ||
3015 | /* | |
3016 | * Set default modem control parameters. | |
3017 | * See NCR document 407-0024326 Rev. A. | |
3018 | */ | |
3019 | m.mmw_jabber_enable = 0x01; | |
3020 | m.mmw_freeze = 0; | |
3021 | m.mmw_anten_sel = MMW_ANTEN_SEL_ALG_EN; | |
3022 | m.mmw_ifs = 0x20; | |
3023 | m.mmw_mod_delay = 0x04; | |
3024 | m.mmw_jam_time = 0x38; | |
3025 | ||
3026 | m.mmw_des_io_invert = 0; | |
3027 | m.mmw_decay_prm = 0; | |
3028 | m.mmw_decay_updat_prm = 0; | |
3029 | ||
3030 | /* Write all info to MMC. */ | |
3031 | mmc_write(ioaddr, 0, (u8 *) & m, sizeof(m)); | |
3032 | ||
3033 | /* The following code starts the modem of the 2.00 frequency | |
3034 | * selectable cards at power on. It's not strictly needed for the | |
3035 | * following boots. | |
3036 | * The original patch was by Joe Finney for the PCMCIA driver, but | |
3037 | * I've cleaned it up a bit and added documentation. | |
3038 | * Thanks to Loeke Brederveld from Lucent for the info. | |
3039 | */ | |
3040 | ||
3041 | /* Attempt to recognise 2.00 cards (2.4 GHz frequency selectable) | |
3042 | * Does it work for everybody, especially old cards? */ | |
3043 | /* Note: WFREQSEL verifies that it is able to read a sensible | |
3044 | * frequency from EEPROM (address 0x00) and that MMR_FEE_STATUS_ID | |
3045 | * is 0xA (Xilinx version) or 0xB (Ariadne version). | |
3046 | * My test is more crude but does work. */ | |
3047 | if (!(mmc_in(ioaddr, mmroff(0, mmr_fee_status)) & | |
3048 | (MMR_FEE_STATUS_DWLD | MMR_FEE_STATUS_BUSY))) { | |
3049 | /* We must download the frequency parameters to the | |
3050 | * synthesizers (from the EEPROM - area 1) | |
3051 | * Note: as the EEPROM is automatically decremented, we set the end | |
3052 | * if the area... */ | |
3053 | m.mmw_fee_addr = 0x0F; | |
3054 | m.mmw_fee_ctrl = MMW_FEE_CTRL_READ | MMW_FEE_CTRL_DWLD; | |
3055 | mmc_write(ioaddr, (char *) &m.mmw_fee_ctrl - (char *) &m, | |
3056 | (unsigned char *) &m.mmw_fee_ctrl, 2); | |
3057 | ||
3058 | /* Wait until the download is finished. */ | |
3059 | fee_wait(ioaddr, 100, 100); | |
3060 | ||
3061 | #ifdef DEBUG_CONFIG_INFO | |
3062 | /* The frequency was in the last word downloaded. */ | |
3063 | mmc_read(ioaddr, (char *) &m.mmw_fee_data_l - (char *) &m, | |
3064 | (unsigned char *) &m.mmw_fee_data_l, 2); | |
3065 | ||
3066 | /* Print some info for the user. */ | |
3067 | printk(KERN_DEBUG | |
3068 | "%s: WaveLAN 2.00 recognised (frequency select). Current frequency = %ld\n", | |
3069 | dev->name, | |
3070 | ((m. | |
3071 | mmw_fee_data_h << 4) | (m.mmw_fee_data_l >> 4)) * | |
3072 | 5 / 2 + 24000L); | |
3073 | #endif | |
3074 | ||
3075 | /* We must now download the power adjust value (gain) to | |
3076 | * the synthesizers (from the EEPROM - area 7 - DAC). */ | |
3077 | m.mmw_fee_addr = 0x61; | |
3078 | m.mmw_fee_ctrl = MMW_FEE_CTRL_READ | MMW_FEE_CTRL_DWLD; | |
3079 | mmc_write(ioaddr, (char *) &m.mmw_fee_ctrl - (char *) &m, | |
3080 | (unsigned char *) &m.mmw_fee_ctrl, 2); | |
3081 | ||
3082 | /* Wait until the download is finished. */ | |
3083 | } | |
3084 | /* if 2.00 card */ | |
3085 | #ifdef DEBUG_CONFIG_TRACE | |
3086 | printk(KERN_DEBUG "%s: <-wv_mmc_init()\n", dev->name); | |
3087 | #endif | |
3088 | return 0; | |
3089 | } | |
3090 | ||
3091 | /*------------------------------------------------------------------*/ | |
3092 | /* | |
3093 | * Construct the fd and rbd structures. | |
3094 | * Start the receive unit. | |
3095 | * (called by wv_hw_reset()) | |
3096 | */ | |
858119e1 | 3097 | static int wv_ru_start(struct net_device * dev) |
1da177e4 | 3098 | { |
524ad0a7 | 3099 | net_local *lp = netdev_priv(dev); |
1da177e4 LT |
3100 | unsigned long ioaddr = dev->base_addr; |
3101 | u16 scb_cs; | |
3102 | fd_t fd; | |
3103 | rbd_t rbd; | |
3104 | u16 rx; | |
3105 | u16 rx_next; | |
3106 | int i; | |
3107 | ||
3108 | #ifdef DEBUG_CONFIG_TRACE | |
3109 | printk(KERN_DEBUG "%s: ->wv_ru_start()\n", dev->name); | |
3110 | #endif | |
3111 | ||
3112 | obram_read(ioaddr, scboff(OFFSET_SCB, scb_status), | |
3113 | (unsigned char *) &scb_cs, sizeof(scb_cs)); | |
3114 | if ((scb_cs & SCB_ST_RUS) == SCB_ST_RUS_RDY) | |
3115 | return 0; | |
3116 | ||
3117 | lp->rx_head = OFFSET_RU; | |
3118 | ||
3119 | for (i = 0, rx = lp->rx_head; i < NRXBLOCKS; i++, rx = rx_next) { | |
3120 | rx_next = | |
3121 | (i == NRXBLOCKS - 1) ? lp->rx_head : rx + RXBLOCKZ; | |
3122 | ||
3123 | fd.fd_status = 0; | |
3124 | fd.fd_command = (i == NRXBLOCKS - 1) ? FD_COMMAND_EL : 0; | |
3125 | fd.fd_link_offset = rx_next; | |
3126 | fd.fd_rbd_offset = rx + sizeof(fd); | |
3127 | obram_write(ioaddr, rx, (unsigned char *) &fd, sizeof(fd)); | |
3128 | ||
3129 | rbd.rbd_status = 0; | |
3130 | rbd.rbd_next_rbd_offset = I82586NULL; | |
3131 | rbd.rbd_bufl = rx + sizeof(fd) + sizeof(rbd); | |
3132 | rbd.rbd_bufh = 0; | |
3133 | rbd.rbd_el_size = RBD_EL | (RBD_SIZE & MAXDATAZ); | |
3134 | obram_write(ioaddr, rx + sizeof(fd), | |
3135 | (unsigned char *) &rbd, sizeof(rbd)); | |
3136 | ||
3137 | lp->rx_last = rx; | |
3138 | } | |
3139 | ||
3140 | obram_write(ioaddr, scboff(OFFSET_SCB, scb_rfa_offset), | |
3141 | (unsigned char *) &lp->rx_head, sizeof(lp->rx_head)); | |
3142 | ||
3143 | scb_cs = SCB_CMD_RUC_GO; | |
3144 | obram_write(ioaddr, scboff(OFFSET_SCB, scb_command), | |
3145 | (unsigned char *) &scb_cs, sizeof(scb_cs)); | |
3146 | ||
3147 | set_chan_attn(ioaddr, lp->hacr); | |
3148 | ||
3149 | for (i = 1000; i > 0; i--) { | |
3150 | obram_read(ioaddr, scboff(OFFSET_SCB, scb_command), | |
3151 | (unsigned char *) &scb_cs, sizeof(scb_cs)); | |
3152 | if (scb_cs == 0) | |
3153 | break; | |
3154 | ||
3155 | udelay(10); | |
3156 | } | |
3157 | ||
3158 | if (i <= 0) { | |
3159 | #ifdef DEBUG_CONFIG_ERROR | |
3160 | printk(KERN_INFO | |
3161 | "%s: wavelan_ru_start(): board not accepting command.\n", | |
3162 | dev->name); | |
3163 | #endif | |
3164 | return -1; | |
3165 | } | |
3166 | #ifdef DEBUG_CONFIG_TRACE | |
3167 | printk(KERN_DEBUG "%s: <-wv_ru_start()\n", dev->name); | |
3168 | #endif | |
3169 | return 0; | |
3170 | } | |
3171 | ||
3172 | /*------------------------------------------------------------------*/ | |
3173 | /* | |
3174 | * Initialise the transmit blocks. | |
3175 | * Start the command unit executing the NOP | |
3176 | * self-loop of the first transmit block. | |
3177 | * | |
3178 | * Here we create the list of send buffers used to transmit packets | |
3179 | * between the PC and the command unit. For each buffer, we create a | |
3180 | * buffer descriptor (pointing on the buffer), a transmit command | |
3181 | * (pointing to the buffer descriptor) and a NOP command. | |
3182 | * The transmit command is linked to the NOP, and the NOP to itself. | |
3183 | * When we will have finished executing the transmit command, we will | |
3184 | * then loop on the NOP. By releasing the NOP link to a new command, | |
3185 | * we may send another buffer. | |
3186 | * | |
3187 | * (called by wv_hw_reset()) | |
3188 | */ | |
858119e1 | 3189 | static int wv_cu_start(struct net_device * dev) |
1da177e4 | 3190 | { |
524ad0a7 | 3191 | net_local *lp = netdev_priv(dev); |
1da177e4 LT |
3192 | unsigned long ioaddr = dev->base_addr; |
3193 | int i; | |
3194 | u16 txblock; | |
3195 | u16 first_nop; | |
3196 | u16 scb_cs; | |
3197 | ||
3198 | #ifdef DEBUG_CONFIG_TRACE | |
3199 | printk(KERN_DEBUG "%s: ->wv_cu_start()\n", dev->name); | |
3200 | #endif | |
3201 | ||
3202 | lp->tx_first_free = OFFSET_CU; | |
3203 | lp->tx_first_in_use = I82586NULL; | |
3204 | ||
3205 | for (i = 0, txblock = OFFSET_CU; | |
3206 | i < NTXBLOCKS; i++, txblock += TXBLOCKZ) { | |
3207 | ac_tx_t tx; | |
3208 | ac_nop_t nop; | |
3209 | tbd_t tbd; | |
3210 | unsigned short tx_addr; | |
3211 | unsigned short nop_addr; | |
3212 | unsigned short tbd_addr; | |
3213 | unsigned short buf_addr; | |
3214 | ||
3215 | tx_addr = txblock; | |
3216 | nop_addr = tx_addr + sizeof(tx); | |
3217 | tbd_addr = nop_addr + sizeof(nop); | |
3218 | buf_addr = tbd_addr + sizeof(tbd); | |
3219 | ||
3220 | tx.tx_h.ac_status = 0; | |
3221 | tx.tx_h.ac_command = acmd_transmit | AC_CFLD_I; | |
3222 | tx.tx_h.ac_link = nop_addr; | |
3223 | tx.tx_tbd_offset = tbd_addr; | |
3224 | obram_write(ioaddr, tx_addr, (unsigned char *) &tx, | |
3225 | sizeof(tx)); | |
3226 | ||
3227 | nop.nop_h.ac_status = 0; | |
3228 | nop.nop_h.ac_command = acmd_nop; | |
3229 | nop.nop_h.ac_link = nop_addr; | |
3230 | obram_write(ioaddr, nop_addr, (unsigned char *) &nop, | |
3231 | sizeof(nop)); | |
3232 | ||
3233 | tbd.tbd_status = TBD_STATUS_EOF; | |
3234 | tbd.tbd_next_bd_offset = I82586NULL; | |
3235 | tbd.tbd_bufl = buf_addr; | |
3236 | tbd.tbd_bufh = 0; | |
3237 | obram_write(ioaddr, tbd_addr, (unsigned char *) &tbd, | |
3238 | sizeof(tbd)); | |
3239 | } | |
3240 | ||
3241 | first_nop = | |
3242 | OFFSET_CU + (NTXBLOCKS - 1) * TXBLOCKZ + sizeof(ac_tx_t); | |
3243 | obram_write(ioaddr, scboff(OFFSET_SCB, scb_cbl_offset), | |
3244 | (unsigned char *) &first_nop, sizeof(first_nop)); | |
3245 | ||
3246 | scb_cs = SCB_CMD_CUC_GO; | |
3247 | obram_write(ioaddr, scboff(OFFSET_SCB, scb_command), | |
3248 | (unsigned char *) &scb_cs, sizeof(scb_cs)); | |
3249 | ||
3250 | set_chan_attn(ioaddr, lp->hacr); | |
3251 | ||
3252 | for (i = 1000; i > 0; i--) { | |
3253 | obram_read(ioaddr, scboff(OFFSET_SCB, scb_command), | |
3254 | (unsigned char *) &scb_cs, sizeof(scb_cs)); | |
3255 | if (scb_cs == 0) | |
3256 | break; | |
3257 | ||
3258 | udelay(10); | |
3259 | } | |
3260 | ||
3261 | if (i <= 0) { | |
3262 | #ifdef DEBUG_CONFIG_ERROR | |
3263 | printk(KERN_INFO | |
3264 | "%s: wavelan_cu_start(): board not accepting command.\n", | |
3265 | dev->name); | |
3266 | #endif | |
3267 | return -1; | |
3268 | } | |
3269 | ||
3270 | lp->tx_n_in_use = 0; | |
3271 | netif_start_queue(dev); | |
3272 | #ifdef DEBUG_CONFIG_TRACE | |
3273 | printk(KERN_DEBUG "%s: <-wv_cu_start()\n", dev->name); | |
3274 | #endif | |
3275 | return 0; | |
3276 | } | |
3277 | ||
3278 | /*------------------------------------------------------------------*/ | |
3279 | /* | |
3280 | * This routine does a standard configuration of the WaveLAN | |
3281 | * controller (i82586). | |
3282 | * | |
3283 | * It initialises the scp, iscp and scb structure | |
3284 | * The first two are just pointers to the next. | |
3285 | * The last one is used for basic configuration and for basic | |
3286 | * communication (interrupt status). | |
3287 | * | |
3288 | * (called by wv_hw_reset()) | |
3289 | */ | |
858119e1 | 3290 | static int wv_82586_start(struct net_device * dev) |
1da177e4 | 3291 | { |
524ad0a7 | 3292 | net_local *lp = netdev_priv(dev); |
1da177e4 LT |
3293 | unsigned long ioaddr = dev->base_addr; |
3294 | scp_t scp; /* system configuration pointer */ | |
3295 | iscp_t iscp; /* intermediate scp */ | |
3296 | scb_t scb; /* system control block */ | |
3297 | ach_t cb; /* Action command header */ | |
3298 | u8 zeroes[512]; | |
3299 | int i; | |
3300 | ||
3301 | #ifdef DEBUG_CONFIG_TRACE | |
3302 | printk(KERN_DEBUG "%s: ->wv_82586_start()\n", dev->name); | |
3303 | #endif | |
3304 | ||
3305 | /* | |
3306 | * Clear the onboard RAM. | |
3307 | */ | |
3308 | memset(&zeroes[0], 0x00, sizeof(zeroes)); | |
3309 | for (i = 0; i < I82586_MEMZ; i += sizeof(zeroes)) | |
3310 | obram_write(ioaddr, i, &zeroes[0], sizeof(zeroes)); | |
3311 | ||
3312 | /* | |
3313 | * Construct the command unit structures: | |
3314 | * scp, iscp, scb, cb. | |
3315 | */ | |
3316 | memset(&scp, 0x00, sizeof(scp)); | |
3317 | scp.scp_sysbus = SCP_SY_16BBUS; | |
3318 | scp.scp_iscpl = OFFSET_ISCP; | |
3319 | obram_write(ioaddr, OFFSET_SCP, (unsigned char *) &scp, | |
3320 | sizeof(scp)); | |
3321 | ||
3322 | memset(&iscp, 0x00, sizeof(iscp)); | |
3323 | iscp.iscp_busy = 1; | |
3324 | iscp.iscp_offset = OFFSET_SCB; | |
3325 | obram_write(ioaddr, OFFSET_ISCP, (unsigned char *) &iscp, | |
3326 | sizeof(iscp)); | |
3327 | ||
3328 | /* Our first command is to reset the i82586. */ | |
3329 | memset(&scb, 0x00, sizeof(scb)); | |
3330 | scb.scb_command = SCB_CMD_RESET; | |
3331 | scb.scb_cbl_offset = OFFSET_CU; | |
3332 | scb.scb_rfa_offset = OFFSET_RU; | |
3333 | obram_write(ioaddr, OFFSET_SCB, (unsigned char *) &scb, | |
3334 | sizeof(scb)); | |
3335 | ||
3336 | set_chan_attn(ioaddr, lp->hacr); | |
3337 | ||
3338 | /* Wait for command to finish. */ | |
3339 | for (i = 1000; i > 0; i--) { | |
3340 | obram_read(ioaddr, OFFSET_ISCP, (unsigned char *) &iscp, | |
3341 | sizeof(iscp)); | |
3342 | ||
3343 | if (iscp.iscp_busy == (unsigned short) 0) | |
3344 | break; | |
3345 | ||
3346 | udelay(10); | |
3347 | } | |
3348 | ||
3349 | if (i <= 0) { | |
3350 | #ifdef DEBUG_CONFIG_ERROR | |
3351 | printk(KERN_INFO | |
3352 | "%s: wv_82586_start(): iscp_busy timeout.\n", | |
3353 | dev->name); | |
3354 | #endif | |
3355 | return -1; | |
3356 | } | |
3357 | ||
3358 | /* Check command completion. */ | |
3359 | for (i = 15; i > 0; i--) { | |
3360 | obram_read(ioaddr, OFFSET_SCB, (unsigned char *) &scb, | |
3361 | sizeof(scb)); | |
3362 | ||
3363 | if (scb.scb_status == (SCB_ST_CX | SCB_ST_CNA)) | |
3364 | break; | |
3365 | ||
3366 | udelay(10); | |
3367 | } | |
3368 | ||
3369 | if (i <= 0) { | |
3370 | #ifdef DEBUG_CONFIG_ERROR | |
3371 | printk(KERN_INFO | |
3372 | "%s: wv_82586_start(): status: expected 0x%02x, got 0x%02x.\n", | |
3373 | dev->name, SCB_ST_CX | SCB_ST_CNA, scb.scb_status); | |
3374 | #endif | |
3375 | return -1; | |
3376 | } | |
3377 | ||
3378 | wv_ack(dev); | |
3379 | ||
3380 | /* Set the action command header. */ | |
3381 | memset(&cb, 0x00, sizeof(cb)); | |
3382 | cb.ac_command = AC_CFLD_EL | (AC_CFLD_CMD & acmd_diagnose); | |
3383 | cb.ac_link = OFFSET_CU; | |
3384 | obram_write(ioaddr, OFFSET_CU, (unsigned char *) &cb, sizeof(cb)); | |
3385 | ||
3386 | if (wv_synchronous_cmd(dev, "diag()") == -1) | |
3387 | return -1; | |
3388 | ||
3389 | obram_read(ioaddr, OFFSET_CU, (unsigned char *) &cb, sizeof(cb)); | |
3390 | if (cb.ac_status & AC_SFLD_FAIL) { | |
3391 | #ifdef DEBUG_CONFIG_ERROR | |
3392 | printk(KERN_INFO | |
3393 | "%s: wv_82586_start(): i82586 Self Test failed.\n", | |
3394 | dev->name); | |
3395 | #endif | |
3396 | return -1; | |
3397 | } | |
3398 | #ifdef DEBUG_I82586_SHOW | |
3399 | wv_scb_show(ioaddr); | |
3400 | #endif | |
3401 | ||
3402 | #ifdef DEBUG_CONFIG_TRACE | |
3403 | printk(KERN_DEBUG "%s: <-wv_82586_start()\n", dev->name); | |
3404 | #endif | |
3405 | return 0; | |
3406 | } | |
3407 | ||
3408 | /*------------------------------------------------------------------*/ | |
3409 | /* | |
3410 | * This routine does a standard configuration of the WaveLAN | |
3411 | * controller (i82586). | |
3412 | * | |
3413 | * This routine is a violent hack. We use the first free transmit block | |
3414 | * to make our configuration. In the buffer area, we create the three | |
3415 | * configuration commands (linked). We make the previous NOP point to | |
3416 | * the beginning of the buffer instead of the tx command. After, we go | |
3417 | * as usual to the NOP command. | |
3418 | * Note that only the last command (mc_set) will generate an interrupt. | |
3419 | * | |
3420 | * (called by wv_hw_reset(), wv_82586_reconfig(), wavelan_packet_xmit()) | |
3421 | */ | |
3422 | static void wv_82586_config(struct net_device * dev) | |
3423 | { | |
524ad0a7 | 3424 | net_local *lp = netdev_priv(dev); |
1da177e4 LT |
3425 | unsigned long ioaddr = dev->base_addr; |
3426 | unsigned short txblock; | |
3427 | unsigned short txpred; | |
3428 | unsigned short tx_addr; | |
3429 | unsigned short nop_addr; | |
3430 | unsigned short tbd_addr; | |
3431 | unsigned short cfg_addr; | |
3432 | unsigned short ias_addr; | |
3433 | unsigned short mcs_addr; | |
3434 | ac_tx_t tx; | |
3435 | ac_nop_t nop; | |
3436 | ac_cfg_t cfg; /* Configure action */ | |
3437 | ac_ias_t ias; /* IA-setup action */ | |
3438 | ac_mcs_t mcs; /* Multicast setup */ | |
3439 | struct dev_mc_list *dmi; | |
3440 | ||
3441 | #ifdef DEBUG_CONFIG_TRACE | |
3442 | printk(KERN_DEBUG "%s: ->wv_82586_config()\n", dev->name); | |
3443 | #endif | |
3444 | ||
3445 | /* Check nothing bad has happened */ | |
3446 | if (lp->tx_n_in_use == (NTXBLOCKS - 1)) { | |
3447 | #ifdef DEBUG_CONFIG_ERROR | |
3448 | printk(KERN_INFO "%s: wv_82586_config(): Tx queue full.\n", | |
3449 | dev->name); | |
3450 | #endif | |
3451 | return; | |
3452 | } | |
3453 | ||
3454 | /* Calculate addresses of next block and previous block. */ | |
3455 | txblock = lp->tx_first_free; | |
3456 | txpred = txblock - TXBLOCKZ; | |
3457 | if (txpred < OFFSET_CU) | |
3458 | txpred += NTXBLOCKS * TXBLOCKZ; | |
3459 | lp->tx_first_free += TXBLOCKZ; | |
3460 | if (lp->tx_first_free >= OFFSET_CU + NTXBLOCKS * TXBLOCKZ) | |
3461 | lp->tx_first_free -= NTXBLOCKS * TXBLOCKZ; | |
3462 | ||
3463 | lp->tx_n_in_use++; | |
3464 | ||
3465 | /* Calculate addresses of the different parts of the block. */ | |
3466 | tx_addr = txblock; | |
3467 | nop_addr = tx_addr + sizeof(tx); | |
3468 | tbd_addr = nop_addr + sizeof(nop); | |
3469 | cfg_addr = tbd_addr + sizeof(tbd_t); /* beginning of the buffer */ | |
3470 | ias_addr = cfg_addr + sizeof(cfg); | |
3471 | mcs_addr = ias_addr + sizeof(ias); | |
3472 | ||
3473 | /* | |
3474 | * Transmit command | |
3475 | */ | |
3476 | tx.tx_h.ac_status = 0xFFFF; /* Fake completion value */ | |
3477 | obram_write(ioaddr, toff(ac_tx_t, tx_addr, tx_h.ac_status), | |
3478 | (unsigned char *) &tx.tx_h.ac_status, | |
3479 | sizeof(tx.tx_h.ac_status)); | |
3480 | ||
3481 | /* | |
3482 | * NOP command | |
3483 | */ | |
3484 | nop.nop_h.ac_status = 0; | |
3485 | obram_write(ioaddr, toff(ac_nop_t, nop_addr, nop_h.ac_status), | |
3486 | (unsigned char *) &nop.nop_h.ac_status, | |
3487 | sizeof(nop.nop_h.ac_status)); | |
3488 | nop.nop_h.ac_link = nop_addr; | |
3489 | obram_write(ioaddr, toff(ac_nop_t, nop_addr, nop_h.ac_link), | |
3490 | (unsigned char *) &nop.nop_h.ac_link, | |
3491 | sizeof(nop.nop_h.ac_link)); | |
3492 | ||
3493 | /* Create a configure action. */ | |
3494 | memset(&cfg, 0x00, sizeof(cfg)); | |
3495 | ||
3496 | /* | |
3497 | * For Linux we invert AC_CFG_ALOC() so as to conform | |
3498 | * to the way that net packets reach us from above. | |
3499 | * (See also ac_tx_t.) | |
3500 | * | |
3501 | * Updated from Wavelan Manual WCIN085B | |
3502 | */ | |
3503 | cfg.cfg_byte_cnt = | |
3504 | AC_CFG_BYTE_CNT(sizeof(ac_cfg_t) - sizeof(ach_t)); | |
3505 | cfg.cfg_fifolim = AC_CFG_FIFOLIM(4); | |
3506 | cfg.cfg_byte8 = AC_CFG_SAV_BF(1) | AC_CFG_SRDY(0); | |
3507 | cfg.cfg_byte9 = AC_CFG_ELPBCK(0) | | |
3508 | AC_CFG_ILPBCK(0) | | |
3509 | AC_CFG_PRELEN(AC_CFG_PLEN_2) | | |
3510 | AC_CFG_ALOC(1) | AC_CFG_ADDRLEN(WAVELAN_ADDR_SIZE); | |
3511 | cfg.cfg_byte10 = AC_CFG_BOFMET(1) | | |
3512 | AC_CFG_ACR(6) | AC_CFG_LINPRIO(0); | |
3513 | cfg.cfg_ifs = 0x20; | |
3514 | cfg.cfg_slotl = 0x0C; | |
3515 | cfg.cfg_byte13 = AC_CFG_RETRYNUM(15) | AC_CFG_SLTTMHI(0); | |
3516 | cfg.cfg_byte14 = AC_CFG_FLGPAD(0) | | |
3517 | AC_CFG_BTSTF(0) | | |
3518 | AC_CFG_CRC16(0) | | |
3519 | AC_CFG_NCRC(0) | | |
3520 | AC_CFG_TNCRS(1) | | |
3521 | AC_CFG_MANCH(0) | | |
3522 | AC_CFG_BCDIS(0) | AC_CFG_PRM(lp->promiscuous); | |
3523 | cfg.cfg_byte15 = AC_CFG_ICDS(0) | | |
3524 | AC_CFG_CDTF(0) | AC_CFG_ICSS(0) | AC_CFG_CSTF(0); | |
3525 | /* | |
3526 | cfg.cfg_min_frm_len = AC_CFG_MNFRM(64); | |
3527 | */ | |
3528 | cfg.cfg_min_frm_len = AC_CFG_MNFRM(8); | |
3529 | ||
3530 | cfg.cfg_h.ac_command = (AC_CFLD_CMD & acmd_configure); | |
3531 | cfg.cfg_h.ac_link = ias_addr; | |
3532 | obram_write(ioaddr, cfg_addr, (unsigned char *) &cfg, sizeof(cfg)); | |
3533 | ||
3534 | /* Set up the MAC address */ | |
3535 | memset(&ias, 0x00, sizeof(ias)); | |
3536 | ias.ias_h.ac_command = (AC_CFLD_CMD & acmd_ia_setup); | |
3537 | ias.ias_h.ac_link = mcs_addr; | |
3538 | memcpy(&ias.ias_addr[0], (unsigned char *) &dev->dev_addr[0], | |
3539 | sizeof(ias.ias_addr)); | |
3540 | obram_write(ioaddr, ias_addr, (unsigned char *) &ias, sizeof(ias)); | |
3541 | ||
3542 | /* Initialize adapter's Ethernet multicast addresses */ | |
3543 | memset(&mcs, 0x00, sizeof(mcs)); | |
3544 | mcs.mcs_h.ac_command = AC_CFLD_I | (AC_CFLD_CMD & acmd_mc_setup); | |
3545 | mcs.mcs_h.ac_link = nop_addr; | |
3546 | mcs.mcs_cnt = WAVELAN_ADDR_SIZE * lp->mc_count; | |
3547 | obram_write(ioaddr, mcs_addr, (unsigned char *) &mcs, sizeof(mcs)); | |
3548 | ||
3549 | /* Any address to set? */ | |
3550 | if (lp->mc_count) { | |
3551 | for (dmi = dev->mc_list; dmi; dmi = dmi->next) | |
3552 | outsw(PIOP1(ioaddr), (u16 *) dmi->dmi_addr, | |
3553 | WAVELAN_ADDR_SIZE >> 1); | |
3554 | ||
3555 | #ifdef DEBUG_CONFIG_INFO | |
3556 | printk(KERN_DEBUG | |
3557 | "%s: wv_82586_config(): set %d multicast addresses:\n", | |
3558 | dev->name, lp->mc_count); | |
3559 | for (dmi = dev->mc_list; dmi; dmi = dmi->next) | |
e174961c | 3560 | printk(KERN_DEBUG " %pM\n", dmi->dmi_addr); |
1da177e4 LT |
3561 | #endif |
3562 | } | |
3563 | ||
3564 | /* | |
3565 | * Overwrite the predecessor NOP link | |
3566 | * so that it points to the configure action. | |
3567 | */ | |
3568 | nop_addr = txpred + sizeof(tx); | |
3569 | nop.nop_h.ac_status = 0; | |
3570 | obram_write(ioaddr, toff(ac_nop_t, nop_addr, nop_h.ac_status), | |
3571 | (unsigned char *) &nop.nop_h.ac_status, | |
3572 | sizeof(nop.nop_h.ac_status)); | |
3573 | nop.nop_h.ac_link = cfg_addr; | |
3574 | obram_write(ioaddr, toff(ac_nop_t, nop_addr, nop_h.ac_link), | |
3575 | (unsigned char *) &nop.nop_h.ac_link, | |
3576 | sizeof(nop.nop_h.ac_link)); | |
3577 | ||
3578 | /* Job done, clear the flag */ | |
3579 | lp->reconfig_82586 = 0; | |
3580 | ||
3581 | if (lp->tx_first_in_use == I82586NULL) | |
3582 | lp->tx_first_in_use = txblock; | |
3583 | ||
3584 | if (lp->tx_n_in_use == (NTXBLOCKS - 1)) | |
3585 | netif_stop_queue(dev); | |
3586 | ||
3587 | #ifdef DEBUG_CONFIG_TRACE | |
3588 | printk(KERN_DEBUG "%s: <-wv_82586_config()\n", dev->name); | |
3589 | #endif | |
3590 | } | |
3591 | ||
3592 | /*------------------------------------------------------------------*/ | |
3593 | /* | |
3594 | * This routine, called by wavelan_close(), gracefully stops the | |
3595 | * WaveLAN controller (i82586). | |
3596 | * (called by wavelan_close()) | |
3597 | */ | |
858119e1 | 3598 | static void wv_82586_stop(struct net_device * dev) |
1da177e4 | 3599 | { |
524ad0a7 | 3600 | net_local *lp = netdev_priv(dev); |
1da177e4 LT |
3601 | unsigned long ioaddr = dev->base_addr; |
3602 | u16 scb_cmd; | |
3603 | ||
3604 | #ifdef DEBUG_CONFIG_TRACE | |
3605 | printk(KERN_DEBUG "%s: ->wv_82586_stop()\n", dev->name); | |
3606 | #endif | |
3607 | ||
3608 | /* Suspend both command unit and receive unit. */ | |
3609 | scb_cmd = | |
3610 | (SCB_CMD_CUC & SCB_CMD_CUC_SUS) | (SCB_CMD_RUC & | |
3611 | SCB_CMD_RUC_SUS); | |
3612 | obram_write(ioaddr, scboff(OFFSET_SCB, scb_command), | |
3613 | (unsigned char *) &scb_cmd, sizeof(scb_cmd)); | |
3614 | set_chan_attn(ioaddr, lp->hacr); | |
3615 | ||
3616 | /* No more interrupts */ | |
3617 | wv_ints_off(dev); | |
3618 | ||
3619 | #ifdef DEBUG_CONFIG_TRACE | |
3620 | printk(KERN_DEBUG "%s: <-wv_82586_stop()\n", dev->name); | |
3621 | #endif | |
3622 | } | |
3623 | ||
3624 | /*------------------------------------------------------------------*/ | |
3625 | /* | |
3626 | * Totally reset the WaveLAN and restart it. | |
3627 | * Performs the following actions: | |
3628 | * 1. A power reset (reset DMA) | |
3629 | * 2. Initialize the radio modem (using wv_mmc_init) | |
3630 | * 3. Reset & Configure LAN controller (using wv_82586_start) | |
3631 | * 4. Start the LAN controller's command unit | |
3632 | * 5. Start the LAN controller's receive unit | |
3633 | * (called by wavelan_interrupt(), wavelan_watchdog() & wavelan_open()) | |
3634 | */ | |
3635 | static int wv_hw_reset(struct net_device * dev) | |
3636 | { | |
524ad0a7 | 3637 | net_local *lp = netdev_priv(dev); |
1da177e4 LT |
3638 | unsigned long ioaddr = dev->base_addr; |
3639 | ||
3640 | #ifdef DEBUG_CONFIG_TRACE | |
3641 | printk(KERN_DEBUG "%s: ->wv_hw_reset(dev=0x%x)\n", dev->name, | |
3642 | (unsigned int) dev); | |
3643 | #endif | |
3644 | ||
3645 | /* Increase the number of resets done. */ | |
3646 | lp->nresets++; | |
3647 | ||
3648 | wv_hacr_reset(ioaddr); | |
3649 | lp->hacr = HACR_DEFAULT; | |
3650 | ||
3651 | if ((wv_mmc_init(dev) < 0) || (wv_82586_start(dev) < 0)) | |
3652 | return -1; | |
3653 | ||
3654 | /* Enable the card to send interrupts. */ | |
3655 | wv_ints_on(dev); | |
3656 | ||
3657 | /* Start card functions */ | |
3658 | if (wv_cu_start(dev) < 0) | |
3659 | return -1; | |
3660 | ||
3661 | /* Setup the controller and parameters */ | |
3662 | wv_82586_config(dev); | |
3663 | ||
3664 | /* Finish configuration with the receive unit */ | |
3665 | if (wv_ru_start(dev) < 0) | |
3666 | return -1; | |
3667 | ||
3668 | #ifdef DEBUG_CONFIG_TRACE | |
3669 | printk(KERN_DEBUG "%s: <-wv_hw_reset()\n", dev->name); | |
3670 | #endif | |
3671 | return 0; | |
3672 | } | |
3673 | ||
3674 | /*------------------------------------------------------------------*/ | |
3675 | /* | |
3676 | * Check if there is a WaveLAN at the specific base address. | |
3677 | * As a side effect, this reads the MAC address. | |
3678 | * (called in wavelan_probe() and init_module()) | |
3679 | */ | |
3680 | static int wv_check_ioaddr(unsigned long ioaddr, u8 * mac) | |
3681 | { | |
3682 | int i; /* Loop counter */ | |
3683 | ||
3684 | /* Check if the base address if available. */ | |
3685 | if (!request_region(ioaddr, sizeof(ha_t), "wavelan probe")) | |
3686 | return -EBUSY; /* ioaddr already used */ | |
3687 | ||
3688 | /* Reset host interface */ | |
3689 | wv_hacr_reset(ioaddr); | |
3690 | ||
3691 | /* Read the MAC address from the parameter storage area. */ | |
3692 | psa_read(ioaddr, HACR_DEFAULT, psaoff(0, psa_univ_mac_addr), | |
3693 | mac, 6); | |
3694 | ||
3695 | release_region(ioaddr, sizeof(ha_t)); | |
3696 | ||
3697 | /* | |
3698 | * Check the first three octets of the address for the manufacturer's code. | |
3699 | * Note: if this can't find your WaveLAN card, you've got a | |
3700 | * non-NCR/AT&T/Lucent ISA card. See wavelan.p.h for detail on | |
3701 | * how to configure your card. | |
3702 | */ | |
c00acf46 | 3703 | for (i = 0; i < ARRAY_SIZE(MAC_ADDRESSES); i++) |
1da177e4 LT |
3704 | if ((mac[0] == MAC_ADDRESSES[i][0]) && |
3705 | (mac[1] == MAC_ADDRESSES[i][1]) && | |
3706 | (mac[2] == MAC_ADDRESSES[i][2])) | |
3707 | return 0; | |
3708 | ||
3709 | #ifdef DEBUG_CONFIG_INFO | |
3710 | printk(KERN_WARNING | |
3711 | "WaveLAN (0x%3X): your MAC address might be %02X:%02X:%02X.\n", | |
3712 | ioaddr, mac[0], mac[1], mac[2]); | |
3713 | #endif | |
3714 | return -ENODEV; | |
3715 | } | |
3716 | ||
3717 | /************************ INTERRUPT HANDLING ************************/ | |
3718 | ||
3719 | /* | |
3720 | * This function is the interrupt handler for the WaveLAN card. This | |
3721 | * routine will be called whenever: | |
3722 | */ | |
7d12e780 | 3723 | static irqreturn_t wavelan_interrupt(int irq, void *dev_id) |
1da177e4 LT |
3724 | { |
3725 | struct net_device *dev; | |
3726 | unsigned long ioaddr; | |
3727 | net_local *lp; | |
3728 | u16 hasr; | |
3729 | u16 status; | |
3730 | u16 ack_cmd; | |
3731 | ||
3732 | dev = dev_id; | |
3733 | ||
3734 | #ifdef DEBUG_INTERRUPT_TRACE | |
3735 | printk(KERN_DEBUG "%s: ->wavelan_interrupt()\n", dev->name); | |
3736 | #endif | |
3737 | ||
524ad0a7 | 3738 | lp = netdev_priv(dev); |
1da177e4 LT |
3739 | ioaddr = dev->base_addr; |
3740 | ||
3741 | #ifdef DEBUG_INTERRUPT_INFO | |
3742 | /* Check state of our spinlock */ | |
3743 | if(spin_is_locked(&lp->spinlock)) | |
3744 | printk(KERN_DEBUG | |
3745 | "%s: wavelan_interrupt(): spinlock is already locked !!!\n", | |
3746 | dev->name); | |
3747 | #endif | |
3748 | ||
3749 | /* Prevent reentrancy. We need to do that because we may have | |
3750 | * multiple interrupt handler running concurrently. | |
3751 | * It is safe because interrupts are disabled before acquiring | |
3752 | * the spinlock. */ | |
3753 | spin_lock(&lp->spinlock); | |
3754 | ||
3755 | /* We always had spurious interrupts at startup, but lately I | |
3756 | * saw them comming *between* the request_irq() and the | |
3757 | * spin_lock_irqsave() in wavelan_open(), so the spinlock | |
3758 | * protection is no enough. | |
3759 | * So, we also check lp->hacr that will tell us is we enabled | |
3760 | * irqs or not (see wv_ints_on()). | |
3761 | * We can't use netif_running(dev) because we depend on the | |
3762 | * proper processing of the irq generated during the config. */ | |
3763 | ||
3764 | /* Which interrupt it is ? */ | |
3765 | hasr = hasr_read(ioaddr); | |
3766 | ||
3767 | #ifdef DEBUG_INTERRUPT_INFO | |
3768 | printk(KERN_INFO | |
3769 | "%s: wavelan_interrupt(): hasr 0x%04x; hacr 0x%04x.\n", | |
3770 | dev->name, hasr, lp->hacr); | |
3771 | #endif | |
3772 | ||
3773 | /* Check modem interrupt */ | |
3774 | if ((hasr & HASR_MMC_INTR) && (lp->hacr & HACR_MMC_INT_ENABLE)) { | |
3775 | u8 dce_status; | |
3776 | ||
3777 | /* | |
3778 | * Interrupt from the modem management controller. | |
3779 | * This will clear it -- ignored for now. | |
3780 | */ | |
3781 | mmc_read(ioaddr, mmroff(0, mmr_dce_status), &dce_status, | |
3782 | sizeof(dce_status)); | |
3783 | ||
3784 | #ifdef DEBUG_INTERRUPT_ERROR | |
3785 | printk(KERN_INFO | |
3786 | "%s: wavelan_interrupt(): unexpected mmc interrupt: status 0x%04x.\n", | |
3787 | dev->name, dce_status); | |
3788 | #endif | |
3789 | } | |
3790 | ||
3791 | /* Check if not controller interrupt */ | |
3792 | if (((hasr & HASR_82586_INTR) == 0) || | |
3793 | ((lp->hacr & HACR_82586_INT_ENABLE) == 0)) { | |
3794 | #ifdef DEBUG_INTERRUPT_ERROR | |
3795 | printk(KERN_INFO | |
3796 | "%s: wavelan_interrupt(): interrupt not coming from i82586 - hasr 0x%04x.\n", | |
3797 | dev->name, hasr); | |
3798 | #endif | |
3799 | spin_unlock (&lp->spinlock); | |
3800 | return IRQ_NONE; | |
3801 | } | |
3802 | ||
3803 | /* Read interrupt data. */ | |
3804 | obram_read(ioaddr, scboff(OFFSET_SCB, scb_status), | |
3805 | (unsigned char *) &status, sizeof(status)); | |
3806 | ||
3807 | /* | |
3808 | * Acknowledge the interrupt(s). | |
3809 | */ | |
3810 | ack_cmd = status & SCB_ST_INT; | |
3811 | obram_write(ioaddr, scboff(OFFSET_SCB, scb_command), | |
3812 | (unsigned char *) &ack_cmd, sizeof(ack_cmd)); | |
3813 | set_chan_attn(ioaddr, lp->hacr); | |
3814 | ||
3815 | #ifdef DEBUG_INTERRUPT_INFO | |
3816 | printk(KERN_DEBUG "%s: wavelan_interrupt(): status 0x%04x.\n", | |
3817 | dev->name, status); | |
3818 | #endif | |
3819 | ||
3820 | /* Command completed. */ | |
3821 | if ((status & SCB_ST_CX) == SCB_ST_CX) { | |
3822 | #ifdef DEBUG_INTERRUPT_INFO | |
3823 | printk(KERN_DEBUG | |
3824 | "%s: wavelan_interrupt(): command completed.\n", | |
3825 | dev->name); | |
3826 | #endif | |
3827 | wv_complete(dev, ioaddr, lp); | |
3828 | } | |
3829 | ||
3830 | /* Frame received. */ | |
3831 | if ((status & SCB_ST_FR) == SCB_ST_FR) { | |
3832 | #ifdef DEBUG_INTERRUPT_INFO | |
3833 | printk(KERN_DEBUG | |
3834 | "%s: wavelan_interrupt(): received packet.\n", | |
3835 | dev->name); | |
3836 | #endif | |
3837 | wv_receive(dev); | |
3838 | } | |
3839 | ||
3840 | /* Check the state of the command unit. */ | |
3841 | if (((status & SCB_ST_CNA) == SCB_ST_CNA) || | |
3842 | (((status & SCB_ST_CUS) != SCB_ST_CUS_ACTV) && | |
3843 | (netif_running(dev)))) { | |
3844 | #ifdef DEBUG_INTERRUPT_ERROR | |
3845 | printk(KERN_INFO | |
3846 | "%s: wavelan_interrupt(): CU inactive -- restarting\n", | |
3847 | dev->name); | |
3848 | #endif | |
3849 | wv_hw_reset(dev); | |
3850 | } | |
3851 | ||
3852 | /* Check the state of the command unit. */ | |
3853 | if (((status & SCB_ST_RNR) == SCB_ST_RNR) || | |
3854 | (((status & SCB_ST_RUS) != SCB_ST_RUS_RDY) && | |
3855 | (netif_running(dev)))) { | |
3856 | #ifdef DEBUG_INTERRUPT_ERROR | |
3857 | printk(KERN_INFO | |
3858 | "%s: wavelan_interrupt(): RU not ready -- restarting\n", | |
3859 | dev->name); | |
3860 | #endif | |
3861 | wv_hw_reset(dev); | |
3862 | } | |
3863 | ||
3864 | /* Release spinlock */ | |
3865 | spin_unlock (&lp->spinlock); | |
3866 | ||
3867 | #ifdef DEBUG_INTERRUPT_TRACE | |
3868 | printk(KERN_DEBUG "%s: <-wavelan_interrupt()\n", dev->name); | |
3869 | #endif | |
3870 | return IRQ_HANDLED; | |
3871 | } | |
3872 | ||
3873 | /*------------------------------------------------------------------*/ | |
3874 | /* | |
3875 | * Watchdog: when we start a transmission, a timer is set for us in the | |
3876 | * kernel. If the transmission completes, this timer is disabled. If | |
3877 | * the timer expires, we are called and we try to unlock the hardware. | |
3878 | */ | |
3879 | static void wavelan_watchdog(struct net_device * dev) | |
3880 | { | |
524ad0a7 | 3881 | net_local *lp = netdev_priv(dev); |
1da177e4 LT |
3882 | u_long ioaddr = dev->base_addr; |
3883 | unsigned long flags; | |
3884 | unsigned int nreaped; | |
3885 | ||
3886 | #ifdef DEBUG_INTERRUPT_TRACE | |
3887 | printk(KERN_DEBUG "%s: ->wavelan_watchdog()\n", dev->name); | |
3888 | #endif | |
3889 | ||
3890 | #ifdef DEBUG_INTERRUPT_ERROR | |
3891 | printk(KERN_INFO "%s: wavelan_watchdog: watchdog timer expired\n", | |
3892 | dev->name); | |
3893 | #endif | |
3894 | ||
3895 | /* Check that we came here for something */ | |
3896 | if (lp->tx_n_in_use <= 0) { | |
3897 | return; | |
3898 | } | |
3899 | ||
3900 | spin_lock_irqsave(&lp->spinlock, flags); | |
3901 | ||
3902 | /* Try to see if some buffers are not free (in case we missed | |
3903 | * an interrupt */ | |
3904 | nreaped = wv_complete(dev, ioaddr, lp); | |
3905 | ||
3906 | #ifdef DEBUG_INTERRUPT_INFO | |
3907 | printk(KERN_DEBUG | |
3908 | "%s: wavelan_watchdog(): %d reaped, %d remain.\n", | |
3909 | dev->name, nreaped, lp->tx_n_in_use); | |
3910 | #endif | |
3911 | ||
3912 | #ifdef DEBUG_PSA_SHOW | |
3913 | { | |
3914 | psa_t psa; | |
3915 | psa_read(dev, 0, (unsigned char *) &psa, sizeof(psa)); | |
3916 | wv_psa_show(&psa); | |
3917 | } | |
3918 | #endif | |
3919 | #ifdef DEBUG_MMC_SHOW | |
3920 | wv_mmc_show(dev); | |
3921 | #endif | |
3922 | #ifdef DEBUG_I82586_SHOW | |
3923 | wv_cu_show(dev); | |
3924 | #endif | |
3925 | ||
3926 | /* If no buffer has been freed */ | |
3927 | if (nreaped == 0) { | |
3928 | #ifdef DEBUG_INTERRUPT_ERROR | |
3929 | printk(KERN_INFO | |
3930 | "%s: wavelan_watchdog(): cleanup failed, trying reset\n", | |
3931 | dev->name); | |
3932 | #endif | |
3933 | wv_hw_reset(dev); | |
3934 | } | |
3935 | ||
3936 | /* At this point, we should have some free Tx buffer ;-) */ | |
3937 | if (lp->tx_n_in_use < NTXBLOCKS - 1) | |
3938 | netif_wake_queue(dev); | |
3939 | ||
3940 | spin_unlock_irqrestore(&lp->spinlock, flags); | |
3941 | ||
3942 | #ifdef DEBUG_INTERRUPT_TRACE | |
3943 | printk(KERN_DEBUG "%s: <-wavelan_watchdog()\n", dev->name); | |
3944 | #endif | |
3945 | } | |
3946 | ||
3947 | /********************* CONFIGURATION CALLBACKS *********************/ | |
3948 | /* | |
3949 | * Here are the functions called by the Linux networking code (NET3) | |
3950 | * for initialization, configuration and deinstallations of the | |
3951 | * WaveLAN ISA hardware. | |
3952 | */ | |
3953 | ||
3954 | /*------------------------------------------------------------------*/ | |
3955 | /* | |
3956 | * Configure and start up the WaveLAN PCMCIA adaptor. | |
3957 | * Called by NET3 when it "opens" the device. | |
3958 | */ | |
3959 | static int wavelan_open(struct net_device * dev) | |
3960 | { | |
524ad0a7 | 3961 | net_local *lp = netdev_priv(dev); |
1da177e4 LT |
3962 | unsigned long flags; |
3963 | ||
3964 | #ifdef DEBUG_CALLBACK_TRACE | |
3965 | printk(KERN_DEBUG "%s: ->wavelan_open(dev=0x%x)\n", dev->name, | |
3966 | (unsigned int) dev); | |
3967 | #endif | |
3968 | ||
3969 | /* Check irq */ | |
3970 | if (dev->irq == 0) { | |
3971 | #ifdef DEBUG_CONFIG_ERROR | |
3972 | printk(KERN_WARNING "%s: wavelan_open(): no IRQ\n", | |
3973 | dev->name); | |
3974 | #endif | |
3975 | return -ENXIO; | |
3976 | } | |
3977 | ||
3978 | if (request_irq(dev->irq, &wavelan_interrupt, 0, "WaveLAN", dev) != 0) | |
3979 | { | |
3980 | #ifdef DEBUG_CONFIG_ERROR | |
3981 | printk(KERN_WARNING "%s: wavelan_open(): invalid IRQ\n", | |
3982 | dev->name); | |
3983 | #endif | |
3984 | return -EAGAIN; | |
3985 | } | |
3986 | ||
3987 | spin_lock_irqsave(&lp->spinlock, flags); | |
3988 | ||
3989 | if (wv_hw_reset(dev) != -1) { | |
3990 | netif_start_queue(dev); | |
3991 | } else { | |
3992 | free_irq(dev->irq, dev); | |
3993 | #ifdef DEBUG_CONFIG_ERROR | |
3994 | printk(KERN_INFO | |
3995 | "%s: wavelan_open(): impossible to start the card\n", | |
3996 | dev->name); | |
3997 | #endif | |
3998 | spin_unlock_irqrestore(&lp->spinlock, flags); | |
3999 | return -EAGAIN; | |
4000 | } | |
4001 | spin_unlock_irqrestore(&lp->spinlock, flags); | |
4002 | ||
4003 | #ifdef DEBUG_CALLBACK_TRACE | |
4004 | printk(KERN_DEBUG "%s: <-wavelan_open()\n", dev->name); | |
4005 | #endif | |
4006 | return 0; | |
4007 | } | |
4008 | ||
4009 | /*------------------------------------------------------------------*/ | |
4010 | /* | |
4011 | * Shut down the WaveLAN ISA card. | |
4012 | * Called by NET3 when it "closes" the device. | |
4013 | */ | |
4014 | static int wavelan_close(struct net_device * dev) | |
4015 | { | |
524ad0a7 | 4016 | net_local *lp = netdev_priv(dev); |
1da177e4 LT |
4017 | unsigned long flags; |
4018 | ||
4019 | #ifdef DEBUG_CALLBACK_TRACE | |
4020 | printk(KERN_DEBUG "%s: ->wavelan_close(dev=0x%x)\n", dev->name, | |
4021 | (unsigned int) dev); | |
4022 | #endif | |
4023 | ||
4024 | netif_stop_queue(dev); | |
4025 | ||
4026 | /* | |
4027 | * Flush the Tx and disable Rx. | |
4028 | */ | |
4029 | spin_lock_irqsave(&lp->spinlock, flags); | |
4030 | wv_82586_stop(dev); | |
4031 | spin_unlock_irqrestore(&lp->spinlock, flags); | |
4032 | ||
4033 | free_irq(dev->irq, dev); | |
4034 | ||
4035 | #ifdef DEBUG_CALLBACK_TRACE | |
4036 | printk(KERN_DEBUG "%s: <-wavelan_close()\n", dev->name); | |
4037 | #endif | |
4038 | return 0; | |
4039 | } | |
4040 | ||
4041 | /*------------------------------------------------------------------*/ | |
4042 | /* | |
4043 | * Probe an I/O address, and if the WaveLAN is there configure the | |
4044 | * device structure | |
4045 | * (called by wavelan_probe() and via init_module()). | |
4046 | */ | |
4047 | static int __init wavelan_config(struct net_device *dev, unsigned short ioaddr) | |
4048 | { | |
4049 | u8 irq_mask; | |
4050 | int irq; | |
4051 | net_local *lp; | |
4052 | mac_addr mac; | |
4053 | int err; | |
4054 | ||
4055 | if (!request_region(ioaddr, sizeof(ha_t), "wavelan")) | |
4056 | return -EADDRINUSE; | |
4057 | ||
4058 | err = wv_check_ioaddr(ioaddr, mac); | |
4059 | if (err) | |
4060 | goto out; | |
4061 | ||
4062 | memcpy(dev->dev_addr, mac, 6); | |
4063 | ||
4064 | dev->base_addr = ioaddr; | |
4065 | ||
4066 | #ifdef DEBUG_CALLBACK_TRACE | |
4067 | printk(KERN_DEBUG "%s: ->wavelan_config(dev=0x%x, ioaddr=0x%lx)\n", | |
4068 | dev->name, (unsigned int) dev, ioaddr); | |
4069 | #endif | |
4070 | ||
4071 | /* Check IRQ argument on command line. */ | |
4072 | if (dev->irq != 0) { | |
4073 | irq_mask = wv_irq_to_psa(dev->irq); | |
4074 | ||
4075 | if (irq_mask == 0) { | |
4076 | #ifdef DEBUG_CONFIG_ERROR | |
4077 | printk(KERN_WARNING | |
4078 | "%s: wavelan_config(): invalid IRQ %d ignored.\n", | |
4079 | dev->name, dev->irq); | |
4080 | #endif | |
4081 | dev->irq = 0; | |
4082 | } else { | |
4083 | #ifdef DEBUG_CONFIG_INFO | |
4084 | printk(KERN_DEBUG | |
4085 | "%s: wavelan_config(): changing IRQ to %d\n", | |
4086 | dev->name, dev->irq); | |
4087 | #endif | |
4088 | psa_write(ioaddr, HACR_DEFAULT, | |
4089 | psaoff(0, psa_int_req_no), &irq_mask, 1); | |
4090 | /* update the Wavelan checksum */ | |
4091 | update_psa_checksum(dev, ioaddr, HACR_DEFAULT); | |
4092 | wv_hacr_reset(ioaddr); | |
4093 | } | |
4094 | } | |
4095 | ||
4096 | psa_read(ioaddr, HACR_DEFAULT, psaoff(0, psa_int_req_no), | |
4097 | &irq_mask, 1); | |
4098 | if ((irq = wv_psa_to_irq(irq_mask)) == -1) { | |
4099 | #ifdef DEBUG_CONFIG_ERROR | |
4100 | printk(KERN_INFO | |
4101 | "%s: wavelan_config(): could not wavelan_map_irq(%d).\n", | |
4102 | dev->name, irq_mask); | |
4103 | #endif | |
4104 | err = -EAGAIN; | |
4105 | goto out; | |
4106 | } | |
4107 | ||
4108 | dev->irq = irq; | |
4109 | ||
4110 | dev->mem_start = 0x0000; | |
4111 | dev->mem_end = 0x0000; | |
4112 | dev->if_port = 0; | |
4113 | ||
4114 | /* Initialize device structures */ | |
524ad0a7 WC |
4115 | memset(netdev_priv(dev), 0, sizeof(net_local)); |
4116 | lp = netdev_priv(dev); | |
1da177e4 LT |
4117 | |
4118 | /* Back link to the device structure. */ | |
4119 | lp->dev = dev; | |
4120 | /* Add the device at the beginning of the linked list. */ | |
4121 | lp->next = wavelan_list; | |
4122 | wavelan_list = lp; | |
4123 | ||
4124 | lp->hacr = HACR_DEFAULT; | |
4125 | ||
4126 | /* Multicast stuff */ | |
4127 | lp->promiscuous = 0; | |
4128 | lp->mc_count = 0; | |
4129 | ||
4130 | /* Init spinlock */ | |
4131 | spin_lock_init(&lp->spinlock); | |
4132 | ||
1da177e4 LT |
4133 | dev->open = wavelan_open; |
4134 | dev->stop = wavelan_close; | |
4135 | dev->hard_start_xmit = wavelan_packet_xmit; | |
4136 | dev->get_stats = wavelan_get_stats; | |
4137 | dev->set_multicast_list = &wavelan_set_multicast_list; | |
4138 | dev->tx_timeout = &wavelan_watchdog; | |
4139 | dev->watchdog_timeo = WATCHDOG_JIFFIES; | |
4140 | #ifdef SET_MAC_ADDRESS | |
4141 | dev->set_mac_address = &wavelan_set_mac_address; | |
4142 | #endif /* SET_MAC_ADDRESS */ | |
4143 | ||
1da177e4 LT |
4144 | dev->wireless_handlers = &wavelan_handler_def; |
4145 | lp->wireless_data.spy_data = &lp->spy_data; | |
4146 | dev->wireless_data = &lp->wireless_data; | |
1da177e4 LT |
4147 | |
4148 | dev->mtu = WAVELAN_MTU; | |
4149 | ||
4150 | /* Display nice information. */ | |
4151 | wv_init_info(dev); | |
4152 | ||
4153 | #ifdef DEBUG_CALLBACK_TRACE | |
4154 | printk(KERN_DEBUG "%s: <-wavelan_config()\n", dev->name); | |
4155 | #endif | |
4156 | return 0; | |
4157 | out: | |
4158 | release_region(ioaddr, sizeof(ha_t)); | |
4159 | return err; | |
4160 | } | |
4161 | ||
4162 | /*------------------------------------------------------------------*/ | |
4163 | /* | |
4164 | * Check for a network adaptor of this type. Return '0' iff one | |
4165 | * exists. There seem to be different interpretations of | |
4166 | * the initial value of dev->base_addr. | |
4167 | * We follow the example in drivers/net/ne.c. | |
4168 | * (called in "Space.c") | |
4169 | */ | |
4170 | struct net_device * __init wavelan_probe(int unit) | |
4171 | { | |
4172 | struct net_device *dev; | |
4173 | short base_addr; | |
4174 | int def_irq; | |
4175 | int i; | |
4176 | int r = 0; | |
4177 | ||
60da481b HD |
4178 | /* compile-time check the sizes of structures */ |
4179 | BUILD_BUG_ON(sizeof(psa_t) != PSA_SIZE); | |
4180 | BUILD_BUG_ON(sizeof(mmw_t) != MMW_SIZE); | |
4181 | BUILD_BUG_ON(sizeof(mmr_t) != MMR_SIZE); | |
4182 | BUILD_BUG_ON(sizeof(ha_t) != HA_SIZE); | |
1da177e4 LT |
4183 | |
4184 | dev = alloc_etherdev(sizeof(net_local)); | |
4185 | if (!dev) | |
4186 | return ERR_PTR(-ENOMEM); | |
4187 | ||
4188 | sprintf(dev->name, "eth%d", unit); | |
4189 | netdev_boot_setup_check(dev); | |
4190 | base_addr = dev->base_addr; | |
4191 | def_irq = dev->irq; | |
4192 | ||
4193 | #ifdef DEBUG_CALLBACK_TRACE | |
4194 | printk(KERN_DEBUG | |
4195 | "%s: ->wavelan_probe(dev=%p (base_addr=0x%x))\n", | |
4196 | dev->name, dev, (unsigned int) dev->base_addr); | |
4197 | #endif | |
4198 | ||
4199 | /* Don't probe at all. */ | |
4200 | if (base_addr < 0) { | |
4201 | #ifdef DEBUG_CONFIG_ERROR | |
4202 | printk(KERN_WARNING | |
4203 | "%s: wavelan_probe(): invalid base address\n", | |
4204 | dev->name); | |
4205 | #endif | |
4206 | r = -ENXIO; | |
4207 | } else if (base_addr > 0x100) { /* Check a single specified location. */ | |
4208 | r = wavelan_config(dev, base_addr); | |
4209 | #ifdef DEBUG_CONFIG_INFO | |
4210 | if (r != 0) | |
4211 | printk(KERN_DEBUG | |
4212 | "%s: wavelan_probe(): no device at specified base address (0x%X) or address already in use\n", | |
4213 | dev->name, base_addr); | |
4214 | #endif | |
4215 | ||
4216 | #ifdef DEBUG_CALLBACK_TRACE | |
4217 | printk(KERN_DEBUG "%s: <-wavelan_probe()\n", dev->name); | |
4218 | #endif | |
4219 | } else { /* Scan all possible addresses of the WaveLAN hardware. */ | |
0a92dd0a | 4220 | for (i = 0; i < ARRAY_SIZE(iobase); i++) { |
1da177e4 LT |
4221 | dev->irq = def_irq; |
4222 | if (wavelan_config(dev, iobase[i]) == 0) { | |
4223 | #ifdef DEBUG_CALLBACK_TRACE | |
4224 | printk(KERN_DEBUG | |
4225 | "%s: <-wavelan_probe()\n", | |
4226 | dev->name); | |
4227 | #endif | |
4228 | break; | |
4229 | } | |
4230 | } | |
0a92dd0a | 4231 | if (i == ARRAY_SIZE(iobase)) |
1da177e4 LT |
4232 | r = -ENODEV; |
4233 | } | |
4234 | if (r) | |
4235 | goto out; | |
4236 | r = register_netdev(dev); | |
4237 | if (r) | |
4238 | goto out1; | |
4239 | return dev; | |
4240 | out1: | |
4241 | release_region(dev->base_addr, sizeof(ha_t)); | |
4242 | wavelan_list = wavelan_list->next; | |
4243 | out: | |
4244 | free_netdev(dev); | |
4245 | return ERR_PTR(r); | |
4246 | } | |
4247 | ||
4248 | /****************************** MODULE ******************************/ | |
4249 | /* | |
4250 | * Module entry point: insertion and removal | |
4251 | */ | |
4252 | ||
4253 | #ifdef MODULE | |
4254 | /*------------------------------------------------------------------*/ | |
4255 | /* | |
4256 | * Insertion of the module | |
4257 | * I'm now quite proud of the multi-device support. | |
4258 | */ | |
53072d68 | 4259 | int __init init_module(void) |
1da177e4 LT |
4260 | { |
4261 | int ret = -EIO; /* Return error if no cards found */ | |
4262 | int i; | |
4263 | ||
4264 | #ifdef DEBUG_MODULE_TRACE | |
4265 | printk(KERN_DEBUG "-> init_module()\n"); | |
4266 | #endif | |
4267 | ||
4268 | /* If probing is asked */ | |
4269 | if (io[0] == 0) { | |
4270 | #ifdef DEBUG_CONFIG_ERROR | |
4271 | printk(KERN_WARNING | |
4272 | "WaveLAN init_module(): doing device probing (bad !)\n"); | |
4273 | printk(KERN_WARNING | |
4274 | "Specify base addresses while loading module to correct the problem\n"); | |
4275 | #endif | |
4276 | ||
4277 | /* Copy the basic set of address to be probed. */ | |
0a92dd0a | 4278 | for (i = 0; i < ARRAY_SIZE(iobase); i++) |
1da177e4 LT |
4279 | io[i] = iobase[i]; |
4280 | } | |
4281 | ||
4282 | ||
4283 | /* Loop on all possible base addresses. */ | |
4284 | i = -1; | |
0a92dd0a | 4285 | while ((io[++i] != 0) && (i < ARRAY_SIZE(io))) { |
1da177e4 LT |
4286 | struct net_device *dev = alloc_etherdev(sizeof(net_local)); |
4287 | if (!dev) | |
4288 | break; | |
4289 | if (name[i]) | |
4290 | strcpy(dev->name, name[i]); /* Copy name */ | |
4291 | dev->base_addr = io[i]; | |
4292 | dev->irq = irq[i]; | |
4293 | ||
4294 | /* Check if there is something at this base address. */ | |
4295 | if (wavelan_config(dev, io[i]) == 0) { | |
4296 | if (register_netdev(dev) != 0) { | |
4297 | release_region(dev->base_addr, sizeof(ha_t)); | |
4298 | wavelan_list = wavelan_list->next; | |
4299 | } else { | |
4300 | ret = 0; | |
4301 | continue; | |
4302 | } | |
4303 | } | |
4304 | free_netdev(dev); | |
4305 | } | |
4306 | ||
4307 | #ifdef DEBUG_CONFIG_ERROR | |
4308 | if (!wavelan_list) | |
4309 | printk(KERN_WARNING | |
4310 | "WaveLAN init_module(): no device found\n"); | |
4311 | #endif | |
4312 | ||
4313 | #ifdef DEBUG_MODULE_TRACE | |
4314 | printk(KERN_DEBUG "<- init_module()\n"); | |
4315 | #endif | |
4316 | return ret; | |
4317 | } | |
4318 | ||
4319 | /*------------------------------------------------------------------*/ | |
4320 | /* | |
4321 | * Removal of the module | |
4322 | */ | |
4323 | void cleanup_module(void) | |
4324 | { | |
4325 | #ifdef DEBUG_MODULE_TRACE | |
4326 | printk(KERN_DEBUG "-> cleanup_module()\n"); | |
4327 | #endif | |
4328 | ||
4329 | /* Loop on all devices and release them. */ | |
4330 | while (wavelan_list) { | |
4331 | struct net_device *dev = wavelan_list->dev; | |
4332 | ||
4333 | #ifdef DEBUG_CONFIG_INFO | |
4334 | printk(KERN_DEBUG | |
4335 | "%s: cleanup_module(): removing device at 0x%x\n", | |
4336 | dev->name, (unsigned int) dev); | |
4337 | #endif | |
4338 | unregister_netdev(dev); | |
4339 | ||
4340 | release_region(dev->base_addr, sizeof(ha_t)); | |
4341 | wavelan_list = wavelan_list->next; | |
4342 | ||
4343 | free_netdev(dev); | |
4344 | } | |
4345 | ||
4346 | #ifdef DEBUG_MODULE_TRACE | |
4347 | printk(KERN_DEBUG "<- cleanup_module()\n"); | |
4348 | #endif | |
4349 | } | |
4350 | #endif /* MODULE */ | |
4351 | MODULE_LICENSE("GPL"); | |
4352 | ||
4353 | /* | |
4354 | * This software may only be used and distributed | |
4355 | * according to the terms of the GNU General Public License. | |
4356 | * | |
4357 | * This software was developed as a component of the | |
4358 | * Linux operating system. | |
4359 | * It is based on other device drivers and information | |
4360 | * either written or supplied by: | |
4361 | * Ajay Bakre (bakre@paul.rutgers.edu), | |
4362 | * Donald Becker (becker@scyld.com), | |
4363 | * Loeke Brederveld (Loeke.Brederveld@Utrecht.NCR.com), | |
4364 | * Anders Klemets (klemets@it.kth.se), | |
4365 | * Vladimir V. Kolpakov (w@stier.koenig.ru), | |
4366 | * Marc Meertens (Marc.Meertens@Utrecht.NCR.com), | |
4367 | * Pauline Middelink (middelin@polyware.iaf.nl), | |
4368 | * Robert Morris (rtm@das.harvard.edu), | |
4369 | * Jean Tourrilhes (jt@hplb.hpl.hp.com), | |
4370 | * Girish Welling (welling@paul.rutgers.edu), | |
4371 | * | |
4372 | * Thanks go also to: | |
4373 | * James Ashton (jaa101@syseng.anu.edu.au), | |
113aa838 | 4374 | * Alan Cox (alan@lxorguk.ukuu.org.uk), |
1da177e4 LT |
4375 | * Allan Creighton (allanc@cs.usyd.edu.au), |
4376 | * Matthew Geier (matthew@cs.usyd.edu.au), | |
4377 | * Remo di Giovanni (remo@cs.usyd.edu.au), | |
4378 | * Eckhard Grah (grah@wrcs1.urz.uni-wuppertal.de), | |
4379 | * Vipul Gupta (vgupta@cs.binghamton.edu), | |
4380 | * Mark Hagan (mhagan@wtcpost.daytonoh.NCR.COM), | |
4381 | * Tim Nicholson (tim@cs.usyd.edu.au), | |
4382 | * Ian Parkin (ian@cs.usyd.edu.au), | |
4383 | * John Rosenberg (johnr@cs.usyd.edu.au), | |
4384 | * George Rossi (george@phm.gov.au), | |
4385 | * Arthur Scott (arthur@cs.usyd.edu.au), | |
4386 | * Peter Storey, | |
4387 | * for their assistance and advice. | |
4388 | * | |
4389 | * Please send bug reports, updates, comments to: | |
4390 | * | |
4391 | * Bruce Janson Email: bruce@cs.usyd.edu.au | |
4392 | * Basser Department of Computer Science Phone: +61-2-9351-3423 | |
4393 | * University of Sydney, N.S.W., 2006, AUSTRALIA Fax: +61-2-9351-3838 | |
4394 | */ |