Commit | Line | Data |
---|---|---|
1da177e4 LT |
1 | /* |
2 | * Wavelan Pcmcia driver | |
3 | * | |
4 | * Jean II - HPLB '96 | |
5 | * | |
6 | * Reorganization and extension of the driver. | |
7 | * Original copyright follow. See wavelan_cs.h for details. | |
8 | * | |
9 | * This file contain the declarations of the Wavelan hardware. Note that | |
10 | * the Pcmcia Wavelan include a i82593 controller (see definitions in | |
11 | * file i82593.h). | |
12 | * | |
13 | * The main difference between the pcmcia hardware and the ISA one is | |
14 | * the Ethernet Controller (i82593 instead of i82586). The i82593 allow | |
15 | * only one send buffer. The PSA (Parameter Storage Area : EEprom for | |
16 | * permanent storage of various info) is memory mapped, but not the | |
17 | * MMI (Modem Management Interface). | |
18 | */ | |
19 | ||
20 | /* | |
21 | * Definitions for the AT&T GIS (formerly NCR) WaveLAN PCMCIA card: | |
22 | * An Ethernet-like radio transceiver controlled by an Intel 82593 | |
23 | * coprocessor. | |
24 | * | |
25 | * | |
26 | **************************************************************************** | |
27 | * Copyright 1995 | |
28 | * Anthony D. Joseph | |
29 | * Massachusetts Institute of Technology | |
30 | * | |
31 | * Permission to use, copy, modify, and distribute this program | |
32 | * for any purpose and without fee is hereby granted, provided | |
33 | * that this copyright and permission notice appear on all copies | |
34 | * and supporting documentation, the name of M.I.T. not be used | |
35 | * in advertising or publicity pertaining to distribution of the | |
36 | * program without specific prior permission, and notice be given | |
37 | * in supporting documentation that copying and distribution is | |
38 | * by permission of M.I.T. M.I.T. makes no representations about | |
39 | * the suitability of this software for any purpose. It is pro- | |
40 | * vided "as is" without express or implied warranty. | |
41 | **************************************************************************** | |
42 | * | |
43 | * | |
44 | * Credits: | |
45 | * Special thanks to Jan Hoogendoorn of AT&T GIS Utrecht for | |
46 | * providing extremely useful information about WaveLAN PCMCIA hardware | |
47 | * | |
48 | * This driver is based upon several other drivers, in particular: | |
49 | * David Hinds' Linux driver for the PCMCIA 3c589 ethernet adapter | |
50 | * Bruce Janson's Linux driver for the AT-bus WaveLAN adapter | |
51 | * Anders Klemets' PCMCIA WaveLAN adapter driver | |
52 | * Robert Morris' BSDI driver for the PCMCIA WaveLAN adapter | |
53 | */ | |
54 | ||
55 | #ifndef _WAVELAN_CS_H | |
56 | #define _WAVELAN_CS_H | |
57 | ||
58 | /************************** MAGIC NUMBERS ***************************/ | |
59 | ||
60 | /* The detection of the wavelan card is made by reading the MAC address | |
61 | * from the card and checking it. If you have a non AT&T product (OEM, | |
62 | * like DEC RoamAbout, or Digital Ocean, Epson, ...), you must modify this | |
63 | * part to accommodate your hardware... | |
64 | */ | |
ff1d2767 | 65 | static const unsigned char MAC_ADDRESSES[][3] = |
1da177e4 LT |
66 | { |
67 | { 0x08, 0x00, 0x0E }, /* AT&T Wavelan (standard) & DEC RoamAbout */ | |
68 | { 0x08, 0x00, 0x6A }, /* AT&T Wavelan (alternate) */ | |
69 | { 0x00, 0x00, 0xE1 }, /* Hitachi Wavelan */ | |
70 | { 0x00, 0x60, 0x1D } /* Lucent Wavelan (another one) */ | |
71 | /* Add your card here and send me the patch ! */ | |
72 | }; | |
73 | ||
74 | /* | |
75 | * Constants used to convert channels to frequencies | |
76 | */ | |
77 | ||
78 | /* Frequency available in the 2.0 modem, in units of 250 kHz | |
79 | * (as read in the offset register of the dac area). | |
80 | * Used to map channel numbers used by `wfreqsel' to frequencies | |
81 | */ | |
ff1d2767 | 82 | static const short channel_bands[] = { 0x30, 0x58, 0x64, 0x7A, 0x80, 0xA8, |
1da177e4 LT |
83 | 0xD0, 0xF0, 0xF8, 0x150 }; |
84 | ||
85 | /* Frequencies of the 1.0 modem (fixed frequencies). | |
86 | * Use to map the PSA `subband' to a frequency | |
87 | * Note : all frequencies apart from the first one need to be multiplied by 10 | |
88 | */ | |
ff1d2767 | 89 | static const int fixed_bands[] = { 915e6, 2.425e8, 2.46e8, 2.484e8, 2.4305e8 }; |
1da177e4 LT |
90 | |
91 | ||
92 | /*************************** PC INTERFACE ****************************/ | |
93 | ||
94 | /* WaveLAN host interface definitions */ | |
95 | ||
96 | #define LCCR(base) (base) /* LAN Controller Command Register */ | |
97 | #define LCSR(base) (base) /* LAN Controller Status Register */ | |
98 | #define HACR(base) (base+0x1) /* Host Adapter Command Register */ | |
99 | #define HASR(base) (base+0x1) /* Host Adapter Status Register */ | |
100 | #define PIORL(base) (base+0x2) /* Program I/O Register Low */ | |
101 | #define RPLL(base) (base+0x2) /* Receive Pointer Latched Low */ | |
102 | #define PIORH(base) (base+0x3) /* Program I/O Register High */ | |
103 | #define RPLH(base) (base+0x3) /* Receive Pointer Latched High */ | |
104 | #define PIOP(base) (base+0x4) /* Program I/O Port */ | |
105 | #define MMR(base) (base+0x6) /* MMI Address Register */ | |
106 | #define MMD(base) (base+0x7) /* MMI Data Register */ | |
107 | ||
108 | /* Host Adaptor Command Register bit definitions */ | |
109 | ||
110 | #define HACR_LOF (1 << 3) /* Lock Out Flag, toggle every 250ms */ | |
111 | #define HACR_PWR_STAT (1 << 4) /* Power State, 1=active, 0=sleep */ | |
112 | #define HACR_TX_DMA_RESET (1 << 5) /* Reset transmit DMA ptr on high */ | |
113 | #define HACR_RX_DMA_RESET (1 << 6) /* Reset receive DMA ptr on high */ | |
114 | #define HACR_ROM_WEN (1 << 7) /* EEPROM write enabled when true */ | |
115 | ||
116 | #define HACR_RESET (HACR_TX_DMA_RESET | HACR_RX_DMA_RESET) | |
117 | #define HACR_DEFAULT (HACR_PWR_STAT) | |
118 | ||
119 | /* Host Adapter Status Register bit definitions */ | |
120 | ||
121 | #define HASR_MMI_BUSY (1 << 2) /* MMI is busy when true */ | |
122 | #define HASR_LOF (1 << 3) /* Lock out flag status */ | |
123 | #define HASR_NO_CLK (1 << 4) /* active when modem not connected */ | |
124 | ||
125 | /* Miscellaneous bit definitions */ | |
126 | ||
127 | #define PIORH_SEL_TX (1 << 5) /* PIOR points to 0=rx/1=tx buffer */ | |
128 | #define MMR_MMI_WR (1 << 0) /* Next MMI cycle is 0=read, 1=write */ | |
129 | #define PIORH_MASK 0x1f /* only low 5 bits are significant */ | |
130 | #define RPLH_MASK 0x1f /* only low 5 bits are significant */ | |
131 | #define MMI_ADDR_MASK 0x7e /* Bits 1-6 of MMR are significant */ | |
132 | ||
133 | /* Attribute Memory map */ | |
134 | ||
135 | #define CIS_ADDR 0x0000 /* Card Information Status Register */ | |
136 | #define PSA_ADDR 0x0e00 /* Parameter Storage Area address */ | |
137 | #define EEPROM_ADDR 0x1000 /* EEPROM address (unused ?) */ | |
138 | #define COR_ADDR 0x4000 /* Configuration Option Register */ | |
139 | ||
140 | /* Configuration Option Register bit definitions */ | |
141 | ||
142 | #define COR_CONFIG (1 << 0) /* Config Index, 0 when unconfigured */ | |
143 | #define COR_SW_RESET (1 << 7) /* Software Reset on true */ | |
144 | #define COR_LEVEL_IRQ (1 << 6) /* Level IRQ */ | |
145 | ||
146 | /* Local Memory map */ | |
147 | ||
148 | #define RX_BASE 0x0000 /* Receive memory, 8 kB */ | |
149 | #define TX_BASE 0x2000 /* Transmit memory, 2 kB */ | |
150 | #define UNUSED_BASE 0x2800 /* Unused, 22 kB */ | |
151 | #define RX_SIZE (TX_BASE-RX_BASE) /* Size of receive area */ | |
152 | #define RX_SIZE_SHIFT 6 /* Bits to shift in stop register */ | |
153 | ||
154 | #define TRUE 1 | |
155 | #define FALSE 0 | |
156 | ||
157 | #define MOD_ENAL 1 | |
158 | #define MOD_PROM 2 | |
159 | ||
160 | /* Size of a MAC address */ | |
161 | #define WAVELAN_ADDR_SIZE 6 | |
162 | ||
163 | /* Maximum size of Wavelan packet */ | |
164 | #define WAVELAN_MTU 1500 | |
165 | ||
166 | #define MAXDATAZ (6 + 6 + 2 + WAVELAN_MTU) | |
167 | ||
168 | /********************** PARAMETER STORAGE AREA **********************/ | |
169 | ||
170 | /* | |
171 | * Parameter Storage Area (PSA). | |
172 | */ | |
173 | typedef struct psa_t psa_t; | |
174 | struct psa_t | |
175 | { | |
176 | /* For the PCMCIA Adapter, locations 0x00-0x0F are unused and fixed at 00 */ | |
177 | unsigned char psa_io_base_addr_1; /* [0x00] Base address 1 ??? */ | |
178 | unsigned char psa_io_base_addr_2; /* [0x01] Base address 2 */ | |
179 | unsigned char psa_io_base_addr_3; /* [0x02] Base address 3 */ | |
180 | unsigned char psa_io_base_addr_4; /* [0x03] Base address 4 */ | |
181 | unsigned char psa_rem_boot_addr_1; /* [0x04] Remote Boot Address 1 */ | |
182 | unsigned char psa_rem_boot_addr_2; /* [0x05] Remote Boot Address 2 */ | |
183 | unsigned char psa_rem_boot_addr_3; /* [0x06] Remote Boot Address 3 */ | |
184 | unsigned char psa_holi_params; /* [0x07] HOst Lan Interface (HOLI) Parameters */ | |
185 | unsigned char psa_int_req_no; /* [0x08] Interrupt Request Line */ | |
186 | unsigned char psa_unused0[7]; /* [0x09-0x0F] unused */ | |
187 | ||
188 | unsigned char psa_univ_mac_addr[WAVELAN_ADDR_SIZE]; /* [0x10-0x15] Universal (factory) MAC Address */ | |
189 | unsigned char psa_local_mac_addr[WAVELAN_ADDR_SIZE]; /* [0x16-1B] Local MAC Address */ | |
190 | unsigned char psa_univ_local_sel; /* [0x1C] Universal Local Selection */ | |
191 | #define PSA_UNIVERSAL 0 /* Universal (factory) */ | |
192 | #define PSA_LOCAL 1 /* Local */ | |
193 | unsigned char psa_comp_number; /* [0x1D] Compatability Number: */ | |
194 | #define PSA_COMP_PC_AT_915 0 /* PC-AT 915 MHz */ | |
195 | #define PSA_COMP_PC_MC_915 1 /* PC-MC 915 MHz */ | |
196 | #define PSA_COMP_PC_AT_2400 2 /* PC-AT 2.4 GHz */ | |
197 | #define PSA_COMP_PC_MC_2400 3 /* PC-MC 2.4 GHz */ | |
198 | #define PSA_COMP_PCMCIA_915 4 /* PCMCIA 915 MHz or 2.0 */ | |
199 | unsigned char psa_thr_pre_set; /* [0x1E] Modem Threshold Preset */ | |
200 | unsigned char psa_feature_select; /* [0x1F] Call code required (1=on) */ | |
201 | #define PSA_FEATURE_CALL_CODE 0x01 /* Call code required (Japan) */ | |
202 | unsigned char psa_subband; /* [0x20] Subband */ | |
203 | #define PSA_SUBBAND_915 0 /* 915 MHz or 2.0 */ | |
204 | #define PSA_SUBBAND_2425 1 /* 2425 MHz */ | |
205 | #define PSA_SUBBAND_2460 2 /* 2460 MHz */ | |
206 | #define PSA_SUBBAND_2484 3 /* 2484 MHz */ | |
207 | #define PSA_SUBBAND_2430_5 4 /* 2430.5 MHz */ | |
208 | unsigned char psa_quality_thr; /* [0x21] Modem Quality Threshold */ | |
209 | unsigned char psa_mod_delay; /* [0x22] Modem Delay ??? (reserved) */ | |
210 | unsigned char psa_nwid[2]; /* [0x23-0x24] Network ID */ | |
211 | unsigned char psa_nwid_select; /* [0x25] Network ID Select On Off */ | |
212 | unsigned char psa_encryption_select; /* [0x26] Encryption On Off */ | |
213 | unsigned char psa_encryption_key[8]; /* [0x27-0x2E] Encryption Key */ | |
214 | unsigned char psa_databus_width; /* [0x2F] AT bus width select 8/16 */ | |
215 | unsigned char psa_call_code[8]; /* [0x30-0x37] (Japan) Call Code */ | |
216 | unsigned char psa_nwid_prefix[2]; /* [0x38-0x39] Roaming domain */ | |
217 | unsigned char psa_reserved[2]; /* [0x3A-0x3B] Reserved - fixed 00 */ | |
218 | unsigned char psa_conf_status; /* [0x3C] Conf Status, bit 0=1:config*/ | |
219 | unsigned char psa_crc[2]; /* [0x3D] CRC-16 over PSA */ | |
220 | unsigned char psa_crc_status; /* [0x3F] CRC Valid Flag */ | |
221 | }; | |
222 | ||
223 | /* Size for structure checking (if padding is correct) */ | |
224 | #define PSA_SIZE 64 | |
225 | ||
226 | /* Calculate offset of a field in the above structure | |
227 | * Warning : only even addresses are used */ | |
228 | #define psaoff(p,f) ((unsigned short) ((void *)(&((psa_t *) ((void *) NULL + (p)))->f) - (void *) NULL)) | |
229 | ||
230 | /******************** MODEM MANAGEMENT INTERFACE ********************/ | |
231 | ||
232 | /* | |
233 | * Modem Management Controller (MMC) write structure. | |
234 | */ | |
235 | typedef struct mmw_t mmw_t; | |
236 | struct mmw_t | |
237 | { | |
238 | unsigned char mmw_encr_key[8]; /* encryption key */ | |
239 | unsigned char mmw_encr_enable; /* enable/disable encryption */ | |
240 | #define MMW_ENCR_ENABLE_MODE 0x02 /* Mode of security option */ | |
241 | #define MMW_ENCR_ENABLE_EN 0x01 /* Enable security option */ | |
242 | unsigned char mmw_unused0[1]; /* unused */ | |
243 | unsigned char mmw_des_io_invert; /* Encryption option */ | |
244 | #define MMW_DES_IO_INVERT_RES 0x0F /* Reserved */ | |
245 | #define MMW_DES_IO_INVERT_CTRL 0xF0 /* Control ??? (set to 0) */ | |
246 | unsigned char mmw_unused1[5]; /* unused */ | |
247 | unsigned char mmw_loopt_sel; /* looptest selection */ | |
248 | #define MMW_LOOPT_SEL_DIS_NWID 0x40 /* disable NWID filtering */ | |
249 | #define MMW_LOOPT_SEL_INT 0x20 /* activate Attention Request */ | |
250 | #define MMW_LOOPT_SEL_LS 0x10 /* looptest w/o collision avoidance */ | |
251 | #define MMW_LOOPT_SEL_LT3A 0x08 /* looptest 3a */ | |
252 | #define MMW_LOOPT_SEL_LT3B 0x04 /* looptest 3b */ | |
253 | #define MMW_LOOPT_SEL_LT3C 0x02 /* looptest 3c */ | |
254 | #define MMW_LOOPT_SEL_LT3D 0x01 /* looptest 3d */ | |
255 | unsigned char mmw_jabber_enable; /* jabber timer enable */ | |
256 | /* Abort transmissions > 200 ms */ | |
257 | unsigned char mmw_freeze; /* freeze / unfreeeze signal level */ | |
258 | /* 0 : signal level & qual updated for every new message, 1 : frozen */ | |
259 | unsigned char mmw_anten_sel; /* antenna selection */ | |
260 | #define MMW_ANTEN_SEL_SEL 0x01 /* direct antenna selection */ | |
261 | #define MMW_ANTEN_SEL_ALG_EN 0x02 /* antenna selection algo. enable */ | |
262 | unsigned char mmw_ifs; /* inter frame spacing */ | |
263 | /* min time between transmission in bit periods (.5 us) - bit 0 ignored */ | |
264 | unsigned char mmw_mod_delay; /* modem delay (synchro) */ | |
265 | unsigned char mmw_jam_time; /* jamming time (after collision) */ | |
266 | unsigned char mmw_unused2[1]; /* unused */ | |
267 | unsigned char mmw_thr_pre_set; /* level threshold preset */ | |
268 | /* Discard all packet with signal < this value (4) */ | |
269 | unsigned char mmw_decay_prm; /* decay parameters */ | |
270 | unsigned char mmw_decay_updat_prm; /* decay update parameterz */ | |
271 | unsigned char mmw_quality_thr; /* quality (z-quotient) threshold */ | |
272 | /* Discard all packet with quality < this value (3) */ | |
273 | unsigned char mmw_netw_id_l; /* NWID low order byte */ | |
274 | unsigned char mmw_netw_id_h; /* NWID high order byte */ | |
275 | /* Network ID or Domain : create virtual net on the air */ | |
276 | ||
277 | /* 2.0 Hardware extension - frequency selection support */ | |
278 | unsigned char mmw_mode_select; /* for analog tests (set to 0) */ | |
279 | unsigned char mmw_unused3[1]; /* unused */ | |
280 | unsigned char mmw_fee_ctrl; /* frequency eeprom control */ | |
281 | #define MMW_FEE_CTRL_PRE 0x10 /* Enable protected instructions */ | |
282 | #define MMW_FEE_CTRL_DWLD 0x08 /* Download eeprom to mmc */ | |
283 | #define MMW_FEE_CTRL_CMD 0x07 /* EEprom commands : */ | |
284 | #define MMW_FEE_CTRL_READ 0x06 /* Read */ | |
285 | #define MMW_FEE_CTRL_WREN 0x04 /* Write enable */ | |
286 | #define MMW_FEE_CTRL_WRITE 0x05 /* Write data to address */ | |
287 | #define MMW_FEE_CTRL_WRALL 0x04 /* Write data to all addresses */ | |
288 | #define MMW_FEE_CTRL_WDS 0x04 /* Write disable */ | |
289 | #define MMW_FEE_CTRL_PRREAD 0x16 /* Read addr from protect register */ | |
290 | #define MMW_FEE_CTRL_PREN 0x14 /* Protect register enable */ | |
291 | #define MMW_FEE_CTRL_PRCLEAR 0x17 /* Unprotect all registers */ | |
292 | #define MMW_FEE_CTRL_PRWRITE 0x15 /* Write addr in protect register */ | |
293 | #define MMW_FEE_CTRL_PRDS 0x14 /* Protect register disable */ | |
294 | /* Never issue this command (PRDS) : it's irreversible !!! */ | |
295 | ||
296 | unsigned char mmw_fee_addr; /* EEprom address */ | |
297 | #define MMW_FEE_ADDR_CHANNEL 0xF0 /* Select the channel */ | |
298 | #define MMW_FEE_ADDR_OFFSET 0x0F /* Offset in channel data */ | |
299 | #define MMW_FEE_ADDR_EN 0xC0 /* FEE_CTRL enable operations */ | |
300 | #define MMW_FEE_ADDR_DS 0x00 /* FEE_CTRL disable operations */ | |
301 | #define MMW_FEE_ADDR_ALL 0x40 /* FEE_CTRL all operations */ | |
302 | #define MMW_FEE_ADDR_CLEAR 0xFF /* FEE_CTRL clear operations */ | |
303 | ||
304 | unsigned char mmw_fee_data_l; /* Write data to EEprom */ | |
305 | unsigned char mmw_fee_data_h; /* high octet */ | |
306 | unsigned char mmw_ext_ant; /* Setting for external antenna */ | |
307 | #define MMW_EXT_ANT_EXTANT 0x01 /* Select external antenna */ | |
308 | #define MMW_EXT_ANT_POL 0x02 /* Polarity of the antenna */ | |
309 | #define MMW_EXT_ANT_INTERNAL 0x00 /* Internal antenna */ | |
310 | #define MMW_EXT_ANT_EXTERNAL 0x03 /* External antenna */ | |
311 | #define MMW_EXT_ANT_IQ_TEST 0x1C /* IQ test pattern (set to 0) */ | |
ea995abf | 312 | } __attribute__((packed)); |
1da177e4 LT |
313 | |
314 | /* Size for structure checking (if padding is correct) */ | |
315 | #define MMW_SIZE 37 | |
316 | ||
317 | /* Calculate offset of a field in the above structure */ | |
318 | #define mmwoff(p,f) (unsigned short)((void *)(&((mmw_t *)((void *)0 + (p)))->f) - (void *)0) | |
319 | ||
320 | ||
321 | /* | |
322 | * Modem Management Controller (MMC) read structure. | |
323 | */ | |
324 | typedef struct mmr_t mmr_t; | |
325 | struct mmr_t | |
326 | { | |
327 | unsigned char mmr_unused0[8]; /* unused */ | |
328 | unsigned char mmr_des_status; /* encryption status */ | |
329 | unsigned char mmr_des_avail; /* encryption available (0x55 read) */ | |
330 | #define MMR_DES_AVAIL_DES 0x55 /* DES available */ | |
331 | #define MMR_DES_AVAIL_AES 0x33 /* AES (AT&T) available */ | |
332 | unsigned char mmr_des_io_invert; /* des I/O invert register */ | |
333 | unsigned char mmr_unused1[5]; /* unused */ | |
334 | unsigned char mmr_dce_status; /* DCE status */ | |
335 | #define MMR_DCE_STATUS_RX_BUSY 0x01 /* receiver busy */ | |
336 | #define MMR_DCE_STATUS_LOOPT_IND 0x02 /* loop test indicated */ | |
337 | #define MMR_DCE_STATUS_TX_BUSY 0x04 /* transmitter on */ | |
338 | #define MMR_DCE_STATUS_JBR_EXPIRED 0x08 /* jabber timer expired */ | |
339 | #define MMR_DCE_STATUS 0x0F /* mask to get the bits */ | |
340 | unsigned char mmr_dsp_id; /* DSP id (AA = Daedalus rev A) */ | |
341 | unsigned char mmr_unused2[2]; /* unused */ | |
342 | unsigned char mmr_correct_nwid_l; /* # of correct NWID's rxd (low) */ | |
343 | unsigned char mmr_correct_nwid_h; /* # of correct NWID's rxd (high) */ | |
344 | /* Warning : Read high order octet first !!! */ | |
345 | unsigned char mmr_wrong_nwid_l; /* # of wrong NWID's rxd (low) */ | |
346 | unsigned char mmr_wrong_nwid_h; /* # of wrong NWID's rxd (high) */ | |
347 | unsigned char mmr_thr_pre_set; /* level threshold preset */ | |
348 | #define MMR_THR_PRE_SET 0x3F /* level threshold preset */ | |
349 | #define MMR_THR_PRE_SET_CUR 0x80 /* Current signal above it */ | |
350 | unsigned char mmr_signal_lvl; /* signal level */ | |
351 | #define MMR_SIGNAL_LVL 0x3F /* signal level */ | |
352 | #define MMR_SIGNAL_LVL_VALID 0x80 /* Updated since last read */ | |
353 | unsigned char mmr_silence_lvl; /* silence level (noise) */ | |
354 | #define MMR_SILENCE_LVL 0x3F /* silence level */ | |
355 | #define MMR_SILENCE_LVL_VALID 0x80 /* Updated since last read */ | |
356 | unsigned char mmr_sgnl_qual; /* signal quality */ | |
357 | #define MMR_SGNL_QUAL 0x0F /* signal quality */ | |
358 | #define MMR_SGNL_QUAL_ANT 0x80 /* current antenna used */ | |
359 | unsigned char mmr_netw_id_l; /* NWID low order byte ??? */ | |
360 | unsigned char mmr_unused3[3]; /* unused */ | |
361 | ||
362 | /* 2.0 Hardware extension - frequency selection support */ | |
363 | unsigned char mmr_fee_status; /* Status of frequency eeprom */ | |
364 | #define MMR_FEE_STATUS_ID 0xF0 /* Modem revision id */ | |
365 | #define MMR_FEE_STATUS_DWLD 0x08 /* Download in progress */ | |
366 | #define MMR_FEE_STATUS_BUSY 0x04 /* EEprom busy */ | |
367 | unsigned char mmr_unused4[1]; /* unused */ | |
368 | unsigned char mmr_fee_data_l; /* Read data from eeprom (low) */ | |
369 | unsigned char mmr_fee_data_h; /* Read data from eeprom (high) */ | |
370 | }; | |
371 | ||
372 | /* Size for structure checking (if padding is correct) */ | |
373 | #define MMR_SIZE 36 | |
374 | ||
375 | /* Calculate offset of a field in the above structure */ | |
376 | #define mmroff(p,f) (unsigned short)((void *)(&((mmr_t *)((void *)0 + (p)))->f) - (void *)0) | |
377 | ||
378 | ||
379 | /* Make the two above structures one */ | |
380 | typedef union mm_t | |
381 | { | |
382 | struct mmw_t w; /* Write to the mmc */ | |
383 | struct mmr_t r; /* Read from the mmc */ | |
384 | } mm_t; | |
385 | ||
386 | #endif /* _WAVELAN_CS_H */ |