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f5fc0f86 LC |
1 | /* |
2 | * This file is part of wl1271 | |
3 | * | |
4 | * Copyright (C) 1998-2009 Texas Instruments. All rights reserved. | |
5 | * Copyright (C) 2008-2009 Nokia Corporation | |
6 | * | |
7 | * Contact: Luciano Coelho <luciano.coelho@nokia.com> | |
8 | * | |
9 | * This program is free software; you can redistribute it and/or | |
10 | * modify it under the terms of the GNU General Public License | |
11 | * version 2 as published by the Free Software Foundation. | |
12 | * | |
13 | * This program is distributed in the hope that it will be useful, but | |
14 | * WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
16 | * General Public License for more details. | |
17 | * | |
18 | * You should have received a copy of the GNU General Public License | |
19 | * along with this program; if not, write to the Free Software | |
20 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA | |
21 | * 02110-1301 USA | |
22 | * | |
23 | */ | |
24 | ||
25 | #ifndef __WL1271_H__ | |
26 | #define __WL1271_H__ | |
27 | ||
28 | #include <linux/mutex.h> | |
29 | #include <linux/completion.h> | |
30 | #include <linux/spinlock.h> | |
31 | #include <linux/list.h> | |
32 | #include <linux/bitops.h> | |
33 | #include <net/mac80211.h> | |
34 | ||
35 | #define DRIVER_NAME "wl1271" | |
36 | #define DRIVER_PREFIX DRIVER_NAME ": " | |
37 | ||
38 | enum { | |
39 | DEBUG_NONE = 0, | |
40 | DEBUG_IRQ = BIT(0), | |
41 | DEBUG_SPI = BIT(1), | |
42 | DEBUG_BOOT = BIT(2), | |
43 | DEBUG_MAILBOX = BIT(3), | |
44 | DEBUG_NETLINK = BIT(4), | |
45 | DEBUG_EVENT = BIT(5), | |
46 | DEBUG_TX = BIT(6), | |
47 | DEBUG_RX = BIT(7), | |
48 | DEBUG_SCAN = BIT(8), | |
49 | DEBUG_CRYPT = BIT(9), | |
50 | DEBUG_PSM = BIT(10), | |
51 | DEBUG_MAC80211 = BIT(11), | |
52 | DEBUG_CMD = BIT(12), | |
53 | DEBUG_ACX = BIT(13), | |
54 | DEBUG_ALL = ~0, | |
55 | }; | |
56 | ||
57 | #define DEBUG_LEVEL (DEBUG_NONE) | |
58 | ||
59 | #define DEBUG_DUMP_LIMIT 1024 | |
60 | ||
61 | #define wl1271_error(fmt, arg...) \ | |
62 | printk(KERN_ERR DRIVER_PREFIX "ERROR " fmt "\n", ##arg) | |
63 | ||
64 | #define wl1271_warning(fmt, arg...) \ | |
65 | printk(KERN_WARNING DRIVER_PREFIX "WARNING " fmt "\n", ##arg) | |
66 | ||
67 | #define wl1271_notice(fmt, arg...) \ | |
68 | printk(KERN_INFO DRIVER_PREFIX fmt "\n", ##arg) | |
69 | ||
70 | #define wl1271_info(fmt, arg...) \ | |
71 | printk(KERN_DEBUG DRIVER_PREFIX fmt "\n", ##arg) | |
72 | ||
73 | #define wl1271_debug(level, fmt, arg...) \ | |
74 | do { \ | |
75 | if (level & DEBUG_LEVEL) \ | |
76 | printk(KERN_DEBUG DRIVER_PREFIX fmt "\n", ##arg); \ | |
77 | } while (0) | |
78 | ||
79 | #define wl1271_dump(level, prefix, buf, len) \ | |
80 | do { \ | |
81 | if (level & DEBUG_LEVEL) \ | |
82 | print_hex_dump(KERN_DEBUG, DRIVER_PREFIX prefix, \ | |
83 | DUMP_PREFIX_OFFSET, 16, 1, \ | |
84 | buf, \ | |
85 | min_t(size_t, len, DEBUG_DUMP_LIMIT), \ | |
86 | 0); \ | |
87 | } while (0) | |
88 | ||
89 | #define wl1271_dump_ascii(level, prefix, buf, len) \ | |
90 | do { \ | |
91 | if (level & DEBUG_LEVEL) \ | |
92 | print_hex_dump(KERN_DEBUG, DRIVER_PREFIX prefix, \ | |
93 | DUMP_PREFIX_OFFSET, 16, 1, \ | |
94 | buf, \ | |
95 | min_t(size_t, len, DEBUG_DUMP_LIMIT), \ | |
96 | true); \ | |
97 | } while (0) | |
98 | ||
99 | #define WL1271_DEFAULT_RX_CONFIG (CFG_UNI_FILTER_EN | \ | |
c87dec9f JO |
100 | CFG_BSSID_FILTER_EN | \ |
101 | CFG_MC_FILTER_EN) | |
f5fc0f86 LC |
102 | |
103 | #define WL1271_DEFAULT_RX_FILTER (CFG_RX_RCTS_ACK | CFG_RX_PRSP_EN | \ | |
104 | CFG_RX_MGMT_EN | CFG_RX_DATA_EN | \ | |
105 | CFG_RX_CTL_EN | CFG_RX_BCN_EN | \ | |
106 | CFG_RX_AUTH_EN | CFG_RX_ASSOC_EN) | |
107 | ||
d94cd297 JO |
108 | #define WL1271_DEFAULT_BASIC_RATE_SET (ACX_RATE_MASK_ALL) |
109 | ||
f5fc0f86 LC |
110 | #define WL1271_FW_NAME "wl1271-fw.bin" |
111 | #define WL1271_NVS_NAME "wl1271-nvs.bin" | |
112 | ||
545f1da8 JO |
113 | /* |
114 | * FIXME: for the wl1271, a busy word count of 1 here will result in a more | |
115 | * optimal SPI interface. There is some SPI bug however, causing RXS time outs | |
116 | * with this mode occasionally on boot, so lets have two for now. | |
117 | */ | |
118 | #define WL1271_BUSY_WORD_CNT 2 | |
119 | #define WL1271_BUSY_WORD_LEN (WL1271_BUSY_WORD_CNT * sizeof(u32)) | |
f5fc0f86 LC |
120 | |
121 | #define WL1271_ELP_HW_STATE_ASLEEP 0 | |
122 | #define WL1271_ELP_HW_STATE_IRQ 1 | |
123 | ||
d94cd297 JO |
124 | #define WL1271_DEFAULT_BEACON_INT 100 |
125 | #define WL1271_DEFAULT_DTIM_PERIOD 1 | |
126 | ||
c87dec9f | 127 | #define ACX_TX_DESCRIPTORS 32 |
be7078c2 | 128 | |
f5fc0f86 LC |
129 | enum wl1271_state { |
130 | WL1271_STATE_OFF, | |
131 | WL1271_STATE_ON, | |
132 | WL1271_STATE_PLT, | |
133 | }; | |
134 | ||
135 | enum wl1271_partition_type { | |
136 | PART_DOWN, | |
137 | PART_WORK, | |
138 | PART_DRPW, | |
139 | ||
140 | PART_TABLE_LEN | |
141 | }; | |
142 | ||
143 | struct wl1271_partition { | |
144 | u32 size; | |
145 | u32 start; | |
146 | }; | |
147 | ||
148 | struct wl1271_partition_set { | |
149 | struct wl1271_partition mem; | |
150 | struct wl1271_partition reg; | |
151 | }; | |
152 | ||
153 | struct wl1271; | |
154 | ||
155 | /* FIXME: I'm not sure about this structure name */ | |
156 | struct wl1271_chip { | |
157 | u32 id; | |
158 | char fw_ver[21]; | |
159 | }; | |
160 | ||
161 | struct wl1271_stats { | |
162 | struct acx_statistics *fw_stats; | |
163 | unsigned long fw_stats_update; | |
164 | ||
165 | unsigned int retry_count; | |
166 | unsigned int excessive_retries; | |
167 | }; | |
168 | ||
169 | struct wl1271_debugfs { | |
170 | struct dentry *rootdir; | |
171 | struct dentry *fw_statistics; | |
172 | ||
173 | struct dentry *tx_internal_desc_overflow; | |
174 | ||
175 | struct dentry *rx_out_of_mem; | |
176 | struct dentry *rx_hdr_overflow; | |
177 | struct dentry *rx_hw_stuck; | |
178 | struct dentry *rx_dropped; | |
179 | struct dentry *rx_fcs_err; | |
180 | struct dentry *rx_xfr_hint_trig; | |
181 | struct dentry *rx_path_reset; | |
182 | struct dentry *rx_reset_counter; | |
183 | ||
184 | struct dentry *dma_rx_requested; | |
185 | struct dentry *dma_rx_errors; | |
186 | struct dentry *dma_tx_requested; | |
187 | struct dentry *dma_tx_errors; | |
188 | ||
189 | struct dentry *isr_cmd_cmplt; | |
190 | struct dentry *isr_fiqs; | |
191 | struct dentry *isr_rx_headers; | |
192 | struct dentry *isr_rx_mem_overflow; | |
193 | struct dentry *isr_rx_rdys; | |
194 | struct dentry *isr_irqs; | |
195 | struct dentry *isr_tx_procs; | |
196 | struct dentry *isr_decrypt_done; | |
197 | struct dentry *isr_dma0_done; | |
198 | struct dentry *isr_dma1_done; | |
199 | struct dentry *isr_tx_exch_complete; | |
200 | struct dentry *isr_commands; | |
201 | struct dentry *isr_rx_procs; | |
202 | struct dentry *isr_hw_pm_mode_changes; | |
203 | struct dentry *isr_host_acknowledges; | |
204 | struct dentry *isr_pci_pm; | |
205 | struct dentry *isr_wakeups; | |
206 | struct dentry *isr_low_rssi; | |
207 | ||
208 | struct dentry *wep_addr_key_count; | |
209 | struct dentry *wep_default_key_count; | |
210 | /* skipping wep.reserved */ | |
211 | struct dentry *wep_key_not_found; | |
212 | struct dentry *wep_decrypt_fail; | |
213 | struct dentry *wep_packets; | |
214 | struct dentry *wep_interrupt; | |
215 | ||
216 | struct dentry *pwr_ps_enter; | |
217 | struct dentry *pwr_elp_enter; | |
218 | struct dentry *pwr_missing_bcns; | |
219 | struct dentry *pwr_wake_on_host; | |
220 | struct dentry *pwr_wake_on_timer_exp; | |
221 | struct dentry *pwr_tx_with_ps; | |
222 | struct dentry *pwr_tx_without_ps; | |
223 | struct dentry *pwr_rcvd_beacons; | |
224 | struct dentry *pwr_power_save_off; | |
225 | struct dentry *pwr_enable_ps; | |
226 | struct dentry *pwr_disable_ps; | |
227 | struct dentry *pwr_fix_tsf_ps; | |
228 | /* skipping cont_miss_bcns_spread for now */ | |
229 | struct dentry *pwr_rcvd_awake_beacons; | |
230 | ||
231 | struct dentry *mic_rx_pkts; | |
232 | struct dentry *mic_calc_failure; | |
233 | ||
234 | struct dentry *aes_encrypt_fail; | |
235 | struct dentry *aes_decrypt_fail; | |
236 | struct dentry *aes_encrypt_packets; | |
237 | struct dentry *aes_decrypt_packets; | |
238 | struct dentry *aes_encrypt_interrupt; | |
239 | struct dentry *aes_decrypt_interrupt; | |
240 | ||
241 | struct dentry *event_heart_beat; | |
242 | struct dentry *event_calibration; | |
243 | struct dentry *event_rx_mismatch; | |
244 | struct dentry *event_rx_mem_empty; | |
245 | struct dentry *event_rx_pool; | |
246 | struct dentry *event_oom_late; | |
247 | struct dentry *event_phy_transmit_error; | |
248 | struct dentry *event_tx_stuck; | |
249 | ||
250 | struct dentry *ps_pspoll_timeouts; | |
251 | struct dentry *ps_upsd_timeouts; | |
252 | struct dentry *ps_upsd_max_sptime; | |
253 | struct dentry *ps_upsd_max_apturn; | |
254 | struct dentry *ps_pspoll_max_apturn; | |
255 | struct dentry *ps_pspoll_utilization; | |
256 | struct dentry *ps_upsd_utilization; | |
257 | ||
258 | struct dentry *rxpipe_rx_prep_beacon_drop; | |
259 | struct dentry *rxpipe_descr_host_int_trig_rx_data; | |
260 | struct dentry *rxpipe_beacon_buffer_thres_host_int_trig_rx_data; | |
261 | struct dentry *rxpipe_missed_beacon_host_int_trig_rx_data; | |
262 | struct dentry *rxpipe_tx_xfr_host_int_trig_rx_data; | |
263 | ||
264 | struct dentry *tx_queue_len; | |
265 | ||
266 | struct dentry *retry_count; | |
267 | struct dentry *excessive_retries; | |
268 | }; | |
269 | ||
270 | #define NUM_TX_QUEUES 4 | |
271 | #define NUM_RX_PKT_DESC 8 | |
272 | ||
273 | /* FW status registers */ | |
274 | struct wl1271_fw_status { | |
275 | u32 intr; | |
276 | u8 fw_rx_counter; | |
277 | u8 drv_rx_counter; | |
278 | u8 reserved; | |
279 | u8 tx_results_counter; | |
280 | u32 rx_pkt_descs[NUM_RX_PKT_DESC]; | |
281 | u32 tx_released_blks[NUM_TX_QUEUES]; | |
282 | u32 fw_localtime; | |
283 | u32 padding[2]; | |
284 | } __attribute__ ((packed)); | |
285 | ||
286 | struct wl1271_rx_mem_pool_addr { | |
287 | u32 addr; | |
288 | u32 addr_extra; | |
289 | }; | |
290 | ||
291 | struct wl1271 { | |
292 | struct ieee80211_hw *hw; | |
293 | bool mac80211_registered; | |
294 | ||
295 | struct spi_device *spi; | |
296 | ||
297 | void (*set_power)(bool enable); | |
298 | int irq; | |
299 | ||
300 | spinlock_t wl_lock; | |
301 | ||
302 | enum wl1271_state state; | |
303 | struct mutex mutex; | |
304 | ||
305 | int physical_mem_addr; | |
306 | int physical_reg_addr; | |
307 | int virtual_mem_addr; | |
308 | int virtual_reg_addr; | |
309 | ||
310 | struct wl1271_chip chip; | |
311 | ||
312 | int cmd_box_addr; | |
313 | int event_box_addr; | |
314 | ||
315 | u8 *fw; | |
316 | size_t fw_len; | |
317 | u8 *nvs; | |
318 | size_t nvs_len; | |
319 | ||
320 | u8 bssid[ETH_ALEN]; | |
321 | u8 mac_addr[ETH_ALEN]; | |
322 | u8 bss_type; | |
323 | u8 ssid[IW_ESSID_MAX_SIZE + 1]; | |
324 | u8 ssid_len; | |
325 | u8 listen_int; | |
326 | int channel; | |
327 | ||
328 | struct wl1271_acx_mem_map *target_mem_map; | |
329 | ||
330 | /* Accounting for allocated / available TX blocks on HW */ | |
331 | u32 tx_blocks_freed[NUM_TX_QUEUES]; | |
332 | u32 tx_blocks_available; | |
333 | u8 tx_results_count; | |
334 | ||
335 | /* Transmitted TX packets counter for chipset interface */ | |
336 | int tx_packets_count; | |
337 | ||
338 | /* Time-offset between host and chipset clocks */ | |
339 | int time_offset; | |
340 | ||
341 | /* Session counter for the chipset */ | |
342 | int session_counter; | |
343 | ||
344 | /* Frames scheduled for transmission, not handled yet */ | |
345 | struct sk_buff_head tx_queue; | |
346 | bool tx_queue_stopped; | |
347 | ||
348 | struct work_struct tx_work; | |
c87dec9f | 349 | |
f5fc0f86 | 350 | struct work_struct filter_work; |
c87dec9f | 351 | struct wl1271_filter_params *filter_params; |
f5fc0f86 LC |
352 | |
353 | /* Pending TX frames */ | |
be7078c2 | 354 | struct sk_buff *tx_frames[ACX_TX_DESCRIPTORS]; |
f5fc0f86 | 355 | |
ac4e4ce5 JO |
356 | /* Security sequence number counters */ |
357 | u8 tx_security_last_seq; | |
358 | u16 tx_security_seq_16; | |
359 | u32 tx_security_seq_32; | |
360 | ||
f5fc0f86 LC |
361 | /* FW Rx counter */ |
362 | u32 rx_counter; | |
363 | ||
364 | /* Rx memory pool address */ | |
365 | struct wl1271_rx_mem_pool_addr rx_mem_pool_addr; | |
366 | ||
367 | /* The target interrupt mask */ | |
368 | struct work_struct irq_work; | |
369 | ||
370 | /* The mbox event mask */ | |
371 | u32 event_mask; | |
372 | ||
373 | /* Mailbox pointers */ | |
374 | u32 mbox_ptr[2]; | |
375 | ||
376 | /* Are we currently scanning */ | |
377 | bool scanning; | |
378 | ||
379 | /* Our association ID */ | |
380 | u16 aid; | |
381 | ||
d94cd297 JO |
382 | /* Beacon parameters */ |
383 | u16 beacon_int; | |
384 | u8 dtim_period; | |
385 | ||
386 | /* currently configured rate set */ | |
387 | u32 basic_rate_set; | |
388 | ||
8a5a37a6 JO |
389 | /* The current band */ |
390 | enum ieee80211_band band; | |
391 | ||
f5fc0f86 LC |
392 | /* Default key (for WEP) */ |
393 | u32 default_key; | |
394 | ||
395 | unsigned int rx_config; | |
396 | unsigned int rx_filter; | |
397 | ||
398 | /* is firmware in elp mode */ | |
399 | bool elp; | |
400 | ||
401 | struct completion *elp_compl; | |
37b70a81 | 402 | struct delayed_work elp_work; |
f5fc0f86 LC |
403 | |
404 | /* we can be in psm, but not in elp, we have to differentiate */ | |
405 | bool psm; | |
406 | ||
407 | /* PSM mode requested */ | |
408 | bool psm_requested; | |
409 | ||
410 | /* in dBm */ | |
411 | int power_level; | |
412 | ||
413 | struct wl1271_stats stats; | |
414 | struct wl1271_debugfs debugfs; | |
415 | ||
416 | u32 buffer_32; | |
417 | u32 buffer_cmd; | |
545f1da8 | 418 | u32 buffer_busyword[WL1271_BUSY_WORD_CNT]; |
f5fc0f86 LC |
419 | struct wl1271_rx_descriptor *rx_descriptor; |
420 | ||
421 | struct wl1271_fw_status *fw_status; | |
422 | struct wl1271_tx_hw_res_if *tx_res_if; | |
b771eee5 JO |
423 | |
424 | struct ieee80211_vif *vif; | |
d6e19d13 LC |
425 | |
426 | /* Used for a workaround to send disconnect before rejoining */ | |
427 | bool joined; | |
f5fc0f86 LC |
428 | }; |
429 | ||
430 | int wl1271_plt_start(struct wl1271 *wl); | |
431 | int wl1271_plt_stop(struct wl1271 *wl); | |
432 | ||
433 | #define JOIN_TIMEOUT 5000 /* 5000 milliseconds to join */ | |
434 | ||
435 | #define SESSION_COUNTER_MAX 7 /* maximum value for the session counter */ | |
436 | ||
437 | #define WL1271_DEFAULT_POWER_LEVEL 0 | |
438 | ||
439 | #define WL1271_TX_QUEUE_MAX_LENGTH 20 | |
440 | ||
441 | /* WL1271 needs a 200ms sleep after power on */ | |
442 | #define WL1271_POWER_ON_SLEEP 200 /* in miliseconds */ | |
443 | ||
444 | #endif |