wl1271: Update TX packet life time handling with higher resolution time
[deliverable/linux.git] / drivers / net / wireless / wl12xx / wl1271.h
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1/*
2 * This file is part of wl1271
3 *
4 * Copyright (C) 1998-2009 Texas Instruments. All rights reserved.
5 * Copyright (C) 2008-2009 Nokia Corporation
6 *
7 * Contact: Luciano Coelho <luciano.coelho@nokia.com>
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License
11 * version 2 as published by the Free Software Foundation.
12 *
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
16 * General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
21 * 02110-1301 USA
22 *
23 */
24
25#ifndef __WL1271_H__
26#define __WL1271_H__
27
28#include <linux/mutex.h>
29#include <linux/completion.h>
30#include <linux/spinlock.h>
31#include <linux/list.h>
32#include <linux/bitops.h>
33#include <net/mac80211.h>
34
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35#include "wl1271_conf.h"
36
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37#define DRIVER_NAME "wl1271"
38#define DRIVER_PREFIX DRIVER_NAME ": "
39
40enum {
41 DEBUG_NONE = 0,
42 DEBUG_IRQ = BIT(0),
43 DEBUG_SPI = BIT(1),
44 DEBUG_BOOT = BIT(2),
45 DEBUG_MAILBOX = BIT(3),
c8c90873 46 DEBUG_TESTMODE = BIT(4),
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47 DEBUG_EVENT = BIT(5),
48 DEBUG_TX = BIT(6),
49 DEBUG_RX = BIT(7),
50 DEBUG_SCAN = BIT(8),
51 DEBUG_CRYPT = BIT(9),
52 DEBUG_PSM = BIT(10),
53 DEBUG_MAC80211 = BIT(11),
54 DEBUG_CMD = BIT(12),
55 DEBUG_ACX = BIT(13),
56 DEBUG_ALL = ~0,
57};
58
59#define DEBUG_LEVEL (DEBUG_NONE)
60
61#define DEBUG_DUMP_LIMIT 1024
62
63#define wl1271_error(fmt, arg...) \
64 printk(KERN_ERR DRIVER_PREFIX "ERROR " fmt "\n", ##arg)
65
66#define wl1271_warning(fmt, arg...) \
67 printk(KERN_WARNING DRIVER_PREFIX "WARNING " fmt "\n", ##arg)
68
69#define wl1271_notice(fmt, arg...) \
70 printk(KERN_INFO DRIVER_PREFIX fmt "\n", ##arg)
71
72#define wl1271_info(fmt, arg...) \
73 printk(KERN_DEBUG DRIVER_PREFIX fmt "\n", ##arg)
74
75#define wl1271_debug(level, fmt, arg...) \
76 do { \
77 if (level & DEBUG_LEVEL) \
78 printk(KERN_DEBUG DRIVER_PREFIX fmt "\n", ##arg); \
79 } while (0)
80
81#define wl1271_dump(level, prefix, buf, len) \
82 do { \
83 if (level & DEBUG_LEVEL) \
84 print_hex_dump(KERN_DEBUG, DRIVER_PREFIX prefix, \
85 DUMP_PREFIX_OFFSET, 16, 1, \
86 buf, \
87 min_t(size_t, len, DEBUG_DUMP_LIMIT), \
88 0); \
89 } while (0)
90
91#define wl1271_dump_ascii(level, prefix, buf, len) \
92 do { \
93 if (level & DEBUG_LEVEL) \
94 print_hex_dump(KERN_DEBUG, DRIVER_PREFIX prefix, \
95 DUMP_PREFIX_OFFSET, 16, 1, \
96 buf, \
97 min_t(size_t, len, DEBUG_DUMP_LIMIT), \
98 true); \
99 } while (0)
100
101#define WL1271_DEFAULT_RX_CONFIG (CFG_UNI_FILTER_EN | \
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102 CFG_BSSID_FILTER_EN | \
103 CFG_MC_FILTER_EN)
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104
105#define WL1271_DEFAULT_RX_FILTER (CFG_RX_RCTS_ACK | CFG_RX_PRSP_EN | \
106 CFG_RX_MGMT_EN | CFG_RX_DATA_EN | \
107 CFG_RX_CTL_EN | CFG_RX_BCN_EN | \
108 CFG_RX_AUTH_EN | CFG_RX_ASSOC_EN)
109
110#define WL1271_FW_NAME "wl1271-fw.bin"
111#define WL1271_NVS_NAME "wl1271-nvs.bin"
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112
113/* NVS data structure */
114#define WL1271_NVS_SECTION_SIZE 468
115
116#define WL1271_NVS_GENERAL_PARAMS_SIZE 57
117#define WL1271_NVS_GENERAL_PARAMS_SIZE_PADDED \
118 (WL1271_NVS_GENERAL_PARAMS_SIZE + 1)
119#define WL1271_NVS_STAT_RADIO_PARAMS_SIZE 17
120#define WL1271_NVS_STAT_RADIO_PARAMS_SIZE_PADDED \
121 (WL1271_NVS_STAT_RADIO_PARAMS_SIZE + 1)
122#define WL1271_NVS_DYN_RADIO_PARAMS_SIZE 65
123#define WL1271_NVS_DYN_RADIO_PARAMS_SIZE_PADDED \
124 (WL1271_NVS_DYN_RADIO_PARAMS_SIZE + 1)
125#define WL1271_NVS_FEM_COUNT 2
126#define WL1271_NVS_INI_SPARE_SIZE 124
127
128struct wl1271_nvs_file {
129 /* NVS section */
130 u8 nvs[WL1271_NVS_SECTION_SIZE];
131
132 /* INI section */
133 u8 general_params[WL1271_NVS_GENERAL_PARAMS_SIZE_PADDED];
134 u8 stat_radio_params[WL1271_NVS_STAT_RADIO_PARAMS_SIZE_PADDED];
135 u8 dyn_radio_params[WL1271_NVS_FEM_COUNT]
136 [WL1271_NVS_DYN_RADIO_PARAMS_SIZE_PADDED];
137 u8 ini_spare[WL1271_NVS_INI_SPARE_SIZE];
138} __attribute__ ((packed));
f5fc0f86 139
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140/*
141 * Enable/disable 802.11a support for WL1273
142 */
143#undef WL1271_80211A_ENABLED
144
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145/*
146 * FIXME: for the wl1271, a busy word count of 1 here will result in a more
147 * optimal SPI interface. There is some SPI bug however, causing RXS time outs
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148 * with this mode occasionally on boot, so lets have three for now. A value of
149 * three should make sure, that the chipset will always be ready, though this
150 * will impact throughput and latencies slightly.
545f1da8 151 */
c6d5d06e 152#define WL1271_BUSY_WORD_CNT 3
545f1da8 153#define WL1271_BUSY_WORD_LEN (WL1271_BUSY_WORD_CNT * sizeof(u32))
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154
155#define WL1271_ELP_HW_STATE_ASLEEP 0
156#define WL1271_ELP_HW_STATE_IRQ 1
157
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158#define WL1271_DEFAULT_BEACON_INT 100
159#define WL1271_DEFAULT_DTIM_PERIOD 1
160
c87dec9f 161#define ACX_TX_DESCRIPTORS 32
be7078c2 162
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163enum wl1271_state {
164 WL1271_STATE_OFF,
165 WL1271_STATE_ON,
166 WL1271_STATE_PLT,
167};
168
169enum wl1271_partition_type {
170 PART_DOWN,
171 PART_WORK,
172 PART_DRPW,
173
174 PART_TABLE_LEN
175};
176
177struct wl1271_partition {
178 u32 size;
179 u32 start;
180};
181
182struct wl1271_partition_set {
183 struct wl1271_partition mem;
184 struct wl1271_partition reg;
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185 struct wl1271_partition mem2;
186 struct wl1271_partition mem3;
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187};
188
189struct wl1271;
190
191/* FIXME: I'm not sure about this structure name */
192struct wl1271_chip {
193 u32 id;
194 char fw_ver[21];
195};
196
197struct wl1271_stats {
198 struct acx_statistics *fw_stats;
199 unsigned long fw_stats_update;
200
201 unsigned int retry_count;
202 unsigned int excessive_retries;
203};
204
205struct wl1271_debugfs {
206 struct dentry *rootdir;
207 struct dentry *fw_statistics;
208
209 struct dentry *tx_internal_desc_overflow;
210
211 struct dentry *rx_out_of_mem;
212 struct dentry *rx_hdr_overflow;
213 struct dentry *rx_hw_stuck;
214 struct dentry *rx_dropped;
215 struct dentry *rx_fcs_err;
216 struct dentry *rx_xfr_hint_trig;
217 struct dentry *rx_path_reset;
218 struct dentry *rx_reset_counter;
219
220 struct dentry *dma_rx_requested;
221 struct dentry *dma_rx_errors;
222 struct dentry *dma_tx_requested;
223 struct dentry *dma_tx_errors;
224
225 struct dentry *isr_cmd_cmplt;
226 struct dentry *isr_fiqs;
227 struct dentry *isr_rx_headers;
228 struct dentry *isr_rx_mem_overflow;
229 struct dentry *isr_rx_rdys;
230 struct dentry *isr_irqs;
231 struct dentry *isr_tx_procs;
232 struct dentry *isr_decrypt_done;
233 struct dentry *isr_dma0_done;
234 struct dentry *isr_dma1_done;
235 struct dentry *isr_tx_exch_complete;
236 struct dentry *isr_commands;
237 struct dentry *isr_rx_procs;
238 struct dentry *isr_hw_pm_mode_changes;
239 struct dentry *isr_host_acknowledges;
240 struct dentry *isr_pci_pm;
241 struct dentry *isr_wakeups;
242 struct dentry *isr_low_rssi;
243
244 struct dentry *wep_addr_key_count;
245 struct dentry *wep_default_key_count;
246 /* skipping wep.reserved */
247 struct dentry *wep_key_not_found;
248 struct dentry *wep_decrypt_fail;
249 struct dentry *wep_packets;
250 struct dentry *wep_interrupt;
251
252 struct dentry *pwr_ps_enter;
253 struct dentry *pwr_elp_enter;
254 struct dentry *pwr_missing_bcns;
255 struct dentry *pwr_wake_on_host;
256 struct dentry *pwr_wake_on_timer_exp;
257 struct dentry *pwr_tx_with_ps;
258 struct dentry *pwr_tx_without_ps;
259 struct dentry *pwr_rcvd_beacons;
260 struct dentry *pwr_power_save_off;
261 struct dentry *pwr_enable_ps;
262 struct dentry *pwr_disable_ps;
263 struct dentry *pwr_fix_tsf_ps;
264 /* skipping cont_miss_bcns_spread for now */
265 struct dentry *pwr_rcvd_awake_beacons;
266
267 struct dentry *mic_rx_pkts;
268 struct dentry *mic_calc_failure;
269
270 struct dentry *aes_encrypt_fail;
271 struct dentry *aes_decrypt_fail;
272 struct dentry *aes_encrypt_packets;
273 struct dentry *aes_decrypt_packets;
274 struct dentry *aes_encrypt_interrupt;
275 struct dentry *aes_decrypt_interrupt;
276
277 struct dentry *event_heart_beat;
278 struct dentry *event_calibration;
279 struct dentry *event_rx_mismatch;
280 struct dentry *event_rx_mem_empty;
281 struct dentry *event_rx_pool;
282 struct dentry *event_oom_late;
283 struct dentry *event_phy_transmit_error;
284 struct dentry *event_tx_stuck;
285
286 struct dentry *ps_pspoll_timeouts;
287 struct dentry *ps_upsd_timeouts;
288 struct dentry *ps_upsd_max_sptime;
289 struct dentry *ps_upsd_max_apturn;
290 struct dentry *ps_pspoll_max_apturn;
291 struct dentry *ps_pspoll_utilization;
292 struct dentry *ps_upsd_utilization;
293
294 struct dentry *rxpipe_rx_prep_beacon_drop;
295 struct dentry *rxpipe_descr_host_int_trig_rx_data;
296 struct dentry *rxpipe_beacon_buffer_thres_host_int_trig_rx_data;
297 struct dentry *rxpipe_missed_beacon_host_int_trig_rx_data;
298 struct dentry *rxpipe_tx_xfr_host_int_trig_rx_data;
299
300 struct dentry *tx_queue_len;
301
302 struct dentry *retry_count;
303 struct dentry *excessive_retries;
98b2a684 304 struct dentry *gpio_power;
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305};
306
307#define NUM_TX_QUEUES 4
308#define NUM_RX_PKT_DESC 8
309
310/* FW status registers */
311struct wl1271_fw_status {
d0f63b20 312 __le32 intr;
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313 u8 fw_rx_counter;
314 u8 drv_rx_counter;
315 u8 reserved;
316 u8 tx_results_counter;
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317 __le32 rx_pkt_descs[NUM_RX_PKT_DESC];
318 __le32 tx_released_blks[NUM_TX_QUEUES];
319 __le32 fw_localtime;
320 __le32 padding[2];
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321} __attribute__ ((packed));
322
323struct wl1271_rx_mem_pool_addr {
324 u32 addr;
325 u32 addr_extra;
326};
327
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328struct wl1271_scan {
329 u8 state;
330 u8 ssid[IW_ESSID_MAX_SIZE+1];
331 size_t ssid_len;
332 u8 active;
333 u8 high_prio;
334 u8 probe_requests;
335};
336
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337struct wl1271_if_operations {
338 void (*read)(struct wl1271 *wl, int addr, void *buf, size_t len,
339 bool fixed);
340 void (*write)(struct wl1271 *wl, int addr, void *buf, size_t len,
341 bool fixed);
342 void (*reset)(struct wl1271 *wl);
343 void (*init)(struct wl1271 *wl);
344 struct device* (*dev)(struct wl1271 *wl);
345 void (*enable_irq)(struct wl1271 *wl);
346 void (*disable_irq)(struct wl1271 *wl);
347};
348
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349struct wl1271 {
350 struct ieee80211_hw *hw;
351 bool mac80211_registered;
352
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353 void *if_priv;
354
355 struct wl1271_if_operations *if_ops;
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356
357 void (*set_power)(bool enable);
358 int irq;
359
360 spinlock_t wl_lock;
361
362 enum wl1271_state state;
363 struct mutex mutex;
364
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365#define WL1271_FLAG_STA_RATES_CHANGED (0)
366#define WL1271_FLAG_STA_ASSOCIATED (1)
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367#define WL1271_FLAG_JOINED (2)
368#define WL1271_FLAG_GPIO_POWER (3)
369#define WL1271_FLAG_TX_QUEUE_STOPPED (4)
370#define WL1271_FLAG_SCANNING (5)
371#define WL1271_FLAG_IN_ELP (6)
372#define WL1271_FLAG_PSM (7)
373#define WL1271_FLAG_PSM_REQUESTED (8)
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374#define WL1271_FLAG_IRQ_PENDING (9)
375#define WL1271_FLAG_IRQ_RUNNING (10)
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376 unsigned long flags;
377
451de97a 378 struct wl1271_partition_set part;
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379
380 struct wl1271_chip chip;
381
382 int cmd_box_addr;
383 int event_box_addr;
384
385 u8 *fw;
386 size_t fw_len;
152ee6e0 387 struct wl1271_nvs_file *nvs;
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388
389 u8 bssid[ETH_ALEN];
390 u8 mac_addr[ETH_ALEN];
391 u8 bss_type;
392 u8 ssid[IW_ESSID_MAX_SIZE + 1];
393 u8 ssid_len;
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394 int channel;
395
396 struct wl1271_acx_mem_map *target_mem_map;
397
398 /* Accounting for allocated / available TX blocks on HW */
399 u32 tx_blocks_freed[NUM_TX_QUEUES];
400 u32 tx_blocks_available;
ffb591cd 401 u32 tx_results_count;
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402
403 /* Transmitted TX packets counter for chipset interface */
ffb591cd 404 u32 tx_packets_count;
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405
406 /* Time-offset between host and chipset clocks */
ac5e1e39 407 s64 time_offset;
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408
409 /* Session counter for the chipset */
410 int session_counter;
411
412 /* Frames scheduled for transmission, not handled yet */
413 struct sk_buff_head tx_queue;
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414
415 struct work_struct tx_work;
c87dec9f 416
f5fc0f86 417 /* Pending TX frames */
be7078c2 418 struct sk_buff *tx_frames[ACX_TX_DESCRIPTORS];
f5fc0f86 419
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420 /* Security sequence number counters */
421 u8 tx_security_last_seq;
422 u16 tx_security_seq_16;
423 u32 tx_security_seq_32;
424
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425 /* FW Rx counter */
426 u32 rx_counter;
427
428 /* Rx memory pool address */
429 struct wl1271_rx_mem_pool_addr rx_mem_pool_addr;
430
431 /* The target interrupt mask */
432 struct work_struct irq_work;
433
434 /* The mbox event mask */
435 u32 event_mask;
436
437 /* Mailbox pointers */
438 u32 mbox_ptr[2];
439
440 /* Are we currently scanning */
abb0b3bf 441 struct wl1271_scan scan;
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442
443 /* Our association ID */
444 u16 aid;
445
d94cd297 446 /* currently configured rate set */
830fb67b 447 u32 sta_rate_set;
d94cd297 448 u32 basic_rate_set;
830fb67b 449 u32 rate_set;
d94cd297 450
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451 /* The current band */
452 enum ieee80211_band band;
453
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454 /* Default key (for WEP) */
455 u32 default_key;
456
457 unsigned int rx_config;
458 unsigned int rx_filter;
459
f5fc0f86 460 struct completion *elp_compl;
37b70a81 461 struct delayed_work elp_work;
f5fc0f86 462
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463 /* retry counter for PSM entries */
464 u8 psm_entry_retry;
465
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466 /* in dBm */
467 int power_level;
468
469 struct wl1271_stats stats;
470 struct wl1271_debugfs debugfs;
471
472 u32 buffer_32;
473 u32 buffer_cmd;
545f1da8 474 u32 buffer_busyword[WL1271_BUSY_WORD_CNT];
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475
476 struct wl1271_fw_status *fw_status;
477 struct wl1271_tx_hw_res_if *tx_res_if;
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478
479 struct ieee80211_vif *vif;
d6e19d13 480
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481 /* Current chipset configuration */
482 struct conf_drv_settings conf;
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483
484 struct list_head list;
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485};
486
487int wl1271_plt_start(struct wl1271 *wl);
488int wl1271_plt_stop(struct wl1271 *wl);
489
490#define JOIN_TIMEOUT 5000 /* 5000 milliseconds to join */
491
492#define SESSION_COUNTER_MAX 7 /* maximum value for the session counter */
493
494#define WL1271_DEFAULT_POWER_LEVEL 0
495
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496#define WL1271_TX_QUEUE_LOW_WATERMARK 10
497#define WL1271_TX_QUEUE_HIGH_WATERMARK 25
f5fc0f86 498
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499/* WL1271 needs a 200ms sleep after power on, and a 20ms sleep before power
500 on in case is has been shut down shortly before */
501#define WL1271_PRE_POWER_ON_SLEEP 20 /* in miliseconds */
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502#define WL1271_POWER_ON_SLEEP 200 /* in miliseconds */
503
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504static inline bool wl1271_11a_enabled(void)
505{
152ee6e0 506 /* FIXME: this could be determined based on the NVS-INI file */
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507#ifdef WL1271_80211A_ENABLED
508 return true;
509#else
510 return false;
511#endif
512}
513
f5fc0f86 514#endif
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