Commit | Line | Data |
---|---|---|
66bb42fd | 1 | /* ZD1211 USB-WLAN driver for Linux |
459c51ad | 2 | * |
66bb42fd DD |
3 | * Copyright (C) 2005-2007 Ulrich Kunitz <kune@deine-taler.de> |
4 | * Copyright (C) 2006-2007 Daniel Drake <dsd@gentoo.org> | |
5 | * Copyright (C) 2006-2007 Michael Wu <flamingice@sourmilk.net> | |
e83a1070 | 6 | * Copyright (C) 2007-2008 Luis R. Rodriguez <mcgrof@winlab.rutgers.edu> |
e85d0918 DD |
7 | * |
8 | * This program is free software; you can redistribute it and/or modify | |
9 | * it under the terms of the GNU General Public License as published by | |
10 | * the Free Software Foundation; either version 2 of the License, or | |
11 | * (at your option) any later version. | |
12 | * | |
13 | * This program is distributed in the hope that it will be useful, | |
14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | * GNU General Public License for more details. | |
17 | * | |
18 | * You should have received a copy of the GNU General Public License | |
19 | * along with this program; if not, write to the Free Software | |
20 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
21 | */ | |
22 | ||
23 | #include <linux/netdevice.h> | |
24 | #include <linux/etherdevice.h> | |
e85d0918 DD |
25 | #include <linux/usb.h> |
26 | #include <linux/jiffies.h> | |
27 | #include <net/ieee80211_radiotap.h> | |
28 | ||
29 | #include "zd_def.h" | |
30 | #include "zd_chip.h" | |
31 | #include "zd_mac.h" | |
e85d0918 | 32 | #include "zd_rf.h" |
e85d0918 | 33 | |
e83a1070 LR |
34 | struct zd_reg_alpha2_map { |
35 | u32 reg; | |
36 | char alpha2[2]; | |
37 | }; | |
38 | ||
39 | static struct zd_reg_alpha2_map reg_alpha2_map[] = { | |
40 | { ZD_REGDOMAIN_FCC, "US" }, | |
41 | { ZD_REGDOMAIN_IC, "CA" }, | |
42 | { ZD_REGDOMAIN_ETSI, "DE" }, /* Generic ETSI, use most restrictive */ | |
43 | { ZD_REGDOMAIN_JAPAN, "JP" }, | |
44 | { ZD_REGDOMAIN_JAPAN_ADD, "JP" }, | |
45 | { ZD_REGDOMAIN_SPAIN, "ES" }, | |
46 | { ZD_REGDOMAIN_FRANCE, "FR" }, | |
47 | }; | |
48 | ||
459c51ad DD |
49 | /* This table contains the hardware specific values for the modulation rates. */ |
50 | static const struct ieee80211_rate zd_rates[] = { | |
8318d78a JB |
51 | { .bitrate = 10, |
52 | .hw_value = ZD_CCK_RATE_1M, }, | |
53 | { .bitrate = 20, | |
54 | .hw_value = ZD_CCK_RATE_2M, | |
55 | .hw_value_short = ZD_CCK_RATE_2M | ZD_CCK_PREA_SHORT, | |
56 | .flags = IEEE80211_RATE_SHORT_PREAMBLE }, | |
57 | { .bitrate = 55, | |
58 | .hw_value = ZD_CCK_RATE_5_5M, | |
59 | .hw_value_short = ZD_CCK_RATE_5_5M | ZD_CCK_PREA_SHORT, | |
60 | .flags = IEEE80211_RATE_SHORT_PREAMBLE }, | |
61 | { .bitrate = 110, | |
62 | .hw_value = ZD_CCK_RATE_11M, | |
63 | .hw_value_short = ZD_CCK_RATE_11M | ZD_CCK_PREA_SHORT, | |
64 | .flags = IEEE80211_RATE_SHORT_PREAMBLE }, | |
65 | { .bitrate = 60, | |
66 | .hw_value = ZD_OFDM_RATE_6M, | |
67 | .flags = 0 }, | |
68 | { .bitrate = 90, | |
69 | .hw_value = ZD_OFDM_RATE_9M, | |
70 | .flags = 0 }, | |
71 | { .bitrate = 120, | |
72 | .hw_value = ZD_OFDM_RATE_12M, | |
73 | .flags = 0 }, | |
74 | { .bitrate = 180, | |
75 | .hw_value = ZD_OFDM_RATE_18M, | |
76 | .flags = 0 }, | |
77 | { .bitrate = 240, | |
78 | .hw_value = ZD_OFDM_RATE_24M, | |
79 | .flags = 0 }, | |
80 | { .bitrate = 360, | |
81 | .hw_value = ZD_OFDM_RATE_36M, | |
82 | .flags = 0 }, | |
83 | { .bitrate = 480, | |
84 | .hw_value = ZD_OFDM_RATE_48M, | |
85 | .flags = 0 }, | |
86 | { .bitrate = 540, | |
87 | .hw_value = ZD_OFDM_RATE_54M, | |
88 | .flags = 0 }, | |
459c51ad DD |
89 | }; |
90 | ||
91 | static const struct ieee80211_channel zd_channels[] = { | |
8318d78a JB |
92 | { .center_freq = 2412, .hw_value = 1 }, |
93 | { .center_freq = 2417, .hw_value = 2 }, | |
94 | { .center_freq = 2422, .hw_value = 3 }, | |
95 | { .center_freq = 2427, .hw_value = 4 }, | |
96 | { .center_freq = 2432, .hw_value = 5 }, | |
97 | { .center_freq = 2437, .hw_value = 6 }, | |
98 | { .center_freq = 2442, .hw_value = 7 }, | |
99 | { .center_freq = 2447, .hw_value = 8 }, | |
100 | { .center_freq = 2452, .hw_value = 9 }, | |
101 | { .center_freq = 2457, .hw_value = 10 }, | |
102 | { .center_freq = 2462, .hw_value = 11 }, | |
103 | { .center_freq = 2467, .hw_value = 12 }, | |
104 | { .center_freq = 2472, .hw_value = 13 }, | |
105 | { .center_freq = 2484, .hw_value = 14 }, | |
459c51ad | 106 | }; |
e85d0918 | 107 | |
583afd1e UK |
108 | static void housekeeping_init(struct zd_mac *mac); |
109 | static void housekeeping_enable(struct zd_mac *mac); | |
110 | static void housekeeping_disable(struct zd_mac *mac); | |
111 | ||
e83a1070 LR |
112 | static int zd_reg2alpha2(u8 regdomain, char *alpha2) |
113 | { | |
114 | unsigned int i; | |
115 | struct zd_reg_alpha2_map *reg_map; | |
116 | for (i = 0; i < ARRAY_SIZE(reg_alpha2_map); i++) { | |
117 | reg_map = ®_alpha2_map[i]; | |
118 | if (regdomain == reg_map->reg) { | |
119 | alpha2[0] = reg_map->alpha2[0]; | |
120 | alpha2[1] = reg_map->alpha2[1]; | |
121 | return 0; | |
122 | } | |
123 | } | |
124 | return 1; | |
125 | } | |
126 | ||
459c51ad | 127 | int zd_mac_preinit_hw(struct ieee80211_hw *hw) |
e85d0918 DD |
128 | { |
129 | int r; | |
e85d0918 | 130 | u8 addr[ETH_ALEN]; |
459c51ad | 131 | struct zd_mac *mac = zd_hw_mac(hw); |
74553aed DD |
132 | |
133 | r = zd_chip_read_mac_addr_fw(&mac->chip, addr); | |
134 | if (r) | |
135 | return r; | |
136 | ||
459c51ad DD |
137 | SET_IEEE80211_PERM_ADDR(hw, addr); |
138 | ||
74553aed DD |
139 | return 0; |
140 | } | |
141 | ||
459c51ad | 142 | int zd_mac_init_hw(struct ieee80211_hw *hw) |
74553aed DD |
143 | { |
144 | int r; | |
459c51ad | 145 | struct zd_mac *mac = zd_hw_mac(hw); |
74553aed | 146 | struct zd_chip *chip = &mac->chip; |
e83a1070 | 147 | char alpha2[2]; |
e85d0918 DD |
148 | u8 default_regdomain; |
149 | ||
150 | r = zd_chip_enable_int(chip); | |
151 | if (r) | |
152 | goto out; | |
74553aed | 153 | r = zd_chip_init_hw(chip); |
e85d0918 DD |
154 | if (r) |
155 | goto disable_int; | |
156 | ||
e85d0918 | 157 | ZD_ASSERT(!irqs_disabled()); |
e85d0918 DD |
158 | |
159 | r = zd_read_regdomain(chip, &default_regdomain); | |
160 | if (r) | |
161 | goto disable_int; | |
e85d0918 DD |
162 | spin_lock_irq(&mac->lock); |
163 | mac->regdomain = mac->default_regdomain = default_regdomain; | |
164 | spin_unlock_irq(&mac->lock); | |
e85d0918 | 165 | |
40da08bc DD |
166 | /* We must inform the device that we are doing encryption/decryption in |
167 | * software at the moment. */ | |
168 | r = zd_set_encryption_type(chip, ENC_SNIFFER); | |
e85d0918 DD |
169 | if (r) |
170 | goto disable_int; | |
171 | ||
e83a1070 LR |
172 | r = zd_reg2alpha2(mac->regdomain, alpha2); |
173 | if (!r) | |
174 | regulatory_hint(hw->wiphy, alpha2, NULL); | |
e85d0918 DD |
175 | |
176 | r = 0; | |
177 | disable_int: | |
178 | zd_chip_disable_int(chip); | |
179 | out: | |
180 | return r; | |
181 | } | |
182 | ||
183 | void zd_mac_clear(struct zd_mac *mac) | |
184 | { | |
9cdac965 | 185 | flush_workqueue(zd_workqueue); |
e85d0918 | 186 | zd_chip_clear(&mac->chip); |
c48cf125 UK |
187 | ZD_ASSERT(!spin_is_locked(&mac->lock)); |
188 | ZD_MEMCLEAR(mac, sizeof(struct zd_mac)); | |
e85d0918 DD |
189 | } |
190 | ||
c5691235 | 191 | static int set_rx_filter(struct zd_mac *mac) |
e85d0918 | 192 | { |
459c51ad DD |
193 | unsigned long flags; |
194 | u32 filter = STA_RX_FILTER; | |
e85d0918 | 195 | |
459c51ad DD |
196 | spin_lock_irqsave(&mac->lock, flags); |
197 | if (mac->pass_ctrl) | |
198 | filter |= RX_FILTER_CTRL; | |
199 | spin_unlock_irqrestore(&mac->lock, flags); | |
200 | ||
201 | return zd_iowrite32(&mac->chip, CR_RX_FILTER, filter); | |
c5691235 UK |
202 | } |
203 | ||
204 | static int set_mc_hash(struct zd_mac *mac) | |
205 | { | |
206 | struct zd_mc_hash hash; | |
c5691235 | 207 | zd_mc_clear(&hash); |
c5691235 UK |
208 | return zd_chip_set_multicast_hash(&mac->chip, &hash); |
209 | } | |
210 | ||
459c51ad | 211 | static int zd_op_start(struct ieee80211_hw *hw) |
e85d0918 | 212 | { |
459c51ad | 213 | struct zd_mac *mac = zd_hw_mac(hw); |
e85d0918 | 214 | struct zd_chip *chip = &mac->chip; |
74553aed | 215 | struct zd_usb *usb = &chip->usb; |
e85d0918 DD |
216 | int r; |
217 | ||
74553aed DD |
218 | if (!usb->initialized) { |
219 | r = zd_usb_init_hw(usb); | |
220 | if (r) | |
221 | goto out; | |
222 | } | |
223 | ||
e85d0918 DD |
224 | r = zd_chip_enable_int(chip); |
225 | if (r < 0) | |
226 | goto out; | |
227 | ||
228 | r = zd_chip_set_basic_rates(chip, CR_RATES_80211B | CR_RATES_80211G); | |
229 | if (r < 0) | |
230 | goto disable_int; | |
c5691235 | 231 | r = set_rx_filter(mac); |
c5691235 UK |
232 | if (r) |
233 | goto disable_int; | |
234 | r = set_mc_hash(mac); | |
e85d0918 DD |
235 | if (r) |
236 | goto disable_int; | |
237 | r = zd_chip_switch_radio_on(chip); | |
238 | if (r < 0) | |
239 | goto disable_int; | |
459c51ad | 240 | r = zd_chip_enable_rxtx(chip); |
e85d0918 DD |
241 | if (r < 0) |
242 | goto disable_radio; | |
243 | r = zd_chip_enable_hwint(chip); | |
244 | if (r < 0) | |
459c51ad | 245 | goto disable_rxtx; |
e85d0918 | 246 | |
583afd1e | 247 | housekeeping_enable(mac); |
e85d0918 | 248 | return 0; |
459c51ad DD |
249 | disable_rxtx: |
250 | zd_chip_disable_rxtx(chip); | |
e85d0918 DD |
251 | disable_radio: |
252 | zd_chip_switch_radio_off(chip); | |
253 | disable_int: | |
254 | zd_chip_disable_int(chip); | |
255 | out: | |
256 | return r; | |
257 | } | |
258 | ||
459c51ad DD |
259 | static void zd_op_stop(struct ieee80211_hw *hw) |
260 | { | |
261 | struct zd_mac *mac = zd_hw_mac(hw); | |
262 | struct zd_chip *chip = &mac->chip; | |
263 | struct sk_buff *skb; | |
264 | struct sk_buff_head *ack_wait_queue = &mac->ack_wait_queue; | |
c9a4b35d | 265 | |
459c51ad | 266 | /* The order here deliberately is a little different from the open() |
e85d0918 | 267 | * method, since we need to make sure there is no opportunity for RX |
459c51ad | 268 | * frames to be processed by mac80211 after we have stopped it. |
e85d0918 DD |
269 | */ |
270 | ||
459c51ad | 271 | zd_chip_disable_rxtx(chip); |
583afd1e | 272 | housekeeping_disable(mac); |
b1382ede | 273 | flush_workqueue(zd_workqueue); |
b1382ede | 274 | |
e85d0918 DD |
275 | zd_chip_disable_hwint(chip); |
276 | zd_chip_switch_radio_off(chip); | |
277 | zd_chip_disable_int(chip); | |
278 | ||
e85d0918 | 279 | |
459c51ad | 280 | while ((skb = skb_dequeue(ack_wait_queue))) |
e039fa4a | 281 | dev_kfree_skb_any(skb); |
e85d0918 DD |
282 | } |
283 | ||
459c51ad DD |
284 | /** |
285 | * tx_status - reports tx status of a packet if required | |
286 | * @hw - a &struct ieee80211_hw pointer | |
287 | * @skb - a sk-buffer | |
e039fa4a JB |
288 | * @flags: extra flags to set in the TX status info |
289 | * @ackssi: ACK signal strength | |
459c51ad DD |
290 | * @success - True for successfull transmission of the frame |
291 | * | |
292 | * This information calls ieee80211_tx_status_irqsafe() if required by the | |
293 | * control information. It copies the control information into the status | |
294 | * information. | |
295 | * | |
296 | * If no status information has been requested, the skb is freed. | |
297 | */ | |
298 | static void tx_status(struct ieee80211_hw *hw, struct sk_buff *skb, | |
e039fa4a | 299 | u32 flags, int ackssi, bool success) |
b1382ede | 300 | { |
e039fa4a JB |
301 | struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb); |
302 | ||
303 | memset(&info->status, 0, sizeof(info->status)); | |
b1382ede | 304 | |
459c51ad | 305 | if (!success) |
e039fa4a JB |
306 | info->status.excessive_retries = 1; |
307 | info->flags |= flags; | |
308 | info->status.ack_signal = ackssi; | |
309 | ieee80211_tx_status_irqsafe(hw, skb); | |
b1382ede DD |
310 | } |
311 | ||
459c51ad DD |
312 | /** |
313 | * zd_mac_tx_failed - callback for failed frames | |
314 | * @dev: the mac80211 wireless device | |
315 | * | |
316 | * This function is called if a frame couldn't be succesfully be | |
317 | * transferred. The first frame from the tx queue, will be selected and | |
318 | * reported as error to the upper layers. | |
319 | */ | |
320 | void zd_mac_tx_failed(struct ieee80211_hw *hw) | |
b1382ede | 321 | { |
459c51ad DD |
322 | struct sk_buff_head *q = &zd_hw_mac(hw)->ack_wait_queue; |
323 | struct sk_buff *skb; | |
b1382ede | 324 | |
459c51ad DD |
325 | skb = skb_dequeue(q); |
326 | if (skb == NULL) | |
327 | return; | |
5078ed50 | 328 | |
e039fa4a | 329 | tx_status(hw, skb, 0, 0, 0); |
b1382ede DD |
330 | } |
331 | ||
459c51ad DD |
332 | /** |
333 | * zd_mac_tx_to_dev - callback for USB layer | |
334 | * @skb: a &sk_buff pointer | |
335 | * @error: error value, 0 if transmission successful | |
336 | * | |
337 | * Informs the MAC layer that the frame has successfully transferred to the | |
338 | * device. If an ACK is required and the transfer to the device has been | |
339 | * successful, the packets are put on the @ack_wait_queue with | |
340 | * the control set removed. | |
341 | */ | |
342 | void zd_mac_tx_to_dev(struct sk_buff *skb, int error) | |
343 | { | |
e039fa4a JB |
344 | struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb); |
345 | struct ieee80211_hw *hw = info->driver_data[0]; | |
b1382ede | 346 | |
e039fa4a JB |
347 | skb_pull(skb, sizeof(struct zd_ctrlset)); |
348 | if (unlikely(error || | |
349 | (info->flags & IEEE80211_TX_CTL_NO_ACK))) { | |
350 | tx_status(hw, skb, 0, 0, !error); | |
459c51ad | 351 | } else { |
e039fa4a JB |
352 | struct sk_buff_head *q = |
353 | &zd_hw_mac(hw)->ack_wait_queue; | |
354 | ||
355 | skb_queue_tail(q, skb); | |
356 | while (skb_queue_len(q) > ZD_MAC_MAX_ACK_WAITERS) | |
357 | zd_mac_tx_failed(hw); | |
e85d0918 | 358 | } |
e85d0918 DD |
359 | } |
360 | ||
b1cd8416 | 361 | static int zd_calc_tx_length_us(u8 *service, u8 zd_rate, u16 tx_length) |
e85d0918 | 362 | { |
64f222cc | 363 | /* ZD_PURE_RATE() must be used to remove the modulation type flag of |
459c51ad DD |
364 | * the zd-rate values. |
365 | */ | |
e85d0918 | 366 | static const u8 rate_divisor[] = { |
459c51ad DD |
367 | [ZD_PURE_RATE(ZD_CCK_RATE_1M)] = 1, |
368 | [ZD_PURE_RATE(ZD_CCK_RATE_2M)] = 2, | |
369 | /* Bits must be doubled. */ | |
370 | [ZD_PURE_RATE(ZD_CCK_RATE_5_5M)] = 11, | |
371 | [ZD_PURE_RATE(ZD_CCK_RATE_11M)] = 11, | |
372 | [ZD_PURE_RATE(ZD_OFDM_RATE_6M)] = 6, | |
373 | [ZD_PURE_RATE(ZD_OFDM_RATE_9M)] = 9, | |
374 | [ZD_PURE_RATE(ZD_OFDM_RATE_12M)] = 12, | |
375 | [ZD_PURE_RATE(ZD_OFDM_RATE_18M)] = 18, | |
376 | [ZD_PURE_RATE(ZD_OFDM_RATE_24M)] = 24, | |
377 | [ZD_PURE_RATE(ZD_OFDM_RATE_36M)] = 36, | |
378 | [ZD_PURE_RATE(ZD_OFDM_RATE_48M)] = 48, | |
379 | [ZD_PURE_RATE(ZD_OFDM_RATE_54M)] = 54, | |
e85d0918 DD |
380 | }; |
381 | ||
382 | u32 bits = (u32)tx_length * 8; | |
383 | u32 divisor; | |
384 | ||
64f222cc | 385 | divisor = rate_divisor[ZD_PURE_RATE(zd_rate)]; |
e85d0918 DD |
386 | if (divisor == 0) |
387 | return -EINVAL; | |
388 | ||
b1cd8416 DD |
389 | switch (zd_rate) { |
390 | case ZD_CCK_RATE_5_5M: | |
e85d0918 DD |
391 | bits = (2*bits) + 10; /* round up to the next integer */ |
392 | break; | |
b1cd8416 | 393 | case ZD_CCK_RATE_11M: |
e85d0918 DD |
394 | if (service) { |
395 | u32 t = bits % 11; | |
396 | *service &= ~ZD_PLCP_SERVICE_LENGTH_EXTENSION; | |
397 | if (0 < t && t <= 3) { | |
398 | *service |= ZD_PLCP_SERVICE_LENGTH_EXTENSION; | |
399 | } | |
400 | } | |
401 | bits += 10; /* round up to the next integer */ | |
402 | break; | |
403 | } | |
404 | ||
405 | return bits/divisor; | |
406 | } | |
407 | ||
e85d0918 | 408 | static void cs_set_control(struct zd_mac *mac, struct zd_ctrlset *cs, |
459c51ad | 409 | struct ieee80211_hdr *header, u32 flags) |
e85d0918 | 410 | { |
e85d0918 | 411 | /* |
b1382ede | 412 | * CONTROL TODO: |
e85d0918 DD |
413 | * - if backoff needed, enable bit 0 |
414 | * - if burst (backoff not needed) disable bit 0 | |
e85d0918 DD |
415 | */ |
416 | ||
417 | cs->control = 0; | |
418 | ||
419 | /* First fragment */ | |
e039fa4a | 420 | if (flags & IEEE80211_TX_CTL_FIRST_FRAGMENT) |
e85d0918 DD |
421 | cs->control |= ZD_CS_NEED_RANDOM_BACKOFF; |
422 | ||
423 | /* Multicast */ | |
424 | if (is_multicast_ether_addr(header->addr1)) | |
425 | cs->control |= ZD_CS_MULTICAST; | |
426 | ||
427 | /* PS-POLL */ | |
85365820 | 428 | if (ieee80211_is_pspoll(header->frame_control)) |
e85d0918 DD |
429 | cs->control |= ZD_CS_PS_POLL_FRAME; |
430 | ||
e039fa4a | 431 | if (flags & IEEE80211_TX_CTL_USE_RTS_CTS) |
b1382ede DD |
432 | cs->control |= ZD_CS_RTS; |
433 | ||
e039fa4a | 434 | if (flags & IEEE80211_TX_CTL_USE_CTS_PROTECT) |
b1382ede | 435 | cs->control |= ZD_CS_SELF_CTS; |
e85d0918 DD |
436 | |
437 | /* FIXME: Management frame? */ | |
438 | } | |
439 | ||
f2cae6c5 | 440 | static int zd_mac_config_beacon(struct ieee80211_hw *hw, struct sk_buff *beacon) |
72e77a8a LCC |
441 | { |
442 | struct zd_mac *mac = zd_hw_mac(hw); | |
f2cae6c5 | 443 | int r; |
72e77a8a LCC |
444 | u32 tmp, j = 0; |
445 | /* 4 more bytes for tail CRC */ | |
446 | u32 full_len = beacon->len + 4; | |
f2cae6c5 DD |
447 | |
448 | r = zd_iowrite32(&mac->chip, CR_BCN_FIFO_SEMAPHORE, 0); | |
449 | if (r < 0) | |
450 | return r; | |
451 | r = zd_ioread32(&mac->chip, CR_BCN_FIFO_SEMAPHORE, &tmp); | |
452 | if (r < 0) | |
453 | return r; | |
454 | ||
72e77a8a | 455 | while (tmp & 0x2) { |
f2cae6c5 DD |
456 | r = zd_ioread32(&mac->chip, CR_BCN_FIFO_SEMAPHORE, &tmp); |
457 | if (r < 0) | |
458 | return r; | |
72e77a8a LCC |
459 | if ((++j % 100) == 0) { |
460 | printk(KERN_ERR "CR_BCN_FIFO_SEMAPHORE not ready\n"); | |
461 | if (j >= 500) { | |
462 | printk(KERN_ERR "Giving up beacon config.\n"); | |
f2cae6c5 | 463 | return -ETIMEDOUT; |
72e77a8a LCC |
464 | } |
465 | } | |
466 | msleep(1); | |
467 | } | |
468 | ||
f2cae6c5 DD |
469 | r = zd_iowrite32(&mac->chip, CR_BCN_FIFO, full_len - 1); |
470 | if (r < 0) | |
471 | return r; | |
472 | if (zd_chip_is_zd1211b(&mac->chip)) { | |
473 | r = zd_iowrite32(&mac->chip, CR_BCN_LENGTH, full_len - 1); | |
474 | if (r < 0) | |
475 | return r; | |
476 | } | |
72e77a8a | 477 | |
f2cae6c5 DD |
478 | for (j = 0 ; j < beacon->len; j++) { |
479 | r = zd_iowrite32(&mac->chip, CR_BCN_FIFO, | |
72e77a8a | 480 | *((u8 *)(beacon->data + j))); |
f2cae6c5 DD |
481 | if (r < 0) |
482 | return r; | |
483 | } | |
72e77a8a | 484 | |
f2cae6c5 DD |
485 | for (j = 0; j < 4; j++) { |
486 | r = zd_iowrite32(&mac->chip, CR_BCN_FIFO, 0x0); | |
487 | if (r < 0) | |
488 | return r; | |
489 | } | |
490 | ||
491 | r = zd_iowrite32(&mac->chip, CR_BCN_FIFO_SEMAPHORE, 1); | |
492 | if (r < 0) | |
493 | return r; | |
72e77a8a | 494 | |
72e77a8a LCC |
495 | /* 802.11b/g 2.4G CCK 1Mb |
496 | * 802.11a, not yet implemented, uses different values (see GPL vendor | |
497 | * driver) | |
498 | */ | |
f2cae6c5 | 499 | return zd_iowrite32(&mac->chip, CR_BCN_PLCP_CFG, 0x00000400 | |
72e77a8a LCC |
500 | (full_len << 19)); |
501 | } | |
502 | ||
e85d0918 | 503 | static int fill_ctrlset(struct zd_mac *mac, |
e039fa4a | 504 | struct sk_buff *skb) |
e85d0918 DD |
505 | { |
506 | int r; | |
459c51ad DD |
507 | struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data; |
508 | unsigned int frag_len = skb->len + FCS_LEN; | |
e85d0918 | 509 | unsigned int packet_length; |
2e92e6f2 | 510 | struct ieee80211_rate *txrate; |
e85d0918 DD |
511 | struct zd_ctrlset *cs = (struct zd_ctrlset *) |
512 | skb_push(skb, sizeof(struct zd_ctrlset)); | |
e039fa4a | 513 | struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb); |
e85d0918 | 514 | |
e85d0918 | 515 | ZD_ASSERT(frag_len <= 0xffff); |
e85d0918 | 516 | |
e039fa4a | 517 | txrate = ieee80211_get_tx_rate(mac->hw, info); |
2e92e6f2 JB |
518 | |
519 | cs->modulation = txrate->hw_value; | |
e039fa4a | 520 | if (info->flags & IEEE80211_TX_CTL_SHORT_PREAMBLE) |
2e92e6f2 | 521 | cs->modulation = txrate->hw_value_short; |
e85d0918 DD |
522 | |
523 | cs->tx_length = cpu_to_le16(frag_len); | |
524 | ||
e039fa4a | 525 | cs_set_control(mac, cs, hdr, info->flags); |
e85d0918 DD |
526 | |
527 | packet_length = frag_len + sizeof(struct zd_ctrlset) + 10; | |
528 | ZD_ASSERT(packet_length <= 0xffff); | |
529 | /* ZD1211B: Computing the length difference this way, gives us | |
530 | * flexibility to compute the packet length. | |
531 | */ | |
74553aed | 532 | cs->packet_length = cpu_to_le16(zd_chip_is_zd1211b(&mac->chip) ? |
e85d0918 DD |
533 | packet_length - frag_len : packet_length); |
534 | ||
535 | /* | |
536 | * CURRENT LENGTH: | |
537 | * - transmit frame length in microseconds | |
538 | * - seems to be derived from frame length | |
539 | * - see Cal_Us_Service() in zdinlinef.h | |
540 | * - if macp->bTxBurstEnable is enabled, then multiply by 4 | |
541 | * - bTxBurstEnable is never set in the vendor driver | |
542 | * | |
543 | * SERVICE: | |
544 | * - "for PLCP configuration" | |
545 | * - always 0 except in some situations at 802.11b 11M | |
546 | * - see line 53 of zdinlinef.h | |
547 | */ | |
548 | cs->service = 0; | |
64f222cc | 549 | r = zd_calc_tx_length_us(&cs->service, ZD_RATE(cs->modulation), |
e85d0918 DD |
550 | le16_to_cpu(cs->tx_length)); |
551 | if (r < 0) | |
552 | return r; | |
553 | cs->current_length = cpu_to_le16(r); | |
459c51ad | 554 | cs->next_frame_length = 0; |
e85d0918 DD |
555 | |
556 | return 0; | |
557 | } | |
558 | ||
459c51ad DD |
559 | /** |
560 | * zd_op_tx - transmits a network frame to the device | |
561 | * | |
562 | * @dev: mac80211 hardware device | |
563 | * @skb: socket buffer | |
564 | * @control: the control structure | |
565 | * | |
566 | * This function transmit an IEEE 802.11 network frame to the device. The | |
567 | * control block of the skbuff will be initialized. If necessary the incoming | |
568 | * mac80211 queues will be stopped. | |
569 | */ | |
e039fa4a | 570 | static int zd_op_tx(struct ieee80211_hw *hw, struct sk_buff *skb) |
e85d0918 | 571 | { |
459c51ad | 572 | struct zd_mac *mac = zd_hw_mac(hw); |
e039fa4a | 573 | struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb); |
459c51ad | 574 | int r; |
e85d0918 | 575 | |
e039fa4a | 576 | r = fill_ctrlset(mac, skb); |
459c51ad DD |
577 | if (r) |
578 | return r; | |
e85d0918 | 579 | |
e039fa4a JB |
580 | info->driver_data[0] = hw; |
581 | ||
459c51ad | 582 | r = zd_usb_tx(&mac->chip.usb, skb); |
e039fa4a | 583 | if (r) |
459c51ad | 584 | return r; |
e85d0918 DD |
585 | return 0; |
586 | } | |
587 | ||
459c51ad DD |
588 | /** |
589 | * filter_ack - filters incoming packets for acknowledgements | |
590 | * @dev: the mac80211 device | |
591 | * @rx_hdr: received header | |
592 | * @stats: the status for the received packet | |
741fec53 | 593 | * |
459c51ad DD |
594 | * This functions looks for ACK packets and tries to match them with the |
595 | * frames in the tx queue. If a match is found the frame will be dequeued and | |
596 | * the upper layers is informed about the successful transmission. If | |
597 | * mac80211 queues have been stopped and the number of frames still to be | |
598 | * transmitted is low the queues will be opened again. | |
e85d0918 | 599 | * |
459c51ad | 600 | * Returns 1 if the frame was an ACK, 0 if it was ignored. |
e85d0918 | 601 | */ |
459c51ad DD |
602 | static int filter_ack(struct ieee80211_hw *hw, struct ieee80211_hdr *rx_hdr, |
603 | struct ieee80211_rx_status *stats) | |
e85d0918 | 604 | { |
459c51ad DD |
605 | struct sk_buff *skb; |
606 | struct sk_buff_head *q; | |
607 | unsigned long flags; | |
e85d0918 | 608 | |
85365820 | 609 | if (!ieee80211_is_ack(rx_hdr->frame_control)) |
e85d0918 | 610 | return 0; |
e85d0918 | 611 | |
459c51ad DD |
612 | q = &zd_hw_mac(hw)->ack_wait_queue; |
613 | spin_lock_irqsave(&q->lock, flags); | |
614 | for (skb = q->next; skb != (struct sk_buff *)q; skb = skb->next) { | |
615 | struct ieee80211_hdr *tx_hdr; | |
616 | ||
617 | tx_hdr = (struct ieee80211_hdr *)skb->data; | |
618 | if (likely(!compare_ether_addr(tx_hdr->addr2, rx_hdr->addr1))) | |
619 | { | |
459c51ad | 620 | __skb_unlink(skb, q); |
e039fa4a | 621 | tx_status(hw, skb, IEEE80211_TX_STAT_ACK, stats->signal, 1); |
459c51ad DD |
622 | goto out; |
623 | } | |
624 | } | |
625 | out: | |
626 | spin_unlock_irqrestore(&q->lock, flags); | |
627 | return 1; | |
e85d0918 DD |
628 | } |
629 | ||
459c51ad | 630 | int zd_mac_rx(struct ieee80211_hw *hw, const u8 *buffer, unsigned int length) |
e85d0918 | 631 | { |
459c51ad DD |
632 | struct zd_mac *mac = zd_hw_mac(hw); |
633 | struct ieee80211_rx_status stats; | |
634 | const struct rx_status *status; | |
635 | struct sk_buff *skb; | |
636 | int bad_frame = 0; | |
85365820 HH |
637 | __le16 fc; |
638 | int need_padding; | |
8318d78a JB |
639 | int i; |
640 | u8 rate; | |
db888aed | 641 | |
459c51ad DD |
642 | if (length < ZD_PLCP_HEADER_SIZE + 10 /* IEEE80211_1ADDR_LEN */ + |
643 | FCS_LEN + sizeof(struct rx_status)) | |
644 | return -EINVAL; | |
e85d0918 | 645 | |
459c51ad | 646 | memset(&stats, 0, sizeof(stats)); |
e85d0918 | 647 | |
459c51ad DD |
648 | /* Note about pass_failed_fcs and pass_ctrl access below: |
649 | * mac locking intentionally omitted here, as this is the only unlocked | |
650 | * reader and the only writer is configure_filter. Plus, if there were | |
651 | * any races accessing these variables, it wouldn't really matter. | |
652 | * If mac80211 ever provides a way for us to access filter flags | |
653 | * from outside configure_filter, we could improve on this. Also, this | |
654 | * situation may change once we implement some kind of DMA-into-skb | |
655 | * RX path. */ | |
e85d0918 | 656 | |
459c51ad DD |
657 | /* Caller has to ensure that length >= sizeof(struct rx_status). */ |
658 | status = (struct rx_status *) | |
937a049d | 659 | (buffer + (length - sizeof(struct rx_status))); |
e85d0918 | 660 | if (status->frame_status & ZD_RX_ERROR) { |
459c51ad DD |
661 | if (mac->pass_failed_fcs && |
662 | (status->frame_status & ZD_RX_CRC32_ERROR)) { | |
663 | stats.flag |= RX_FLAG_FAILED_FCS_CRC; | |
664 | bad_frame = 1; | |
665 | } else { | |
666 | return -EINVAL; | |
22d3405f | 667 | } |
e85d0918 | 668 | } |
22d3405f | 669 | |
8318d78a JB |
670 | stats.freq = zd_channels[_zd_chip_get_channel(&mac->chip) - 1].center_freq; |
671 | stats.band = IEEE80211_BAND_2GHZ; | |
566bfe5a BR |
672 | stats.signal = status->signal_strength; |
673 | stats.qual = zd_rx_qual_percent(buffer, | |
e85d0918 DD |
674 | length - sizeof(struct rx_status), |
675 | status); | |
8318d78a JB |
676 | |
677 | rate = zd_rx_rate(buffer, status); | |
678 | ||
679 | /* todo: return index in the big switches in zd_rx_rate instead */ | |
680 | for (i = 0; i < mac->band.n_bitrates; i++) | |
681 | if (rate == mac->band.bitrates[i].hw_value) | |
682 | stats.rate_idx = i; | |
459c51ad DD |
683 | |
684 | length -= ZD_PLCP_HEADER_SIZE + sizeof(struct rx_status); | |
685 | buffer += ZD_PLCP_HEADER_SIZE; | |
686 | ||
687 | /* Except for bad frames, filter each frame to see if it is an ACK, in | |
688 | * which case our internal TX tracking is updated. Normally we then | |
689 | * bail here as there's no need to pass ACKs on up to the stack, but | |
690 | * there is also the case where the stack has requested us to pass | |
691 | * control frames on up (pass_ctrl) which we must consider. */ | |
692 | if (!bad_frame && | |
693 | filter_ack(hw, (struct ieee80211_hdr *)buffer, &stats) | |
694 | && !mac->pass_ctrl) | |
695 | return 0; | |
e85d0918 | 696 | |
85365820 HH |
697 | fc = *(__le16 *)buffer; |
698 | need_padding = ieee80211_is_data_qos(fc) ^ ieee80211_has_a4(fc); | |
9081728b MB |
699 | |
700 | skb = dev_alloc_skb(length + (need_padding ? 2 : 0)); | |
459c51ad DD |
701 | if (skb == NULL) |
702 | return -ENOMEM; | |
9081728b MB |
703 | if (need_padding) { |
704 | /* Make sure the the payload data is 4 byte aligned. */ | |
705 | skb_reserve(skb, 2); | |
706 | } | |
707 | ||
459c51ad DD |
708 | memcpy(skb_put(skb, length), buffer, length); |
709 | ||
710 | ieee80211_rx_irqsafe(hw, skb, &stats); | |
e85d0918 DD |
711 | return 0; |
712 | } | |
713 | ||
459c51ad DD |
714 | static int zd_op_add_interface(struct ieee80211_hw *hw, |
715 | struct ieee80211_if_init_conf *conf) | |
e85d0918 | 716 | { |
459c51ad | 717 | struct zd_mac *mac = zd_hw_mac(hw); |
e85d0918 | 718 | |
05c914fe JB |
719 | /* using NL80211_IFTYPE_UNSPECIFIED to indicate no mode selected */ |
720 | if (mac->type != NL80211_IFTYPE_UNSPECIFIED) | |
459c51ad | 721 | return -EOPNOTSUPP; |
e85d0918 | 722 | |
459c51ad | 723 | switch (conf->type) { |
05c914fe JB |
724 | case NL80211_IFTYPE_MONITOR: |
725 | case NL80211_IFTYPE_MESH_POINT: | |
726 | case NL80211_IFTYPE_STATION: | |
727 | case NL80211_IFTYPE_ADHOC: | |
459c51ad DD |
728 | mac->type = conf->type; |
729 | break; | |
730 | default: | |
731 | return -EOPNOTSUPP; | |
4d1feabc | 732 | } |
e85d0918 | 733 | |
459c51ad DD |
734 | return zd_write_mac_addr(&mac->chip, conf->mac_addr); |
735 | } | |
e85d0918 | 736 | |
459c51ad DD |
737 | static void zd_op_remove_interface(struct ieee80211_hw *hw, |
738 | struct ieee80211_if_init_conf *conf) | |
739 | { | |
740 | struct zd_mac *mac = zd_hw_mac(hw); | |
05c914fe | 741 | mac->type = NL80211_IFTYPE_UNSPECIFIED; |
86229f0c | 742 | zd_set_beacon_interval(&mac->chip, 0); |
459c51ad DD |
743 | zd_write_mac_addr(&mac->chip, NULL); |
744 | } | |
93137943 | 745 | |
459c51ad DD |
746 | static int zd_op_config(struct ieee80211_hw *hw, struct ieee80211_conf *conf) |
747 | { | |
748 | struct zd_mac *mac = zd_hw_mac(hw); | |
8318d78a | 749 | return zd_chip_set_channel(&mac->chip, conf->channel->hw_value); |
459c51ad | 750 | } |
db888aed | 751 | |
32bfd35d JB |
752 | static int zd_op_config_interface(struct ieee80211_hw *hw, |
753 | struct ieee80211_vif *vif, | |
459c51ad DD |
754 | struct ieee80211_if_conf *conf) |
755 | { | |
756 | struct zd_mac *mac = zd_hw_mac(hw); | |
72e77a8a | 757 | int associated; |
f2cae6c5 | 758 | int r; |
72e77a8a | 759 | |
05c914fe JB |
760 | if (mac->type == NL80211_IFTYPE_MESH_POINT || |
761 | mac->type == NL80211_IFTYPE_ADHOC) { | |
72e77a8a | 762 | associated = true; |
9d139c81 JB |
763 | if (conf->changed & IEEE80211_IFCC_BEACON) { |
764 | struct sk_buff *beacon = ieee80211_beacon_get(hw, vif); | |
765 | ||
766 | if (!beacon) | |
767 | return -ENOMEM; | |
768 | r = zd_mac_config_beacon(hw, beacon); | |
f2cae6c5 DD |
769 | if (r < 0) |
770 | return r; | |
771 | r = zd_set_beacon_interval(&mac->chip, BCN_MODE_IBSS | | |
72e77a8a | 772 | hw->conf.beacon_int); |
f2cae6c5 DD |
773 | if (r < 0) |
774 | return r; | |
9d139c81 | 775 | kfree_skb(beacon); |
72e77a8a LCC |
776 | } |
777 | } else | |
778 | associated = is_valid_ether_addr(conf->bssid); | |
e85d0918 | 779 | |
459c51ad | 780 | spin_lock_irq(&mac->lock); |
72e77a8a | 781 | mac->associated = associated; |
459c51ad | 782 | spin_unlock_irq(&mac->lock); |
e85d0918 | 783 | |
459c51ad DD |
784 | /* TODO: do hardware bssid filtering */ |
785 | return 0; | |
4d1feabc UK |
786 | } |
787 | ||
e83a1070 | 788 | static void zd_process_intr(struct work_struct *work) |
72e77a8a LCC |
789 | { |
790 | u16 int_status; | |
791 | struct zd_mac *mac = container_of(work, struct zd_mac, process_intr); | |
792 | ||
d63ddcec | 793 | int_status = le16_to_cpu(*(__le16 *)(mac->intr_buffer+4)); |
72e77a8a LCC |
794 | if (int_status & INT_CFG_NEXT_BCN) { |
795 | if (net_ratelimit()) | |
796 | dev_dbg_f(zd_mac_dev(mac), "INT_CFG_NEXT_BCN\n"); | |
797 | } else | |
798 | dev_dbg_f(zd_mac_dev(mac), "Unsupported interrupt\n"); | |
799 | ||
800 | zd_chip_enable_hwint(&mac->chip); | |
801 | } | |
802 | ||
803 | ||
459c51ad | 804 | static void set_multicast_hash_handler(struct work_struct *work) |
4d1feabc | 805 | { |
459c51ad DD |
806 | struct zd_mac *mac = |
807 | container_of(work, struct zd_mac, set_multicast_hash_work); | |
808 | struct zd_mc_hash hash; | |
4d1feabc | 809 | |
459c51ad DD |
810 | spin_lock_irq(&mac->lock); |
811 | hash = mac->multicast_hash; | |
812 | spin_unlock_irq(&mac->lock); | |
4d1feabc | 813 | |
459c51ad | 814 | zd_chip_set_multicast_hash(&mac->chip, &hash); |
e85d0918 DD |
815 | } |
816 | ||
459c51ad | 817 | static void set_rx_filter_handler(struct work_struct *work) |
e85d0918 | 818 | { |
459c51ad DD |
819 | struct zd_mac *mac = |
820 | container_of(work, struct zd_mac, set_rx_filter_work); | |
821 | int r; | |
822 | ||
823 | dev_dbg_f(zd_mac_dev(mac), "\n"); | |
824 | r = set_rx_filter(mac); | |
825 | if (r) | |
826 | dev_err(zd_mac_dev(mac), "set_rx_filter_handler error %d\n", r); | |
e85d0918 DD |
827 | } |
828 | ||
459c51ad DD |
829 | #define SUPPORTED_FIF_FLAGS \ |
830 | (FIF_PROMISC_IN_BSS | FIF_ALLMULTI | FIF_FCSFAIL | FIF_CONTROL | \ | |
2c1a1b12 | 831 | FIF_OTHER_BSS | FIF_BCN_PRBRESP_PROMISC) |
459c51ad DD |
832 | static void zd_op_configure_filter(struct ieee80211_hw *hw, |
833 | unsigned int changed_flags, | |
834 | unsigned int *new_flags, | |
835 | int mc_count, struct dev_mc_list *mclist) | |
e85d0918 | 836 | { |
459c51ad DD |
837 | struct zd_mc_hash hash; |
838 | struct zd_mac *mac = zd_hw_mac(hw); | |
839 | unsigned long flags; | |
840 | int i; | |
e85d0918 | 841 | |
459c51ad DD |
842 | /* Only deal with supported flags */ |
843 | changed_flags &= SUPPORTED_FIF_FLAGS; | |
844 | *new_flags &= SUPPORTED_FIF_FLAGS; | |
845 | ||
846 | /* changed_flags is always populated but this driver | |
847 | * doesn't support all FIF flags so its possible we don't | |
848 | * need to do anything */ | |
849 | if (!changed_flags) | |
850 | return; | |
851 | ||
852 | if (*new_flags & (FIF_PROMISC_IN_BSS | FIF_ALLMULTI)) { | |
853 | zd_mc_add_all(&hash); | |
854 | } else { | |
855 | DECLARE_MAC_BUF(macbuf); | |
856 | ||
857 | zd_mc_clear(&hash); | |
858 | for (i = 0; i < mc_count; i++) { | |
859 | if (!mclist) | |
860 | break; | |
861 | dev_dbg_f(zd_mac_dev(mac), "mc addr %s\n", | |
862 | print_mac(macbuf, mclist->dmi_addr)); | |
863 | zd_mc_add_addr(&hash, mclist->dmi_addr); | |
864 | mclist = mclist->next; | |
865 | } | |
e85d0918 | 866 | } |
459c51ad DD |
867 | |
868 | spin_lock_irqsave(&mac->lock, flags); | |
869 | mac->pass_failed_fcs = !!(*new_flags & FIF_FCSFAIL); | |
870 | mac->pass_ctrl = !!(*new_flags & FIF_CONTROL); | |
871 | mac->multicast_hash = hash; | |
872 | spin_unlock_irqrestore(&mac->lock, flags); | |
873 | queue_work(zd_workqueue, &mac->set_multicast_hash_work); | |
874 | ||
875 | if (changed_flags & FIF_CONTROL) | |
876 | queue_work(zd_workqueue, &mac->set_rx_filter_work); | |
877 | ||
878 | /* no handling required for FIF_OTHER_BSS as we don't currently | |
879 | * do BSSID filtering */ | |
880 | /* FIXME: in future it would be nice to enable the probe response | |
881 | * filter (so that the driver doesn't see them) until | |
882 | * FIF_BCN_PRBRESP_PROMISC is set. however due to atomicity here, we'd | |
883 | * have to schedule work to enable prbresp reception, which might | |
884 | * happen too late. For now we'll just listen and forward them all the | |
885 | * time. */ | |
e85d0918 DD |
886 | } |
887 | ||
459c51ad | 888 | static void set_rts_cts_work(struct work_struct *work) |
e85d0918 | 889 | { |
459c51ad DD |
890 | struct zd_mac *mac = |
891 | container_of(work, struct zd_mac, set_rts_cts_work); | |
892 | unsigned long flags; | |
893 | unsigned int short_preamble; | |
894 | ||
895 | mutex_lock(&mac->chip.mutex); | |
896 | ||
897 | spin_lock_irqsave(&mac->lock, flags); | |
898 | mac->updating_rts_rate = 0; | |
899 | short_preamble = mac->short_preamble; | |
900 | spin_unlock_irqrestore(&mac->lock, flags); | |
901 | ||
902 | zd_chip_set_rts_cts_rate_locked(&mac->chip, short_preamble); | |
903 | mutex_unlock(&mac->chip.mutex); | |
e85d0918 DD |
904 | } |
905 | ||
471b3efd JB |
906 | static void zd_op_bss_info_changed(struct ieee80211_hw *hw, |
907 | struct ieee80211_vif *vif, | |
908 | struct ieee80211_bss_conf *bss_conf, | |
909 | u32 changes) | |
e85d0918 | 910 | { |
459c51ad DD |
911 | struct zd_mac *mac = zd_hw_mac(hw); |
912 | unsigned long flags; | |
913 | ||
914 | dev_dbg_f(zd_mac_dev(mac), "changes: %x\n", changes); | |
915 | ||
471b3efd | 916 | if (changes & BSS_CHANGED_ERP_PREAMBLE) { |
459c51ad | 917 | spin_lock_irqsave(&mac->lock, flags); |
471b3efd | 918 | mac->short_preamble = bss_conf->use_short_preamble; |
459c51ad DD |
919 | if (!mac->updating_rts_rate) { |
920 | mac->updating_rts_rate = 1; | |
921 | /* FIXME: should disable TX here, until work has | |
922 | * completed and RTS_CTS reg is updated */ | |
923 | queue_work(zd_workqueue, &mac->set_rts_cts_work); | |
924 | } | |
925 | spin_unlock_irqrestore(&mac->lock, flags); | |
926 | } | |
e85d0918 DD |
927 | } |
928 | ||
459c51ad DD |
929 | static const struct ieee80211_ops zd_ops = { |
930 | .tx = zd_op_tx, | |
931 | .start = zd_op_start, | |
932 | .stop = zd_op_stop, | |
933 | .add_interface = zd_op_add_interface, | |
934 | .remove_interface = zd_op_remove_interface, | |
935 | .config = zd_op_config, | |
936 | .config_interface = zd_op_config_interface, | |
937 | .configure_filter = zd_op_configure_filter, | |
471b3efd | 938 | .bss_info_changed = zd_op_bss_info_changed, |
459c51ad DD |
939 | }; |
940 | ||
941 | struct ieee80211_hw *zd_mac_alloc_hw(struct usb_interface *intf) | |
e85d0918 | 942 | { |
459c51ad DD |
943 | struct zd_mac *mac; |
944 | struct ieee80211_hw *hw; | |
e85d0918 | 945 | |
459c51ad DD |
946 | hw = ieee80211_alloc_hw(sizeof(struct zd_mac), &zd_ops); |
947 | if (!hw) { | |
948 | dev_dbg_f(&intf->dev, "out of memory\n"); | |
949 | return NULL; | |
db888aed | 950 | } |
459c51ad DD |
951 | |
952 | mac = zd_hw_mac(hw); | |
953 | ||
954 | memset(mac, 0, sizeof(*mac)); | |
955 | spin_lock_init(&mac->lock); | |
956 | mac->hw = hw; | |
957 | ||
05c914fe | 958 | mac->type = NL80211_IFTYPE_UNSPECIFIED; |
459c51ad DD |
959 | |
960 | memcpy(mac->channels, zd_channels, sizeof(zd_channels)); | |
961 | memcpy(mac->rates, zd_rates, sizeof(zd_rates)); | |
8318d78a JB |
962 | mac->band.n_bitrates = ARRAY_SIZE(zd_rates); |
963 | mac->band.bitrates = mac->rates; | |
964 | mac->band.n_channels = ARRAY_SIZE(zd_channels); | |
965 | mac->band.channels = mac->channels; | |
966 | ||
967 | hw->wiphy->bands[IEEE80211_BAND_2GHZ] = &mac->band; | |
968 | ||
72e77a8a | 969 | hw->flags = IEEE80211_HW_RX_INCLUDES_FCS | |
566bfe5a | 970 | IEEE80211_HW_SIGNAL_DB; |
459c51ad | 971 | |
f59ac048 LR |
972 | hw->wiphy->interface_modes = |
973 | BIT(NL80211_IFTYPE_MESH_POINT) | | |
974 | BIT(NL80211_IFTYPE_STATION) | | |
975 | BIT(NL80211_IFTYPE_ADHOC); | |
976 | ||
566bfe5a | 977 | hw->max_signal = 100; |
459c51ad DD |
978 | hw->queues = 1; |
979 | hw->extra_tx_headroom = sizeof(struct zd_ctrlset); | |
980 | ||
981 | skb_queue_head_init(&mac->ack_wait_queue); | |
982 | ||
459c51ad DD |
983 | zd_chip_init(&mac->chip, hw, intf); |
984 | housekeeping_init(mac); | |
985 | INIT_WORK(&mac->set_multicast_hash_work, set_multicast_hash_handler); | |
986 | INIT_WORK(&mac->set_rts_cts_work, set_rts_cts_work); | |
987 | INIT_WORK(&mac->set_rx_filter_work, set_rx_filter_handler); | |
72e77a8a | 988 | INIT_WORK(&mac->process_intr, zd_process_intr); |
459c51ad DD |
989 | |
990 | SET_IEEE80211_DEV(hw, &intf->dev); | |
991 | return hw; | |
e85d0918 DD |
992 | } |
993 | ||
583afd1e UK |
994 | #define LINK_LED_WORK_DELAY HZ |
995 | ||
c4028958 | 996 | static void link_led_handler(struct work_struct *work) |
583afd1e | 997 | { |
c4028958 DH |
998 | struct zd_mac *mac = |
999 | container_of(work, struct zd_mac, housekeeping.link_led_work.work); | |
583afd1e | 1000 | struct zd_chip *chip = &mac->chip; |
583afd1e UK |
1001 | int is_associated; |
1002 | int r; | |
1003 | ||
1004 | spin_lock_irq(&mac->lock); | |
459c51ad | 1005 | is_associated = mac->associated; |
583afd1e UK |
1006 | spin_unlock_irq(&mac->lock); |
1007 | ||
1008 | r = zd_chip_control_leds(chip, | |
1009 | is_associated ? LED_ASSOCIATED : LED_SCANNING); | |
1010 | if (r) | |
459c51ad | 1011 | dev_dbg_f(zd_mac_dev(mac), "zd_chip_control_leds error %d\n", r); |
583afd1e UK |
1012 | |
1013 | queue_delayed_work(zd_workqueue, &mac->housekeeping.link_led_work, | |
1014 | LINK_LED_WORK_DELAY); | |
1015 | } | |
1016 | ||
1017 | static void housekeeping_init(struct zd_mac *mac) | |
1018 | { | |
c4028958 | 1019 | INIT_DELAYED_WORK(&mac->housekeeping.link_led_work, link_led_handler); |
583afd1e UK |
1020 | } |
1021 | ||
1022 | static void housekeeping_enable(struct zd_mac *mac) | |
1023 | { | |
1024 | dev_dbg_f(zd_mac_dev(mac), "\n"); | |
1025 | queue_delayed_work(zd_workqueue, &mac->housekeeping.link_led_work, | |
1026 | 0); | |
1027 | } | |
1028 | ||
1029 | static void housekeeping_disable(struct zd_mac *mac) | |
1030 | { | |
1031 | dev_dbg_f(zd_mac_dev(mac), "\n"); | |
1032 | cancel_rearming_delayed_workqueue(zd_workqueue, | |
1033 | &mac->housekeeping.link_led_work); | |
1034 | zd_chip_control_leds(&mac->chip, LED_OFF); | |
1035 | } |