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bb81b2dd JL |
1 | /* |
2 | * Xilinx EmacLite Linux driver for the Xilinx Ethernet MAC Lite device. | |
3 | * | |
4 | * This is a new flat driver which is based on the original emac_lite | |
5 | * driver from John Williams <john.williams@petalogix.com>. | |
6 | * | |
7 | * 2007-2009 (c) Xilinx, Inc. | |
8 | * | |
9 | * This program is free software; you can redistribute it and/or modify it | |
10 | * under the terms of the GNU General Public License as published by the | |
11 | * Free Software Foundation; either version 2 of the License, or (at your | |
12 | * option) any later version. | |
13 | */ | |
14 | ||
15 | #include <linux/module.h> | |
16 | #include <linux/uaccess.h> | |
17 | #include <linux/init.h> | |
18 | #include <linux/netdevice.h> | |
19 | #include <linux/etherdevice.h> | |
20 | #include <linux/skbuff.h> | |
21 | #include <linux/io.h> | |
5a0e3ad6 | 22 | #include <linux/slab.h> |
22ae782f | 23 | #include <linux/of_address.h> |
bb81b2dd JL |
24 | #include <linux/of_device.h> |
25 | #include <linux/of_platform.h> | |
5cdaaa12 | 26 | #include <linux/of_mdio.h> |
4b6ba8aa | 27 | #include <linux/of_net.h> |
5cdaaa12 | 28 | #include <linux/phy.h> |
bb81b2dd JL |
29 | |
30 | #define DRIVER_NAME "xilinx_emaclite" | |
31 | ||
32 | /* Register offsets for the EmacLite Core */ | |
33 | #define XEL_TXBUFF_OFFSET 0x0 /* Transmit Buffer */ | |
5cdaaa12 JL |
34 | #define XEL_MDIOADDR_OFFSET 0x07E4 /* MDIO Address Register */ |
35 | #define XEL_MDIOWR_OFFSET 0x07E8 /* MDIO Write Data Register */ | |
36 | #define XEL_MDIORD_OFFSET 0x07EC /* MDIO Read Data Register */ | |
37 | #define XEL_MDIOCTRL_OFFSET 0x07F0 /* MDIO Control Register */ | |
bb81b2dd JL |
38 | #define XEL_GIER_OFFSET 0x07F8 /* GIE Register */ |
39 | #define XEL_TSR_OFFSET 0x07FC /* Tx status */ | |
40 | #define XEL_TPLR_OFFSET 0x07F4 /* Tx packet length */ | |
41 | ||
42 | #define XEL_RXBUFF_OFFSET 0x1000 /* Receive Buffer */ | |
43 | #define XEL_RPLR_OFFSET 0x100C /* Rx packet length */ | |
44 | #define XEL_RSR_OFFSET 0x17FC /* Rx status */ | |
45 | ||
46 | #define XEL_BUFFER_OFFSET 0x0800 /* Next Tx/Rx buffer's offset */ | |
47 | ||
5cdaaa12 JL |
48 | /* MDIO Address Register Bit Masks */ |
49 | #define XEL_MDIOADDR_REGADR_MASK 0x0000001F /* Register Address */ | |
50 | #define XEL_MDIOADDR_PHYADR_MASK 0x000003E0 /* PHY Address */ | |
51 | #define XEL_MDIOADDR_PHYADR_SHIFT 5 | |
52 | #define XEL_MDIOADDR_OP_MASK 0x00000400 /* RD/WR Operation */ | |
53 | ||
54 | /* MDIO Write Data Register Bit Masks */ | |
55 | #define XEL_MDIOWR_WRDATA_MASK 0x0000FFFF /* Data to be Written */ | |
56 | ||
57 | /* MDIO Read Data Register Bit Masks */ | |
58 | #define XEL_MDIORD_RDDATA_MASK 0x0000FFFF /* Data to be Read */ | |
59 | ||
60 | /* MDIO Control Register Bit Masks */ | |
61 | #define XEL_MDIOCTRL_MDIOSTS_MASK 0x00000001 /* MDIO Status Mask */ | |
62 | #define XEL_MDIOCTRL_MDIOEN_MASK 0x00000008 /* MDIO Enable */ | |
63 | ||
bb81b2dd JL |
64 | /* Global Interrupt Enable Register (GIER) Bit Masks */ |
65 | #define XEL_GIER_GIE_MASK 0x80000000 /* Global Enable */ | |
66 | ||
67 | /* Transmit Status Register (TSR) Bit Masks */ | |
68 | #define XEL_TSR_XMIT_BUSY_MASK 0x00000001 /* Tx complete */ | |
69 | #define XEL_TSR_PROGRAM_MASK 0x00000002 /* Program the MAC address */ | |
70 | #define XEL_TSR_XMIT_IE_MASK 0x00000008 /* Tx interrupt enable bit */ | |
71 | #define XEL_TSR_XMIT_ACTIVE_MASK 0x80000000 /* Buffer is active, SW bit | |
72 | * only. This is not documented | |
73 | * in the HW spec */ | |
74 | ||
75 | /* Define for programming the MAC address into the EmacLite */ | |
76 | #define XEL_TSR_PROG_MAC_ADDR (XEL_TSR_XMIT_BUSY_MASK | XEL_TSR_PROGRAM_MASK) | |
77 | ||
78 | /* Receive Status Register (RSR) */ | |
79 | #define XEL_RSR_RECV_DONE_MASK 0x00000001 /* Rx complete */ | |
80 | #define XEL_RSR_RECV_IE_MASK 0x00000008 /* Rx interrupt enable bit */ | |
81 | ||
82 | /* Transmit Packet Length Register (TPLR) */ | |
83 | #define XEL_TPLR_LENGTH_MASK 0x0000FFFF /* Tx packet length */ | |
84 | ||
85 | /* Receive Packet Length Register (RPLR) */ | |
86 | #define XEL_RPLR_LENGTH_MASK 0x0000FFFF /* Rx packet length */ | |
87 | ||
88 | #define XEL_HEADER_OFFSET 12 /* Offset to length field */ | |
89 | #define XEL_HEADER_SHIFT 16 /* Shift value for length */ | |
90 | ||
91 | /* General Ethernet Definitions */ | |
92 | #define XEL_ARP_PACKET_SIZE 28 /* Max ARP packet size */ | |
93 | #define XEL_HEADER_IP_LENGTH_OFFSET 16 /* IP Length Offset */ | |
94 | ||
95 | ||
96 | ||
97 | #define TX_TIMEOUT (60*HZ) /* Tx timeout is 60 seconds. */ | |
98 | #define ALIGNMENT 4 | |
99 | ||
100 | /* BUFFER_ALIGN(adr) calculates the number of bytes to the next alignment. */ | |
101 | #define BUFFER_ALIGN(adr) ((ALIGNMENT - ((u32) adr)) % ALIGNMENT) | |
102 | ||
103 | /** | |
104 | * struct net_local - Our private per device data | |
105 | * @ndev: instance of the network device | |
106 | * @tx_ping_pong: indicates whether Tx Pong buffer is configured in HW | |
107 | * @rx_ping_pong: indicates whether Rx Pong buffer is configured in HW | |
108 | * @next_tx_buf_to_use: next Tx buffer to write to | |
109 | * @next_rx_buf_to_use: next Rx buffer to read from | |
110 | * @base_addr: base address of the Emaclite device | |
111 | * @reset_lock: lock used for synchronization | |
112 | * @deferred_skb: holds an skb (for transmission at a later time) when the | |
113 | * Tx buffer is not free | |
5cdaaa12 JL |
114 | * @phy_dev: pointer to the PHY device |
115 | * @phy_node: pointer to the PHY device node | |
116 | * @mii_bus: pointer to the MII bus | |
117 | * @mdio_irqs: IRQs table for MDIO bus | |
118 | * @last_link: last link status | |
119 | * @has_mdio: indicates whether MDIO is included in the HW | |
bb81b2dd JL |
120 | */ |
121 | struct net_local { | |
122 | ||
123 | struct net_device *ndev; | |
124 | ||
125 | bool tx_ping_pong; | |
126 | bool rx_ping_pong; | |
127 | u32 next_tx_buf_to_use; | |
128 | u32 next_rx_buf_to_use; | |
129 | void __iomem *base_addr; | |
130 | ||
131 | spinlock_t reset_lock; | |
132 | struct sk_buff *deferred_skb; | |
5cdaaa12 JL |
133 | |
134 | struct phy_device *phy_dev; | |
135 | struct device_node *phy_node; | |
136 | ||
137 | struct mii_bus *mii_bus; | |
138 | int mdio_irqs[PHY_MAX_ADDR]; | |
139 | ||
140 | int last_link; | |
141 | bool has_mdio; | |
bb81b2dd JL |
142 | }; |
143 | ||
144 | ||
145 | /*************************/ | |
146 | /* EmacLite driver calls */ | |
147 | /*************************/ | |
148 | ||
149 | /** | |
150 | * xemaclite_enable_interrupts - Enable the interrupts for the EmacLite device | |
151 | * @drvdata: Pointer to the Emaclite device private data | |
152 | * | |
153 | * This function enables the Tx and Rx interrupts for the Emaclite device along | |
154 | * with the Global Interrupt Enable. | |
155 | */ | |
156 | static void xemaclite_enable_interrupts(struct net_local *drvdata) | |
157 | { | |
158 | u32 reg_data; | |
159 | ||
160 | /* Enable the Tx interrupts for the first Buffer */ | |
161 | reg_data = in_be32(drvdata->base_addr + XEL_TSR_OFFSET); | |
162 | out_be32(drvdata->base_addr + XEL_TSR_OFFSET, | |
163 | reg_data | XEL_TSR_XMIT_IE_MASK); | |
164 | ||
165 | /* Enable the Tx interrupts for the second Buffer if | |
166 | * configured in HW */ | |
167 | if (drvdata->tx_ping_pong != 0) { | |
168 | reg_data = in_be32(drvdata->base_addr + | |
169 | XEL_BUFFER_OFFSET + XEL_TSR_OFFSET); | |
170 | out_be32(drvdata->base_addr + XEL_BUFFER_OFFSET + | |
171 | XEL_TSR_OFFSET, | |
172 | reg_data | XEL_TSR_XMIT_IE_MASK); | |
173 | } | |
174 | ||
175 | /* Enable the Rx interrupts for the first buffer */ | |
bb81b2dd | 176 | out_be32(drvdata->base_addr + XEL_RSR_OFFSET, |
95acf7d7 | 177 | XEL_RSR_RECV_IE_MASK); |
bb81b2dd JL |
178 | |
179 | /* Enable the Rx interrupts for the second Buffer if | |
180 | * configured in HW */ | |
181 | if (drvdata->rx_ping_pong != 0) { | |
bb81b2dd JL |
182 | out_be32(drvdata->base_addr + XEL_BUFFER_OFFSET + |
183 | XEL_RSR_OFFSET, | |
95acf7d7 | 184 | XEL_RSR_RECV_IE_MASK); |
bb81b2dd JL |
185 | } |
186 | ||
187 | /* Enable the Global Interrupt Enable */ | |
188 | out_be32(drvdata->base_addr + XEL_GIER_OFFSET, XEL_GIER_GIE_MASK); | |
189 | } | |
190 | ||
191 | /** | |
192 | * xemaclite_disable_interrupts - Disable the interrupts for the EmacLite device | |
193 | * @drvdata: Pointer to the Emaclite device private data | |
194 | * | |
195 | * This function disables the Tx and Rx interrupts for the Emaclite device, | |
196 | * along with the Global Interrupt Enable. | |
197 | */ | |
198 | static void xemaclite_disable_interrupts(struct net_local *drvdata) | |
199 | { | |
200 | u32 reg_data; | |
201 | ||
202 | /* Disable the Global Interrupt Enable */ | |
203 | out_be32(drvdata->base_addr + XEL_GIER_OFFSET, XEL_GIER_GIE_MASK); | |
204 | ||
205 | /* Disable the Tx interrupts for the first buffer */ | |
206 | reg_data = in_be32(drvdata->base_addr + XEL_TSR_OFFSET); | |
207 | out_be32(drvdata->base_addr + XEL_TSR_OFFSET, | |
208 | reg_data & (~XEL_TSR_XMIT_IE_MASK)); | |
209 | ||
210 | /* Disable the Tx interrupts for the second Buffer | |
211 | * if configured in HW */ | |
212 | if (drvdata->tx_ping_pong != 0) { | |
213 | reg_data = in_be32(drvdata->base_addr + XEL_BUFFER_OFFSET + | |
214 | XEL_TSR_OFFSET); | |
215 | out_be32(drvdata->base_addr + XEL_BUFFER_OFFSET + | |
216 | XEL_TSR_OFFSET, | |
217 | reg_data & (~XEL_TSR_XMIT_IE_MASK)); | |
218 | } | |
219 | ||
220 | /* Disable the Rx interrupts for the first buffer */ | |
221 | reg_data = in_be32(drvdata->base_addr + XEL_RSR_OFFSET); | |
222 | out_be32(drvdata->base_addr + XEL_RSR_OFFSET, | |
223 | reg_data & (~XEL_RSR_RECV_IE_MASK)); | |
224 | ||
225 | /* Disable the Rx interrupts for the second buffer | |
226 | * if configured in HW */ | |
227 | if (drvdata->rx_ping_pong != 0) { | |
228 | ||
229 | reg_data = in_be32(drvdata->base_addr + XEL_BUFFER_OFFSET + | |
230 | XEL_RSR_OFFSET); | |
231 | out_be32(drvdata->base_addr + XEL_BUFFER_OFFSET + | |
232 | XEL_RSR_OFFSET, | |
233 | reg_data & (~XEL_RSR_RECV_IE_MASK)); | |
234 | } | |
235 | } | |
236 | ||
237 | /** | |
238 | * xemaclite_aligned_write - Write from 16-bit aligned to 32-bit aligned address | |
239 | * @src_ptr: Void pointer to the 16-bit aligned source address | |
240 | * @dest_ptr: Pointer to the 32-bit aligned destination address | |
241 | * @length: Number bytes to write from source to destination | |
242 | * | |
243 | * This function writes data from a 16-bit aligned buffer to a 32-bit aligned | |
244 | * address in the EmacLite device. | |
245 | */ | |
246 | static void xemaclite_aligned_write(void *src_ptr, u32 *dest_ptr, | |
247 | unsigned length) | |
248 | { | |
249 | u32 align_buffer; | |
250 | u32 *to_u32_ptr; | |
251 | u16 *from_u16_ptr, *to_u16_ptr; | |
252 | ||
253 | to_u32_ptr = dest_ptr; | |
254 | from_u16_ptr = (u16 *) src_ptr; | |
255 | align_buffer = 0; | |
256 | ||
257 | for (; length > 3; length -= 4) { | |
258 | to_u16_ptr = (u16 *) ((void *) &align_buffer); | |
259 | *to_u16_ptr++ = *from_u16_ptr++; | |
260 | *to_u16_ptr++ = *from_u16_ptr++; | |
261 | ||
262 | /* Output a word */ | |
263 | *to_u32_ptr++ = align_buffer; | |
264 | } | |
265 | if (length) { | |
266 | u8 *from_u8_ptr, *to_u8_ptr; | |
267 | ||
268 | /* Set up to output the remaining data */ | |
269 | align_buffer = 0; | |
270 | to_u8_ptr = (u8 *) &align_buffer; | |
271 | from_u8_ptr = (u8 *) from_u16_ptr; | |
272 | ||
273 | /* Output the remaining data */ | |
274 | for (; length > 0; length--) | |
275 | *to_u8_ptr++ = *from_u8_ptr++; | |
276 | ||
277 | *to_u32_ptr = align_buffer; | |
278 | } | |
279 | } | |
280 | ||
281 | /** | |
282 | * xemaclite_aligned_read - Read from 32-bit aligned to 16-bit aligned buffer | |
283 | * @src_ptr: Pointer to the 32-bit aligned source address | |
284 | * @dest_ptr: Pointer to the 16-bit aligned destination address | |
285 | * @length: Number bytes to read from source to destination | |
286 | * | |
287 | * This function reads data from a 32-bit aligned address in the EmacLite device | |
288 | * to a 16-bit aligned buffer. | |
289 | */ | |
290 | static void xemaclite_aligned_read(u32 *src_ptr, u8 *dest_ptr, | |
291 | unsigned length) | |
292 | { | |
293 | u16 *to_u16_ptr, *from_u16_ptr; | |
294 | u32 *from_u32_ptr; | |
295 | u32 align_buffer; | |
296 | ||
297 | from_u32_ptr = src_ptr; | |
298 | to_u16_ptr = (u16 *) dest_ptr; | |
299 | ||
300 | for (; length > 3; length -= 4) { | |
301 | /* Copy each word into the temporary buffer */ | |
302 | align_buffer = *from_u32_ptr++; | |
303 | from_u16_ptr = (u16 *)&align_buffer; | |
304 | ||
305 | /* Read data from source */ | |
306 | *to_u16_ptr++ = *from_u16_ptr++; | |
307 | *to_u16_ptr++ = *from_u16_ptr++; | |
308 | } | |
309 | ||
310 | if (length) { | |
311 | u8 *to_u8_ptr, *from_u8_ptr; | |
312 | ||
313 | /* Set up to read the remaining data */ | |
314 | to_u8_ptr = (u8 *) to_u16_ptr; | |
315 | align_buffer = *from_u32_ptr++; | |
316 | from_u8_ptr = (u8 *) &align_buffer; | |
317 | ||
318 | /* Read the remaining data */ | |
319 | for (; length > 0; length--) | |
320 | *to_u8_ptr = *from_u8_ptr; | |
321 | } | |
322 | } | |
323 | ||
324 | /** | |
325 | * xemaclite_send_data - Send an Ethernet frame | |
326 | * @drvdata: Pointer to the Emaclite device private data | |
327 | * @data: Pointer to the data to be sent | |
328 | * @byte_count: Total frame size, including header | |
329 | * | |
330 | * This function checks if the Tx buffer of the Emaclite device is free to send | |
331 | * data. If so, it fills the Tx buffer with data for transmission. Otherwise, it | |
332 | * returns an error. | |
333 | * | |
334 | * Return: 0 upon success or -1 if the buffer(s) are full. | |
335 | * | |
336 | * Note: The maximum Tx packet size can not be more than Ethernet header | |
337 | * (14 Bytes) + Maximum MTU (1500 bytes). This is excluding FCS. | |
338 | */ | |
339 | static int xemaclite_send_data(struct net_local *drvdata, u8 *data, | |
340 | unsigned int byte_count) | |
341 | { | |
342 | u32 reg_data; | |
343 | void __iomem *addr; | |
344 | ||
345 | /* Determine the expected Tx buffer address */ | |
346 | addr = drvdata->base_addr + drvdata->next_tx_buf_to_use; | |
347 | ||
348 | /* If the length is too large, truncate it */ | |
349 | if (byte_count > ETH_FRAME_LEN) | |
350 | byte_count = ETH_FRAME_LEN; | |
351 | ||
352 | /* Check if the expected buffer is available */ | |
353 | reg_data = in_be32(addr + XEL_TSR_OFFSET); | |
354 | if ((reg_data & (XEL_TSR_XMIT_BUSY_MASK | | |
355 | XEL_TSR_XMIT_ACTIVE_MASK)) == 0) { | |
356 | ||
357 | /* Switch to next buffer if configured */ | |
358 | if (drvdata->tx_ping_pong != 0) | |
359 | drvdata->next_tx_buf_to_use ^= XEL_BUFFER_OFFSET; | |
360 | } else if (drvdata->tx_ping_pong != 0) { | |
361 | /* If the expected buffer is full, try the other buffer, | |
362 | * if it is configured in HW */ | |
363 | ||
364 | addr = (void __iomem __force *)((u32 __force)addr ^ | |
365 | XEL_BUFFER_OFFSET); | |
366 | reg_data = in_be32(addr + XEL_TSR_OFFSET); | |
367 | ||
368 | if ((reg_data & (XEL_TSR_XMIT_BUSY_MASK | | |
369 | XEL_TSR_XMIT_ACTIVE_MASK)) != 0) | |
370 | return -1; /* Buffers were full, return failure */ | |
371 | } else | |
372 | return -1; /* Buffer was full, return failure */ | |
373 | ||
374 | /* Write the frame to the buffer */ | |
375 | xemaclite_aligned_write(data, (u32 __force *) addr, byte_count); | |
376 | ||
377 | out_be32(addr + XEL_TPLR_OFFSET, (byte_count & XEL_TPLR_LENGTH_MASK)); | |
378 | ||
379 | /* Update the Tx Status Register to indicate that there is a | |
380 | * frame to send. Set the XEL_TSR_XMIT_ACTIVE_MASK flag which | |
381 | * is used by the interrupt handler to check whether a frame | |
382 | * has been transmitted */ | |
383 | reg_data = in_be32(addr + XEL_TSR_OFFSET); | |
384 | reg_data |= (XEL_TSR_XMIT_BUSY_MASK | XEL_TSR_XMIT_ACTIVE_MASK); | |
385 | out_be32(addr + XEL_TSR_OFFSET, reg_data); | |
386 | ||
387 | return 0; | |
388 | } | |
389 | ||
390 | /** | |
391 | * xemaclite_recv_data - Receive a frame | |
392 | * @drvdata: Pointer to the Emaclite device private data | |
393 | * @data: Address where the data is to be received | |
394 | * | |
395 | * This function is intended to be called from the interrupt context or | |
396 | * with a wrapper which waits for the receive frame to be available. | |
397 | * | |
398 | * Return: Total number of bytes received | |
399 | */ | |
400 | static u16 xemaclite_recv_data(struct net_local *drvdata, u8 *data) | |
401 | { | |
402 | void __iomem *addr; | |
403 | u16 length, proto_type; | |
404 | u32 reg_data; | |
405 | ||
406 | /* Determine the expected buffer address */ | |
407 | addr = (drvdata->base_addr + drvdata->next_rx_buf_to_use); | |
408 | ||
409 | /* Verify which buffer has valid data */ | |
410 | reg_data = in_be32(addr + XEL_RSR_OFFSET); | |
411 | ||
412 | if ((reg_data & XEL_RSR_RECV_DONE_MASK) == XEL_RSR_RECV_DONE_MASK) { | |
413 | if (drvdata->rx_ping_pong != 0) | |
414 | drvdata->next_rx_buf_to_use ^= XEL_BUFFER_OFFSET; | |
415 | } else { | |
416 | /* The instance is out of sync, try other buffer if other | |
417 | * buffer is configured, return 0 otherwise. If the instance is | |
418 | * out of sync, do not update the 'next_rx_buf_to_use' since it | |
419 | * will correct on subsequent calls */ | |
420 | if (drvdata->rx_ping_pong != 0) | |
421 | addr = (void __iomem __force *)((u32 __force)addr ^ | |
422 | XEL_BUFFER_OFFSET); | |
423 | else | |
424 | return 0; /* No data was available */ | |
425 | ||
426 | /* Verify that buffer has valid data */ | |
427 | reg_data = in_be32(addr + XEL_RSR_OFFSET); | |
428 | if ((reg_data & XEL_RSR_RECV_DONE_MASK) != | |
429 | XEL_RSR_RECV_DONE_MASK) | |
430 | return 0; /* No data was available */ | |
431 | } | |
432 | ||
433 | /* Get the protocol type of the ethernet frame that arrived */ | |
44180a57 MS |
434 | proto_type = ((ntohl(in_be32(addr + XEL_HEADER_OFFSET + |
435 | XEL_RXBUFF_OFFSET)) >> XEL_HEADER_SHIFT) & | |
bb81b2dd JL |
436 | XEL_RPLR_LENGTH_MASK); |
437 | ||
438 | /* Check if received ethernet frame is a raw ethernet frame | |
439 | * or an IP packet or an ARP packet */ | |
440 | if (proto_type > (ETH_FRAME_LEN + ETH_FCS_LEN)) { | |
441 | ||
442 | if (proto_type == ETH_P_IP) { | |
44180a57 | 443 | length = ((ntohl(in_be32(addr + |
bb81b2dd | 444 | XEL_HEADER_IP_LENGTH_OFFSET + |
44180a57 | 445 | XEL_RXBUFF_OFFSET)) >> |
bb81b2dd JL |
446 | XEL_HEADER_SHIFT) & |
447 | XEL_RPLR_LENGTH_MASK); | |
448 | length += ETH_HLEN + ETH_FCS_LEN; | |
449 | ||
450 | } else if (proto_type == ETH_P_ARP) | |
451 | length = XEL_ARP_PACKET_SIZE + ETH_HLEN + ETH_FCS_LEN; | |
452 | else | |
453 | /* Field contains type other than IP or ARP, use max | |
454 | * frame size and let user parse it */ | |
455 | length = ETH_FRAME_LEN + ETH_FCS_LEN; | |
456 | } else | |
457 | /* Use the length in the frame, plus the header and trailer */ | |
458 | length = proto_type + ETH_HLEN + ETH_FCS_LEN; | |
459 | ||
460 | /* Read from the EmacLite device */ | |
461 | xemaclite_aligned_read((u32 __force *) (addr + XEL_RXBUFF_OFFSET), | |
462 | data, length); | |
463 | ||
464 | /* Acknowledge the frame */ | |
465 | reg_data = in_be32(addr + XEL_RSR_OFFSET); | |
466 | reg_data &= ~XEL_RSR_RECV_DONE_MASK; | |
467 | out_be32(addr + XEL_RSR_OFFSET, reg_data); | |
468 | ||
469 | return length; | |
470 | } | |
471 | ||
472 | /** | |
5cdaaa12 | 473 | * xemaclite_update_address - Update the MAC address in the device |
bb81b2dd JL |
474 | * @drvdata: Pointer to the Emaclite device private data |
475 | * @address_ptr:Pointer to the MAC address (MAC address is a 48-bit value) | |
476 | * | |
477 | * Tx must be idle and Rx should be idle for deterministic results. | |
478 | * It is recommended that this function should be called after the | |
479 | * initialization and before transmission of any packets from the device. | |
480 | * The MAC address can be programmed using any of the two transmit | |
481 | * buffers (if configured). | |
482 | */ | |
5cdaaa12 JL |
483 | static void xemaclite_update_address(struct net_local *drvdata, |
484 | u8 *address_ptr) | |
bb81b2dd JL |
485 | { |
486 | void __iomem *addr; | |
487 | u32 reg_data; | |
488 | ||
489 | /* Determine the expected Tx buffer address */ | |
490 | addr = drvdata->base_addr + drvdata->next_tx_buf_to_use; | |
491 | ||
492 | xemaclite_aligned_write(address_ptr, (u32 __force *) addr, ETH_ALEN); | |
493 | ||
494 | out_be32(addr + XEL_TPLR_OFFSET, ETH_ALEN); | |
495 | ||
496 | /* Update the MAC address in the EmacLite */ | |
497 | reg_data = in_be32(addr + XEL_TSR_OFFSET); | |
498 | out_be32(addr + XEL_TSR_OFFSET, reg_data | XEL_TSR_PROG_MAC_ADDR); | |
499 | ||
500 | /* Wait for EmacLite to finish with the MAC address update */ | |
501 | while ((in_be32(addr + XEL_TSR_OFFSET) & | |
502 | XEL_TSR_PROG_MAC_ADDR) != 0) | |
503 | ; | |
504 | } | |
505 | ||
5cdaaa12 JL |
506 | /** |
507 | * xemaclite_set_mac_address - Set the MAC address for this device | |
508 | * @dev: Pointer to the network device instance | |
509 | * @addr: Void pointer to the sockaddr structure | |
510 | * | |
511 | * This function copies the HW address from the sockaddr strucutre to the | |
512 | * net_device structure and updates the address in HW. | |
513 | * | |
514 | * Return: Error if the net device is busy or 0 if the addr is set | |
515 | * successfully | |
516 | */ | |
517 | static int xemaclite_set_mac_address(struct net_device *dev, void *address) | |
518 | { | |
ece49153 | 519 | struct net_local *lp = netdev_priv(dev); |
5cdaaa12 JL |
520 | struct sockaddr *addr = address; |
521 | ||
522 | if (netif_running(dev)) | |
523 | return -EBUSY; | |
524 | ||
525 | memcpy(dev->dev_addr, addr->sa_data, dev->addr_len); | |
526 | xemaclite_update_address(lp, dev->dev_addr); | |
527 | return 0; | |
528 | } | |
529 | ||
bb81b2dd JL |
530 | /** |
531 | * xemaclite_tx_timeout - Callback for Tx Timeout | |
532 | * @dev: Pointer to the network device | |
533 | * | |
534 | * This function is called when Tx time out occurs for Emaclite device. | |
535 | */ | |
536 | static void xemaclite_tx_timeout(struct net_device *dev) | |
537 | { | |
ece49153 | 538 | struct net_local *lp = netdev_priv(dev); |
bb81b2dd JL |
539 | unsigned long flags; |
540 | ||
541 | dev_err(&lp->ndev->dev, "Exceeded transmit timeout of %lu ms\n", | |
542 | TX_TIMEOUT * 1000UL / HZ); | |
543 | ||
544 | dev->stats.tx_errors++; | |
545 | ||
546 | /* Reset the device */ | |
547 | spin_lock_irqsave(&lp->reset_lock, flags); | |
548 | ||
549 | /* Shouldn't really be necessary, but shouldn't hurt */ | |
550 | netif_stop_queue(dev); | |
551 | ||
552 | xemaclite_disable_interrupts(lp); | |
553 | xemaclite_enable_interrupts(lp); | |
554 | ||
555 | if (lp->deferred_skb) { | |
556 | dev_kfree_skb(lp->deferred_skb); | |
557 | lp->deferred_skb = NULL; | |
558 | dev->stats.tx_errors++; | |
559 | } | |
560 | ||
561 | /* To exclude tx timeout */ | |
1ae5dc34 | 562 | dev->trans_start = jiffies; /* prevent tx timeout */ |
bb81b2dd JL |
563 | |
564 | /* We're all ready to go. Start the queue */ | |
565 | netif_wake_queue(dev); | |
566 | spin_unlock_irqrestore(&lp->reset_lock, flags); | |
567 | } | |
568 | ||
569 | /**********************/ | |
570 | /* Interrupt Handlers */ | |
571 | /**********************/ | |
572 | ||
573 | /** | |
574 | * xemaclite_tx_handler - Interrupt handler for frames sent | |
575 | * @dev: Pointer to the network device | |
576 | * | |
577 | * This function updates the number of packets transmitted and handles the | |
578 | * deferred skb, if there is one. | |
579 | */ | |
580 | static void xemaclite_tx_handler(struct net_device *dev) | |
581 | { | |
ece49153 | 582 | struct net_local *lp = netdev_priv(dev); |
bb81b2dd JL |
583 | |
584 | dev->stats.tx_packets++; | |
585 | if (lp->deferred_skb) { | |
586 | if (xemaclite_send_data(lp, | |
587 | (u8 *) lp->deferred_skb->data, | |
588 | lp->deferred_skb->len) != 0) | |
589 | return; | |
590 | else { | |
591 | dev->stats.tx_bytes += lp->deferred_skb->len; | |
592 | dev_kfree_skb_irq(lp->deferred_skb); | |
593 | lp->deferred_skb = NULL; | |
1ae5dc34 | 594 | dev->trans_start = jiffies; /* prevent tx timeout */ |
bb81b2dd JL |
595 | netif_wake_queue(dev); |
596 | } | |
597 | } | |
598 | } | |
599 | ||
600 | /** | |
601 | * xemaclite_rx_handler- Interrupt handler for frames received | |
602 | * @dev: Pointer to the network device | |
603 | * | |
604 | * This function allocates memory for a socket buffer, fills it with data | |
605 | * received and hands it over to the TCP/IP stack. | |
606 | */ | |
607 | static void xemaclite_rx_handler(struct net_device *dev) | |
608 | { | |
ece49153 | 609 | struct net_local *lp = netdev_priv(dev); |
bb81b2dd JL |
610 | struct sk_buff *skb; |
611 | unsigned int align; | |
612 | u32 len; | |
613 | ||
614 | len = ETH_FRAME_LEN + ETH_FCS_LEN; | |
615 | skb = dev_alloc_skb(len + ALIGNMENT); | |
616 | if (!skb) { | |
617 | /* Couldn't get memory. */ | |
618 | dev->stats.rx_dropped++; | |
619 | dev_err(&lp->ndev->dev, "Could not allocate receive buffer\n"); | |
620 | return; | |
621 | } | |
622 | ||
623 | /* | |
624 | * A new skb should have the data halfword aligned, but this code is | |
625 | * here just in case that isn't true. Calculate how many | |
626 | * bytes we should reserve to get the data to start on a word | |
627 | * boundary */ | |
628 | align = BUFFER_ALIGN(skb->data); | |
629 | if (align) | |
630 | skb_reserve(skb, align); | |
631 | ||
632 | skb_reserve(skb, 2); | |
633 | ||
634 | len = xemaclite_recv_data(lp, (u8 *) skb->data); | |
635 | ||
636 | if (!len) { | |
637 | dev->stats.rx_errors++; | |
638 | dev_kfree_skb_irq(skb); | |
639 | return; | |
640 | } | |
641 | ||
642 | skb_put(skb, len); /* Tell the skb how much data we got */ | |
bb81b2dd JL |
643 | |
644 | skb->protocol = eth_type_trans(skb, dev); | |
bc8acf2c | 645 | skb_checksum_none_assert(skb); |
bb81b2dd JL |
646 | |
647 | dev->stats.rx_packets++; | |
648 | dev->stats.rx_bytes += len; | |
bb81b2dd JL |
649 | |
650 | netif_rx(skb); /* Send the packet upstream */ | |
651 | } | |
652 | ||
653 | /** | |
654 | * xemaclite_interrupt - Interrupt handler for this driver | |
655 | * @irq: Irq of the Emaclite device | |
656 | * @dev_id: Void pointer to the network device instance used as callback | |
657 | * reference | |
658 | * | |
659 | * This function handles the Tx and Rx interrupts of the EmacLite device. | |
660 | */ | |
661 | static irqreturn_t xemaclite_interrupt(int irq, void *dev_id) | |
662 | { | |
663 | bool tx_complete = 0; | |
664 | struct net_device *dev = dev_id; | |
ece49153 | 665 | struct net_local *lp = netdev_priv(dev); |
bb81b2dd JL |
666 | void __iomem *base_addr = lp->base_addr; |
667 | u32 tx_status; | |
668 | ||
669 | /* Check if there is Rx Data available */ | |
670 | if ((in_be32(base_addr + XEL_RSR_OFFSET) & XEL_RSR_RECV_DONE_MASK) || | |
671 | (in_be32(base_addr + XEL_BUFFER_OFFSET + XEL_RSR_OFFSET) | |
672 | & XEL_RSR_RECV_DONE_MASK)) | |
673 | ||
674 | xemaclite_rx_handler(dev); | |
675 | ||
676 | /* Check if the Transmission for the first buffer is completed */ | |
677 | tx_status = in_be32(base_addr + XEL_TSR_OFFSET); | |
678 | if (((tx_status & XEL_TSR_XMIT_BUSY_MASK) == 0) && | |
679 | (tx_status & XEL_TSR_XMIT_ACTIVE_MASK) != 0) { | |
680 | ||
681 | tx_status &= ~XEL_TSR_XMIT_ACTIVE_MASK; | |
682 | out_be32(base_addr + XEL_TSR_OFFSET, tx_status); | |
683 | ||
684 | tx_complete = 1; | |
685 | } | |
686 | ||
687 | /* Check if the Transmission for the second buffer is completed */ | |
688 | tx_status = in_be32(base_addr + XEL_BUFFER_OFFSET + XEL_TSR_OFFSET); | |
689 | if (((tx_status & XEL_TSR_XMIT_BUSY_MASK) == 0) && | |
690 | (tx_status & XEL_TSR_XMIT_ACTIVE_MASK) != 0) { | |
691 | ||
692 | tx_status &= ~XEL_TSR_XMIT_ACTIVE_MASK; | |
693 | out_be32(base_addr + XEL_BUFFER_OFFSET + XEL_TSR_OFFSET, | |
694 | tx_status); | |
695 | ||
696 | tx_complete = 1; | |
697 | } | |
698 | ||
699 | /* If there was a Tx interrupt, call the Tx Handler */ | |
700 | if (tx_complete != 0) | |
701 | xemaclite_tx_handler(dev); | |
702 | ||
703 | return IRQ_HANDLED; | |
704 | } | |
705 | ||
5cdaaa12 JL |
706 | /**********************/ |
707 | /* MDIO Bus functions */ | |
708 | /**********************/ | |
709 | ||
710 | /** | |
711 | * xemaclite_mdio_wait - Wait for the MDIO to be ready to use | |
712 | * @lp: Pointer to the Emaclite device private data | |
713 | * | |
714 | * This function waits till the device is ready to accept a new MDIO | |
715 | * request. | |
716 | * | |
717 | * Return: 0 for success or ETIMEDOUT for a timeout | |
718 | */ | |
719 | ||
720 | static int xemaclite_mdio_wait(struct net_local *lp) | |
721 | { | |
722 | long end = jiffies + 2; | |
723 | ||
724 | /* wait for the MDIO interface to not be busy or timeout | |
725 | after some time. | |
726 | */ | |
727 | while (in_be32(lp->base_addr + XEL_MDIOCTRL_OFFSET) & | |
728 | XEL_MDIOCTRL_MDIOSTS_MASK) { | |
729 | if (end - jiffies <= 0) { | |
730 | WARN_ON(1); | |
731 | return -ETIMEDOUT; | |
732 | } | |
733 | msleep(1); | |
734 | } | |
735 | return 0; | |
736 | } | |
737 | ||
738 | /** | |
739 | * xemaclite_mdio_read - Read from a given MII management register | |
740 | * @bus: the mii_bus struct | |
741 | * @phy_id: the phy address | |
742 | * @reg: register number to read from | |
743 | * | |
744 | * This function waits till the device is ready to accept a new MDIO | |
745 | * request and then writes the phy address to the MDIO Address register | |
746 | * and reads data from MDIO Read Data register, when its available. | |
747 | * | |
748 | * Return: Value read from the MII management register | |
749 | */ | |
750 | static int xemaclite_mdio_read(struct mii_bus *bus, int phy_id, int reg) | |
751 | { | |
752 | struct net_local *lp = bus->priv; | |
753 | u32 ctrl_reg; | |
754 | u32 rc; | |
755 | ||
756 | if (xemaclite_mdio_wait(lp)) | |
757 | return -ETIMEDOUT; | |
758 | ||
759 | /* Write the PHY address, register number and set the OP bit in the | |
760 | * MDIO Address register. Set the Status bit in the MDIO Control | |
761 | * register to start a MDIO read transaction. | |
762 | */ | |
763 | ctrl_reg = in_be32(lp->base_addr + XEL_MDIOCTRL_OFFSET); | |
764 | out_be32(lp->base_addr + XEL_MDIOADDR_OFFSET, | |
765 | XEL_MDIOADDR_OP_MASK | | |
766 | ((phy_id << XEL_MDIOADDR_PHYADR_SHIFT) | reg)); | |
767 | out_be32(lp->base_addr + XEL_MDIOCTRL_OFFSET, | |
768 | ctrl_reg | XEL_MDIOCTRL_MDIOSTS_MASK); | |
769 | ||
770 | if (xemaclite_mdio_wait(lp)) | |
771 | return -ETIMEDOUT; | |
772 | ||
773 | rc = in_be32(lp->base_addr + XEL_MDIORD_OFFSET); | |
774 | ||
775 | dev_dbg(&lp->ndev->dev, | |
776 | "xemaclite_mdio_read(phy_id=%i, reg=%x) == %x\n", | |
777 | phy_id, reg, rc); | |
778 | ||
779 | return rc; | |
780 | } | |
781 | ||
782 | /** | |
783 | * xemaclite_mdio_write - Write to a given MII management register | |
784 | * @bus: the mii_bus struct | |
785 | * @phy_id: the phy address | |
786 | * @reg: register number to write to | |
787 | * @val: value to write to the register number specified by reg | |
788 | * | |
789 | * This fucntion waits till the device is ready to accept a new MDIO | |
790 | * request and then writes the val to the MDIO Write Data register. | |
791 | */ | |
792 | static int xemaclite_mdio_write(struct mii_bus *bus, int phy_id, int reg, | |
793 | u16 val) | |
794 | { | |
795 | struct net_local *lp = bus->priv; | |
796 | u32 ctrl_reg; | |
797 | ||
798 | dev_dbg(&lp->ndev->dev, | |
799 | "xemaclite_mdio_write(phy_id=%i, reg=%x, val=%x)\n", | |
800 | phy_id, reg, val); | |
801 | ||
802 | if (xemaclite_mdio_wait(lp)) | |
803 | return -ETIMEDOUT; | |
804 | ||
805 | /* Write the PHY address, register number and clear the OP bit in the | |
806 | * MDIO Address register and then write the value into the MDIO Write | |
807 | * Data register. Finally, set the Status bit in the MDIO Control | |
808 | * register to start a MDIO write transaction. | |
809 | */ | |
810 | ctrl_reg = in_be32(lp->base_addr + XEL_MDIOCTRL_OFFSET); | |
811 | out_be32(lp->base_addr + XEL_MDIOADDR_OFFSET, | |
812 | ~XEL_MDIOADDR_OP_MASK & | |
813 | ((phy_id << XEL_MDIOADDR_PHYADR_SHIFT) | reg)); | |
814 | out_be32(lp->base_addr + XEL_MDIOWR_OFFSET, val); | |
815 | out_be32(lp->base_addr + XEL_MDIOCTRL_OFFSET, | |
816 | ctrl_reg | XEL_MDIOCTRL_MDIOSTS_MASK); | |
817 | ||
818 | return 0; | |
819 | } | |
820 | ||
821 | /** | |
822 | * xemaclite_mdio_reset - Reset the mdio bus. | |
823 | * @bus: Pointer to the MII bus | |
824 | * | |
825 | * This function is required(?) as per Documentation/networking/phy.txt. | |
826 | * There is no reset in this device; this function always returns 0. | |
827 | */ | |
828 | static int xemaclite_mdio_reset(struct mii_bus *bus) | |
829 | { | |
830 | return 0; | |
831 | } | |
832 | ||
833 | /** | |
834 | * xemaclite_mdio_setup - Register mii_bus for the Emaclite device | |
835 | * @lp: Pointer to the Emaclite device private data | |
836 | * @ofdev: Pointer to OF device structure | |
837 | * | |
838 | * This function enables MDIO bus in the Emaclite device and registers a | |
839 | * mii_bus. | |
840 | * | |
841 | * Return: 0 upon success or a negative error upon failure | |
842 | */ | |
843 | static int xemaclite_mdio_setup(struct net_local *lp, struct device *dev) | |
844 | { | |
845 | struct mii_bus *bus; | |
846 | int rc; | |
847 | struct resource res; | |
848 | struct device_node *np = of_get_parent(lp->phy_node); | |
849 | ||
850 | /* Don't register the MDIO bus if the phy_node or its parent node | |
851 | * can't be found. | |
852 | */ | |
853 | if (!np) | |
854 | return -ENODEV; | |
855 | ||
856 | /* Enable the MDIO bus by asserting the enable bit in MDIO Control | |
857 | * register. | |
858 | */ | |
859 | out_be32(lp->base_addr + XEL_MDIOCTRL_OFFSET, | |
860 | XEL_MDIOCTRL_MDIOEN_MASK); | |
861 | ||
862 | bus = mdiobus_alloc(); | |
863 | if (!bus) | |
864 | return -ENOMEM; | |
865 | ||
866 | of_address_to_resource(np, 0, &res); | |
867 | snprintf(bus->id, MII_BUS_ID_SIZE, "%.8llx", | |
868 | (unsigned long long)res.start); | |
869 | bus->priv = lp; | |
870 | bus->name = "Xilinx Emaclite MDIO"; | |
871 | bus->read = xemaclite_mdio_read; | |
872 | bus->write = xemaclite_mdio_write; | |
873 | bus->reset = xemaclite_mdio_reset; | |
874 | bus->parent = dev; | |
875 | bus->irq = lp->mdio_irqs; /* preallocated IRQ table */ | |
876 | ||
877 | lp->mii_bus = bus; | |
878 | ||
879 | rc = of_mdiobus_register(bus, np); | |
880 | if (rc) | |
881 | goto err_register; | |
882 | ||
883 | return 0; | |
884 | ||
885 | err_register: | |
886 | mdiobus_free(bus); | |
887 | return rc; | |
888 | } | |
889 | ||
890 | /** | |
891 | * xemaclite_adjust_link - Link state callback for the Emaclite device | |
892 | * @ndev: pointer to net_device struct | |
893 | * | |
894 | * There's nothing in the Emaclite device to be configured when the link | |
895 | * state changes. We just print the status. | |
896 | */ | |
897 | void xemaclite_adjust_link(struct net_device *ndev) | |
898 | { | |
899 | struct net_local *lp = netdev_priv(ndev); | |
900 | struct phy_device *phy = lp->phy_dev; | |
901 | int link_state; | |
902 | ||
903 | /* hash together the state values to decide if something has changed */ | |
904 | link_state = phy->speed | (phy->duplex << 1) | phy->link; | |
905 | ||
906 | if (lp->last_link != link_state) { | |
907 | lp->last_link = link_state; | |
908 | phy_print_status(phy); | |
909 | } | |
910 | } | |
911 | ||
bb81b2dd JL |
912 | /** |
913 | * xemaclite_open - Open the network device | |
914 | * @dev: Pointer to the network device | |
915 | * | |
916 | * This function sets the MAC address, requests an IRQ and enables interrupts | |
917 | * for the Emaclite device and starts the Tx queue. | |
5cdaaa12 | 918 | * It also connects to the phy device, if MDIO is included in Emaclite device. |
bb81b2dd JL |
919 | */ |
920 | static int xemaclite_open(struct net_device *dev) | |
921 | { | |
ece49153 | 922 | struct net_local *lp = netdev_priv(dev); |
bb81b2dd JL |
923 | int retval; |
924 | ||
925 | /* Just to be safe, stop the device first */ | |
926 | xemaclite_disable_interrupts(lp); | |
927 | ||
5cdaaa12 JL |
928 | if (lp->phy_node) { |
929 | u32 bmcr; | |
930 | ||
931 | lp->phy_dev = of_phy_connect(lp->ndev, lp->phy_node, | |
932 | xemaclite_adjust_link, 0, | |
933 | PHY_INTERFACE_MODE_MII); | |
934 | if (!lp->phy_dev) { | |
935 | dev_err(&lp->ndev->dev, "of_phy_connect() failed\n"); | |
936 | return -ENODEV; | |
937 | } | |
938 | ||
939 | /* EmacLite doesn't support giga-bit speeds */ | |
940 | lp->phy_dev->supported &= (PHY_BASIC_FEATURES); | |
941 | lp->phy_dev->advertising = lp->phy_dev->supported; | |
942 | ||
943 | /* Don't advertise 1000BASE-T Full/Half duplex speeds */ | |
944 | phy_write(lp->phy_dev, MII_CTRL1000, 0); | |
945 | ||
946 | /* Advertise only 10 and 100mbps full/half duplex speeds */ | |
947 | phy_write(lp->phy_dev, MII_ADVERTISE, ADVERTISE_ALL); | |
948 | ||
949 | /* Restart auto negotiation */ | |
950 | bmcr = phy_read(lp->phy_dev, MII_BMCR); | |
951 | bmcr |= (BMCR_ANENABLE | BMCR_ANRESTART); | |
952 | phy_write(lp->phy_dev, MII_BMCR, bmcr); | |
953 | ||
954 | phy_start(lp->phy_dev); | |
955 | } | |
956 | ||
bb81b2dd | 957 | /* Set the MAC address each time opened */ |
5cdaaa12 | 958 | xemaclite_update_address(lp, dev->dev_addr); |
bb81b2dd JL |
959 | |
960 | /* Grab the IRQ */ | |
a0607fd3 | 961 | retval = request_irq(dev->irq, xemaclite_interrupt, 0, dev->name, dev); |
bb81b2dd JL |
962 | if (retval) { |
963 | dev_err(&lp->ndev->dev, "Could not allocate interrupt %d\n", | |
964 | dev->irq); | |
5cdaaa12 JL |
965 | if (lp->phy_dev) |
966 | phy_disconnect(lp->phy_dev); | |
967 | lp->phy_dev = NULL; | |
968 | ||
bb81b2dd JL |
969 | return retval; |
970 | } | |
971 | ||
972 | /* Enable Interrupts */ | |
973 | xemaclite_enable_interrupts(lp); | |
974 | ||
975 | /* We're ready to go */ | |
976 | netif_start_queue(dev); | |
977 | ||
978 | return 0; | |
979 | } | |
980 | ||
981 | /** | |
982 | * xemaclite_close - Close the network device | |
983 | * @dev: Pointer to the network device | |
984 | * | |
985 | * This function stops the Tx queue, disables interrupts and frees the IRQ for | |
986 | * the Emaclite device. | |
5cdaaa12 | 987 | * It also disconnects the phy device associated with the Emaclite device. |
bb81b2dd JL |
988 | */ |
989 | static int xemaclite_close(struct net_device *dev) | |
990 | { | |
ece49153 | 991 | struct net_local *lp = netdev_priv(dev); |
bb81b2dd JL |
992 | |
993 | netif_stop_queue(dev); | |
994 | xemaclite_disable_interrupts(lp); | |
995 | free_irq(dev->irq, dev); | |
996 | ||
5cdaaa12 JL |
997 | if (lp->phy_dev) |
998 | phy_disconnect(lp->phy_dev); | |
999 | lp->phy_dev = NULL; | |
1000 | ||
bb81b2dd JL |
1001 | return 0; |
1002 | } | |
1003 | ||
bb81b2dd JL |
1004 | /** |
1005 | * xemaclite_send - Transmit a frame | |
1006 | * @orig_skb: Pointer to the socket buffer to be transmitted | |
1007 | * @dev: Pointer to the network device | |
1008 | * | |
1009 | * This function checks if the Tx buffer of the Emaclite device is free to send | |
1010 | * data. If so, it fills the Tx buffer with data from socket buffer data, | |
1011 | * updates the stats and frees the socket buffer. The Tx completion is signaled | |
1012 | * by an interrupt. If the Tx buffer isn't free, then the socket buffer is | |
1013 | * deferred and the Tx queue is stopped so that the deferred socket buffer can | |
1014 | * be transmitted when the Emaclite device is free to transmit data. | |
1015 | * | |
1016 | * Return: 0, always. | |
1017 | */ | |
1018 | static int xemaclite_send(struct sk_buff *orig_skb, struct net_device *dev) | |
1019 | { | |
ece49153 | 1020 | struct net_local *lp = netdev_priv(dev); |
bb81b2dd JL |
1021 | struct sk_buff *new_skb; |
1022 | unsigned int len; | |
1023 | unsigned long flags; | |
1024 | ||
1025 | len = orig_skb->len; | |
1026 | ||
1027 | new_skb = orig_skb; | |
1028 | ||
1029 | spin_lock_irqsave(&lp->reset_lock, flags); | |
1030 | if (xemaclite_send_data(lp, (u8 *) new_skb->data, len) != 0) { | |
1031 | /* If the Emaclite Tx buffer is busy, stop the Tx queue and | |
1032 | * defer the skb for transmission at a later point when the | |
1033 | * current transmission is complete */ | |
1034 | netif_stop_queue(dev); | |
1035 | lp->deferred_skb = new_skb; | |
1036 | spin_unlock_irqrestore(&lp->reset_lock, flags); | |
1037 | return 0; | |
1038 | } | |
1039 | spin_unlock_irqrestore(&lp->reset_lock, flags); | |
1040 | ||
1041 | dev->stats.tx_bytes += len; | |
1042 | dev_kfree_skb(new_skb); | |
bb81b2dd JL |
1043 | |
1044 | return 0; | |
1045 | } | |
1046 | ||
bb81b2dd JL |
1047 | /** |
1048 | * xemaclite_remove_ndev - Free the network device | |
1049 | * @ndev: Pointer to the network device to be freed | |
1050 | * | |
1051 | * This function un maps the IO region of the Emaclite device and frees the net | |
1052 | * device. | |
1053 | */ | |
1054 | static void xemaclite_remove_ndev(struct net_device *ndev) | |
1055 | { | |
1056 | if (ndev) { | |
ece49153 | 1057 | struct net_local *lp = netdev_priv(ndev); |
bb81b2dd JL |
1058 | |
1059 | if (lp->base_addr) | |
1060 | iounmap((void __iomem __force *) (lp->base_addr)); | |
1061 | free_netdev(ndev); | |
1062 | } | |
1063 | } | |
1064 | ||
1065 | /** | |
1066 | * get_bool - Get a parameter from the OF device | |
1067 | * @ofdev: Pointer to OF device structure | |
1068 | * @s: Property to be retrieved | |
1069 | * | |
1070 | * This function looks for a property in the device node and returns the value | |
1071 | * of the property if its found or 0 if the property is not found. | |
1072 | * | |
1073 | * Return: Value of the parameter if the parameter is found, or 0 otherwise | |
1074 | */ | |
2dc11581 | 1075 | static bool get_bool(struct platform_device *ofdev, const char *s) |
bb81b2dd | 1076 | { |
61c7a080 | 1077 | u32 *p = (u32 *)of_get_property(ofdev->dev.of_node, s, NULL); |
bb81b2dd JL |
1078 | |
1079 | if (p) { | |
1080 | return (bool)*p; | |
1081 | } else { | |
1082 | dev_warn(&ofdev->dev, "Parameter %s not found," | |
1083 | "defaulting to false\n", s); | |
1084 | return 0; | |
1085 | } | |
1086 | } | |
1087 | ||
1088 | static struct net_device_ops xemaclite_netdev_ops; | |
1089 | ||
1090 | /** | |
1091 | * xemaclite_of_probe - Probe method for the Emaclite device. | |
1092 | * @ofdev: Pointer to OF device structure | |
1093 | * @match: Pointer to the structure used for matching a device | |
1094 | * | |
1095 | * This function probes for the Emaclite device in the device tree. | |
1096 | * It initializes the driver data structure and the hardware, sets the MAC | |
1097 | * address and registers the network device. | |
5cdaaa12 JL |
1098 | * It also registers a mii_bus for the Emaclite device, if MDIO is included |
1099 | * in the device. | |
bb81b2dd JL |
1100 | * |
1101 | * Return: 0, if the driver is bound to the Emaclite device, or | |
1102 | * a negative error if there is failure. | |
1103 | */ | |
2dc11581 | 1104 | static int __devinit xemaclite_of_probe(struct platform_device *ofdev, |
bb81b2dd JL |
1105 | const struct of_device_id *match) |
1106 | { | |
1107 | struct resource r_irq; /* Interrupt resources */ | |
1108 | struct resource r_mem; /* IO mem resources */ | |
1109 | struct net_device *ndev = NULL; | |
1110 | struct net_local *lp = NULL; | |
1111 | struct device *dev = &ofdev->dev; | |
1112 | const void *mac_address; | |
1113 | ||
1114 | int rc = 0; | |
1115 | ||
1116 | dev_info(dev, "Device Tree Probing\n"); | |
1117 | ||
1118 | /* Get iospace for the device */ | |
61c7a080 | 1119 | rc = of_address_to_resource(ofdev->dev.of_node, 0, &r_mem); |
bb81b2dd JL |
1120 | if (rc) { |
1121 | dev_err(dev, "invalid address\n"); | |
1122 | return rc; | |
1123 | } | |
1124 | ||
1125 | /* Get IRQ for the device */ | |
61c7a080 | 1126 | rc = of_irq_to_resource(ofdev->dev.of_node, 0, &r_irq); |
bb81b2dd JL |
1127 | if (rc == NO_IRQ) { |
1128 | dev_err(dev, "no IRQ found\n"); | |
1129 | return rc; | |
1130 | } | |
1131 | ||
1132 | /* Create an ethernet device instance */ | |
1133 | ndev = alloc_etherdev(sizeof(struct net_local)); | |
1134 | if (!ndev) { | |
1135 | dev_err(dev, "Could not allocate network device\n"); | |
1136 | return -ENOMEM; | |
1137 | } | |
1138 | ||
1139 | dev_set_drvdata(dev, ndev); | |
5cdaaa12 | 1140 | SET_NETDEV_DEV(ndev, &ofdev->dev); |
bb81b2dd JL |
1141 | |
1142 | ndev->irq = r_irq.start; | |
1143 | ndev->mem_start = r_mem.start; | |
1144 | ndev->mem_end = r_mem.end; | |
1145 | ||
1146 | lp = netdev_priv(ndev); | |
1147 | lp->ndev = ndev; | |
1148 | ||
1149 | if (!request_mem_region(ndev->mem_start, | |
1150 | ndev->mem_end - ndev->mem_start + 1, | |
1151 | DRIVER_NAME)) { | |
1152 | dev_err(dev, "Couldn't lock memory region at %p\n", | |
1153 | (void *)ndev->mem_start); | |
1154 | rc = -EBUSY; | |
1155 | goto error2; | |
1156 | } | |
1157 | ||
1158 | /* Get the virtual base address for the device */ | |
575400bf | 1159 | lp->base_addr = ioremap(r_mem.start, resource_size(&r_mem)); |
bb81b2dd JL |
1160 | if (NULL == lp->base_addr) { |
1161 | dev_err(dev, "EmacLite: Could not allocate iomem\n"); | |
1162 | rc = -EIO; | |
1163 | goto error1; | |
1164 | } | |
1165 | ||
1166 | spin_lock_init(&lp->reset_lock); | |
1167 | lp->next_tx_buf_to_use = 0x0; | |
1168 | lp->next_rx_buf_to_use = 0x0; | |
1169 | lp->tx_ping_pong = get_bool(ofdev, "xlnx,tx-ping-pong"); | |
1170 | lp->rx_ping_pong = get_bool(ofdev, "xlnx,rx-ping-pong"); | |
61c7a080 | 1171 | mac_address = of_get_mac_address(ofdev->dev.of_node); |
bb81b2dd JL |
1172 | |
1173 | if (mac_address) | |
1174 | /* Set the MAC address. */ | |
1175 | memcpy(ndev->dev_addr, mac_address, 6); | |
1176 | else | |
1177 | dev_warn(dev, "No MAC address found\n"); | |
1178 | ||
1179 | /* Clear the Tx CSR's in case this is a restart */ | |
1180 | out_be32(lp->base_addr + XEL_TSR_OFFSET, 0); | |
1181 | out_be32(lp->base_addr + XEL_BUFFER_OFFSET + XEL_TSR_OFFSET, 0); | |
1182 | ||
1183 | /* Set the MAC address in the EmacLite device */ | |
5cdaaa12 JL |
1184 | xemaclite_update_address(lp, ndev->dev_addr); |
1185 | ||
61c7a080 | 1186 | lp->phy_node = of_parse_phandle(ofdev->dev.of_node, "phy-handle", 0); |
5cdaaa12 JL |
1187 | rc = xemaclite_mdio_setup(lp, &ofdev->dev); |
1188 | if (rc) | |
1189 | dev_warn(&ofdev->dev, "error registering MDIO bus\n"); | |
bb81b2dd | 1190 | |
5491f3a5 | 1191 | dev_info(dev, "MAC address is now %pM\n", ndev->dev_addr); |
bb81b2dd JL |
1192 | |
1193 | ndev->netdev_ops = &xemaclite_netdev_ops; | |
1194 | ndev->flags &= ~IFF_MULTICAST; | |
1195 | ndev->watchdog_timeo = TX_TIMEOUT; | |
1196 | ||
1197 | /* Finally, register the device */ | |
1198 | rc = register_netdev(ndev); | |
1199 | if (rc) { | |
1200 | dev_err(dev, | |
1201 | "Cannot register network device, aborting\n"); | |
1202 | goto error1; | |
1203 | } | |
1204 | ||
1205 | dev_info(dev, | |
1206 | "Xilinx EmacLite at 0x%08X mapped to 0x%08X, irq=%d\n", | |
1207 | (unsigned int __force)ndev->mem_start, | |
1208 | (unsigned int __force)lp->base_addr, ndev->irq); | |
1209 | return 0; | |
1210 | ||
1211 | error1: | |
575400bf | 1212 | release_mem_region(ndev->mem_start, resource_size(&r_mem)); |
bb81b2dd JL |
1213 | |
1214 | error2: | |
1215 | xemaclite_remove_ndev(ndev); | |
1216 | return rc; | |
1217 | } | |
1218 | ||
1219 | /** | |
1220 | * xemaclite_of_remove - Unbind the driver from the Emaclite device. | |
1221 | * @of_dev: Pointer to OF device structure | |
1222 | * | |
1223 | * This function is called if a device is physically removed from the system or | |
1224 | * if the driver module is being unloaded. It frees any resources allocated to | |
1225 | * the device. | |
1226 | * | |
1227 | * Return: 0, always. | |
1228 | */ | |
2dc11581 | 1229 | static int __devexit xemaclite_of_remove(struct platform_device *of_dev) |
bb81b2dd JL |
1230 | { |
1231 | struct device *dev = &of_dev->dev; | |
1232 | struct net_device *ndev = dev_get_drvdata(dev); | |
1233 | ||
ece49153 | 1234 | struct net_local *lp = netdev_priv(ndev); |
5cdaaa12 JL |
1235 | |
1236 | /* Un-register the mii_bus, if configured */ | |
1237 | if (lp->has_mdio) { | |
1238 | mdiobus_unregister(lp->mii_bus); | |
1239 | kfree(lp->mii_bus->irq); | |
1240 | mdiobus_free(lp->mii_bus); | |
1241 | lp->mii_bus = NULL; | |
1242 | } | |
1243 | ||
bb81b2dd JL |
1244 | unregister_netdev(ndev); |
1245 | ||
5cdaaa12 JL |
1246 | if (lp->phy_node) |
1247 | of_node_put(lp->phy_node); | |
1248 | lp->phy_node = NULL; | |
1249 | ||
bb81b2dd JL |
1250 | release_mem_region(ndev->mem_start, ndev->mem_end-ndev->mem_start + 1); |
1251 | ||
1252 | xemaclite_remove_ndev(ndev); | |
bb81b2dd JL |
1253 | dev_set_drvdata(dev, NULL); |
1254 | ||
1255 | return 0; | |
1256 | } | |
1257 | ||
357e8b5f MS |
1258 | #ifdef CONFIG_NET_POLL_CONTROLLER |
1259 | static void | |
1260 | xemaclite_poll_controller(struct net_device *ndev) | |
1261 | { | |
1262 | disable_irq(ndev->irq); | |
1263 | xemaclite_interrupt(ndev->irq, ndev); | |
1264 | enable_irq(ndev->irq); | |
1265 | } | |
1266 | #endif | |
1267 | ||
bb81b2dd JL |
1268 | static struct net_device_ops xemaclite_netdev_ops = { |
1269 | .ndo_open = xemaclite_open, | |
1270 | .ndo_stop = xemaclite_close, | |
1271 | .ndo_start_xmit = xemaclite_send, | |
5cdaaa12 | 1272 | .ndo_set_mac_address = xemaclite_set_mac_address, |
bb81b2dd | 1273 | .ndo_tx_timeout = xemaclite_tx_timeout, |
357e8b5f MS |
1274 | #ifdef CONFIG_NET_POLL_CONTROLLER |
1275 | .ndo_poll_controller = xemaclite_poll_controller, | |
1276 | #endif | |
bb81b2dd JL |
1277 | }; |
1278 | ||
1279 | /* Match table for OF platform binding */ | |
1280 | static struct of_device_id xemaclite_of_match[] __devinitdata = { | |
1281 | { .compatible = "xlnx,opb-ethernetlite-1.01.a", }, | |
1282 | { .compatible = "xlnx,opb-ethernetlite-1.01.b", }, | |
1283 | { .compatible = "xlnx,xps-ethernetlite-1.00.a", }, | |
1284 | { .compatible = "xlnx,xps-ethernetlite-2.00.a", }, | |
1285 | { .compatible = "xlnx,xps-ethernetlite-2.01.a", }, | |
5cdaaa12 | 1286 | { .compatible = "xlnx,xps-ethernetlite-3.00.a", }, |
bb81b2dd JL |
1287 | { /* end of list */ }, |
1288 | }; | |
1289 | MODULE_DEVICE_TABLE(of, xemaclite_of_match); | |
1290 | ||
1291 | static struct of_platform_driver xemaclite_of_driver = { | |
4018294b GL |
1292 | .driver = { |
1293 | .name = DRIVER_NAME, | |
1294 | .owner = THIS_MODULE, | |
1295 | .of_match_table = xemaclite_of_match, | |
1296 | }, | |
bb81b2dd JL |
1297 | .probe = xemaclite_of_probe, |
1298 | .remove = __devexit_p(xemaclite_of_remove), | |
1299 | }; | |
1300 | ||
1301 | /** | |
1302 | * xgpiopss_init - Initial driver registration call | |
1303 | * | |
1304 | * Return: 0 upon success, or a negative error upon failure. | |
1305 | */ | |
1306 | static int __init xemaclite_init(void) | |
1307 | { | |
1308 | /* No kernel boot options used, we just need to register the driver */ | |
1309 | return of_register_platform_driver(&xemaclite_of_driver); | |
1310 | } | |
1311 | ||
1312 | /** | |
1313 | * xemaclite_cleanup - Driver un-registration call | |
1314 | */ | |
1315 | static void __exit xemaclite_cleanup(void) | |
1316 | { | |
1317 | of_unregister_platform_driver(&xemaclite_of_driver); | |
1318 | } | |
1319 | ||
1320 | module_init(xemaclite_init); | |
1321 | module_exit(xemaclite_cleanup); | |
1322 | ||
1323 | MODULE_AUTHOR("Xilinx, Inc."); | |
1324 | MODULE_DESCRIPTION("Xilinx Ethernet MAC Lite driver"); | |
1325 | MODULE_LICENSE("GPL"); |