Commit | Line | Data |
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04bea68b | 1 | #include <linux/kernel.h> |
9775913f | 2 | #include <linux/export.h> |
a6422850 | 3 | #include <linux/of.h> |
cbe4097f | 4 | #include <linux/of_address.h> |
c49b8fc2 | 5 | #include <linux/of_device.h> |
04bea68b | 6 | #include <linux/of_pci.h> |
cbe4097f | 7 | #include <linux/slab.h> |
04bea68b | 8 | |
98d9f30c | 9 | static inline int __of_pci_pci_compare(struct device_node *node, |
45ab9702 | 10 | unsigned int data) |
04bea68b | 11 | { |
45ab9702 | 12 | int devfn; |
04bea68b | 13 | |
45ab9702 TR |
14 | devfn = of_pci_get_devfn(node); |
15 | if (devfn < 0) | |
98d9f30c | 16 | return 0; |
45ab9702 TR |
17 | |
18 | return devfn == data; | |
98d9f30c | 19 | } |
04bea68b | 20 | |
98d9f30c BH |
21 | struct device_node *of_pci_find_child_device(struct device_node *parent, |
22 | unsigned int devfn) | |
23 | { | |
24 | struct device_node *node, *node2; | |
25 | ||
26 | for_each_child_of_node(parent, node) { | |
27 | if (__of_pci_pci_compare(node, devfn)) | |
28 | return node; | |
29 | /* | |
30 | * Some OFs create a parent node "multifunc-device" as | |
31 | * a fake root for all functions of a multi-function | |
32 | * device we go down them as well. | |
04bea68b | 33 | */ |
98d9f30c BH |
34 | if (!strcmp(node->name, "multifunc-device")) { |
35 | for_each_child_of_node(node, node2) { | |
36 | if (__of_pci_pci_compare(node2, devfn)) { | |
37 | of_node_put(node); | |
38 | return node2; | |
39 | } | |
40 | } | |
41 | } | |
04bea68b | 42 | } |
98d9f30c | 43 | return NULL; |
04bea68b | 44 | } |
98d9f30c | 45 | EXPORT_SYMBOL_GPL(of_pci_find_child_device); |
45ab9702 TR |
46 | |
47 | /** | |
48 | * of_pci_get_devfn() - Get device and function numbers for a device node | |
49 | * @np: device node | |
50 | * | |
51 | * Parses a standard 5-cell PCI resource and returns an 8-bit value that can | |
52 | * be passed to the PCI_SLOT() and PCI_FUNC() macros to extract the device | |
53 | * and function numbers respectively. On error a negative error code is | |
54 | * returned. | |
55 | */ | |
56 | int of_pci_get_devfn(struct device_node *np) | |
57 | { | |
58 | unsigned int size; | |
59 | const __be32 *reg; | |
60 | ||
61 | reg = of_get_property(np, "reg", &size); | |
62 | ||
63 | if (!reg || size < 5 * sizeof(__be32)) | |
64 | return -EINVAL; | |
65 | ||
66 | return (be32_to_cpup(reg) >> 8) & 0xff; | |
67 | } | |
68 | EXPORT_SYMBOL_GPL(of_pci_get_devfn); | |
4e23d3f5 TR |
69 | |
70 | /** | |
71 | * of_pci_parse_bus_range() - parse the bus-range property of a PCI device | |
72 | * @node: device node | |
73 | * @res: address to a struct resource to return the bus-range | |
74 | * | |
75 | * Returns 0 on success or a negative error-code on failure. | |
76 | */ | |
77 | int of_pci_parse_bus_range(struct device_node *node, struct resource *res) | |
78 | { | |
79 | const __be32 *values; | |
80 | int len; | |
81 | ||
82 | values = of_get_property(node, "bus-range", &len); | |
83 | if (!values || len < sizeof(*values) * 2) | |
84 | return -EINVAL; | |
85 | ||
86 | res->name = node->name; | |
87 | res->start = be32_to_cpup(values++); | |
88 | res->end = be32_to_cpup(values); | |
89 | res->flags = IORESOURCE_BUS; | |
90 | ||
91 | return 0; | |
92 | } | |
93 | EXPORT_SYMBOL_GPL(of_pci_parse_bus_range); | |
0d5a6db3 | 94 | |
41e5c0f8 LD |
95 | /** |
96 | * This function will try to obtain the host bridge domain number by | |
97 | * finding a property called "linux,pci-domain" of the given device node. | |
98 | * | |
99 | * @node: device tree node with the domain information | |
100 | * | |
101 | * Returns the associated domain number from DT in the range [0-0xffff], or | |
102 | * a negative value if the required property is not found. | |
103 | */ | |
104 | int of_get_pci_domain_nr(struct device_node *node) | |
105 | { | |
106 | const __be32 *value; | |
107 | int len; | |
108 | u16 domain; | |
109 | ||
110 | value = of_get_property(node, "linux,pci-domain", &len); | |
111 | if (!value || len < sizeof(*value)) | |
112 | return -EINVAL; | |
113 | ||
114 | domain = (u16)be32_to_cpup(value); | |
115 | ||
116 | return domain; | |
117 | } | |
118 | EXPORT_SYMBOL_GPL(of_get_pci_domain_nr); | |
119 | ||
f81c11af MZ |
120 | /** |
121 | * of_pci_check_probe_only - Setup probe only mode if linux,pci-probe-only | |
122 | * is present and valid | |
123 | */ | |
124 | void of_pci_check_probe_only(void) | |
125 | { | |
126 | u32 val; | |
127 | int ret; | |
128 | ||
129 | ret = of_property_read_u32(of_chosen, "linux,pci-probe-only", &val); | |
130 | if (ret) { | |
131 | if (ret == -ENODATA || ret == -EOVERFLOW) | |
132 | pr_warn("linux,pci-probe-only without valid value, ignoring\n"); | |
133 | return; | |
134 | } | |
135 | ||
136 | if (val) | |
137 | pci_add_flags(PCI_PROBE_ONLY); | |
138 | else | |
139 | pci_clear_flags(PCI_PROBE_ONLY); | |
140 | ||
141 | pr_info("PCI: PROBE_ONLY %sabled\n", val ? "en" : "dis"); | |
142 | } | |
143 | EXPORT_SYMBOL_GPL(of_pci_check_probe_only); | |
144 | ||
cbe4097f LD |
145 | #if defined(CONFIG_OF_ADDRESS) |
146 | /** | |
147 | * of_pci_get_host_bridge_resources - Parse PCI host bridge resources from DT | |
148 | * @dev: device node of the host bridge having the range property | |
149 | * @busno: bus number associated with the bridge root bus | |
150 | * @bus_max: maximum number of buses for this bridge | |
151 | * @resources: list where the range of resources will be added after DT parsing | |
152 | * @io_base: pointer to a variable that will contain on return the physical | |
153 | * address for the start of the I/O range. Can be NULL if the caller doesn't | |
154 | * expect IO ranges to be present in the device tree. | |
155 | * | |
156 | * It is the caller's job to free the @resources list. | |
157 | * | |
158 | * This function will parse the "ranges" property of a PCI host bridge device | |
159 | * node and setup the resource mapping based on its content. It is expected | |
160 | * that the property conforms with the Power ePAPR document. | |
161 | * | |
162 | * It returns zero if the range parsing has been successful or a standard error | |
163 | * value if it failed. | |
164 | */ | |
165 | int of_pci_get_host_bridge_resources(struct device_node *dev, | |
166 | unsigned char busno, unsigned char bus_max, | |
167 | struct list_head *resources, resource_size_t *io_base) | |
168 | { | |
5c493df2 | 169 | struct resource_entry *window; |
cbe4097f LD |
170 | struct resource *res; |
171 | struct resource *bus_range; | |
172 | struct of_pci_range range; | |
173 | struct of_pci_range_parser parser; | |
174 | char range_type[4]; | |
175 | int err; | |
176 | ||
177 | if (io_base) | |
178 | *io_base = (resource_size_t)OF_BAD_ADDR; | |
179 | ||
180 | bus_range = kzalloc(sizeof(*bus_range), GFP_KERNEL); | |
181 | if (!bus_range) | |
182 | return -ENOMEM; | |
183 | ||
184 | pr_info("PCI host bridge %s ranges:\n", dev->full_name); | |
185 | ||
186 | err = of_pci_parse_bus_range(dev, bus_range); | |
187 | if (err) { | |
188 | bus_range->start = busno; | |
189 | bus_range->end = bus_max; | |
190 | bus_range->flags = IORESOURCE_BUS; | |
191 | pr_info(" No bus range found for %s, using %pR\n", | |
192 | dev->full_name, bus_range); | |
193 | } else { | |
194 | if (bus_range->end > bus_range->start + bus_max) | |
195 | bus_range->end = bus_range->start + bus_max; | |
196 | } | |
197 | pci_add_resource(resources, bus_range); | |
198 | ||
199 | /* Check for ranges property */ | |
200 | err = of_pci_range_parser_init(&parser, dev); | |
201 | if (err) | |
202 | goto parse_failed; | |
203 | ||
204 | pr_debug("Parsing ranges property...\n"); | |
205 | for_each_of_pci_range(&parser, &range) { | |
206 | /* Read next ranges element */ | |
207 | if ((range.flags & IORESOURCE_TYPE_BITS) == IORESOURCE_IO) | |
208 | snprintf(range_type, 4, " IO"); | |
209 | else if ((range.flags & IORESOURCE_TYPE_BITS) == IORESOURCE_MEM) | |
210 | snprintf(range_type, 4, "MEM"); | |
211 | else | |
212 | snprintf(range_type, 4, "err"); | |
213 | pr_info(" %s %#010llx..%#010llx -> %#010llx\n", range_type, | |
214 | range.cpu_addr, range.cpu_addr + range.size - 1, | |
215 | range.pci_addr); | |
216 | ||
217 | /* | |
218 | * If we failed translation or got a zero-sized region | |
219 | * then skip this range | |
220 | */ | |
221 | if (range.cpu_addr == OF_BAD_ADDR || range.size == 0) | |
222 | continue; | |
223 | ||
224 | res = kzalloc(sizeof(struct resource), GFP_KERNEL); | |
225 | if (!res) { | |
226 | err = -ENOMEM; | |
227 | goto parse_failed; | |
228 | } | |
229 | ||
230 | err = of_pci_range_to_resource(&range, dev, res); | |
f134f251 PF |
231 | if (err) { |
232 | kfree(res); | |
233 | continue; | |
234 | } | |
cbe4097f LD |
235 | |
236 | if (resource_type(res) == IORESOURCE_IO) { | |
237 | if (!io_base) { | |
238 | pr_err("I/O range found for %s. Please provide an io_base pointer to save CPU base address\n", | |
239 | dev->full_name); | |
240 | err = -EINVAL; | |
241 | goto conversion_failed; | |
242 | } | |
243 | if (*io_base != (resource_size_t)OF_BAD_ADDR) | |
244 | pr_warn("More than one I/O resource converted for %s. CPU base address for old range lost!\n", | |
245 | dev->full_name); | |
246 | *io_base = range.cpu_addr; | |
247 | } | |
248 | ||
249 | pci_add_resource_offset(resources, res, res->start - range.pci_addr); | |
250 | } | |
251 | ||
252 | return 0; | |
253 | ||
254 | conversion_failed: | |
255 | kfree(res); | |
256 | parse_failed: | |
5c493df2 | 257 | resource_list_for_each_entry(window, resources) |
d2be00c0 | 258 | kfree(window->res); |
cbe4097f LD |
259 | pci_free_resource_list(resources); |
260 | return err; | |
261 | } | |
262 | EXPORT_SYMBOL_GPL(of_pci_get_host_bridge_resources); | |
263 | #endif /* CONFIG_OF_ADDRESS */ | |
264 | ||
0d5a6db3 TP |
265 | #ifdef CONFIG_PCI_MSI |
266 | ||
267 | static LIST_HEAD(of_pci_msi_chip_list); | |
268 | static DEFINE_MUTEX(of_pci_msi_chip_mutex); | |
269 | ||
c2791b80 | 270 | int of_pci_msi_chip_add(struct msi_controller *chip) |
0d5a6db3 TP |
271 | { |
272 | if (!of_property_read_bool(chip->of_node, "msi-controller")) | |
273 | return -EINVAL; | |
274 | ||
275 | mutex_lock(&of_pci_msi_chip_mutex); | |
276 | list_add(&chip->list, &of_pci_msi_chip_list); | |
277 | mutex_unlock(&of_pci_msi_chip_mutex); | |
278 | ||
279 | return 0; | |
280 | } | |
281 | EXPORT_SYMBOL_GPL(of_pci_msi_chip_add); | |
282 | ||
c2791b80 | 283 | void of_pci_msi_chip_remove(struct msi_controller *chip) |
0d5a6db3 TP |
284 | { |
285 | mutex_lock(&of_pci_msi_chip_mutex); | |
286 | list_del(&chip->list); | |
287 | mutex_unlock(&of_pci_msi_chip_mutex); | |
288 | } | |
289 | EXPORT_SYMBOL_GPL(of_pci_msi_chip_remove); | |
290 | ||
c2791b80 | 291 | struct msi_controller *of_pci_find_msi_chip_by_node(struct device_node *of_node) |
0d5a6db3 | 292 | { |
c2791b80 | 293 | struct msi_controller *c; |
0d5a6db3 TP |
294 | |
295 | mutex_lock(&of_pci_msi_chip_mutex); | |
296 | list_for_each_entry(c, &of_pci_msi_chip_list, list) { | |
297 | if (c->of_node == of_node) { | |
298 | mutex_unlock(&of_pci_msi_chip_mutex); | |
299 | return c; | |
300 | } | |
301 | } | |
302 | mutex_unlock(&of_pci_msi_chip_mutex); | |
303 | ||
304 | return NULL; | |
305 | } | |
306 | EXPORT_SYMBOL_GPL(of_pci_find_msi_chip_by_node); | |
307 | ||
308 | #endif /* CONFIG_PCI_MSI */ |