[deliverable/linux.git] / drivers / parport / parport_gsc.c

/*
 *      Low-level parallel-support for PC-style hardware integrated in the 
 *	LASI-Controller (on GSC-Bus) for HP-PARISC Workstations
 *
 *	This program is free software; you can redistribute it and/or modify
 *	it under the terms of the GNU General Public License as published by
 *      the Free Software Foundation; either version 2 of the License, or
 *      (at your option) any later version.
 *
 *	(C) 1999-2001 by Helge Deller <deller@gmx.de>
 *
 * 
 * based on parport_pc.c by 
 * 	    Grant Guenther <grant@torque.net>
 * 	    Phil Blundell <philb@gnu.org>
 *          Tim Waugh <tim@cyberelk.demon.co.uk>
 *	    Jose Renau <renau@acm.org>
 *          David Campbell
 *          Andrea Arcangeli
 */

#undef DEBUG	/* undef for production */

#include <linux/module.h>
#include <linux/init.h>
#include <linux/delay.h>
#include <linux/errno.h>
#include <linux/interrupt.h>
#include <linux/ioport.h>
#include <linux/kernel.h>
#include <linux/slab.h>
#include <linux/pci.h>
#include <linux/sysctl.h>

#include <asm/io.h>
#include <asm/dma.h>
#include <asm/uaccess.h>
#include <asm/superio.h>

#include <linux/parport.h>
#include <asm/pdc.h>
#include <asm/parisc-device.h>
#include <asm/hardware.h>
#include "parport_gsc.h"


MODULE_AUTHOR("Helge Deller <deller@gmx.de>");
MODULE_DESCRIPTION("HP-PARISC PC-style parallel port driver");
MODULE_SUPPORTED_DEVICE("integrated PC-style parallel port");
MODULE_LICENSE("GPL");


/*
 * Clear TIMEOUT BIT in EPP MODE
 *
 * This is also used in SPP detection.
 */
static int clear_epp_timeout(struct parport *pb)
{
	unsigned char r;

	if (!(parport_gsc_read_status(pb) & 0x01))
		return 1;

	/* To clear timeout some chips require double read */
	parport_gsc_read_status(pb);
	r = parport_gsc_read_status(pb);
	parport_writeb (r | 0x01, STATUS (pb)); /* Some reset by writing 1 */
	parport_writeb (r & 0xfe, STATUS (pb)); /* Others by writing 0 */
	r = parport_gsc_read_status(pb);

	return !(r & 0x01);
}

/*
 * Access functions.
 *
 * Most of these aren't static because they may be used by the
 * parport_xxx_yyy macros.  extern __inline__ versions of several
 * of these are in parport_gsc.h.
 */

static irqreturn_t parport_gsc_interrupt(int irq, void *dev_id)
{
	parport_generic_irq(irq, (struct parport *) dev_id);
	return IRQ_HANDLED;
}

void parport_gsc_init_state(struct pardevice *dev, struct parport_state *s)
{
	s->u.pc.ctr = 0xc | (dev->irq_func ? 0x10 : 0x0);
}

void parport_gsc_save_state(struct parport *p, struct parport_state *s)
{
	s->u.pc.ctr = parport_readb (CONTROL (p));
}

void parport_gsc_restore_state(struct parport *p, struct parport_state *s)
{
	parport_writeb (s->u.pc.ctr, CONTROL (p));
}

struct parport_operations parport_gsc_ops = 
{
	.write_data	= parport_gsc_write_data,
	.read_data	= parport_gsc_read_data,

	.write_control	= parport_gsc_write_control,
	.read_control	= parport_gsc_read_control,
	.frob_control	= parport_gsc_frob_control,

	.read_status	= parport_gsc_read_status,

	.enable_irq	= parport_gsc_enable_irq,
	.disable_irq	= parport_gsc_disable_irq,

	.data_forward	= parport_gsc_data_forward,
	.data_reverse	= parport_gsc_data_reverse,

	.init_state	= parport_gsc_init_state,
	.save_state	= parport_gsc_save_state,
	.restore_state	= parport_gsc_restore_state,

	.epp_write_data	= parport_ieee1284_epp_write_data,
	.epp_read_data	= parport_ieee1284_epp_read_data,
	.epp_write_addr	= parport_ieee1284_epp_write_addr,
	.epp_read_addr	= parport_ieee1284_epp_read_addr,

	.ecp_write_data	= parport_ieee1284_ecp_write_data,
	.ecp_read_data	= parport_ieee1284_ecp_read_data,
	.ecp_write_addr	= parport_ieee1284_ecp_write_addr,

	.compat_write_data 	= parport_ieee1284_write_compat,
	.nibble_read_data	= parport_ieee1284_read_nibble,
	.byte_read_data		= parport_ieee1284_read_byte,

	.owner		= THIS_MODULE,
};

/* --- Mode detection ------------------------------------- */

/*
 * Checks for port existence, all ports support SPP MODE
 */
static int __devinit parport_SPP_supported(struct parport *pb)
{
	unsigned char r, w;

	/*
	 * first clear an eventually pending EPP timeout 
	 * I (sailer@ife.ee.ethz.ch) have an SMSC chipset
	 * that does not even respond to SPP cycles if an EPP
	 * timeout is pending
	 */
	clear_epp_timeout(pb);

	/* Do a simple read-write test to make sure the port exists. */
	w = 0xc;
	parport_writeb (w, CONTROL (pb));

	/* Is there a control register that we can read from?  Some
	 * ports don't allow reads, so read_control just returns a
	 * software copy. Some ports _do_ allow reads, so bypass the
	 * software copy here.  In addition, some bits aren't
	 * writable. */
	r = parport_readb (CONTROL (pb));
	if ((r & 0xf) == w) {
		w = 0xe;
		parport_writeb (w, CONTROL (pb));
		r = parport_readb (CONTROL (pb));
		parport_writeb (0xc, CONTROL (pb));
		if ((r & 0xf) == w)
			return PARPORT_MODE_PCSPP;
	}

	/* Try the data register.  The data lines aren't tri-stated at
	 * this stage, so we expect back what we wrote. */
	w = 0xaa;
	parport_gsc_write_data (pb, w);
	r = parport_gsc_read_data (pb);
	if (r == w) {
		w = 0x55;
		parport_gsc_write_data (pb, w);
		r = parport_gsc_read_data (pb);
		if (r == w)
			return PARPORT_MODE_PCSPP;
	}

	return 0;
}

/* Detect PS/2 support.
 *
 * Bit 5 (0x20) sets the PS/2 data direction; setting this high
 * allows us to read data from the data lines.  In theory we would get back
 * 0xff but any peripheral attached to the port may drag some or all of the
 * lines down to zero.  So if we get back anything that isn't the contents
 * of the data register we deem PS/2 support to be present. 
 *
 * Some SPP ports have "half PS/2" ability - you can't turn off the line
 * drivers, but an external peripheral with sufficiently beefy drivers of
 * its own can overpower them and assert its own levels onto the bus, from
 * where they can then be read back as normal.  Ports with this property
 * and the right type of device attached are likely to fail the SPP test,
 * (as they will appear to have stuck bits) and so the fact that they might
 * be misdetected here is rather academic. 
 */

static int __devinit parport_PS2_supported(struct parport *pb)
{
	int ok = 0;
  
	clear_epp_timeout(pb);

	/* try to tri-state the buffer */
	parport_gsc_data_reverse (pb);
	
	parport_gsc_write_data(pb, 0x55);
	if (parport_gsc_read_data(pb) != 0x55) ok++;

	parport_gsc_write_data(pb, 0xaa);
	if (parport_gsc_read_data(pb) != 0xaa) ok++;

	/* cancel input mode */
	parport_gsc_data_forward (pb);

	if (ok) {
		pb->modes |= PARPORT_MODE_TRISTATE;
	} else {
		struct parport_gsc_private *priv = pb->private_data;
		priv->ctr_writable &= ~0x20;
	}

	return ok;
}


/* --- Initialisation code -------------------------------- */

struct parport *__devinit parport_gsc_probe_port (unsigned long base,
						 unsigned long base_hi,
						 int irq, int dma,
						 struct pci_dev *dev)
{
	struct parport_gsc_private *priv;
	struct parport_operations *ops;
	struct parport tmp;
	struct parport *p = &tmp;

	priv = kzalloc (sizeof (struct parport_gsc_private), GFP_KERNEL);
	if (!priv) {
		printk (KERN_DEBUG "parport (0x%lx): no memory!\n", base);
		return NULL;
	}
	ops = kmalloc (sizeof (struct parport_operations), GFP_KERNEL);
	if (!ops) {
		printk (KERN_DEBUG "parport (0x%lx): no memory for ops!\n",
			base);
		kfree (priv);
		return NULL;
	}
	memcpy (ops, &parport_gsc_ops, sizeof (struct parport_operations));
	priv->ctr = 0xc;
	priv->ctr_writable = 0xff;
	priv->dma_buf = 0;
	priv->dma_handle = 0;
	priv->dev = dev;
	p->base = base;
	p->base_hi = base_hi;
	p->irq = irq;
	p->dma = dma;
	p->modes = PARPORT_MODE_PCSPP | PARPORT_MODE_SAFEININT;
	p->ops = ops;
	p->private_data = priv;
	p->physport = p;
	if (!parport_SPP_supported (p)) {
		/* No port. */
		kfree (priv);
		return NULL;
	}
	parport_PS2_supported (p);

	if (!(p = parport_register_port(base, PARPORT_IRQ_NONE,
					PARPORT_DMA_NONE, ops))) {
		kfree (priv);
		kfree (ops);
		return NULL;
	}

	p->base_hi = base_hi;
	p->modes = tmp.modes;
	p->size = (p->modes & PARPORT_MODE_EPP)?8:3;
	p->private_data = priv;

	printk(KERN_INFO "%s: PC-style at 0x%lx", p->name, p->base);
	p->irq = irq;
	if (p->irq == PARPORT_IRQ_AUTO) {
		p->irq = PARPORT_IRQ_NONE;
	}
	if (p->irq != PARPORT_IRQ_NONE) {
		printk(", irq %d", p->irq);

		if (p->dma == PARPORT_DMA_AUTO) {
			p->dma = PARPORT_DMA_NONE;
		}
	}
	if (p->dma == PARPORT_DMA_AUTO) /* To use DMA, giving the irq
                                           is mandatory (see above) */
		p->dma = PARPORT_DMA_NONE;

	printk(" [");
#define printmode(x) {if(p->modes&PARPORT_MODE_##x){printk("%s%s",f?",":"",#x);f++;}}
	{
		int f = 0;
		printmode(PCSPP);
		printmode(TRISTATE);
		printmode(COMPAT)
		printmode(EPP);
//		printmode(ECP);
//		printmode(DMA);
	}
#undef printmode
	printk("]\n");

	if (p->irq != PARPORT_IRQ_NONE) {
		if (request_irq (p->irq, parport_gsc_interrupt,
				 0, p->name, p)) {
			printk (KERN_WARNING "%s: irq %d in use, "
				"resorting to polled operation\n",
				p->name, p->irq);
			p->irq = PARPORT_IRQ_NONE;
			p->dma = PARPORT_DMA_NONE;
		}
	}

	/* Done probing.  Now put the port into a sensible start-up state. */

	parport_gsc_write_data(p, 0);
	parport_gsc_data_forward (p);

	/* Now that we've told the sharing engine about the port, and
	   found out its characteristics, let the high-level drivers
	   know about it. */
	parport_announce_port (p);

	return p;
}


#define PARPORT_GSC_OFFSET 0x800

static int __devinitdata parport_count;

static int __devinit parport_init_chip(struct parisc_device *dev)
{
	struct parport *p;
	unsigned long port;

	if (!dev->irq) {
		printk(KERN_WARNING "IRQ not found for parallel device at 0x%lx\n",
			dev->hpa.start);
		return -ENODEV;
	}

	port = dev->hpa.start + PARPORT_GSC_OFFSET;
	
	/* some older machines with ASP-chip don't support
	 * the enhanced parport modes.
	 */
	if (boot_cpu_data.cpu_type > pcxt && !pdc_add_valid(port+4)) {

		/* Initialize bidirectional-mode (0x10) & data-tranfer-mode #1 (0x20) */
		printk("%s: initialize bidirectional-mode.\n", __FUNCTION__);
		parport_writeb ( (0x10 + 0x20), port + 4);

	} else {
		printk("%s: enhanced parport-modes not supported.\n", __FUNCTION__);
	}
	
	p = parport_gsc_probe_port(port, 0, dev->irq,
			/* PARPORT_IRQ_NONE */ PARPORT_DMA_NONE, NULL);
	if (p)
		parport_count++;
	dev->dev.driver_data = p;

	return 0;
}

static int __devexit parport_remove_chip(struct parisc_device *dev)
{
	struct parport *p = dev->dev.driver_data;
	if (p) {
		struct parport_gsc_private *priv = p->private_data;
		struct parport_operations *ops = p->ops;
		parport_remove_port(p);
		if (p->dma != PARPORT_DMA_NONE)
			free_dma(p->dma);
		if (p->irq != PARPORT_IRQ_NONE)
			free_irq(p->irq, p);
		if (priv->dma_buf)
			pci_free_consistent(priv->dev, PAGE_SIZE,
					    priv->dma_buf,
					    priv->dma_handle);
		kfree (p->private_data);
		parport_put_port(p);
		kfree (ops); /* hope no-one cached it */
	}
	return 0;
}

static struct parisc_device_id parport_tbl[] = {
	{ HPHW_FIO, HVERSION_REV_ANY_ID, HVERSION_ANY_ID, 0x74 },
	{ 0, }
};

MODULE_DEVICE_TABLE(parisc, parport_tbl);

static struct parisc_driver parport_driver = {
	.name		= "Parallel",
	.id_table	= parport_tbl,
	.probe		= parport_init_chip,
	.remove		= __devexit_p(parport_remove_chip),
};

int __devinit parport_gsc_init(void)
{
	return register_parisc_driver(&parport_driver);
}

static void __devexit parport_gsc_exit(void)
{
	unregister_parisc_driver(&parport_driver);
}

module_init(parport_gsc_init);
module_exit(parport_gsc_exit);
Commit	Line	Data
1da177e4 LT	1	/*
	2	* Low-level parallel-support for PC-style hardware integrated in the
	3	* LASI-Controller (on GSC-Bus) for HP-PARISC Workstations
	4	*
	5	* This program is free software; you can redistribute it and/or modify
	6	* it under the terms of the GNU General Public License as published by
	7	* the Free Software Foundation; either version 2 of the License, or
	8	* (at your option) any later version.
	9	*
	10	* (C) 1999-2001 by Helge Deller <deller@gmx.de>
	11	*
	12	*
	13	* based on parport_pc.c by
	14	* Grant Guenther <grant@torque.net>
	15	* Phil Blundell <philb@gnu.org>
	16	* Tim Waugh <tim@cyberelk.demon.co.uk>
	17	* Jose Renau <renau@acm.org>
bdca3f20	18	* David Campbell
1da177e4 LT	19	* Andrea Arcangeli
	20	*/
	21
	22	#undef DEBUG /* undef for production */
	23
	24	#include <linux/module.h>
	25	#include <linux/init.h>
1da177e4 LT	26	#include <linux/delay.h>
	27	#include <linux/errno.h>
	28	#include <linux/interrupt.h>
	29	#include <linux/ioport.h>
	30	#include <linux/kernel.h>
	31	#include <linux/slab.h>
	32	#include <linux/pci.h>
	33	#include <linux/sysctl.h>
	34
	35	#include <asm/io.h>
	36	#include <asm/dma.h>
	37	#include <asm/uaccess.h>
	38	#include <asm/superio.h>
	39
	40	#include <linux/parport.h>
	41	#include <asm/pdc.h>
	42	#include <asm/parisc-device.h>
	43	#include <asm/hardware.h>
	44	#include "parport_gsc.h"
	45
	46
	47	MODULE_AUTHOR("Helge Deller <deller@gmx.de>");
	48	MODULE_DESCRIPTION("HP-PARISC PC-style parallel port driver");
	49	MODULE_SUPPORTED_DEVICE("integrated PC-style parallel port");
	50	MODULE_LICENSE("GPL");
	51
	52
	53	/*
	54	* Clear TIMEOUT BIT in EPP MODE
	55	*
	56	* This is also used in SPP detection.
	57	*/
	58	static int clear_epp_timeout(struct parport *pb)
	59	{
	60	unsigned char r;
	61
	62	if (!(parport_gsc_read_status(pb) & 0x01))
	63	return 1;
	64
	65	/* To clear timeout some chips require double read */
	66	parport_gsc_read_status(pb);
	67	r = parport_gsc_read_status(pb);
	68	parport_writeb (r \| 0x01, STATUS (pb)); /* Some reset by writing 1 */
	69	parport_writeb (r & 0xfe, STATUS (pb)); /* Others by writing 0 */
	70	r = parport_gsc_read_status(pb);
	71
	72	return !(r & 0x01);
	73	}
	74
	75	/*
	76	* Access functions.
	77	*
	78	* Most of these aren't static because they may be used by the
	79	* parport_xxx_yyy macros. extern __inline__ versions of several
	80	* of these are in parport_gsc.h.
	81	*/
	82
7d12e780	83	static irqreturn_t parport_gsc_interrupt(int irq, void *dev_id)
1da177e4	84	{
7d12e780	85	parport_generic_irq(irq, (struct parport *) dev_id);
1da177e4 LT	86	return IRQ_HANDLED;
	87	}
	88
	89	void parport_gsc_init_state(struct pardevice dev, struct parport_state s)
	90	{
	91	s->u.pc.ctr = 0xc \| (dev->irq_func ? 0x10 : 0x0);
	92	}
	93
	94	void parport_gsc_save_state(struct parport p, struct parport_state s)
	95	{
	96	s->u.pc.ctr = parport_readb (CONTROL (p));
	97	}
	98
	99	void parport_gsc_restore_state(struct parport p, struct parport_state s)
	100	{
	101	parport_writeb (s->u.pc.ctr, CONTROL (p));
	102	}
	103
	104	struct parport_operations parport_gsc_ops =
	105	{
	106	.write_data = parport_gsc_write_data,
	107	.read_data = parport_gsc_read_data,
	108
	109	.write_control = parport_gsc_write_control,
	110	.read_control = parport_gsc_read_control,
	111	.frob_control = parport_gsc_frob_control,
	112
	113	.read_status = parport_gsc_read_status,
	114
	115	.enable_irq = parport_gsc_enable_irq,
	116	.disable_irq = parport_gsc_disable_irq,
	117
	118	.data_forward = parport_gsc_data_forward,
	119	.data_reverse = parport_gsc_data_reverse,
	120
	121	.init_state = parport_gsc_init_state,
	122	.save_state = parport_gsc_save_state,
	123	.restore_state = parport_gsc_restore_state,
	124
	125	.epp_write_data = parport_ieee1284_epp_write_data,
	126	.epp_read_data = parport_ieee1284_epp_read_data,
	127	.epp_write_addr = parport_ieee1284_epp_write_addr,
	128	.epp_read_addr = parport_ieee1284_epp_read_addr,
	129
	130	.ecp_write_data = parport_ieee1284_ecp_write_data,
	131	.ecp_read_data = parport_ieee1284_ecp_read_data,
	132	.ecp_write_addr = parport_ieee1284_ecp_write_addr,
	133
	134	.compat_write_data = parport_ieee1284_write_compat,
	135	.nibble_read_data = parport_ieee1284_read_nibble,
	136	.byte_read_data = parport_ieee1284_read_byte,
	137
	138	.owner = THIS_MODULE,
	139	};
	140
	141	/* --- Mode detection ------------------------------------- */
	142
	143	/*
	144	* Checks for port existence, all ports support SPP MODE
	145	*/
	146	static int __devinit parport_SPP_supported(struct parport *pb)
	147	{
	148	unsigned char r, w;
	149
150	/*
151	* first clear an eventually pending EPP timeout
152	* I (sailer@ife.ee.ethz.ch) have an SMSC chipset
153	* that does not even respond to SPP cycles if an EPP
154	* timeout is pending
155	*/
156	clear_epp_timeout(pb);
157
158	/* Do a simple read-write test to make sure the port exists. */
159	w = 0xc;
160	parport_writeb (w, CONTROL (pb));
161
162	/* Is there a control register that we can read from? Some
163	* ports don't allow reads, so read_control just returns a
164	* software copy. Some ports _do_ allow reads, so bypass the
165	* software copy here. In addition, some bits aren't
166	* writable. */
167	r = parport_readb (CONTROL (pb));
168	if ((r & 0xf) == w) {
169	w = 0xe;
170	parport_writeb (w, CONTROL (pb));
171	r = parport_readb (CONTROL (pb));
172	parport_writeb (0xc, CONTROL (pb));
173	if ((r & 0xf) == w)
174	return PARPORT_MODE_PCSPP;
175	}
176
177	/* Try the data register. The data lines aren't tri-stated at
178	* this stage, so we expect back what we wrote. */
179	w = 0xaa;
180	parport_gsc_write_data (pb, w);
181	r = parport_gsc_read_data (pb);
182	if (r == w) {
183	w = 0x55;
184	parport_gsc_write_data (pb, w);
185	r = parport_gsc_read_data (pb);
186	if (r == w)
187	return PARPORT_MODE_PCSPP;
188	}
189
190	return 0;
191	}
192
193	/* Detect PS/2 support.
194	*
195	* Bit 5 (0x20) sets the PS/2 data direction; setting this high
196	* allows us to read data from the data lines. In theory we would get back
197	* 0xff but any peripheral attached to the port may drag some or all of the
198	* lines down to zero. So if we get back anything that isn't the contents
199	* of the data register we deem PS/2 support to be present.
200	*
201	* Some SPP ports have "half PS/2" ability - you can't turn off the line
202	* drivers, but an external peripheral with sufficiently beefy drivers of
203	* its own can overpower them and assert its own levels onto the bus, from
204	* where they can then be read back as normal. Ports with this property
205	* and the right type of device attached are likely to fail the SPP test,
206	* (as they will appear to have stuck bits) and so the fact that they might
207	* be misdetected here is rather academic.
208	*/
209
210	static int __devinit parport_PS2_supported(struct parport *pb)
211	{
212	int ok = 0;
213
214	clear_epp_timeout(pb);
215
216	/* try to tri-state the buffer */
217	parport_gsc_data_reverse (pb);
218
219	parport_gsc_write_data(pb, 0x55);
220	if (parport_gsc_read_data(pb) != 0x55) ok++;
221
222	parport_gsc_write_data(pb, 0xaa);
223	if (parport_gsc_read_data(pb) != 0xaa) ok++;
224
225	/* cancel input mode */
226	parport_gsc_data_forward (pb);
227
228	if (ok) {
229	pb->modes \|= PARPORT_MODE_TRISTATE;
230	} else {
231	struct parport_gsc_private *priv = pb->private_data;
232	priv->ctr_writable &= ~0x20;
233	}
234
235	return ok;
236	}
237
238
239	/* --- Initialisation code -------------------------------- */
240
241	struct parport *__devinit parport_gsc_probe_port (unsigned long base,
242	unsigned long base_hi,
243	int irq, int dma,
244	struct pci_dev *dev)
245	{
246	struct parport_gsc_private *priv;
247	struct parport_operations *ops;
248	struct parport tmp;
249	struct parport *p = &tmp;
250
cb6fc18e	251	priv = kzalloc (sizeof (struct parport_gsc_private), GFP_KERNEL);
1da177e4 LT	252	if (!priv) {
	253	printk (KERN_DEBUG "parport (0x%lx): no memory!\n", base);
	254	return NULL;
	255	}
	256	ops = kmalloc (sizeof (struct parport_operations), GFP_KERNEL);
	257	if (!ops) {
	258	printk (KERN_DEBUG "parport (0x%lx): no memory for ops!\n",
	259	base);
	260	kfree (priv);
	261	return NULL;
	262	}
	263	memcpy (ops, &parport_gsc_ops, sizeof (struct parport_operations));
	264	priv->ctr = 0xc;
	265	priv->ctr_writable = 0xff;
	266	priv->dma_buf = 0;
	267	priv->dma_handle = 0;
	268	priv->dev = dev;
	269	p->base = base;
	270	p->base_hi = base_hi;
	271	p->irq = irq;
	272	p->dma = dma;
	273	p->modes = PARPORT_MODE_PCSPP \| PARPORT_MODE_SAFEININT;
	274	p->ops = ops;
	275	p->private_data = priv;
	276	p->physport = p;
	277	if (!parport_SPP_supported (p)) {
	278	/* No port. */
	279	kfree (priv);
	280	return NULL;
	281	}
	282	parport_PS2_supported (p);
	283
	284	if (!(p = parport_register_port(base, PARPORT_IRQ_NONE,
	285	PARPORT_DMA_NONE, ops))) {
	286	kfree (priv);
	287	kfree (ops);
	288	return NULL;
	289	}
	290
	291	p->base_hi = base_hi;
	292	p->modes = tmp.modes;
	293	p->size = (p->modes & PARPORT_MODE_EPP)?8:3;
	294	p->private_data = priv;
	295
	296	printk(KERN_INFO "%s: PC-style at 0x%lx", p->name, p->base);
	297	p->irq = irq;
	298	if (p->irq == PARPORT_IRQ_AUTO) {
	299	p->irq = PARPORT_IRQ_NONE;
	300	}
	301	if (p->irq != PARPORT_IRQ_NONE) {
	302	printk(", irq %d", p->irq);
	303
	304	if (p->dma == PARPORT_DMA_AUTO) {
	305	p->dma = PARPORT_DMA_NONE;
	306	}
	307	}
	308	if (p->dma == PARPORT_DMA_AUTO) /* To use DMA, giving the irq
	309	is mandatory (see above) */
	310	p->dma = PARPORT_DMA_NONE;
	311
	312	printk(" [");
	313	#define printmode(x) {if(p->modes&PARPORT_MODE_##x){printk("%s%s",f?",":"",#x);f++;}}
	314	{
	315	int f = 0;
316	printmode(PCSPP);
317	printmode(TRISTATE);
318	printmode(COMPAT)
319	printmode(EPP);
320	// printmode(ECP);
321	// printmode(DMA);
322	}
323	#undef printmode
324	printk("]\n");
325
326	if (p->irq != PARPORT_IRQ_NONE) {
327	if (request_irq (p->irq, parport_gsc_interrupt,
328	0, p->name, p)) {
329	printk (KERN_WARNING "%s: irq %d in use, "
330	"resorting to polled operation\n",
331	p->name, p->irq);
332	p->irq = PARPORT_IRQ_NONE;
333	p->dma = PARPORT_DMA_NONE;
334	}
335	}
336
337	/* Done probing. Now put the port into a sensible start-up state. */
338
339	parport_gsc_write_data(p, 0);
340	parport_gsc_data_forward (p);
341
342	/* Now that we've told the sharing engine about the port, and
343	found out its characteristics, let the high-level drivers
344	know about it. */
345	parport_announce_port (p);
346
347	return p;
348	}
349
350
351	#define PARPORT_GSC_OFFSET 0x800
352
649f0edd	353	static int __devinitdata parport_count;
1da177e4 LT	354
	355	static int __devinit parport_init_chip(struct parisc_device *dev)
	356	{
	357	struct parport *p;
	358	unsigned long port;
	359
	360	if (!dev->irq) {
53f01bba MW	361	printk(KERN_WARNING "IRQ not found for parallel device at 0x%lx\n",
53f01bba MW	362	dev->hpa.start);
1da177e4 LT	363	return -ENODEV;
	364	}
	365
53f01bba	366	port = dev->hpa.start + PARPORT_GSC_OFFSET;
1da177e4 LT	367
	368	/* some older machines with ASP-chip don't support
	369	* the enhanced parport modes.
	370	*/
	371	if (boot_cpu_data.cpu_type > pcxt && !pdc_add_valid(port+4)) {
	372
	373	/* Initialize bidirectional-mode (0x10) & data-tranfer-mode #1 (0x20) */
	374	printk("%s: initialize bidirectional-mode.\n", __FUNCTION__);
	375	parport_writeb ( (0x10 + 0x20), port + 4);
	376
	377	} else {
	378	printk("%s: enhanced parport-modes not supported.\n", __FUNCTION__);
	379	}
	380
	381	p = parport_gsc_probe_port(port, 0, dev->irq,
	382	/* PARPORT_IRQ_NONE */ PARPORT_DMA_NONE, NULL);
	383	if (p)
	384	parport_count++;
	385	dev->dev.driver_data = p;
	386
	387	return 0;
	388	}
	389
	390	static int __devexit parport_remove_chip(struct parisc_device *dev)
	391	{
	392	struct parport *p = dev->dev.driver_data;
	393	if (p) {
	394	struct parport_gsc_private *priv = p->private_data;
	395	struct parport_operations *ops = p->ops;
	396	parport_remove_port(p);
	397	if (p->dma != PARPORT_DMA_NONE)
	398	free_dma(p->dma);
	399	if (p->irq != PARPORT_IRQ_NONE)
	400	free_irq(p->irq, p);
	401	if (priv->dma_buf)
	402	pci_free_consistent(priv->dev, PAGE_SIZE,
	403	priv->dma_buf,
	404	priv->dma_handle);
	405	kfree (p->private_data);
	406	parport_put_port(p);
	407	kfree (ops); /* hope no-one cached it */
	408	}
	409	return 0;
	410	}
	411
	412	static struct parisc_device_id parport_tbl[] = {
	413	{ HPHW_FIO, HVERSION_REV_ANY_ID, HVERSION_ANY_ID, 0x74 },
	414	{ 0, }
	415	};
	416
	417	MODULE_DEVICE_TABLE(parisc, parport_tbl);
	418
	419	static struct parisc_driver parport_driver = {
	420	.name = "Parallel",
	421	.id_table = parport_tbl,
	422	.probe = parport_init_chip,
	423	.remove = __devexit_p(parport_remove_chip),
	424	};
	425
	426	int __devinit parport_gsc_init(void)
	427	{
	428	return register_parisc_driver(&parport_driver);
	429	}
	430
431	static void __devexit parport_gsc_exit(void)
432	{
433	unregister_parisc_driver(&parport_driver);
434	}
435
436	module_init(parport_gsc_init);
437	module_exit(parport_gsc_exit);