NVMe: per-cpu io queues
[deliverable/linux.git] / drivers / pci / iov.c
CommitLineData
d1b054da
YZ
1/*
2 * drivers/pci/iov.c
3 *
4 * Copyright (C) 2009 Intel Corporation, Yu Zhao <yu.zhao@intel.com>
5 *
6 * PCI Express I/O Virtualization (IOV) support.
7 * Single Root IOV 1.0
302b4215 8 * Address Translation Service 1.0
d1b054da
YZ
9 */
10
11#include <linux/pci.h>
5a0e3ad6 12#include <linux/slab.h>
d1b054da 13#include <linux/mutex.h>
363c75db 14#include <linux/export.h>
d1b054da
YZ
15#include <linux/string.h>
16#include <linux/delay.h>
5cdede24 17#include <linux/pci-ats.h>
d1b054da
YZ
18#include "pci.h"
19
dd7cc44d 20#define VIRTFN_ID_LEN 16
d1b054da 21
a28724b0
YZ
22static inline u8 virtfn_bus(struct pci_dev *dev, int id)
23{
24 return dev->bus->number + ((dev->devfn + dev->sriov->offset +
25 dev->sriov->stride * id) >> 8);
26}
27
28static inline u8 virtfn_devfn(struct pci_dev *dev, int id)
29{
30 return (dev->devfn + dev->sriov->offset +
31 dev->sriov->stride * id) & 0xff;
32}
33
dd7cc44d
YZ
34static struct pci_bus *virtfn_add_bus(struct pci_bus *bus, int busnr)
35{
dd7cc44d
YZ
36 struct pci_bus *child;
37
38 if (bus->number == busnr)
39 return bus;
40
41 child = pci_find_bus(pci_domain_nr(bus), busnr);
42 if (child)
43 return child;
44
45 child = pci_add_new_bus(bus, NULL, busnr);
46 if (!child)
47 return NULL;
48
b7eac055 49 pci_bus_insert_busn_res(child, busnr, busnr);
dd7cc44d
YZ
50
51 return child;
52}
53
dc087f2f 54static void virtfn_remove_bus(struct pci_bus *physbus, struct pci_bus *virtbus)
dd7cc44d 55{
dc087f2f
JL
56 if (physbus != virtbus && list_empty(&virtbus->devices))
57 pci_remove_bus(virtbus);
dd7cc44d
YZ
58}
59
60static int virtfn_add(struct pci_dev *dev, int id, int reset)
61{
62 int i;
dc087f2f 63 int rc = -ENOMEM;
dd7cc44d
YZ
64 u64 size;
65 char buf[VIRTFN_ID_LEN];
66 struct pci_dev *virtfn;
67 struct resource *res;
68 struct pci_sriov *iov = dev->sriov;
8b1fce04 69 struct pci_bus *bus;
dd7cc44d 70
dd7cc44d 71 mutex_lock(&iov->dev->sriov->lock);
8b1fce04 72 bus = virtfn_add_bus(dev->bus, virtfn_bus(dev, id));
dc087f2f
JL
73 if (!bus)
74 goto failed;
75
76 virtfn = pci_alloc_dev(bus);
dd7cc44d 77 if (!virtfn)
dc087f2f 78 goto failed0;
dd7cc44d 79
dd7cc44d
YZ
80 virtfn->devfn = virtfn_devfn(dev, id);
81 virtfn->vendor = dev->vendor;
82 pci_read_config_word(dev, iov->pos + PCI_SRIOV_VF_DID, &virtfn->device);
83 pci_setup_device(virtfn);
84 virtfn->dev.parent = dev->dev.parent;
fbf33f51
XH
85 virtfn->physfn = pci_dev_get(dev);
86 virtfn->is_virtfn = 1;
aa931977 87 virtfn->multifunction = 0;
dd7cc44d
YZ
88
89 for (i = 0; i < PCI_SRIOV_NUM_BARS; i++) {
90 res = dev->resource + PCI_IOV_RESOURCES + i;
91 if (!res->parent)
92 continue;
93 virtfn->resource[i].name = pci_name(virtfn);
94 virtfn->resource[i].flags = res->flags;
95 size = resource_size(res);
6b136724 96 do_div(size, iov->total_VFs);
dd7cc44d
YZ
97 virtfn->resource[i].start = res->start + size * id;
98 virtfn->resource[i].end = virtfn->resource[i].start + size - 1;
99 rc = request_resource(res, &virtfn->resource[i]);
100 BUG_ON(rc);
101 }
102
103 if (reset)
8c1c699f 104 __pci_reset_function(virtfn);
dd7cc44d
YZ
105
106 pci_device_add(virtfn, virtfn->bus);
107 mutex_unlock(&iov->dev->sriov->lock);
108
dd7cc44d 109 rc = pci_bus_add_device(virtfn);
dd7cc44d
YZ
110 sprintf(buf, "virtfn%u", id);
111 rc = sysfs_create_link(&dev->dev.kobj, &virtfn->dev.kobj, buf);
112 if (rc)
113 goto failed1;
114 rc = sysfs_create_link(&virtfn->dev.kobj, &dev->dev.kobj, "physfn");
115 if (rc)
116 goto failed2;
117
118 kobject_uevent(&virtfn->dev.kobj, KOBJ_CHANGE);
119
120 return 0;
121
122failed2:
123 sysfs_remove_link(&dev->dev.kobj, buf);
124failed1:
125 pci_dev_put(dev);
126 mutex_lock(&iov->dev->sriov->lock);
210647af 127 pci_stop_and_remove_bus_device(virtfn);
dc087f2f
JL
128failed0:
129 virtfn_remove_bus(dev->bus, bus);
130failed:
dd7cc44d
YZ
131 mutex_unlock(&iov->dev->sriov->lock);
132
133 return rc;
134}
135
136static void virtfn_remove(struct pci_dev *dev, int id, int reset)
137{
138 char buf[VIRTFN_ID_LEN];
dd7cc44d
YZ
139 struct pci_dev *virtfn;
140 struct pci_sriov *iov = dev->sriov;
141
dc087f2f
JL
142 virtfn = pci_get_domain_bus_and_slot(pci_domain_nr(dev->bus),
143 virtfn_bus(dev, id),
144 virtfn_devfn(dev, id));
dd7cc44d
YZ
145 if (!virtfn)
146 return;
147
dd7cc44d
YZ
148 if (reset) {
149 device_release_driver(&virtfn->dev);
8c1c699f 150 __pci_reset_function(virtfn);
dd7cc44d
YZ
151 }
152
153 sprintf(buf, "virtfn%u", id);
154 sysfs_remove_link(&dev->dev.kobj, buf);
09cedbef
YL
155 /*
156 * pci_stop_dev() could have been called for this virtfn already,
157 * so the directory for the virtfn may have been removed before.
158 * Double check to avoid spurious sysfs warnings.
159 */
160 if (virtfn->dev.kobj.sd)
161 sysfs_remove_link(&virtfn->dev.kobj, "physfn");
dd7cc44d
YZ
162
163 mutex_lock(&iov->dev->sriov->lock);
210647af 164 pci_stop_and_remove_bus_device(virtfn);
dc087f2f 165 virtfn_remove_bus(dev->bus, virtfn->bus);
dd7cc44d
YZ
166 mutex_unlock(&iov->dev->sriov->lock);
167
dc087f2f
JL
168 /* balance pci_get_domain_bus_and_slot() */
169 pci_dev_put(virtfn);
dd7cc44d
YZ
170 pci_dev_put(dev);
171}
172
74bb1bcc
YZ
173static int sriov_migration(struct pci_dev *dev)
174{
175 u16 status;
176 struct pci_sriov *iov = dev->sriov;
177
6b136724 178 if (!iov->num_VFs)
74bb1bcc
YZ
179 return 0;
180
181 if (!(iov->cap & PCI_SRIOV_CAP_VFM))
182 return 0;
183
184 pci_read_config_word(dev, iov->pos + PCI_SRIOV_STATUS, &status);
185 if (!(status & PCI_SRIOV_STATUS_VFM))
186 return 0;
187
188 schedule_work(&iov->mtask);
189
190 return 1;
191}
192
193static void sriov_migration_task(struct work_struct *work)
194{
195 int i;
196 u8 state;
197 u16 status;
198 struct pci_sriov *iov = container_of(work, struct pci_sriov, mtask);
199
6b136724 200 for (i = iov->initial_VFs; i < iov->num_VFs; i++) {
74bb1bcc
YZ
201 state = readb(iov->mstate + i);
202 if (state == PCI_SRIOV_VFM_MI) {
203 writeb(PCI_SRIOV_VFM_AV, iov->mstate + i);
204 state = readb(iov->mstate + i);
205 if (state == PCI_SRIOV_VFM_AV)
206 virtfn_add(iov->self, i, 1);
207 } else if (state == PCI_SRIOV_VFM_MO) {
208 virtfn_remove(iov->self, i, 1);
209 writeb(PCI_SRIOV_VFM_UA, iov->mstate + i);
210 state = readb(iov->mstate + i);
211 if (state == PCI_SRIOV_VFM_AV)
212 virtfn_add(iov->self, i, 0);
213 }
214 }
215
216 pci_read_config_word(iov->self, iov->pos + PCI_SRIOV_STATUS, &status);
217 status &= ~PCI_SRIOV_STATUS_VFM;
218 pci_write_config_word(iov->self, iov->pos + PCI_SRIOV_STATUS, status);
219}
220
221static int sriov_enable_migration(struct pci_dev *dev, int nr_virtfn)
222{
223 int bir;
224 u32 table;
225 resource_size_t pa;
226 struct pci_sriov *iov = dev->sriov;
227
6b136724 228 if (nr_virtfn <= iov->initial_VFs)
74bb1bcc
YZ
229 return 0;
230
231 pci_read_config_dword(dev, iov->pos + PCI_SRIOV_VFM, &table);
232 bir = PCI_SRIOV_VFM_BIR(table);
233 if (bir > PCI_STD_RESOURCE_END)
234 return -EIO;
235
236 table = PCI_SRIOV_VFM_OFFSET(table);
237 if (table + nr_virtfn > pci_resource_len(dev, bir))
238 return -EIO;
239
240 pa = pci_resource_start(dev, bir) + table;
241 iov->mstate = ioremap(pa, nr_virtfn);
242 if (!iov->mstate)
243 return -ENOMEM;
244
245 INIT_WORK(&iov->mtask, sriov_migration_task);
246
247 iov->ctrl |= PCI_SRIOV_CTRL_VFM | PCI_SRIOV_CTRL_INTR;
248 pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl);
249
250 return 0;
251}
252
253static void sriov_disable_migration(struct pci_dev *dev)
254{
255 struct pci_sriov *iov = dev->sriov;
256
257 iov->ctrl &= ~(PCI_SRIOV_CTRL_VFM | PCI_SRIOV_CTRL_INTR);
258 pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl);
259
260 cancel_work_sync(&iov->mtask);
261 iounmap(iov->mstate);
262}
263
dd7cc44d
YZ
264static int sriov_enable(struct pci_dev *dev, int nr_virtfn)
265{
266 int rc;
267 int i, j;
268 int nres;
269 u16 offset, stride, initial;
270 struct resource *res;
271 struct pci_dev *pdev;
272 struct pci_sriov *iov = dev->sriov;
bbef98ab 273 int bars = 0;
dd7cc44d
YZ
274
275 if (!nr_virtfn)
276 return 0;
277
6b136724 278 if (iov->num_VFs)
dd7cc44d
YZ
279 return -EINVAL;
280
281 pci_read_config_word(dev, iov->pos + PCI_SRIOV_INITIAL_VF, &initial);
6b136724
BH
282 if (initial > iov->total_VFs ||
283 (!(iov->cap & PCI_SRIOV_CAP_VFM) && (initial != iov->total_VFs)))
dd7cc44d
YZ
284 return -EIO;
285
6b136724 286 if (nr_virtfn < 0 || nr_virtfn > iov->total_VFs ||
dd7cc44d
YZ
287 (!(iov->cap & PCI_SRIOV_CAP_VFM) && (nr_virtfn > initial)))
288 return -EINVAL;
289
dd7cc44d
YZ
290 pci_read_config_word(dev, iov->pos + PCI_SRIOV_VF_OFFSET, &offset);
291 pci_read_config_word(dev, iov->pos + PCI_SRIOV_VF_STRIDE, &stride);
292 if (!offset || (nr_virtfn > 1 && !stride))
293 return -EIO;
294
295 nres = 0;
296 for (i = 0; i < PCI_SRIOV_NUM_BARS; i++) {
bbef98ab 297 bars |= (1 << (i + PCI_IOV_RESOURCES));
dd7cc44d
YZ
298 res = dev->resource + PCI_IOV_RESOURCES + i;
299 if (res->parent)
300 nres++;
301 }
302 if (nres != iov->nres) {
303 dev_err(&dev->dev, "not enough MMIO resources for SR-IOV\n");
304 return -ENOMEM;
305 }
306
307 iov->offset = offset;
308 iov->stride = stride;
309
b918c62e 310 if (virtfn_bus(dev, nr_virtfn - 1) > dev->bus->busn_res.end) {
dd7cc44d
YZ
311 dev_err(&dev->dev, "SR-IOV: bus number out of range\n");
312 return -ENOMEM;
313 }
314
bbef98ab
RP
315 if (pci_enable_resources(dev, bars)) {
316 dev_err(&dev->dev, "SR-IOV: IOV BARS not allocated\n");
317 return -ENOMEM;
318 }
319
dd7cc44d
YZ
320 if (iov->link != dev->devfn) {
321 pdev = pci_get_slot(dev->bus, iov->link);
322 if (!pdev)
323 return -ENODEV;
324
dc087f2f
JL
325 if (!pdev->is_physfn) {
326 pci_dev_put(pdev);
652d1100 327 return -ENOSYS;
dc087f2f 328 }
dd7cc44d
YZ
329
330 rc = sysfs_create_link(&dev->dev.kobj,
331 &pdev->dev.kobj, "dep_link");
dc087f2f 332 pci_dev_put(pdev);
dd7cc44d
YZ
333 if (rc)
334 return rc;
335 }
336
19b6984e 337 pci_write_config_word(dev, iov->pos + PCI_SRIOV_NUM_VF, nr_virtfn);
dd7cc44d 338 iov->ctrl |= PCI_SRIOV_CTRL_VFE | PCI_SRIOV_CTRL_MSE;
fb51ccbf 339 pci_cfg_access_lock(dev);
dd7cc44d
YZ
340 pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl);
341 msleep(100);
fb51ccbf 342 pci_cfg_access_unlock(dev);
dd7cc44d 343
6b136724 344 iov->initial_VFs = initial;
dd7cc44d
YZ
345 if (nr_virtfn < initial)
346 initial = nr_virtfn;
347
348 for (i = 0; i < initial; i++) {
349 rc = virtfn_add(dev, i, 0);
350 if (rc)
351 goto failed;
352 }
353
74bb1bcc
YZ
354 if (iov->cap & PCI_SRIOV_CAP_VFM) {
355 rc = sriov_enable_migration(dev, nr_virtfn);
356 if (rc)
357 goto failed;
358 }
359
dd7cc44d 360 kobject_uevent(&dev->dev.kobj, KOBJ_CHANGE);
6b136724 361 iov->num_VFs = nr_virtfn;
dd7cc44d
YZ
362
363 return 0;
364
365failed:
366 for (j = 0; j < i; j++)
367 virtfn_remove(dev, j, 0);
368
369 iov->ctrl &= ~(PCI_SRIOV_CTRL_VFE | PCI_SRIOV_CTRL_MSE);
fb51ccbf 370 pci_cfg_access_lock(dev);
dd7cc44d 371 pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl);
19b6984e 372 pci_write_config_word(dev, iov->pos + PCI_SRIOV_NUM_VF, 0);
dd7cc44d 373 ssleep(1);
fb51ccbf 374 pci_cfg_access_unlock(dev);
dd7cc44d
YZ
375
376 if (iov->link != dev->devfn)
377 sysfs_remove_link(&dev->dev.kobj, "dep_link");
378
379 return rc;
380}
381
382static void sriov_disable(struct pci_dev *dev)
383{
384 int i;
385 struct pci_sriov *iov = dev->sriov;
386
6b136724 387 if (!iov->num_VFs)
dd7cc44d
YZ
388 return;
389
74bb1bcc
YZ
390 if (iov->cap & PCI_SRIOV_CAP_VFM)
391 sriov_disable_migration(dev);
392
6b136724 393 for (i = 0; i < iov->num_VFs; i++)
dd7cc44d
YZ
394 virtfn_remove(dev, i, 0);
395
396 iov->ctrl &= ~(PCI_SRIOV_CTRL_VFE | PCI_SRIOV_CTRL_MSE);
fb51ccbf 397 pci_cfg_access_lock(dev);
dd7cc44d
YZ
398 pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl);
399 ssleep(1);
fb51ccbf 400 pci_cfg_access_unlock(dev);
dd7cc44d
YZ
401
402 if (iov->link != dev->devfn)
403 sysfs_remove_link(&dev->dev.kobj, "dep_link");
404
6b136724 405 iov->num_VFs = 0;
19b6984e 406 pci_write_config_word(dev, iov->pos + PCI_SRIOV_NUM_VF, 0);
dd7cc44d
YZ
407}
408
d1b054da
YZ
409static int sriov_init(struct pci_dev *dev, int pos)
410{
411 int i;
412 int rc;
413 int nres;
414 u32 pgsz;
415 u16 ctrl, total, offset, stride;
416 struct pci_sriov *iov;
417 struct resource *res;
418 struct pci_dev *pdev;
419
62f87c0e
YW
420 if (pci_pcie_type(dev) != PCI_EXP_TYPE_RC_END &&
421 pci_pcie_type(dev) != PCI_EXP_TYPE_ENDPOINT)
d1b054da
YZ
422 return -ENODEV;
423
424 pci_read_config_word(dev, pos + PCI_SRIOV_CTRL, &ctrl);
425 if (ctrl & PCI_SRIOV_CTRL_VFE) {
426 pci_write_config_word(dev, pos + PCI_SRIOV_CTRL, 0);
427 ssleep(1);
428 }
429
430 pci_read_config_word(dev, pos + PCI_SRIOV_TOTAL_VF, &total);
431 if (!total)
432 return 0;
433
434 ctrl = 0;
435 list_for_each_entry(pdev, &dev->bus->devices, bus_list)
436 if (pdev->is_physfn)
437 goto found;
438
439 pdev = NULL;
440 if (pci_ari_enabled(dev->bus))
441 ctrl |= PCI_SRIOV_CTRL_ARI;
442
443found:
444 pci_write_config_word(dev, pos + PCI_SRIOV_CTRL, ctrl);
045cc22e 445 pci_write_config_word(dev, pos + PCI_SRIOV_NUM_VF, 0);
d1b054da
YZ
446 pci_read_config_word(dev, pos + PCI_SRIOV_VF_OFFSET, &offset);
447 pci_read_config_word(dev, pos + PCI_SRIOV_VF_STRIDE, &stride);
448 if (!offset || (total > 1 && !stride))
449 return -EIO;
450
451 pci_read_config_dword(dev, pos + PCI_SRIOV_SUP_PGSIZE, &pgsz);
452 i = PAGE_SHIFT > 12 ? PAGE_SHIFT - 12 : 0;
453 pgsz &= ~((1 << i) - 1);
454 if (!pgsz)
455 return -EIO;
456
457 pgsz &= ~(pgsz - 1);
8161fe91 458 pci_write_config_dword(dev, pos + PCI_SRIOV_SYS_PGSIZE, pgsz);
d1b054da
YZ
459
460 nres = 0;
461 for (i = 0; i < PCI_SRIOV_NUM_BARS; i++) {
462 res = dev->resource + PCI_IOV_RESOURCES + i;
463 i += __pci_read_base(dev, pci_bar_unknown, res,
464 pos + PCI_SRIOV_BAR + i * 4);
465 if (!res->flags)
466 continue;
467 if (resource_size(res) & (PAGE_SIZE - 1)) {
468 rc = -EIO;
469 goto failed;
470 }
471 res->end = res->start + resource_size(res) * total - 1;
472 nres++;
473 }
474
475 iov = kzalloc(sizeof(*iov), GFP_KERNEL);
476 if (!iov) {
477 rc = -ENOMEM;
478 goto failed;
479 }
480
481 iov->pos = pos;
482 iov->nres = nres;
483 iov->ctrl = ctrl;
6b136724 484 iov->total_VFs = total;
d1b054da
YZ
485 iov->offset = offset;
486 iov->stride = stride;
487 iov->pgsz = pgsz;
488 iov->self = dev;
489 pci_read_config_dword(dev, pos + PCI_SRIOV_CAP, &iov->cap);
490 pci_read_config_byte(dev, pos + PCI_SRIOV_FUNC_LINK, &iov->link);
62f87c0e 491 if (pci_pcie_type(dev) == PCI_EXP_TYPE_RC_END)
4d135dbe 492 iov->link = PCI_DEVFN(PCI_SLOT(dev->devfn), iov->link);
d1b054da
YZ
493
494 if (pdev)
495 iov->dev = pci_dev_get(pdev);
e277d2fc 496 else
d1b054da 497 iov->dev = dev;
e277d2fc
YZ
498
499 mutex_init(&iov->lock);
d1b054da
YZ
500
501 dev->sriov = iov;
502 dev->is_physfn = 1;
503
504 return 0;
505
506failed:
507 for (i = 0; i < PCI_SRIOV_NUM_BARS; i++) {
508 res = dev->resource + PCI_IOV_RESOURCES + i;
509 res->flags = 0;
510 }
511
512 return rc;
513}
514
515static void sriov_release(struct pci_dev *dev)
516{
6b136724 517 BUG_ON(dev->sriov->num_VFs);
dd7cc44d 518
e277d2fc 519 if (dev != dev->sriov->dev)
d1b054da
YZ
520 pci_dev_put(dev->sriov->dev);
521
e277d2fc
YZ
522 mutex_destroy(&dev->sriov->lock);
523
d1b054da
YZ
524 kfree(dev->sriov);
525 dev->sriov = NULL;
526}
527
8c5cdb6a
YZ
528static void sriov_restore_state(struct pci_dev *dev)
529{
530 int i;
531 u16 ctrl;
532 struct pci_sriov *iov = dev->sriov;
533
534 pci_read_config_word(dev, iov->pos + PCI_SRIOV_CTRL, &ctrl);
535 if (ctrl & PCI_SRIOV_CTRL_VFE)
536 return;
537
538 for (i = PCI_IOV_RESOURCES; i <= PCI_IOV_RESOURCE_END; i++)
539 pci_update_resource(dev, i);
540
541 pci_write_config_dword(dev, iov->pos + PCI_SRIOV_SYS_PGSIZE, iov->pgsz);
6b136724 542 pci_write_config_word(dev, iov->pos + PCI_SRIOV_NUM_VF, iov->num_VFs);
8c5cdb6a
YZ
543 pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl);
544 if (iov->ctrl & PCI_SRIOV_CTRL_VFE)
545 msleep(100);
546}
547
d1b054da
YZ
548/**
549 * pci_iov_init - initialize the IOV capability
550 * @dev: the PCI device
551 *
552 * Returns 0 on success, or negative on failure.
553 */
554int pci_iov_init(struct pci_dev *dev)
555{
556 int pos;
557
5f4d91a1 558 if (!pci_is_pcie(dev))
d1b054da
YZ
559 return -ENODEV;
560
561 pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_SRIOV);
562 if (pos)
563 return sriov_init(dev, pos);
564
565 return -ENODEV;
566}
567
568/**
569 * pci_iov_release - release resources used by the IOV capability
570 * @dev: the PCI device
571 */
572void pci_iov_release(struct pci_dev *dev)
573{
574 if (dev->is_physfn)
575 sriov_release(dev);
576}
577
578/**
579 * pci_iov_resource_bar - get position of the SR-IOV BAR
580 * @dev: the PCI device
581 * @resno: the resource number
582 * @type: the BAR type to be filled in
583 *
584 * Returns position of the BAR encapsulated in the SR-IOV capability.
585 */
586int pci_iov_resource_bar(struct pci_dev *dev, int resno,
587 enum pci_bar_type *type)
588{
589 if (resno < PCI_IOV_RESOURCES || resno > PCI_IOV_RESOURCE_END)
590 return 0;
591
592 BUG_ON(!dev->is_physfn);
593
594 *type = pci_bar_unknown;
595
596 return dev->sriov->pos + PCI_SRIOV_BAR +
597 4 * (resno - PCI_IOV_RESOURCES);
598}
8c5cdb6a 599
6faf17f6
CW
600/**
601 * pci_sriov_resource_alignment - get resource alignment for VF BAR
602 * @dev: the PCI device
603 * @resno: the resource number
604 *
605 * Returns the alignment of the VF BAR found in the SR-IOV capability.
606 * This is not the same as the resource size which is defined as
607 * the VF BAR size multiplied by the number of VFs. The alignment
608 * is just the VF BAR size.
609 */
0e52247a 610resource_size_t pci_sriov_resource_alignment(struct pci_dev *dev, int resno)
6faf17f6
CW
611{
612 struct resource tmp;
613 enum pci_bar_type type;
614 int reg = pci_iov_resource_bar(dev, resno, &type);
f7625980 615
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CW
616 if (!reg)
617 return 0;
618
619 __pci_read_base(dev, type, &tmp, reg);
620 return resource_alignment(&tmp);
621}
622
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623/**
624 * pci_restore_iov_state - restore the state of the IOV capability
625 * @dev: the PCI device
626 */
627void pci_restore_iov_state(struct pci_dev *dev)
628{
629 if (dev->is_physfn)
630 sriov_restore_state(dev);
631}
a28724b0
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632
633/**
634 * pci_iov_bus_range - find bus range used by Virtual Function
635 * @bus: the PCI bus
636 *
637 * Returns max number of buses (exclude current one) used by Virtual
638 * Functions.
639 */
640int pci_iov_bus_range(struct pci_bus *bus)
641{
642 int max = 0;
643 u8 busnr;
644 struct pci_dev *dev;
645
646 list_for_each_entry(dev, &bus->devices, bus_list) {
647 if (!dev->is_physfn)
648 continue;
6b136724 649 busnr = virtfn_bus(dev, dev->sriov->total_VFs - 1);
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650 if (busnr > max)
651 max = busnr;
652 }
653
654 return max ? max - bus->number : 0;
655}
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656
657/**
658 * pci_enable_sriov - enable the SR-IOV capability
659 * @dev: the PCI device
52a8873b 660 * @nr_virtfn: number of virtual functions to enable
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661 *
662 * Returns 0 on success, or negative on failure.
663 */
664int pci_enable_sriov(struct pci_dev *dev, int nr_virtfn)
665{
666 might_sleep();
667
668 if (!dev->is_physfn)
652d1100 669 return -ENOSYS;
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670
671 return sriov_enable(dev, nr_virtfn);
672}
673EXPORT_SYMBOL_GPL(pci_enable_sriov);
674
675/**
676 * pci_disable_sriov - disable the SR-IOV capability
677 * @dev: the PCI device
678 */
679void pci_disable_sriov(struct pci_dev *dev)
680{
681 might_sleep();
682
683 if (!dev->is_physfn)
684 return;
685
686 sriov_disable(dev);
687}
688EXPORT_SYMBOL_GPL(pci_disable_sriov);
74bb1bcc
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689
690/**
691 * pci_sriov_migration - notify SR-IOV core of Virtual Function Migration
692 * @dev: the PCI device
693 *
694 * Returns IRQ_HANDLED if the IRQ is handled, or IRQ_NONE if not.
695 *
696 * Physical Function driver is responsible to register IRQ handler using
697 * VF Migration Interrupt Message Number, and call this function when the
698 * interrupt is generated by the hardware.
699 */
700irqreturn_t pci_sriov_migration(struct pci_dev *dev)
701{
702 if (!dev->is_physfn)
703 return IRQ_NONE;
704
705 return sriov_migration(dev) ? IRQ_HANDLED : IRQ_NONE;
706}
707EXPORT_SYMBOL_GPL(pci_sriov_migration);
302b4215 708
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709/**
710 * pci_num_vf - return number of VFs associated with a PF device_release_driver
711 * @dev: the PCI device
712 *
713 * Returns number of VFs, or 0 if SR-IOV is not enabled.
714 */
715int pci_num_vf(struct pci_dev *dev)
716{
1452cd76 717 if (!dev->is_physfn)
fb8a0d9d 718 return 0;
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719
720 return dev->sriov->num_VFs;
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WM
721}
722EXPORT_SYMBOL_GPL(pci_num_vf);
bff73156 723
5a8eb242
AD
724/**
725 * pci_vfs_assigned - returns number of VFs are assigned to a guest
726 * @dev: the PCI device
727 *
728 * Returns number of VFs belonging to this device that are assigned to a guest.
652d1100 729 * If device is not a physical function returns 0.
5a8eb242
AD
730 */
731int pci_vfs_assigned(struct pci_dev *dev)
732{
733 struct pci_dev *vfdev;
734 unsigned int vfs_assigned = 0;
735 unsigned short dev_id;
736
737 /* only search if we are a PF */
738 if (!dev->is_physfn)
739 return 0;
740
741 /*
742 * determine the device ID for the VFs, the vendor ID will be the
743 * same as the PF so there is no need to check for that one
744 */
745 pci_read_config_word(dev, dev->sriov->pos + PCI_SRIOV_VF_DID, &dev_id);
746
747 /* loop through all the VFs to see if we own any that are assigned */
748 vfdev = pci_get_device(dev->vendor, dev_id, NULL);
749 while (vfdev) {
750 /*
751 * It is considered assigned if it is a virtual function with
752 * our dev as the physical function and the assigned bit is set
753 */
754 if (vfdev->is_virtfn && (vfdev->physfn == dev) &&
755 (vfdev->dev_flags & PCI_DEV_FLAGS_ASSIGNED))
756 vfs_assigned++;
757
758 vfdev = pci_get_device(dev->vendor, dev_id, vfdev);
759 }
760
761 return vfs_assigned;
762}
763EXPORT_SYMBOL_GPL(pci_vfs_assigned);
764
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DD
765/**
766 * pci_sriov_set_totalvfs -- reduce the TotalVFs available
767 * @dev: the PCI PF device
2094f167 768 * @numvfs: number that should be used for TotalVFs supported
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769 *
770 * Should be called from PF driver's probe routine with
771 * device's mutex held.
772 *
773 * Returns 0 if PF is an SRIOV-capable device and
652d1100
SA
774 * value of numvfs valid. If not a PF return -ENOSYS;
775 * if numvfs is invalid return -EINVAL;
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776 * if VFs already enabled, return -EBUSY.
777 */
778int pci_sriov_set_totalvfs(struct pci_dev *dev, u16 numvfs)
779{
652d1100
SA
780 if (!dev->is_physfn)
781 return -ENOSYS;
782 if (numvfs > dev->sriov->total_VFs)
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783 return -EINVAL;
784
785 /* Shouldn't change if VFs already enabled */
786 if (dev->sriov->ctrl & PCI_SRIOV_CTRL_VFE)
787 return -EBUSY;
788 else
6b136724 789 dev->sriov->driver_max_VFs = numvfs;
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790
791 return 0;
792}
793EXPORT_SYMBOL_GPL(pci_sriov_set_totalvfs);
794
795/**
ddc191f5 796 * pci_sriov_get_totalvfs -- get total VFs supported on this device
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797 * @dev: the PCI PF device
798 *
799 * For a PCIe device with SRIOV support, return the PCIe
6b136724 800 * SRIOV capability value of TotalVFs or the value of driver_max_VFs
652d1100 801 * if the driver reduced it. Otherwise 0.
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802 */
803int pci_sriov_get_totalvfs(struct pci_dev *dev)
804{
1452cd76 805 if (!dev->is_physfn)
652d1100 806 return 0;
bff73156 807
6b136724
BH
808 if (dev->sriov->driver_max_VFs)
809 return dev->sriov->driver_max_VFs;
1452cd76
BH
810
811 return dev->sriov->total_VFs;
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812}
813EXPORT_SYMBOL_GPL(pci_sriov_get_totalvfs);
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