[deliverable/linux.git] / drivers / pci / iov.c

/*
 * drivers/pci/iov.c
 *
 * Copyright (C) 2009 Intel Corporation, Yu Zhao <yu.zhao@intel.com>
 *
 * PCI Express I/O Virtualization (IOV) support.
 *   Single Root IOV 1.0
 *   Address Translation Service 1.0
 */

#include <linux/pci.h>
#include <linux/slab.h>
#include <linux/mutex.h>
#include <linux/export.h>
#include <linux/string.h>
#include <linux/delay.h>
#include <linux/pci-ats.h>
#include "pci.h"

#define VIRTFN_ID_LEN	16

static inline u8 virtfn_bus(struct pci_dev *dev, int id)
{
	return dev->bus->number + ((dev->devfn + dev->sriov->offset +
				    dev->sriov->stride * id) >> 8);
}

static inline u8 virtfn_devfn(struct pci_dev *dev, int id)
{
	return (dev->devfn + dev->sriov->offset +
		dev->sriov->stride * id) & 0xff;
}

static struct pci_bus *virtfn_add_bus(struct pci_bus *bus, int busnr)
{
	struct pci_bus *child;

	if (bus->number == busnr)
		return bus;

	child = pci_find_bus(pci_domain_nr(bus), busnr);
	if (child)
		return child;

	child = pci_add_new_bus(bus, NULL, busnr);
	if (!child)
		return NULL;

	pci_bus_insert_busn_res(child, busnr, busnr);

	return child;
}

static void virtfn_remove_bus(struct pci_bus *physbus, struct pci_bus *virtbus)
{
	if (physbus != virtbus && list_empty(&virtbus->devices))
		pci_remove_bus(virtbus);
}

static int virtfn_add(struct pci_dev *dev, int id, int reset)
{
	int i;
	int rc = -ENOMEM;
	u64 size;
	char buf[VIRTFN_ID_LEN];
	struct pci_dev *virtfn;
	struct resource *res;
	struct pci_sriov *iov = dev->sriov;
	struct pci_bus *bus;

	mutex_lock(&iov->dev->sriov->lock);
	bus = virtfn_add_bus(dev->bus, virtfn_bus(dev, id));
	if (!bus)
		goto failed;

	virtfn = pci_alloc_dev(bus);
	if (!virtfn)
		goto failed0;

	virtfn->devfn = virtfn_devfn(dev, id);
	virtfn->vendor = dev->vendor;
	pci_read_config_word(dev, iov->pos + PCI_SRIOV_VF_DID, &virtfn->device);
	pci_setup_device(virtfn);
	virtfn->dev.parent = dev->dev.parent;
	virtfn->physfn = pci_dev_get(dev);
	virtfn->is_virtfn = 1;
	virtfn->multifunction = 0;

	for (i = 0; i < PCI_SRIOV_NUM_BARS; i++) {
		res = dev->resource + PCI_IOV_RESOURCES + i;
		if (!res->parent)
			continue;
		virtfn->resource[i].name = pci_name(virtfn);
		virtfn->resource[i].flags = res->flags;
		size = resource_size(res);
		do_div(size, iov->total_VFs);
		virtfn->resource[i].start = res->start + size * id;
		virtfn->resource[i].end = virtfn->resource[i].start + size - 1;
		rc = request_resource(res, &virtfn->resource[i]);
		BUG_ON(rc);
	}

	if (reset)
		__pci_reset_function(virtfn);

	pci_device_add(virtfn, virtfn->bus);
	mutex_unlock(&iov->dev->sriov->lock);

	rc = pci_bus_add_device(virtfn);
	sprintf(buf, "virtfn%u", id);
	rc = sysfs_create_link(&dev->dev.kobj, &virtfn->dev.kobj, buf);
	if (rc)
		goto failed1;
	rc = sysfs_create_link(&virtfn->dev.kobj, &dev->dev.kobj, "physfn");
	if (rc)
		goto failed2;

	kobject_uevent(&virtfn->dev.kobj, KOBJ_CHANGE);

	return 0;

failed2:
	sysfs_remove_link(&dev->dev.kobj, buf);
failed1:
	pci_dev_put(dev);
	mutex_lock(&iov->dev->sriov->lock);
	pci_stop_and_remove_bus_device(virtfn);
failed0:
	virtfn_remove_bus(dev->bus, bus);
failed:
	mutex_unlock(&iov->dev->sriov->lock);

	return rc;
}

static void virtfn_remove(struct pci_dev *dev, int id, int reset)
{
	char buf[VIRTFN_ID_LEN];
	struct pci_dev *virtfn;
	struct pci_sriov *iov = dev->sriov;

	virtfn = pci_get_domain_bus_and_slot(pci_domain_nr(dev->bus),
					     virtfn_bus(dev, id),
					     virtfn_devfn(dev, id));
	if (!virtfn)
		return;

	if (reset) {
		device_release_driver(&virtfn->dev);
		__pci_reset_function(virtfn);
	}

	sprintf(buf, "virtfn%u", id);
	sysfs_remove_link(&dev->dev.kobj, buf);
	/*
	 * pci_stop_dev() could have been called for this virtfn already,
	 * so the directory for the virtfn may have been removed before.
	 * Double check to avoid spurious sysfs warnings.
	 */
	if (virtfn->dev.kobj.sd)
		sysfs_remove_link(&virtfn->dev.kobj, "physfn");

	mutex_lock(&iov->dev->sriov->lock);
	pci_stop_and_remove_bus_device(virtfn);
	virtfn_remove_bus(dev->bus, virtfn->bus);
	mutex_unlock(&iov->dev->sriov->lock);

	/* balance pci_get_domain_bus_and_slot() */
	pci_dev_put(virtfn);
	pci_dev_put(dev);
}

static int sriov_enable(struct pci_dev *dev, int nr_virtfn)
{
	int rc;
	int i, j;
	int nres;
	u16 offset, stride, initial;
	struct resource *res;
	struct pci_dev *pdev;
	struct pci_sriov *iov = dev->sriov;
	int bars = 0;

	if (!nr_virtfn)
		return 0;

	if (iov->num_VFs)
		return -EINVAL;

	pci_read_config_word(dev, iov->pos + PCI_SRIOV_INITIAL_VF, &initial);
	if (initial > iov->total_VFs ||
	    (!(iov->cap & PCI_SRIOV_CAP_VFM) && (initial != iov->total_VFs)))
		return -EIO;

	if (nr_virtfn < 0 || nr_virtfn > iov->total_VFs ||
	    (!(iov->cap & PCI_SRIOV_CAP_VFM) && (nr_virtfn > initial)))
		return -EINVAL;

	pci_read_config_word(dev, iov->pos + PCI_SRIOV_VF_OFFSET, &offset);
	pci_read_config_word(dev, iov->pos + PCI_SRIOV_VF_STRIDE, &stride);
	if (!offset || (nr_virtfn > 1 && !stride))
		return -EIO;

	nres = 0;
	for (i = 0; i < PCI_SRIOV_NUM_BARS; i++) {
		bars |= (1 << (i + PCI_IOV_RESOURCES));
		res = dev->resource + PCI_IOV_RESOURCES + i;
		if (res->parent)
			nres++;
	}
	if (nres != iov->nres) {
		dev_err(&dev->dev, "not enough MMIO resources for SR-IOV\n");
		return -ENOMEM;
	}

	iov->offset = offset;
	iov->stride = stride;

	if (virtfn_bus(dev, nr_virtfn - 1) > dev->bus->busn_res.end) {
		dev_err(&dev->dev, "SR-IOV: bus number out of range\n");
		return -ENOMEM;
	}

	if (pci_enable_resources(dev, bars)) {
		dev_err(&dev->dev, "SR-IOV: IOV BARS not allocated\n");
		return -ENOMEM;
	}

	if (iov->link != dev->devfn) {
		pdev = pci_get_slot(dev->bus, iov->link);
		if (!pdev)
			return -ENODEV;

		if (!pdev->is_physfn) {
			pci_dev_put(pdev);
			return -ENOSYS;
		}

		rc = sysfs_create_link(&dev->dev.kobj,
					&pdev->dev.kobj, "dep_link");
		pci_dev_put(pdev);
		if (rc)
			return rc;
	}

	pci_write_config_word(dev, iov->pos + PCI_SRIOV_NUM_VF, nr_virtfn);
	iov->ctrl |= PCI_SRIOV_CTRL_VFE | PCI_SRIOV_CTRL_MSE;
	pci_cfg_access_lock(dev);
	pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl);
	msleep(100);
	pci_cfg_access_unlock(dev);

	iov->initial_VFs = initial;
	if (nr_virtfn < initial)
		initial = nr_virtfn;

	for (i = 0; i < initial; i++) {
		rc = virtfn_add(dev, i, 0);
		if (rc)
			goto failed;
	}

	kobject_uevent(&dev->dev.kobj, KOBJ_CHANGE);
	iov->num_VFs = nr_virtfn;

	return 0;

failed:
	for (j = 0; j < i; j++)
		virtfn_remove(dev, j, 0);

	iov->ctrl &= ~(PCI_SRIOV_CTRL_VFE | PCI_SRIOV_CTRL_MSE);
	pci_cfg_access_lock(dev);
	pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl);
	pci_write_config_word(dev, iov->pos + PCI_SRIOV_NUM_VF, 0);
	ssleep(1);
	pci_cfg_access_unlock(dev);

	if (iov->link != dev->devfn)
		sysfs_remove_link(&dev->dev.kobj, "dep_link");

	return rc;
}

static void sriov_disable(struct pci_dev *dev)
{
	int i;
	struct pci_sriov *iov = dev->sriov;

	if (!iov->num_VFs)
		return;

	for (i = 0; i < iov->num_VFs; i++)
		virtfn_remove(dev, i, 0);

	iov->ctrl &= ~(PCI_SRIOV_CTRL_VFE | PCI_SRIOV_CTRL_MSE);
	pci_cfg_access_lock(dev);
	pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl);
	ssleep(1);
	pci_cfg_access_unlock(dev);

	if (iov->link != dev->devfn)
		sysfs_remove_link(&dev->dev.kobj, "dep_link");

	iov->num_VFs = 0;
	pci_write_config_word(dev, iov->pos + PCI_SRIOV_NUM_VF, 0);
}

static int sriov_init(struct pci_dev *dev, int pos)
{
	int i;
	int rc;
	int nres;
	u32 pgsz;
	u16 ctrl, total, offset, stride;
	struct pci_sriov *iov;
	struct resource *res;
	struct pci_dev *pdev;

	if (pci_pcie_type(dev) != PCI_EXP_TYPE_RC_END &&
	    pci_pcie_type(dev) != PCI_EXP_TYPE_ENDPOINT)
		return -ENODEV;

	pci_read_config_word(dev, pos + PCI_SRIOV_CTRL, &ctrl);
	if (ctrl & PCI_SRIOV_CTRL_VFE) {
		pci_write_config_word(dev, pos + PCI_SRIOV_CTRL, 0);
		ssleep(1);
	}

	pci_read_config_word(dev, pos + PCI_SRIOV_TOTAL_VF, &total);
	if (!total)
		return 0;

	ctrl = 0;
	list_for_each_entry(pdev, &dev->bus->devices, bus_list)
		if (pdev->is_physfn)
			goto found;

	pdev = NULL;
	if (pci_ari_enabled(dev->bus))
		ctrl |= PCI_SRIOV_CTRL_ARI;

found:
	pci_write_config_word(dev, pos + PCI_SRIOV_CTRL, ctrl);
	pci_write_config_word(dev, pos + PCI_SRIOV_NUM_VF, 0);
	pci_read_config_word(dev, pos + PCI_SRIOV_VF_OFFSET, &offset);
	pci_read_config_word(dev, pos + PCI_SRIOV_VF_STRIDE, &stride);
	if (!offset || (total > 1 && !stride))
		return -EIO;

	pci_read_config_dword(dev, pos + PCI_SRIOV_SUP_PGSIZE, &pgsz);
	i = PAGE_SHIFT > 12 ? PAGE_SHIFT - 12 : 0;
	pgsz &= ~((1 << i) - 1);
	if (!pgsz)
		return -EIO;

	pgsz &= ~(pgsz - 1);
	pci_write_config_dword(dev, pos + PCI_SRIOV_SYS_PGSIZE, pgsz);

	nres = 0;
	for (i = 0; i < PCI_SRIOV_NUM_BARS; i++) {
		res = dev->resource + PCI_IOV_RESOURCES + i;
		i += __pci_read_base(dev, pci_bar_unknown, res,
				     pos + PCI_SRIOV_BAR + i * 4);
		if (!res->flags)
			continue;
		if (resource_size(res) & (PAGE_SIZE - 1)) {
			rc = -EIO;
			goto failed;
		}
		res->end = res->start + resource_size(res) * total - 1;
		nres++;
	}

	iov = kzalloc(sizeof(*iov), GFP_KERNEL);
	if (!iov) {
		rc = -ENOMEM;
		goto failed;
	}

	iov->pos = pos;
	iov->nres = nres;
	iov->ctrl = ctrl;
	iov->total_VFs = total;
	iov->offset = offset;
	iov->stride = stride;
	iov->pgsz = pgsz;
	iov->self = dev;
	pci_read_config_dword(dev, pos + PCI_SRIOV_CAP, &iov->cap);
	pci_read_config_byte(dev, pos + PCI_SRIOV_FUNC_LINK, &iov->link);
	if (pci_pcie_type(dev) == PCI_EXP_TYPE_RC_END)
		iov->link = PCI_DEVFN(PCI_SLOT(dev->devfn), iov->link);

	if (pdev)
		iov->dev = pci_dev_get(pdev);
	else
		iov->dev = dev;

	mutex_init(&iov->lock);

	dev->sriov = iov;
	dev->is_physfn = 1;

	return 0;

failed:
	for (i = 0; i < PCI_SRIOV_NUM_BARS; i++) {
		res = dev->resource + PCI_IOV_RESOURCES + i;
		res->flags = 0;
	}

	return rc;
}

static void sriov_release(struct pci_dev *dev)
{
	BUG_ON(dev->sriov->num_VFs);

	if (dev != dev->sriov->dev)
		pci_dev_put(dev->sriov->dev);

	mutex_destroy(&dev->sriov->lock);

	kfree(dev->sriov);
	dev->sriov = NULL;
}

static void sriov_restore_state(struct pci_dev *dev)
{
	int i;
	u16 ctrl;
	struct pci_sriov *iov = dev->sriov;

	pci_read_config_word(dev, iov->pos + PCI_SRIOV_CTRL, &ctrl);
	if (ctrl & PCI_SRIOV_CTRL_VFE)
		return;

	for (i = PCI_IOV_RESOURCES; i <= PCI_IOV_RESOURCE_END; i++)
		pci_update_resource(dev, i);

	pci_write_config_dword(dev, iov->pos + PCI_SRIOV_SYS_PGSIZE, iov->pgsz);
	pci_write_config_word(dev, iov->pos + PCI_SRIOV_NUM_VF, iov->num_VFs);
	pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl);
	if (iov->ctrl & PCI_SRIOV_CTRL_VFE)
		msleep(100);
}

/**
 * pci_iov_init - initialize the IOV capability
 * @dev: the PCI device
 *
 * Returns 0 on success, or negative on failure.
 */
int pci_iov_init(struct pci_dev *dev)
{
	int pos;

	if (!pci_is_pcie(dev))
		return -ENODEV;

	pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_SRIOV);
	if (pos)
		return sriov_init(dev, pos);

	return -ENODEV;
}

/**
 * pci_iov_release - release resources used by the IOV capability
 * @dev: the PCI device
 */
void pci_iov_release(struct pci_dev *dev)
{
	if (dev->is_physfn)
		sriov_release(dev);
}

/**
 * pci_iov_resource_bar - get position of the SR-IOV BAR
 * @dev: the PCI device
 * @resno: the resource number
 * @type: the BAR type to be filled in
 *
 * Returns position of the BAR encapsulated in the SR-IOV capability.
 */
int pci_iov_resource_bar(struct pci_dev *dev, int resno,
			 enum pci_bar_type *type)
{
	if (resno < PCI_IOV_RESOURCES || resno > PCI_IOV_RESOURCE_END)
		return 0;

	BUG_ON(!dev->is_physfn);

	*type = pci_bar_unknown;

	return dev->sriov->pos + PCI_SRIOV_BAR +
		4 * (resno - PCI_IOV_RESOURCES);
}

/**
 * pci_sriov_resource_alignment - get resource alignment for VF BAR
 * @dev: the PCI device
 * @resno: the resource number
 *
 * Returns the alignment of the VF BAR found in the SR-IOV capability.
 * This is not the same as the resource size which is defined as
 * the VF BAR size multiplied by the number of VFs.  The alignment
 * is just the VF BAR size.
 */
resource_size_t pci_sriov_resource_alignment(struct pci_dev *dev, int resno)
{
	struct resource tmp;
	enum pci_bar_type type;
	int reg = pci_iov_resource_bar(dev, resno, &type);

	if (!reg)
		return 0;

	 __pci_read_base(dev, type, &tmp, reg);
	return resource_alignment(&tmp);
}

/**
 * pci_restore_iov_state - restore the state of the IOV capability
 * @dev: the PCI device
 */
void pci_restore_iov_state(struct pci_dev *dev)
{
	if (dev->is_physfn)
		sriov_restore_state(dev);
}

/**
 * pci_iov_bus_range - find bus range used by Virtual Function
 * @bus: the PCI bus
 *
 * Returns max number of buses (exclude current one) used by Virtual
 * Functions.
 */
int pci_iov_bus_range(struct pci_bus *bus)
{
	int max = 0;
	u8 busnr;
	struct pci_dev *dev;

	list_for_each_entry(dev, &bus->devices, bus_list) {
		if (!dev->is_physfn)
			continue;
		busnr = virtfn_bus(dev, dev->sriov->total_VFs - 1);
		if (busnr > max)
			max = busnr;
	}

	return max ? max - bus->number : 0;
}

/**
 * pci_enable_sriov - enable the SR-IOV capability
 * @dev: the PCI device
 * @nr_virtfn: number of virtual functions to enable
 *
 * Returns 0 on success, or negative on failure.
 */
int pci_enable_sriov(struct pci_dev *dev, int nr_virtfn)
{
	might_sleep();

	if (!dev->is_physfn)
		return -ENOSYS;

	return sriov_enable(dev, nr_virtfn);
}
EXPORT_SYMBOL_GPL(pci_enable_sriov);

/**
 * pci_disable_sriov - disable the SR-IOV capability
 * @dev: the PCI device
 */
void pci_disable_sriov(struct pci_dev *dev)
{
	might_sleep();

	if (!dev->is_physfn)
		return;

	sriov_disable(dev);
}
EXPORT_SYMBOL_GPL(pci_disable_sriov);

/**
 * pci_num_vf - return number of VFs associated with a PF device_release_driver
 * @dev: the PCI device
 *
 * Returns number of VFs, or 0 if SR-IOV is not enabled.
 */
int pci_num_vf(struct pci_dev *dev)
{
	if (!dev->is_physfn)
		return 0;

	return dev->sriov->num_VFs;
}
EXPORT_SYMBOL_GPL(pci_num_vf);

/**
 * pci_vfs_assigned - returns number of VFs are assigned to a guest
 * @dev: the PCI device
 *
 * Returns number of VFs belonging to this device that are assigned to a guest.
 * If device is not a physical function returns 0.
 */
int pci_vfs_assigned(struct pci_dev *dev)
{
	struct pci_dev *vfdev;
	unsigned int vfs_assigned = 0;
	unsigned short dev_id;

	/* only search if we are a PF */
	if (!dev->is_physfn)
		return 0;

	/*
	 * determine the device ID for the VFs, the vendor ID will be the
	 * same as the PF so there is no need to check for that one
	 */
	pci_read_config_word(dev, dev->sriov->pos + PCI_SRIOV_VF_DID, &dev_id);

	/* loop through all the VFs to see if we own any that are assigned */
	vfdev = pci_get_device(dev->vendor, dev_id, NULL);
	while (vfdev) {
		/*
		 * It is considered assigned if it is a virtual function with
		 * our dev as the physical function and the assigned bit is set
		 */
		if (vfdev->is_virtfn && (vfdev->physfn == dev) &&
		    (vfdev->dev_flags & PCI_DEV_FLAGS_ASSIGNED))
			vfs_assigned++;

		vfdev = pci_get_device(dev->vendor, dev_id, vfdev);
	}

	return vfs_assigned;
}
EXPORT_SYMBOL_GPL(pci_vfs_assigned);

/**
 * pci_sriov_set_totalvfs -- reduce the TotalVFs available
 * @dev: the PCI PF device
 * @numvfs: number that should be used for TotalVFs supported
 *
 * Should be called from PF driver's probe routine with
 * device's mutex held.
 *
 * Returns 0 if PF is an SRIOV-capable device and
 * value of numvfs valid. If not a PF return -ENOSYS;
 * if numvfs is invalid return -EINVAL;
 * if VFs already enabled, return -EBUSY.
 */
int pci_sriov_set_totalvfs(struct pci_dev *dev, u16 numvfs)
{
	if (!dev->is_physfn)
		return -ENOSYS;
	if (numvfs > dev->sriov->total_VFs)
		return -EINVAL;

	/* Shouldn't change if VFs already enabled */
	if (dev->sriov->ctrl & PCI_SRIOV_CTRL_VFE)
		return -EBUSY;
	else
		dev->sriov->driver_max_VFs = numvfs;

	return 0;
}
EXPORT_SYMBOL_GPL(pci_sriov_set_totalvfs);

/**
 * pci_sriov_get_totalvfs -- get total VFs supported on this device
 * @dev: the PCI PF device
 *
 * For a PCIe device with SRIOV support, return the PCIe
 * SRIOV capability value of TotalVFs or the value of driver_max_VFs
 * if the driver reduced it.  Otherwise 0.
 */
int pci_sriov_get_totalvfs(struct pci_dev *dev)
{
	if (!dev->is_physfn)
		return 0;

	if (dev->sriov->driver_max_VFs)
		return dev->sriov->driver_max_VFs;

	return dev->sriov->total_VFs;
}
EXPORT_SYMBOL_GPL(pci_sriov_get_totalvfs);
Commit	Line	Data
d1b054da YZ	1	/*
	2	* drivers/pci/iov.c
	3	*
	4	* Copyright (C) 2009 Intel Corporation, Yu Zhao <yu.zhao@intel.com>
	5	*
	6	* PCI Express I/O Virtualization (IOV) support.
	7	* Single Root IOV 1.0
302b4215	8	* Address Translation Service 1.0
d1b054da YZ	9	*/
	10
	11	#include <linux/pci.h>
5a0e3ad6	12	#include <linux/slab.h>
d1b054da	13	#include <linux/mutex.h>
363c75db	14	#include <linux/export.h>
d1b054da YZ	15	#include <linux/string.h>
d1b054da YZ	16	#include <linux/delay.h>
5cdede24	17	#include <linux/pci-ats.h>
d1b054da YZ	18	#include "pci.h"
d1b054da YZ	19
dd7cc44d	20	#define VIRTFN_ID_LEN 16
d1b054da	21
a28724b0 YZ	22	static inline u8 virtfn_bus(struct pci_dev *dev, int id)
	23	{
	24	return dev->bus->number + ((dev->devfn + dev->sriov->offset +
	25	dev->sriov->stride * id) >> 8);
	26	}
	27
	28	static inline u8 virtfn_devfn(struct pci_dev *dev, int id)
	29	{
	30	return (dev->devfn + dev->sriov->offset +
	31	dev->sriov->stride * id) & 0xff;
	32	}
	33
dd7cc44d YZ	34	static struct pci_bus virtfn_add_bus(struct pci_bus bus, int busnr)
dd7cc44d YZ	35	{
dd7cc44d YZ	36	struct pci_bus *child;
	37
	38	if (bus->number == busnr)
	39	return bus;
	40
	41	child = pci_find_bus(pci_domain_nr(bus), busnr);
	42	if (child)
	43	return child;
	44
	45	child = pci_add_new_bus(bus, NULL, busnr);
	46	if (!child)
	47	return NULL;
	48
b7eac055	49	pci_bus_insert_busn_res(child, busnr, busnr);
dd7cc44d YZ	50
	51	return child;
	52	}
	53
dc087f2f	54	static void virtfn_remove_bus(struct pci_bus physbus, struct pci_bus virtbus)
dd7cc44d	55	{
dc087f2f JL	56	if (physbus != virtbus && list_empty(&virtbus->devices))
dc087f2f JL	57	pci_remove_bus(virtbus);
dd7cc44d YZ	58	}
	59
	60	static int virtfn_add(struct pci_dev *dev, int id, int reset)
	61	{
	62	int i;
dc087f2f	63	int rc = -ENOMEM;
dd7cc44d YZ	64	u64 size;
	65	char buf[VIRTFN_ID_LEN];
	66	struct pci_dev *virtfn;
	67	struct resource *res;
	68	struct pci_sriov *iov = dev->sriov;
8b1fce04	69	struct pci_bus *bus;
dd7cc44d	70
dd7cc44d	71	mutex_lock(&iov->dev->sriov->lock);
8b1fce04	72	bus = virtfn_add_bus(dev->bus, virtfn_bus(dev, id));
dc087f2f JL	73	if (!bus)
	74	goto failed;
	75
	76	virtfn = pci_alloc_dev(bus);
dd7cc44d	77	if (!virtfn)
dc087f2f	78	goto failed0;
dd7cc44d	79
dd7cc44d YZ	80	virtfn->devfn = virtfn_devfn(dev, id);
	81	virtfn->vendor = dev->vendor;
	82	pci_read_config_word(dev, iov->pos + PCI_SRIOV_VF_DID, &virtfn->device);
	83	pci_setup_device(virtfn);
	84	virtfn->dev.parent = dev->dev.parent;
fbf33f51 XH	85	virtfn->physfn = pci_dev_get(dev);
fbf33f51 XH	86	virtfn->is_virtfn = 1;
aa931977	87	virtfn->multifunction = 0;
dd7cc44d YZ	88
	89	for (i = 0; i < PCI_SRIOV_NUM_BARS; i++) {
	90	res = dev->resource + PCI_IOV_RESOURCES + i;
	91	if (!res->parent)
	92	continue;
	93	virtfn->resource[i].name = pci_name(virtfn);
	94	virtfn->resource[i].flags = res->flags;
	95	size = resource_size(res);
6b136724	96	do_div(size, iov->total_VFs);
dd7cc44d YZ	97	virtfn->resource[i].start = res->start + size * id;
	98	virtfn->resource[i].end = virtfn->resource[i].start + size - 1;
	99	rc = request_resource(res, &virtfn->resource[i]);
	100	BUG_ON(rc);
	101	}
	102
	103	if (reset)
8c1c699f	104	__pci_reset_function(virtfn);
dd7cc44d YZ	105
	106	pci_device_add(virtfn, virtfn->bus);
	107	mutex_unlock(&iov->dev->sriov->lock);
	108
dd7cc44d	109	rc = pci_bus_add_device(virtfn);
dd7cc44d YZ	110	sprintf(buf, "virtfn%u", id);
	111	rc = sysfs_create_link(&dev->dev.kobj, &virtfn->dev.kobj, buf);
	112	if (rc)
	113	goto failed1;
	114	rc = sysfs_create_link(&virtfn->dev.kobj, &dev->dev.kobj, "physfn");
	115	if (rc)
	116	goto failed2;
	117
	118	kobject_uevent(&virtfn->dev.kobj, KOBJ_CHANGE);
	119
	120	return 0;
	121
	122	failed2:
	123	sysfs_remove_link(&dev->dev.kobj, buf);
	124	failed1:
	125	pci_dev_put(dev);
	126	mutex_lock(&iov->dev->sriov->lock);
210647af	127	pci_stop_and_remove_bus_device(virtfn);
dc087f2f JL	128	failed0:
	129	virtfn_remove_bus(dev->bus, bus);
	130	failed:
dd7cc44d YZ	131	mutex_unlock(&iov->dev->sriov->lock);
	132
	133	return rc;
	134	}
	135
	136	static void virtfn_remove(struct pci_dev *dev, int id, int reset)
	137	{
	138	char buf[VIRTFN_ID_LEN];
dd7cc44d YZ	139	struct pci_dev *virtfn;
	140	struct pci_sriov *iov = dev->sriov;
	141
dc087f2f JL	142	virtfn = pci_get_domain_bus_and_slot(pci_domain_nr(dev->bus),
	143	virtfn_bus(dev, id),
	144	virtfn_devfn(dev, id));
dd7cc44d YZ	145	if (!virtfn)
	146	return;
	147
dd7cc44d YZ	148	if (reset) {
dd7cc44d YZ	149	device_release_driver(&virtfn->dev);
8c1c699f	150	__pci_reset_function(virtfn);
dd7cc44d YZ	151	}
	152
	153	sprintf(buf, "virtfn%u", id);
	154	sysfs_remove_link(&dev->dev.kobj, buf);
09cedbef YL	155	/*
	156	* pci_stop_dev() could have been called for this virtfn already,
	157	* so the directory for the virtfn may have been removed before.
	158	* Double check to avoid spurious sysfs warnings.
	159	*/
	160	if (virtfn->dev.kobj.sd)
	161	sysfs_remove_link(&virtfn->dev.kobj, "physfn");
dd7cc44d YZ	162
dd7cc44d YZ	163	mutex_lock(&iov->dev->sriov->lock);
210647af	164	pci_stop_and_remove_bus_device(virtfn);
dc087f2f	165	virtfn_remove_bus(dev->bus, virtfn->bus);
dd7cc44d YZ	166	mutex_unlock(&iov->dev->sriov->lock);
dd7cc44d YZ	167
dc087f2f JL	168	/* balance pci_get_domain_bus_and_slot() */
dc087f2f JL	169	pci_dev_put(virtfn);
dd7cc44d YZ	170	pci_dev_put(dev);
	171	}
	172
	173	static int sriov_enable(struct pci_dev *dev, int nr_virtfn)
	174	{
	175	int rc;
	176	int i, j;
	177	int nres;
	178	u16 offset, stride, initial;
	179	struct resource *res;
	180	struct pci_dev *pdev;
	181	struct pci_sriov *iov = dev->sriov;
bbef98ab	182	int bars = 0;
dd7cc44d YZ	183
	184	if (!nr_virtfn)
	185	return 0;
	186
6b136724	187	if (iov->num_VFs)
dd7cc44d YZ	188	return -EINVAL;
	189
	190	pci_read_config_word(dev, iov->pos + PCI_SRIOV_INITIAL_VF, &initial);
6b136724 BH	191	if (initial > iov->total_VFs \|\|
6b136724 BH	192	(!(iov->cap & PCI_SRIOV_CAP_VFM) && (initial != iov->total_VFs)))
dd7cc44d YZ	193	return -EIO;
dd7cc44d YZ	194
6b136724	195	if (nr_virtfn < 0 \|\| nr_virtfn > iov->total_VFs \|\|
dd7cc44d YZ	196	(!(iov->cap & PCI_SRIOV_CAP_VFM) && (nr_virtfn > initial)))
	197	return -EINVAL;
	198
dd7cc44d YZ	199	pci_read_config_word(dev, iov->pos + PCI_SRIOV_VF_OFFSET, &offset);
	200	pci_read_config_word(dev, iov->pos + PCI_SRIOV_VF_STRIDE, &stride);
	201	if (!offset \|\| (nr_virtfn > 1 && !stride))
	202	return -EIO;
	203
	204	nres = 0;
	205	for (i = 0; i < PCI_SRIOV_NUM_BARS; i++) {
bbef98ab	206	bars \|= (1 << (i + PCI_IOV_RESOURCES));
dd7cc44d YZ	207	res = dev->resource + PCI_IOV_RESOURCES + i;
	208	if (res->parent)
	209	nres++;
	210	}
	211	if (nres != iov->nres) {
	212	dev_err(&dev->dev, "not enough MMIO resources for SR-IOV\n");
	213	return -ENOMEM;
	214	}
	215
	216	iov->offset = offset;
	217	iov->stride = stride;
	218
b918c62e	219	if (virtfn_bus(dev, nr_virtfn - 1) > dev->bus->busn_res.end) {
dd7cc44d YZ	220	dev_err(&dev->dev, "SR-IOV: bus number out of range\n");
	221	return -ENOMEM;
	222	}
	223
bbef98ab RP	224	if (pci_enable_resources(dev, bars)) {
	225	dev_err(&dev->dev, "SR-IOV: IOV BARS not allocated\n");
	226	return -ENOMEM;
	227	}
	228
dd7cc44d YZ	229	if (iov->link != dev->devfn) {
	230	pdev = pci_get_slot(dev->bus, iov->link);
	231	if (!pdev)
	232	return -ENODEV;
	233
dc087f2f JL	234	if (!pdev->is_physfn) {
dc087f2f JL	235	pci_dev_put(pdev);
652d1100	236	return -ENOSYS;
dc087f2f	237	}
dd7cc44d YZ	238
	239	rc = sysfs_create_link(&dev->dev.kobj,
	240	&pdev->dev.kobj, "dep_link");
dc087f2f	241	pci_dev_put(pdev);
dd7cc44d YZ	242	if (rc)
	243	return rc;
	244	}
	245
19b6984e	246	pci_write_config_word(dev, iov->pos + PCI_SRIOV_NUM_VF, nr_virtfn);
dd7cc44d	247	iov->ctrl \|= PCI_SRIOV_CTRL_VFE \| PCI_SRIOV_CTRL_MSE;
fb51ccbf	248	pci_cfg_access_lock(dev);
dd7cc44d YZ	249	pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl);
dd7cc44d YZ	250	msleep(100);
fb51ccbf	251	pci_cfg_access_unlock(dev);
dd7cc44d	252
6b136724	253	iov->initial_VFs = initial;
dd7cc44d YZ	254	if (nr_virtfn < initial)
	255	initial = nr_virtfn;
	256
	257	for (i = 0; i < initial; i++) {
	258	rc = virtfn_add(dev, i, 0);
	259	if (rc)
	260	goto failed;
	261	}
	262
	263	kobject_uevent(&dev->dev.kobj, KOBJ_CHANGE);
6b136724	264	iov->num_VFs = nr_virtfn;
dd7cc44d YZ	265
	266	return 0;
	267
	268	failed:
	269	for (j = 0; j < i; j++)
	270	virtfn_remove(dev, j, 0);
	271
	272	iov->ctrl &= ~(PCI_SRIOV_CTRL_VFE \| PCI_SRIOV_CTRL_MSE);
fb51ccbf	273	pci_cfg_access_lock(dev);
dd7cc44d	274	pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl);
19b6984e	275	pci_write_config_word(dev, iov->pos + PCI_SRIOV_NUM_VF, 0);
dd7cc44d	276	ssleep(1);
fb51ccbf	277	pci_cfg_access_unlock(dev);
dd7cc44d YZ	278
	279	if (iov->link != dev->devfn)
	280	sysfs_remove_link(&dev->dev.kobj, "dep_link");
	281
	282	return rc;
	283	}
	284
	285	static void sriov_disable(struct pci_dev *dev)
	286	{
	287	int i;
	288	struct pci_sriov *iov = dev->sriov;
	289
6b136724	290	if (!iov->num_VFs)
dd7cc44d YZ	291	return;
dd7cc44d YZ	292
6b136724	293	for (i = 0; i < iov->num_VFs; i++)
dd7cc44d YZ	294	virtfn_remove(dev, i, 0);
	295
	296	iov->ctrl &= ~(PCI_SRIOV_CTRL_VFE \| PCI_SRIOV_CTRL_MSE);
fb51ccbf	297	pci_cfg_access_lock(dev);
dd7cc44d YZ	298	pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl);
dd7cc44d YZ	299	ssleep(1);
fb51ccbf	300	pci_cfg_access_unlock(dev);
dd7cc44d YZ	301
	302	if (iov->link != dev->devfn)
	303	sysfs_remove_link(&dev->dev.kobj, "dep_link");
	304
6b136724	305	iov->num_VFs = 0;
19b6984e	306	pci_write_config_word(dev, iov->pos + PCI_SRIOV_NUM_VF, 0);
dd7cc44d YZ	307	}
dd7cc44d YZ	308
d1b054da YZ	309	static int sriov_init(struct pci_dev *dev, int pos)
	310	{
	311	int i;
	312	int rc;
	313	int nres;
	314	u32 pgsz;
	315	u16 ctrl, total, offset, stride;
	316	struct pci_sriov *iov;
	317	struct resource *res;
	318	struct pci_dev *pdev;
	319
62f87c0e YW	320	if (pci_pcie_type(dev) != PCI_EXP_TYPE_RC_END &&
62f87c0e YW	321	pci_pcie_type(dev) != PCI_EXP_TYPE_ENDPOINT)
d1b054da YZ	322	return -ENODEV;
	323
	324	pci_read_config_word(dev, pos + PCI_SRIOV_CTRL, &ctrl);
	325	if (ctrl & PCI_SRIOV_CTRL_VFE) {
	326	pci_write_config_word(dev, pos + PCI_SRIOV_CTRL, 0);
	327	ssleep(1);
	328	}
	329
	330	pci_read_config_word(dev, pos + PCI_SRIOV_TOTAL_VF, &total);
	331	if (!total)
	332	return 0;
	333
	334	ctrl = 0;
	335	list_for_each_entry(pdev, &dev->bus->devices, bus_list)
	336	if (pdev->is_physfn)
	337	goto found;
	338
	339	pdev = NULL;
	340	if (pci_ari_enabled(dev->bus))
	341	ctrl \|= PCI_SRIOV_CTRL_ARI;
	342
	343	found:
	344	pci_write_config_word(dev, pos + PCI_SRIOV_CTRL, ctrl);
045cc22e	345	pci_write_config_word(dev, pos + PCI_SRIOV_NUM_VF, 0);
d1b054da YZ	346	pci_read_config_word(dev, pos + PCI_SRIOV_VF_OFFSET, &offset);
	347	pci_read_config_word(dev, pos + PCI_SRIOV_VF_STRIDE, &stride);
	348	if (!offset \|\| (total > 1 && !stride))
	349	return -EIO;
	350
	351	pci_read_config_dword(dev, pos + PCI_SRIOV_SUP_PGSIZE, &pgsz);
	352	i = PAGE_SHIFT > 12 ? PAGE_SHIFT - 12 : 0;
	353	pgsz &= ~((1 << i) - 1);
	354	if (!pgsz)
	355	return -EIO;
	356
	357	pgsz &= ~(pgsz - 1);
8161fe91	358	pci_write_config_dword(dev, pos + PCI_SRIOV_SYS_PGSIZE, pgsz);
d1b054da YZ	359
	360	nres = 0;
	361	for (i = 0; i < PCI_SRIOV_NUM_BARS; i++) {
	362	res = dev->resource + PCI_IOV_RESOURCES + i;
	363	i += __pci_read_base(dev, pci_bar_unknown, res,
	364	pos + PCI_SRIOV_BAR + i * 4);
	365	if (!res->flags)
	366	continue;
	367	if (resource_size(res) & (PAGE_SIZE - 1)) {
	368	rc = -EIO;
	369	goto failed;
	370	}
	371	res->end = res->start + resource_size(res) * total - 1;
	372	nres++;
	373	}
	374
	375	iov = kzalloc(sizeof(*iov), GFP_KERNEL);
	376	if (!iov) {
	377	rc = -ENOMEM;
	378	goto failed;
	379	}
	380
	381	iov->pos = pos;
	382	iov->nres = nres;
	383	iov->ctrl = ctrl;
6b136724	384	iov->total_VFs = total;
d1b054da YZ	385	iov->offset = offset;
	386	iov->stride = stride;
	387	iov->pgsz = pgsz;
	388	iov->self = dev;
	389	pci_read_config_dword(dev, pos + PCI_SRIOV_CAP, &iov->cap);
	390	pci_read_config_byte(dev, pos + PCI_SRIOV_FUNC_LINK, &iov->link);
62f87c0e	391	if (pci_pcie_type(dev) == PCI_EXP_TYPE_RC_END)
4d135dbe	392	iov->link = PCI_DEVFN(PCI_SLOT(dev->devfn), iov->link);
d1b054da YZ	393
	394	if (pdev)
	395	iov->dev = pci_dev_get(pdev);
e277d2fc	396	else
d1b054da	397	iov->dev = dev;
e277d2fc YZ	398
e277d2fc YZ	399	mutex_init(&iov->lock);
d1b054da YZ	400
	401	dev->sriov = iov;
	402	dev->is_physfn = 1;
	403
	404	return 0;
	405
	406	failed:
	407	for (i = 0; i < PCI_SRIOV_NUM_BARS; i++) {
	408	res = dev->resource + PCI_IOV_RESOURCES + i;
	409	res->flags = 0;
	410	}
	411
	412	return rc;
	413	}
	414
	415	static void sriov_release(struct pci_dev *dev)
	416	{
6b136724	417	BUG_ON(dev->sriov->num_VFs);
dd7cc44d	418
e277d2fc	419	if (dev != dev->sriov->dev)
d1b054da YZ	420	pci_dev_put(dev->sriov->dev);
d1b054da YZ	421
e277d2fc YZ	422	mutex_destroy(&dev->sriov->lock);
e277d2fc YZ	423
d1b054da YZ	424	kfree(dev->sriov);
	425	dev->sriov = NULL;
	426	}
	427
8c5cdb6a YZ	428	static void sriov_restore_state(struct pci_dev *dev)
	429	{
	430	int i;
	431	u16 ctrl;
	432	struct pci_sriov *iov = dev->sriov;
	433
	434	pci_read_config_word(dev, iov->pos + PCI_SRIOV_CTRL, &ctrl);
	435	if (ctrl & PCI_SRIOV_CTRL_VFE)
	436	return;
	437
	438	for (i = PCI_IOV_RESOURCES; i <= PCI_IOV_RESOURCE_END; i++)
	439	pci_update_resource(dev, i);
	440
	441	pci_write_config_dword(dev, iov->pos + PCI_SRIOV_SYS_PGSIZE, iov->pgsz);
6b136724	442	pci_write_config_word(dev, iov->pos + PCI_SRIOV_NUM_VF, iov->num_VFs);
8c5cdb6a YZ	443	pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl);
	444	if (iov->ctrl & PCI_SRIOV_CTRL_VFE)
	445	msleep(100);
	446	}
	447
d1b054da YZ	448	/**
	449	* pci_iov_init - initialize the IOV capability
	450	* @dev: the PCI device
	451	*
	452	* Returns 0 on success, or negative on failure.
	453	*/
	454	int pci_iov_init(struct pci_dev *dev)
	455	{
	456	int pos;
	457
5f4d91a1	458	if (!pci_is_pcie(dev))
d1b054da YZ	459	return -ENODEV;
	460
	461	pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_SRIOV);
	462	if (pos)
	463	return sriov_init(dev, pos);
	464
	465	return -ENODEV;
	466	}
	467
	468	/**
	469	* pci_iov_release - release resources used by the IOV capability
	470	* @dev: the PCI device
	471	*/
	472	void pci_iov_release(struct pci_dev *dev)
	473	{
	474	if (dev->is_physfn)
	475	sriov_release(dev);
	476	}
	477
	478	/**
	479	* pci_iov_resource_bar - get position of the SR-IOV BAR
	480	* @dev: the PCI device
	481	* @resno: the resource number
	482	* @type: the BAR type to be filled in
	483	*
	484	* Returns position of the BAR encapsulated in the SR-IOV capability.
	485	*/
	486	int pci_iov_resource_bar(struct pci_dev *dev, int resno,
	487	enum pci_bar_type *type)
	488	{
	489	if (resno < PCI_IOV_RESOURCES \|\| resno > PCI_IOV_RESOURCE_END)
	490	return 0;
	491
	492	BUG_ON(!dev->is_physfn);
	493
	494	*type = pci_bar_unknown;
	495
	496	return dev->sriov->pos + PCI_SRIOV_BAR +
	497	4 * (resno - PCI_IOV_RESOURCES);
	498	}
8c5cdb6a	499
6faf17f6 CW	500	/**
	501	* pci_sriov_resource_alignment - get resource alignment for VF BAR
	502	* @dev: the PCI device
	503	* @resno: the resource number
	504	*
	505	* Returns the alignment of the VF BAR found in the SR-IOV capability.
	506	* This is not the same as the resource size which is defined as
	507	* the VF BAR size multiplied by the number of VFs. The alignment
	508	* is just the VF BAR size.
	509	*/
0e52247a	510	resource_size_t pci_sriov_resource_alignment(struct pci_dev *dev, int resno)
6faf17f6 CW	511	{
	512	struct resource tmp;
	513	enum pci_bar_type type;
	514	int reg = pci_iov_resource_bar(dev, resno, &type);
f7625980	515
6faf17f6 CW	516	if (!reg)
	517	return 0;
	518
	519	__pci_read_base(dev, type, &tmp, reg);
	520	return resource_alignment(&tmp);
	521	}
	522
8c5cdb6a YZ	523	/**
	524	* pci_restore_iov_state - restore the state of the IOV capability
	525	* @dev: the PCI device
	526	*/
	527	void pci_restore_iov_state(struct pci_dev *dev)
	528	{
	529	if (dev->is_physfn)
	530	sriov_restore_state(dev);
	531	}
a28724b0 YZ	532
	533	/**
	534	* pci_iov_bus_range - find bus range used by Virtual Function
	535	* @bus: the PCI bus
	536	*
	537	* Returns max number of buses (exclude current one) used by Virtual
	538	* Functions.
	539	*/
	540	int pci_iov_bus_range(struct pci_bus *bus)
	541	{
	542	int max = 0;
	543	u8 busnr;
	544	struct pci_dev *dev;
	545
	546	list_for_each_entry(dev, &bus->devices, bus_list) {
	547	if (!dev->is_physfn)
	548	continue;
6b136724	549	busnr = virtfn_bus(dev, dev->sriov->total_VFs - 1);
a28724b0 YZ	550	if (busnr > max)
	551	max = busnr;
	552	}
	553
	554	return max ? max - bus->number : 0;
	555	}
dd7cc44d YZ	556
	557	/**
	558	* pci_enable_sriov - enable the SR-IOV capability
	559	* @dev: the PCI device
52a8873b	560	* @nr_virtfn: number of virtual functions to enable
dd7cc44d YZ	561	*
	562	* Returns 0 on success, or negative on failure.
	563	*/
	564	int pci_enable_sriov(struct pci_dev *dev, int nr_virtfn)
	565	{
	566	might_sleep();
	567
	568	if (!dev->is_physfn)
652d1100	569	return -ENOSYS;
dd7cc44d YZ	570
	571	return sriov_enable(dev, nr_virtfn);
	572	}
	573	EXPORT_SYMBOL_GPL(pci_enable_sriov);
	574
	575	/**
	576	* pci_disable_sriov - disable the SR-IOV capability
	577	* @dev: the PCI device
	578	*/
	579	void pci_disable_sriov(struct pci_dev *dev)
	580	{
	581	might_sleep();
	582
	583	if (!dev->is_physfn)
	584	return;
	585
	586	sriov_disable(dev);
	587	}
	588	EXPORT_SYMBOL_GPL(pci_disable_sriov);
74bb1bcc	589
fb8a0d9d WM	590	/**
	591	* pci_num_vf - return number of VFs associated with a PF device_release_driver
	592	* @dev: the PCI device
	593	*
	594	* Returns number of VFs, or 0 if SR-IOV is not enabled.
	595	*/
	596	int pci_num_vf(struct pci_dev *dev)
	597	{
1452cd76	598	if (!dev->is_physfn)
fb8a0d9d	599	return 0;
1452cd76 BH	600
1452cd76 BH	601	return dev->sriov->num_VFs;
fb8a0d9d WM	602	}
fb8a0d9d WM	603	EXPORT_SYMBOL_GPL(pci_num_vf);
bff73156	604
5a8eb242 AD	605	/**
	606	* pci_vfs_assigned - returns number of VFs are assigned to a guest
	607	* @dev: the PCI device
	608	*
	609	* Returns number of VFs belonging to this device that are assigned to a guest.
652d1100	610	* If device is not a physical function returns 0.
5a8eb242 AD	611	*/
	612	int pci_vfs_assigned(struct pci_dev *dev)
	613	{
	614	struct pci_dev *vfdev;
	615	unsigned int vfs_assigned = 0;
	616	unsigned short dev_id;
	617
	618	/* only search if we are a PF */
	619	if (!dev->is_physfn)
	620	return 0;
	621
	622	/*
	623	* determine the device ID for the VFs, the vendor ID will be the
	624	* same as the PF so there is no need to check for that one
	625	*/
	626	pci_read_config_word(dev, dev->sriov->pos + PCI_SRIOV_VF_DID, &dev_id);
	627
	628	/* loop through all the VFs to see if we own any that are assigned */
	629	vfdev = pci_get_device(dev->vendor, dev_id, NULL);
	630	while (vfdev) {
	631	/*
	632	* It is considered assigned if it is a virtual function with
	633	* our dev as the physical function and the assigned bit is set
	634	*/
	635	if (vfdev->is_virtfn && (vfdev->physfn == dev) &&
	636	(vfdev->dev_flags & PCI_DEV_FLAGS_ASSIGNED))
	637	vfs_assigned++;
	638
	639	vfdev = pci_get_device(dev->vendor, dev_id, vfdev);
	640	}
	641
	642	return vfs_assigned;
	643	}
	644	EXPORT_SYMBOL_GPL(pci_vfs_assigned);
	645
bff73156 DD	646	/**
	647	* pci_sriov_set_totalvfs -- reduce the TotalVFs available
	648	* @dev: the PCI PF device
2094f167	649	* @numvfs: number that should be used for TotalVFs supported
bff73156 DD	650	*
	651	* Should be called from PF driver's probe routine with
	652	* device's mutex held.
	653	*
	654	* Returns 0 if PF is an SRIOV-capable device and
652d1100 SA	655	* value of numvfs valid. If not a PF return -ENOSYS;
652d1100 SA	656	* if numvfs is invalid return -EINVAL;
bff73156 DD	657	* if VFs already enabled, return -EBUSY.
	658	*/
	659	int pci_sriov_set_totalvfs(struct pci_dev *dev, u16 numvfs)
	660	{
652d1100 SA	661	if (!dev->is_physfn)
	662	return -ENOSYS;
	663	if (numvfs > dev->sriov->total_VFs)
bff73156 DD	664	return -EINVAL;
	665
	666	/* Shouldn't change if VFs already enabled */
	667	if (dev->sriov->ctrl & PCI_SRIOV_CTRL_VFE)
	668	return -EBUSY;
	669	else
6b136724	670	dev->sriov->driver_max_VFs = numvfs;
bff73156 DD	671
	672	return 0;
	673	}
	674	EXPORT_SYMBOL_GPL(pci_sriov_set_totalvfs);
	675
	676	/**
ddc191f5	677	* pci_sriov_get_totalvfs -- get total VFs supported on this device
bff73156 DD	678	* @dev: the PCI PF device
	679	*
	680	* For a PCIe device with SRIOV support, return the PCIe
6b136724	681	* SRIOV capability value of TotalVFs or the value of driver_max_VFs
652d1100	682	* if the driver reduced it. Otherwise 0.
bff73156 DD	683	*/
	684	int pci_sriov_get_totalvfs(struct pci_dev *dev)
	685	{
1452cd76	686	if (!dev->is_physfn)
652d1100	687	return 0;
bff73156	688
6b136724 BH	689	if (dev->sriov->driver_max_VFs)
6b136724 BH	690	return dev->sriov->driver_max_VFs;
1452cd76 BH	691
1452cd76 BH	692	return dev->sriov->total_VFs;
bff73156 DD	693	}
bff73156 DD	694	EXPORT_SYMBOL_GPL(pci_sriov_get_totalvfs);