[deliverable/linux.git] / drivers / pci / pci-acpi.c

/*
 * File:	pci-acpi.c
 * Purpose:	Provide PCI support in ACPI
 *
 * Copyright (C) 2005 David Shaohua Li <shaohua.li@intel.com>
 * Copyright (C) 2004 Tom Long Nguyen <tom.l.nguyen@intel.com>
 * Copyright (C) 2004 Intel Corp.
 */

#include <linux/delay.h>
#include <linux/init.h>
#include <linux/pci.h>
#include <linux/module.h>
#include <linux/pci-aspm.h>
#include <linux/pci-acpi.h>
#include <linux/pm_runtime.h>
#include <linux/pm_qos.h>
#include "pci.h"

/**
 * pci_acpi_wake_bus - Root bus wakeup notification fork function.
 * @work: Work item to handle.
 */
static void pci_acpi_wake_bus(struct work_struct *work)
{
	struct acpi_device *adev;
	struct acpi_pci_root *root;

	adev = container_of(work, struct acpi_device, wakeup.context.work);
	root = acpi_driver_data(adev);
	pci_pme_wakeup_bus(root->bus);
}

/**
 * pci_acpi_wake_dev - PCI device wakeup notification work function.
 * @handle: ACPI handle of a device the notification is for.
 * @work: Work item to handle.
 */
static void pci_acpi_wake_dev(struct work_struct *work)
{
	struct acpi_device_wakeup_context *context;
	struct pci_dev *pci_dev;

	context = container_of(work, struct acpi_device_wakeup_context, work);
	pci_dev = to_pci_dev(context->dev);

	if (pci_dev->pme_poll)
		pci_dev->pme_poll = false;

	if (pci_dev->current_state == PCI_D3cold) {
		pci_wakeup_event(pci_dev);
		pm_runtime_resume(&pci_dev->dev);
		return;
	}

	/* Clear PME Status if set. */
	if (pci_dev->pme_support)
		pci_check_pme_status(pci_dev);

	pci_wakeup_event(pci_dev);
	pm_runtime_resume(&pci_dev->dev);

	if (pci_dev->subordinate)
		pci_pme_wakeup_bus(pci_dev->subordinate);
}

/**
 * pci_acpi_add_bus_pm_notifier - Register PM notifier for root PCI bus.
 * @dev: PCI root bridge ACPI device.
 */
acpi_status pci_acpi_add_bus_pm_notifier(struct acpi_device *dev)
{
	return acpi_add_pm_notifier(dev, NULL, pci_acpi_wake_bus);
}

/**
 * pci_acpi_add_pm_notifier - Register PM notifier for given PCI device.
 * @dev: ACPI device to add the notifier for.
 * @pci_dev: PCI device to check for the PME status if an event is signaled.
 */
acpi_status pci_acpi_add_pm_notifier(struct acpi_device *dev,
				     struct pci_dev *pci_dev)
{
	return acpi_add_pm_notifier(dev, &pci_dev->dev, pci_acpi_wake_dev);
}

phys_addr_t acpi_pci_root_get_mcfg_addr(acpi_handle handle)
{
	acpi_status status = AE_NOT_EXIST;
	unsigned long long mcfg_addr;

	if (handle)
		status = acpi_evaluate_integer(handle, METHOD_NAME__CBA,
					       NULL, &mcfg_addr);
	if (ACPI_FAILURE(status))
		return 0;

	return (phys_addr_t)mcfg_addr;
}

/*
 * _SxD returns the D-state with the highest power
 * (lowest D-state number) supported in the S-state "x".
 *
 * If the devices does not have a _PRW
 * (Power Resources for Wake) supporting system wakeup from "x"
 * then the OS is free to choose a lower power (higher number
 * D-state) than the return value from _SxD.
 *
 * But if _PRW is enabled at S-state "x", the OS
 * must not choose a power lower than _SxD --
 * unless the device has an _SxW method specifying
 * the lowest power (highest D-state number) the device
 * may enter while still able to wake the system.
 *
 * ie. depending on global OS policy:
 *
 * if (_PRW at S-state x)
 *	choose from highest power _SxD to lowest power _SxW
 * else // no _PRW at S-state x
 *	choose highest power _SxD or any lower power
 */

static pci_power_t acpi_pci_choose_state(struct pci_dev *pdev)
{
	int acpi_state, d_max;

	if (pdev->no_d3cold)
		d_max = ACPI_STATE_D3_HOT;
	else
		d_max = ACPI_STATE_D3_COLD;
	acpi_state = acpi_pm_device_sleep_state(&pdev->dev, NULL, d_max);
	if (acpi_state < 0)
		return PCI_POWER_ERROR;

	switch (acpi_state) {
	case ACPI_STATE_D0:
		return PCI_D0;
	case ACPI_STATE_D1:
		return PCI_D1;
	case ACPI_STATE_D2:
		return PCI_D2;
	case ACPI_STATE_D3_HOT:
		return PCI_D3hot;
	case ACPI_STATE_D3_COLD:
		return PCI_D3cold;
	}
	return PCI_POWER_ERROR;
}

static bool acpi_pci_power_manageable(struct pci_dev *dev)
{
	struct acpi_device *adev = ACPI_COMPANION(&dev->dev);
	return adev ? acpi_device_power_manageable(adev) : false;
}

static int acpi_pci_set_power_state(struct pci_dev *dev, pci_power_t state)
{
	struct acpi_device *adev = ACPI_COMPANION(&dev->dev);
	static const u8 state_conv[] = {
		[PCI_D0] = ACPI_STATE_D0,
		[PCI_D1] = ACPI_STATE_D1,
		[PCI_D2] = ACPI_STATE_D2,
		[PCI_D3hot] = ACPI_STATE_D3_COLD,
		[PCI_D3cold] = ACPI_STATE_D3_COLD,
	};
	int error = -EINVAL;

	/* If the ACPI device has _EJ0, ignore the device */
	if (!adev || acpi_has_method(adev->handle, "_EJ0"))
		return -ENODEV;

	switch (state) {
	case PCI_D3cold:
		if (dev_pm_qos_flags(&dev->dev, PM_QOS_FLAG_NO_POWER_OFF) ==
				PM_QOS_FLAGS_ALL) {
			error = -EBUSY;
			break;
		}
	case PCI_D0:
	case PCI_D1:
	case PCI_D2:
	case PCI_D3hot:
		error = acpi_device_set_power(adev, state_conv[state]);
	}

	if (!error)
		dev_dbg(&dev->dev, "power state changed by ACPI to %s\n",
			 acpi_power_state_string(state_conv[state]));

	return error;
}

static bool acpi_pci_can_wakeup(struct pci_dev *dev)
{
	struct acpi_device *adev = ACPI_COMPANION(&dev->dev);
	return adev ? acpi_device_can_wakeup(adev) : false;
}

static void acpi_pci_propagate_wakeup_enable(struct pci_bus *bus, bool enable)
{
	while (bus->parent) {
		if (!acpi_pm_device_sleep_wake(&bus->self->dev, enable))
			return;
		bus = bus->parent;
	}

	/* We have reached the root bus. */
	if (bus->bridge)
		acpi_pm_device_sleep_wake(bus->bridge, enable);
}

static int acpi_pci_sleep_wake(struct pci_dev *dev, bool enable)
{
	if (acpi_pci_can_wakeup(dev))
		return acpi_pm_device_sleep_wake(&dev->dev, enable);

	acpi_pci_propagate_wakeup_enable(dev->bus, enable);
	return 0;
}

static void acpi_pci_propagate_run_wake(struct pci_bus *bus, bool enable)
{
	while (bus->parent) {
		struct pci_dev *bridge = bus->self;

		if (bridge->pme_interrupt)
			return;
		if (!acpi_pm_device_run_wake(&bridge->dev, enable))
			return;
		bus = bus->parent;
	}

	/* We have reached the root bus. */
	if (bus->bridge)
		acpi_pm_device_run_wake(bus->bridge, enable);
}

static int acpi_pci_run_wake(struct pci_dev *dev, bool enable)
{
	/*
	 * Per PCI Express Base Specification Revision 2.0 section
	 * 5.3.3.2 Link Wakeup, platform support is needed for D3cold
	 * waking up to power on the main link even if there is PME
	 * support for D3cold
	 */
	if (dev->pme_interrupt && !dev->runtime_d3cold)
		return 0;

	if (!acpi_pm_device_run_wake(&dev->dev, enable))
		return 0;

	acpi_pci_propagate_run_wake(dev->bus, enable);
	return 0;
}

static struct pci_platform_pm_ops acpi_pci_platform_pm = {
	.is_manageable = acpi_pci_power_manageable,
	.set_state = acpi_pci_set_power_state,
	.choose_state = acpi_pci_choose_state,
	.sleep_wake = acpi_pci_sleep_wake,
	.run_wake = acpi_pci_run_wake,
};

void acpi_pci_add_bus(struct pci_bus *bus)
{
	if (acpi_pci_disabled || !bus->bridge)
		return;

	acpi_pci_slot_enumerate(bus);
	acpiphp_enumerate_slots(bus);
}

void acpi_pci_remove_bus(struct pci_bus *bus)
{
	if (acpi_pci_disabled || !bus->bridge)
		return;

	acpiphp_remove_slots(bus);
	acpi_pci_slot_remove(bus);
}

/* ACPI bus type */
static struct acpi_device *acpi_pci_find_companion(struct device *dev)
{
	struct pci_dev *pci_dev = to_pci_dev(dev);
	bool check_children;
	u64 addr;

	check_children = pci_is_bridge(pci_dev);
	/* Please ref to ACPI spec for the syntax of _ADR */
	addr = (PCI_SLOT(pci_dev->devfn) << 16) | PCI_FUNC(pci_dev->devfn);
	return acpi_find_child_device(ACPI_COMPANION(dev->parent), addr,
				      check_children);
}

static void pci_acpi_setup(struct device *dev)
{
	struct pci_dev *pci_dev = to_pci_dev(dev);
	struct acpi_device *adev = ACPI_COMPANION(dev);

	if (!adev)
		return;

	pci_acpi_add_pm_notifier(adev, pci_dev);
	if (!adev->wakeup.flags.valid)
		return;

	device_set_wakeup_capable(dev, true);
	acpi_pci_sleep_wake(pci_dev, false);
	if (adev->wakeup.flags.run_wake)
		device_set_run_wake(dev, true);
}

static void pci_acpi_cleanup(struct device *dev)
{
	struct acpi_device *adev = ACPI_COMPANION(dev);

	if (!adev)
		return;

	pci_acpi_remove_pm_notifier(adev);
	if (adev->wakeup.flags.valid) {
		device_set_wakeup_capable(dev, false);
		device_set_run_wake(dev, false);
	}
}

static bool pci_acpi_bus_match(struct device *dev)
{
	return dev_is_pci(dev);
}

static struct acpi_bus_type acpi_pci_bus = {
	.name = "PCI",
	.match = pci_acpi_bus_match,
	.find_companion = acpi_pci_find_companion,
	.setup = pci_acpi_setup,
	.cleanup = pci_acpi_cleanup,
};

static int __init acpi_pci_init(void)
{
	int ret;

	if (acpi_gbl_FADT.boot_flags & ACPI_FADT_NO_MSI) {
		pr_info("ACPI FADT declares the system doesn't support MSI, so disable it\n");
		pci_no_msi();
	}

	if (acpi_gbl_FADT.boot_flags & ACPI_FADT_NO_ASPM) {
		pr_info("ACPI FADT declares the system doesn't support PCIe ASPM, so disable it\n");
		pcie_no_aspm();
	}

	ret = register_acpi_bus_type(&acpi_pci_bus);
	if (ret)
		return 0;

	pci_set_platform_pm(&acpi_pci_platform_pm);
	acpi_pci_slot_init();
	acpiphp_init();

	return 0;
}
arch_initcall(acpi_pci_init);
Commit	Line	Data
1da177e4 LT	1	/*
1da177e4 LT	2	* File: pci-acpi.c
a406d9e6	3	* Purpose: Provide PCI support in ACPI
1da177e4	4	*
84df749f DSL	5	* Copyright (C) 2005 David Shaohua Li <shaohua.li@intel.com>
	6	* Copyright (C) 2004 Tom Long Nguyen <tom.l.nguyen@intel.com>
	7	* Copyright (C) 2004 Intel Corp.
1da177e4 LT	8	*/
	9
	10	#include <linux/delay.h>
	11	#include <linux/init.h>
	12	#include <linux/pci.h>
	13	#include <linux/module.h>
5fde244d	14	#include <linux/pci-aspm.h>
1da177e4	15	#include <linux/pci-acpi.h>
b67ea761	16	#include <linux/pm_runtime.h>
8b713a88	17	#include <linux/pm_qos.h>
0f64474b	18	#include "pci.h"
1da177e4	19
b67ea761	20	/**
c072530f RW	21	* pci_acpi_wake_bus - Root bus wakeup notification fork function.
c072530f RW	22	* @work: Work item to handle.
b67ea761	23	*/
c072530f	24	static void pci_acpi_wake_bus(struct work_struct *work)
b67ea761	25	{
c072530f RW	26	struct acpi_device *adev;
c072530f RW	27	struct acpi_pci_root *root;
b67ea761	28
c072530f RW	29	adev = container_of(work, struct acpi_device, wakeup.context.work);
	30	root = acpi_driver_data(adev);
	31	pci_pme_wakeup_bus(root->bus);
b67ea761 RW	32	}
	33
	34	/**
c072530f	35	* pci_acpi_wake_dev - PCI device wakeup notification work function.
b67ea761	36	* @handle: ACPI handle of a device the notification is for.
c072530f	37	* @work: Work item to handle.
b67ea761	38	*/
c072530f	39	static void pci_acpi_wake_dev(struct work_struct *work)
b67ea761	40	{
c072530f RW	41	struct acpi_device_wakeup_context *context;
c072530f RW	42	struct pci_dev *pci_dev;
b67ea761	43
c072530f RW	44	context = container_of(work, struct acpi_device_wakeup_context, work);
c072530f RW	45	pci_dev = to_pci_dev(context->dev);
a424948d	46
83414515 RW	47	if (pci_dev->pme_poll)
	48	pci_dev->pme_poll = false;
	49
448bd857 HY	50	if (pci_dev->current_state == PCI_D3cold) {
	51	pci_wakeup_event(pci_dev);
	52	pm_runtime_resume(&pci_dev->dev);
	53	return;
	54	}
	55
24ad0ef9 RW	56	/* Clear PME Status if set. */
	57	if (pci_dev->pme_support)
	58	pci_check_pme_status(pci_dev);
379021d5	59
24ad0ef9 RW	60	pci_wakeup_event(pci_dev);
24ad0ef9 RW	61	pm_runtime_resume(&pci_dev->dev);
a424948d RW	62
	63	if (pci_dev->subordinate)
	64	pci_pme_wakeup_bus(pci_dev->subordinate);
b67ea761 RW	65	}
b67ea761 RW	66
b67ea761	67	/**
c072530f RW	68	* pci_acpi_add_bus_pm_notifier - Register PM notifier for root PCI bus.
c072530f RW	69	* @dev: PCI root bridge ACPI device.
b67ea761	70	*/
c072530f	71	acpi_status pci_acpi_add_bus_pm_notifier(struct acpi_device *dev)
b67ea761	72	{
c072530f	73	return acpi_add_pm_notifier(dev, NULL, pci_acpi_wake_bus);
b67ea761 RW	74	}
	75
	76	/**
	77	* pci_acpi_add_pm_notifier - Register PM notifier for given PCI device.
	78	* @dev: ACPI device to add the notifier for.
	79	* @pci_dev: PCI device to check for the PME status if an event is signaled.
	80	*/
	81	acpi_status pci_acpi_add_pm_notifier(struct acpi_device *dev,
	82	struct pci_dev *pci_dev)
	83	{
c072530f	84	return acpi_add_pm_notifier(dev, &pci_dev->dev, pci_acpi_wake_dev);
b67ea761 RW	85	}
b67ea761 RW	86
f4b57a3b JL	87	phys_addr_t acpi_pci_root_get_mcfg_addr(acpi_handle handle)
	88	{
	89	acpi_status status = AE_NOT_EXIST;
	90	unsigned long long mcfg_addr;
	91
	92	if (handle)
	93	status = acpi_evaluate_integer(handle, METHOD_NAME__CBA,
	94	NULL, &mcfg_addr);
	95	if (ACPI_FAILURE(status))
	96	return 0;
	97
	98	return (phys_addr_t)mcfg_addr;
	99	}
	100
0f64474b DSL	101	/*
	102	* _SxD returns the D-state with the highest power
	103	* (lowest D-state number) supported in the S-state "x".
	104	*
	105	* If the devices does not have a _PRW
	106	* (Power Resources for Wake) supporting system wakeup from "x"
	107	* then the OS is free to choose a lower power (higher number
	108	* D-state) than the return value from _SxD.
	109	*
	110	* But if _PRW is enabled at S-state "x", the OS
	111	* must not choose a power lower than _SxD --
	112	* unless the device has an _SxW method specifying
	113	* the lowest power (highest D-state number) the device
	114	* may enter while still able to wake the system.
	115	*
	116	* ie. depending on global OS policy:
	117	*
	118	* if (_PRW at S-state x)
	119	* choose from highest power _SxD to lowest power _SxW
	120	* else // no _PRW at S-state x
f7625980	121	* choose highest power _SxD or any lower power
0f64474b DSL	122	*/
0f64474b DSL	123
8d2bdf49	124	static pci_power_t acpi_pci_choose_state(struct pci_dev *pdev)
0f64474b	125	{
448bd857	126	int acpi_state, d_max;
0f64474b	127
448bd857 HY	128	if (pdev->no_d3cold)
	129	d_max = ACPI_STATE_D3_HOT;
	130	else
	131	d_max = ACPI_STATE_D3_COLD;
	132	acpi_state = acpi_pm_device_sleep_state(&pdev->dev, NULL, d_max);
ab826ca4 SL	133	if (acpi_state < 0)
	134	return PCI_POWER_ERROR;
	135
	136	switch (acpi_state) {
	137	case ACPI_STATE_D0:
	138	return PCI_D0;
	139	case ACPI_STATE_D1:
	140	return PCI_D1;
	141	case ACPI_STATE_D2:
	142	return PCI_D2;
1cc0c998	143	case ACPI_STATE_D3_HOT:
ab826ca4	144	return PCI_D3hot;
28c2103d LM	145	case ACPI_STATE_D3_COLD:
28c2103d LM	146	return PCI_D3cold;
ab826ca4 SL	147	}
ab826ca4 SL	148	return PCI_POWER_ERROR;
0f64474b	149	}
961d9120 RW	150
	151	static bool acpi_pci_power_manageable(struct pci_dev *dev)
	152	{
85dbb3d0 RW	153	struct acpi_device *adev = ACPI_COMPANION(&dev->dev);
85dbb3d0 RW	154	return adev ? acpi_device_power_manageable(adev) : false;
961d9120	155	}
0f64474b	156
b913100d DSL	157	static int acpi_pci_set_power_state(struct pci_dev *dev, pci_power_t state)
b913100d DSL	158	{
85dbb3d0	159	struct acpi_device *adev = ACPI_COMPANION(&dev->dev);
583c377f DB	160	static const u8 state_conv[] = {
	161	[PCI_D0] = ACPI_STATE_D0,
	162	[PCI_D1] = ACPI_STATE_D1,
	163	[PCI_D2] = ACPI_STATE_D2,
fc6504b3 RW	164	[PCI_D3hot] = ACPI_STATE_D3_COLD,
fc6504b3 RW	165	[PCI_D3cold] = ACPI_STATE_D3_COLD,
b913100d	166	};
44e4e66e	167	int error = -EINVAL;
b913100d	168
10b3dcae	169	/* If the ACPI device has _EJ0, ignore the device */
85dbb3d0	170	if (!adev \|\| acpi_has_method(adev->handle, "_EJ0"))
44e4e66e	171	return -ENODEV;
583c377f DB	172
583c377f DB	173	switch (state) {
8b713a88 RW	174	case PCI_D3cold:
	175	if (dev_pm_qos_flags(&dev->dev, PM_QOS_FLAG_NO_POWER_OFF) ==
	176	PM_QOS_FLAGS_ALL) {
	177	error = -EBUSY;
	178	break;
	179	}
583c377f DB	180	case PCI_D0:
	181	case PCI_D1:
	182	case PCI_D2:
	183	case PCI_D3hot:
85dbb3d0	184	error = acpi_device_set_power(adev, state_conv[state]);
583c377f	185	}
44e4e66e RW	186
44e4e66e RW	187	if (!error)
d010e576	188	dev_dbg(&dev->dev, "power state changed by ACPI to %s\n",
fc6504b3	189	acpi_power_state_string(state_conv[state]));
44e4e66e RW	190
44e4e66e RW	191	return error;
b913100d DSL	192	}
b913100d DSL	193
eb9d0fe4 RW	194	static bool acpi_pci_can_wakeup(struct pci_dev *dev)
eb9d0fe4 RW	195	{
85dbb3d0 RW	196	struct acpi_device *adev = ACPI_COMPANION(&dev->dev);
85dbb3d0 RW	197	return adev ? acpi_device_can_wakeup(adev) : false;
eb9d0fe4 RW	198	}
eb9d0fe4 RW	199
0baed8da RW	200	static void acpi_pci_propagate_wakeup_enable(struct pci_bus *bus, bool enable)
	201	{
	202	while (bus->parent) {
dc1a94ae	203	if (!acpi_pm_device_sleep_wake(&bus->self->dev, enable))
0baed8da RW	204	return;
	205	bus = bus->parent;
	206	}
	207
	208	/* We have reached the root bus. */
	209	if (bus->bridge)
	210	acpi_pm_device_sleep_wake(bus->bridge, enable);
	211	}
	212
eb9d0fe4 RW	213	static int acpi_pci_sleep_wake(struct pci_dev *dev, bool enable)
eb9d0fe4 RW	214	{
0baed8da RW	215	if (acpi_pci_can_wakeup(dev))
	216	return acpi_pm_device_sleep_wake(&dev->dev, enable);
	217
dc1a94ae	218	acpi_pci_propagate_wakeup_enable(dev->bus, enable);
0baed8da	219	return 0;
eb9d0fe4 RW	220	}
eb9d0fe4 RW	221
b67ea761 RW	222	static void acpi_pci_propagate_run_wake(struct pci_bus *bus, bool enable)
	223	{
	224	while (bus->parent) {
	225	struct pci_dev *bridge = bus->self;
	226
	227	if (bridge->pme_interrupt)
	228	return;
b24e5098	229	if (!acpi_pm_device_run_wake(&bridge->dev, enable))
b67ea761 RW	230	return;
	231	bus = bus->parent;
	232	}
	233
	234	/* We have reached the root bus. */
	235	if (bus->bridge)
b24e5098	236	acpi_pm_device_run_wake(bus->bridge, enable);
b67ea761 RW	237	}
	238
	239	static int acpi_pci_run_wake(struct pci_dev *dev, bool enable)
	240	{
448bd857 HY	241	/*
	242	* Per PCI Express Base Specification Revision 2.0 section
	243	* 5.3.3.2 Link Wakeup, platform support is needed for D3cold
	244	* waking up to power on the main link even if there is PME
	245	* support for D3cold
	246	*/
	247	if (dev->pme_interrupt && !dev->runtime_d3cold)
b67ea761 RW	248	return 0;
b67ea761 RW	249
b24e5098	250	if (!acpi_pm_device_run_wake(&dev->dev, enable))
b67ea761 RW	251	return 0;
	252
	253	acpi_pci_propagate_run_wake(dev->bus, enable);
	254	return 0;
	255	}
	256
961d9120 RW	257	static struct pci_platform_pm_ops acpi_pci_platform_pm = {
	258	.is_manageable = acpi_pci_power_manageable,
	259	.set_state = acpi_pci_set_power_state,
	260	.choose_state = acpi_pci_choose_state,
eb9d0fe4	261	.sleep_wake = acpi_pci_sleep_wake,
b67ea761	262	.run_wake = acpi_pci_run_wake,
961d9120	263	};
b913100d	264
5090d4a6 JL	265	void acpi_pci_add_bus(struct pci_bus *bus)
5090d4a6 JL	266	{
be1c9de9	267	if (acpi_pci_disabled \|\| !bus->bridge)
5090d4a6 JL	268	return;
5090d4a6 JL	269
be1c9de9 RW	270	acpi_pci_slot_enumerate(bus);
be1c9de9 RW	271	acpiphp_enumerate_slots(bus);
5090d4a6 JL	272	}
	273
	274	void acpi_pci_remove_bus(struct pci_bus *bus)
	275	{
be1c9de9	276	if (acpi_pci_disabled \|\| !bus->bridge)
5090d4a6 JL	277	return;
5090d4a6 JL	278
3b63aaa7	279	acpiphp_remove_slots(bus);
5c0b04e3	280	acpi_pci_slot_remove(bus);
5090d4a6 JL	281	}
5090d4a6 JL	282
84df749f	283	/* ACPI bus type */
e3f02c52	284	static struct acpi_device acpi_pci_find_companion(struct device dev)
84df749f	285	{
60f75b8e	286	struct pci_dev *pci_dev = to_pci_dev(dev);
5ce79d20	287	bool check_children;
60f75b8e	288	u64 addr;
84df749f	289
6788a51f	290	check_children = pci_is_bridge(pci_dev);
84df749f DSL	291	/* Please ref to ACPI spec for the syntax of _ADR */
84df749f DSL	292	addr = (PCI_SLOT(pci_dev->devfn) << 16) \| PCI_FUNC(pci_dev->devfn);
e3f02c52	293	return acpi_find_child_device(ACPI_COMPANION(dev->parent), addr,
5ce79d20	294	check_children);
84df749f DSL	295	}
84df749f DSL	296
38a9a67a	297	static void pci_acpi_setup(struct device *dev)
d2e5f0c1	298	{
d2e5f0c1	299	struct pci_dev *pci_dev = to_pci_dev(dev);
f084280c	300	struct acpi_device *adev = ACPI_COMPANION(dev);
38a9a67a	301
f084280c RW	302	if (!adev)
	303	return;
	304
	305	pci_acpi_add_pm_notifier(adev, pci_dev);
	306	if (!adev->wakeup.flags.valid)
d2e5f0c1 RW	307	return;
	308
	309	device_set_wakeup_capable(dev, true);
	310	acpi_pci_sleep_wake(pci_dev, false);
d2e5f0c1 RW	311	if (adev->wakeup.flags.run_wake)
	312	device_set_run_wake(dev, true);
	313	}
	314
38a9a67a	315	static void pci_acpi_cleanup(struct device *dev)
d2e5f0c1	316	{
f084280c RW	317	struct acpi_device *adev = ACPI_COMPANION(dev);
	318
	319	if (!adev)
	320	return;
d2e5f0c1	321
f084280c RW	322	pci_acpi_remove_pm_notifier(adev);
f084280c RW	323	if (adev->wakeup.flags.valid) {
d2e5f0c1 RW	324	device_set_wakeup_capable(dev, false);
d2e5f0c1 RW	325	device_set_run_wake(dev, false);
d2e5f0c1 RW	326	}
	327	}
	328
53540098 RW	329	static bool pci_acpi_bus_match(struct device *dev)
53540098 RW	330	{
40c368c1	331	return dev_is_pci(dev);
53540098 RW	332	}
53540098 RW	333
9c273b95	334	static struct acpi_bus_type acpi_pci_bus = {
53540098 RW	335	.name = "PCI",
53540098 RW	336	.match = pci_acpi_bus_match,
e3f02c52	337	.find_companion = acpi_pci_find_companion,
38a9a67a RW	338	.setup = pci_acpi_setup,
38a9a67a RW	339	.cleanup = pci_acpi_cleanup,
84df749f DSL	340	};
84df749f DSL	341
9c273b95	342	static int __init acpi_pci_init(void)
84df749f DSL	343	{
	344	int ret;
	345
993958fe	346	if (acpi_gbl_FADT.boot_flags & ACPI_FADT_NO_MSI) {
e7d45152	347	pr_info("ACPI FADT declares the system doesn't support MSI, so disable it\n");
f8993aff SL	348	pci_no_msi();
f8993aff SL	349	}
5fde244d	350
993958fe	351	if (acpi_gbl_FADT.boot_flags & ACPI_FADT_NO_ASPM) {
e7d45152	352	pr_info("ACPI FADT declares the system doesn't support PCIe ASPM, so disable it\n");
5fde244d SL	353	pcie_no_aspm();
	354	}
	355
9c273b95	356	ret = register_acpi_bus_type(&acpi_pci_bus);
84df749f DSL	357	if (ret)
84df749f DSL	358	return 0;
5c0b04e3	359
961d9120	360	pci_set_platform_pm(&acpi_pci_platform_pm);
5c0b04e3	361	acpi_pci_slot_init();
3b63aaa7	362	acpiphp_init();
5c0b04e3	363
84df749f DSL	364	return 0;
84df749f DSL	365	}
9c273b95	366	arch_initcall(acpi_pci_init);