Commit | Line | Data |
---|---|---|
1da177e4 LT |
1 | /* |
2 | * File: pci-acpi.c | |
a406d9e6 | 3 | * Purpose: Provide PCI support in ACPI |
1da177e4 | 4 | * |
84df749f DSL |
5 | * Copyright (C) 2005 David Shaohua Li <shaohua.li@intel.com> |
6 | * Copyright (C) 2004 Tom Long Nguyen <tom.l.nguyen@intel.com> | |
7 | * Copyright (C) 2004 Intel Corp. | |
1da177e4 LT |
8 | */ |
9 | ||
10 | #include <linux/delay.h> | |
11 | #include <linux/init.h> | |
12 | #include <linux/pci.h> | |
9ce90ea5 | 13 | #include <linux/pci_hotplug.h> |
1da177e4 | 14 | #include <linux/module.h> |
5fde244d | 15 | #include <linux/pci-aspm.h> |
1da177e4 | 16 | #include <linux/pci-acpi.h> |
b67ea761 | 17 | #include <linux/pm_runtime.h> |
8b713a88 | 18 | #include <linux/pm_qos.h> |
0f64474b | 19 | #include "pci.h" |
1da177e4 | 20 | |
18e94a33 AL |
21 | /* |
22 | * The UUID is defined in the PCI Firmware Specification available here: | |
23 | * https://www.pcisig.com/members/downloads/pcifw_r3_1_13Dec10.pdf | |
24 | */ | |
25 | const u8 pci_acpi_dsm_uuid[] = { | |
26 | 0xd0, 0x37, 0xc9, 0xe5, 0x53, 0x35, 0x7a, 0x4d, | |
27 | 0x91, 0x17, 0xea, 0x4d, 0x19, 0xc3, 0x43, 0x4d | |
28 | }; | |
29 | ||
f4b57a3b JL |
30 | phys_addr_t acpi_pci_root_get_mcfg_addr(acpi_handle handle) |
31 | { | |
32 | acpi_status status = AE_NOT_EXIST; | |
33 | unsigned long long mcfg_addr; | |
34 | ||
35 | if (handle) | |
36 | status = acpi_evaluate_integer(handle, METHOD_NAME__CBA, | |
37 | NULL, &mcfg_addr); | |
38 | if (ACPI_FAILURE(status)) | |
39 | return 0; | |
40 | ||
41 | return (phys_addr_t)mcfg_addr; | |
42 | } | |
43 | ||
abbfec34 BH |
44 | static acpi_status decode_type0_hpx_record(union acpi_object *record, |
45 | struct hotplug_params *hpx) | |
9ce90ea5 BH |
46 | { |
47 | int i; | |
48 | union acpi_object *fields = record->package.elements; | |
49 | u32 revision = fields[1].integer.value; | |
50 | ||
51 | switch (revision) { | |
52 | case 1: | |
53 | if (record->package.count != 6) | |
54 | return AE_ERROR; | |
55 | for (i = 2; i < 6; i++) | |
56 | if (fields[i].type != ACPI_TYPE_INTEGER) | |
57 | return AE_ERROR; | |
58 | hpx->t0 = &hpx->type0_data; | |
59 | hpx->t0->revision = revision; | |
60 | hpx->t0->cache_line_size = fields[2].integer.value; | |
61 | hpx->t0->latency_timer = fields[3].integer.value; | |
62 | hpx->t0->enable_serr = fields[4].integer.value; | |
63 | hpx->t0->enable_perr = fields[5].integer.value; | |
64 | break; | |
65 | default: | |
66 | printk(KERN_WARNING | |
67 | "%s: Type 0 Revision %d record not supported\n", | |
68 | __func__, revision); | |
69 | return AE_ERROR; | |
70 | } | |
71 | return AE_OK; | |
72 | } | |
73 | ||
abbfec34 BH |
74 | static acpi_status decode_type1_hpx_record(union acpi_object *record, |
75 | struct hotplug_params *hpx) | |
9ce90ea5 BH |
76 | { |
77 | int i; | |
78 | union acpi_object *fields = record->package.elements; | |
79 | u32 revision = fields[1].integer.value; | |
80 | ||
81 | switch (revision) { | |
82 | case 1: | |
83 | if (record->package.count != 5) | |
84 | return AE_ERROR; | |
85 | for (i = 2; i < 5; i++) | |
86 | if (fields[i].type != ACPI_TYPE_INTEGER) | |
87 | return AE_ERROR; | |
88 | hpx->t1 = &hpx->type1_data; | |
89 | hpx->t1->revision = revision; | |
90 | hpx->t1->max_mem_read = fields[2].integer.value; | |
91 | hpx->t1->avg_max_split = fields[3].integer.value; | |
92 | hpx->t1->tot_max_split = fields[4].integer.value; | |
93 | break; | |
94 | default: | |
95 | printk(KERN_WARNING | |
96 | "%s: Type 1 Revision %d record not supported\n", | |
97 | __func__, revision); | |
98 | return AE_ERROR; | |
99 | } | |
100 | return AE_OK; | |
101 | } | |
102 | ||
abbfec34 BH |
103 | static acpi_status decode_type2_hpx_record(union acpi_object *record, |
104 | struct hotplug_params *hpx) | |
9ce90ea5 BH |
105 | { |
106 | int i; | |
107 | union acpi_object *fields = record->package.elements; | |
108 | u32 revision = fields[1].integer.value; | |
109 | ||
110 | switch (revision) { | |
111 | case 1: | |
112 | if (record->package.count != 18) | |
113 | return AE_ERROR; | |
114 | for (i = 2; i < 18; i++) | |
115 | if (fields[i].type != ACPI_TYPE_INTEGER) | |
116 | return AE_ERROR; | |
117 | hpx->t2 = &hpx->type2_data; | |
118 | hpx->t2->revision = revision; | |
119 | hpx->t2->unc_err_mask_and = fields[2].integer.value; | |
120 | hpx->t2->unc_err_mask_or = fields[3].integer.value; | |
121 | hpx->t2->unc_err_sever_and = fields[4].integer.value; | |
122 | hpx->t2->unc_err_sever_or = fields[5].integer.value; | |
123 | hpx->t2->cor_err_mask_and = fields[6].integer.value; | |
124 | hpx->t2->cor_err_mask_or = fields[7].integer.value; | |
125 | hpx->t2->adv_err_cap_and = fields[8].integer.value; | |
126 | hpx->t2->adv_err_cap_or = fields[9].integer.value; | |
127 | hpx->t2->pci_exp_devctl_and = fields[10].integer.value; | |
128 | hpx->t2->pci_exp_devctl_or = fields[11].integer.value; | |
129 | hpx->t2->pci_exp_lnkctl_and = fields[12].integer.value; | |
130 | hpx->t2->pci_exp_lnkctl_or = fields[13].integer.value; | |
131 | hpx->t2->sec_unc_err_sever_and = fields[14].integer.value; | |
132 | hpx->t2->sec_unc_err_sever_or = fields[15].integer.value; | |
133 | hpx->t2->sec_unc_err_mask_and = fields[16].integer.value; | |
134 | hpx->t2->sec_unc_err_mask_or = fields[17].integer.value; | |
135 | break; | |
136 | default: | |
137 | printk(KERN_WARNING | |
138 | "%s: Type 2 Revision %d record not supported\n", | |
139 | __func__, revision); | |
140 | return AE_ERROR; | |
141 | } | |
142 | return AE_OK; | |
143 | } | |
144 | ||
abbfec34 | 145 | static acpi_status acpi_run_hpx(acpi_handle handle, struct hotplug_params *hpx) |
9ce90ea5 BH |
146 | { |
147 | acpi_status status; | |
148 | struct acpi_buffer buffer = {ACPI_ALLOCATE_BUFFER, NULL}; | |
149 | union acpi_object *package, *record, *fields; | |
150 | u32 type; | |
151 | int i; | |
152 | ||
153 | /* Clear the return buffer with zeros */ | |
154 | memset(hpx, 0, sizeof(struct hotplug_params)); | |
155 | ||
156 | status = acpi_evaluate_object(handle, "_HPX", NULL, &buffer); | |
157 | if (ACPI_FAILURE(status)) | |
158 | return status; | |
159 | ||
160 | package = (union acpi_object *)buffer.pointer; | |
161 | if (package->type != ACPI_TYPE_PACKAGE) { | |
162 | status = AE_ERROR; | |
163 | goto exit; | |
164 | } | |
165 | ||
166 | for (i = 0; i < package->package.count; i++) { | |
167 | record = &package->package.elements[i]; | |
168 | if (record->type != ACPI_TYPE_PACKAGE) { | |
169 | status = AE_ERROR; | |
170 | goto exit; | |
171 | } | |
172 | ||
173 | fields = record->package.elements; | |
174 | if (fields[0].type != ACPI_TYPE_INTEGER || | |
175 | fields[1].type != ACPI_TYPE_INTEGER) { | |
176 | status = AE_ERROR; | |
177 | goto exit; | |
178 | } | |
179 | ||
180 | type = fields[0].integer.value; | |
181 | switch (type) { | |
182 | case 0: | |
183 | status = decode_type0_hpx_record(record, hpx); | |
184 | if (ACPI_FAILURE(status)) | |
185 | goto exit; | |
186 | break; | |
187 | case 1: | |
188 | status = decode_type1_hpx_record(record, hpx); | |
189 | if (ACPI_FAILURE(status)) | |
190 | goto exit; | |
191 | break; | |
192 | case 2: | |
193 | status = decode_type2_hpx_record(record, hpx); | |
194 | if (ACPI_FAILURE(status)) | |
195 | goto exit; | |
196 | break; | |
197 | default: | |
198 | printk(KERN_ERR "%s: Type %d record not supported\n", | |
199 | __func__, type); | |
200 | status = AE_ERROR; | |
201 | goto exit; | |
202 | } | |
203 | } | |
204 | exit: | |
205 | kfree(buffer.pointer); | |
206 | return status; | |
207 | } | |
208 | ||
abbfec34 | 209 | static acpi_status acpi_run_hpp(acpi_handle handle, struct hotplug_params *hpp) |
9ce90ea5 BH |
210 | { |
211 | acpi_status status; | |
212 | struct acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER, NULL }; | |
213 | union acpi_object *package, *fields; | |
214 | int i; | |
215 | ||
216 | memset(hpp, 0, sizeof(struct hotplug_params)); | |
217 | ||
218 | status = acpi_evaluate_object(handle, "_HPP", NULL, &buffer); | |
219 | if (ACPI_FAILURE(status)) | |
220 | return status; | |
221 | ||
222 | package = (union acpi_object *) buffer.pointer; | |
223 | if (package->type != ACPI_TYPE_PACKAGE || | |
224 | package->package.count != 4) { | |
225 | status = AE_ERROR; | |
226 | goto exit; | |
227 | } | |
228 | ||
229 | fields = package->package.elements; | |
230 | for (i = 0; i < 4; i++) { | |
231 | if (fields[i].type != ACPI_TYPE_INTEGER) { | |
232 | status = AE_ERROR; | |
233 | goto exit; | |
234 | } | |
235 | } | |
236 | ||
237 | hpp->t0 = &hpp->type0_data; | |
238 | hpp->t0->revision = 1; | |
239 | hpp->t0->cache_line_size = fields[0].integer.value; | |
240 | hpp->t0->latency_timer = fields[1].integer.value; | |
241 | hpp->t0->enable_serr = fields[2].integer.value; | |
242 | hpp->t0->enable_perr = fields[3].integer.value; | |
243 | ||
244 | exit: | |
245 | kfree(buffer.pointer); | |
246 | return status; | |
247 | } | |
248 | ||
249 | /* pci_get_hp_params | |
250 | * | |
251 | * @dev - the pci_dev for which we want parameters | |
252 | * @hpp - allocated by the caller | |
253 | */ | |
254 | int pci_get_hp_params(struct pci_dev *dev, struct hotplug_params *hpp) | |
255 | { | |
256 | acpi_status status; | |
257 | acpi_handle handle, phandle; | |
258 | struct pci_bus *pbus; | |
259 | ||
8647ca9a BH |
260 | if (acpi_pci_disabled) |
261 | return -ENODEV; | |
262 | ||
9ce90ea5 BH |
263 | handle = NULL; |
264 | for (pbus = dev->bus; pbus; pbus = pbus->parent) { | |
265 | handle = acpi_pci_get_bridge_handle(pbus); | |
266 | if (handle) | |
267 | break; | |
268 | } | |
269 | ||
270 | /* | |
271 | * _HPP settings apply to all child buses, until another _HPP is | |
272 | * encountered. If we don't find an _HPP for the input pci dev, | |
273 | * look for it in the parent device scope since that would apply to | |
274 | * this pci dev. | |
275 | */ | |
276 | while (handle) { | |
277 | status = acpi_run_hpx(handle, hpp); | |
278 | if (ACPI_SUCCESS(status)) | |
279 | return 0; | |
280 | status = acpi_run_hpp(handle, hpp); | |
281 | if (ACPI_SUCCESS(status)) | |
282 | return 0; | |
283 | if (acpi_is_root_bridge(handle)) | |
284 | break; | |
285 | status = acpi_get_parent(handle, &phandle); | |
286 | if (ACPI_FAILURE(status)) | |
287 | break; | |
288 | handle = phandle; | |
289 | } | |
290 | return -ENODEV; | |
291 | } | |
292 | EXPORT_SYMBOL_GPL(pci_get_hp_params); | |
293 | ||
5e3d2344 BH |
294 | /** |
295 | * pci_acpi_wake_bus - Root bus wakeup notification fork function. | |
296 | * @work: Work item to handle. | |
297 | */ | |
298 | static void pci_acpi_wake_bus(struct work_struct *work) | |
299 | { | |
300 | struct acpi_device *adev; | |
301 | struct acpi_pci_root *root; | |
302 | ||
303 | adev = container_of(work, struct acpi_device, wakeup.context.work); | |
304 | root = acpi_driver_data(adev); | |
305 | pci_pme_wakeup_bus(root->bus); | |
306 | } | |
307 | ||
308 | /** | |
309 | * pci_acpi_wake_dev - PCI device wakeup notification work function. | |
310 | * @handle: ACPI handle of a device the notification is for. | |
311 | * @work: Work item to handle. | |
312 | */ | |
313 | static void pci_acpi_wake_dev(struct work_struct *work) | |
314 | { | |
315 | struct acpi_device_wakeup_context *context; | |
316 | struct pci_dev *pci_dev; | |
317 | ||
318 | context = container_of(work, struct acpi_device_wakeup_context, work); | |
319 | pci_dev = to_pci_dev(context->dev); | |
320 | ||
321 | if (pci_dev->pme_poll) | |
322 | pci_dev->pme_poll = false; | |
323 | ||
324 | if (pci_dev->current_state == PCI_D3cold) { | |
325 | pci_wakeup_event(pci_dev); | |
326 | pm_runtime_resume(&pci_dev->dev); | |
327 | return; | |
328 | } | |
329 | ||
330 | /* Clear PME Status if set. */ | |
331 | if (pci_dev->pme_support) | |
332 | pci_check_pme_status(pci_dev); | |
333 | ||
334 | pci_wakeup_event(pci_dev); | |
335 | pm_runtime_resume(&pci_dev->dev); | |
336 | ||
ff0387c3 | 337 | pci_pme_wakeup_bus(pci_dev->subordinate); |
5e3d2344 BH |
338 | } |
339 | ||
340 | /** | |
341 | * pci_acpi_add_bus_pm_notifier - Register PM notifier for root PCI bus. | |
342 | * @dev: PCI root bridge ACPI device. | |
343 | */ | |
344 | acpi_status pci_acpi_add_bus_pm_notifier(struct acpi_device *dev) | |
345 | { | |
346 | return acpi_add_pm_notifier(dev, NULL, pci_acpi_wake_bus); | |
347 | } | |
348 | ||
349 | /** | |
350 | * pci_acpi_add_pm_notifier - Register PM notifier for given PCI device. | |
351 | * @dev: ACPI device to add the notifier for. | |
352 | * @pci_dev: PCI device to check for the PME status if an event is signaled. | |
353 | */ | |
354 | acpi_status pci_acpi_add_pm_notifier(struct acpi_device *dev, | |
355 | struct pci_dev *pci_dev) | |
356 | { | |
357 | return acpi_add_pm_notifier(dev, &pci_dev->dev, pci_acpi_wake_dev); | |
358 | } | |
359 | ||
0f64474b DSL |
360 | /* |
361 | * _SxD returns the D-state with the highest power | |
362 | * (lowest D-state number) supported in the S-state "x". | |
363 | * | |
364 | * If the devices does not have a _PRW | |
365 | * (Power Resources for Wake) supporting system wakeup from "x" | |
366 | * then the OS is free to choose a lower power (higher number | |
367 | * D-state) than the return value from _SxD. | |
368 | * | |
369 | * But if _PRW is enabled at S-state "x", the OS | |
370 | * must not choose a power lower than _SxD -- | |
371 | * unless the device has an _SxW method specifying | |
372 | * the lowest power (highest D-state number) the device | |
373 | * may enter while still able to wake the system. | |
374 | * | |
375 | * ie. depending on global OS policy: | |
376 | * | |
377 | * if (_PRW at S-state x) | |
378 | * choose from highest power _SxD to lowest power _SxW | |
379 | * else // no _PRW at S-state x | |
f7625980 | 380 | * choose highest power _SxD or any lower power |
0f64474b DSL |
381 | */ |
382 | ||
8d2bdf49 | 383 | static pci_power_t acpi_pci_choose_state(struct pci_dev *pdev) |
0f64474b | 384 | { |
448bd857 | 385 | int acpi_state, d_max; |
0f64474b | 386 | |
448bd857 HY |
387 | if (pdev->no_d3cold) |
388 | d_max = ACPI_STATE_D3_HOT; | |
389 | else | |
390 | d_max = ACPI_STATE_D3_COLD; | |
391 | acpi_state = acpi_pm_device_sleep_state(&pdev->dev, NULL, d_max); | |
ab826ca4 SL |
392 | if (acpi_state < 0) |
393 | return PCI_POWER_ERROR; | |
394 | ||
395 | switch (acpi_state) { | |
396 | case ACPI_STATE_D0: | |
397 | return PCI_D0; | |
398 | case ACPI_STATE_D1: | |
399 | return PCI_D1; | |
400 | case ACPI_STATE_D2: | |
401 | return PCI_D2; | |
1cc0c998 | 402 | case ACPI_STATE_D3_HOT: |
ab826ca4 | 403 | return PCI_D3hot; |
28c2103d LM |
404 | case ACPI_STATE_D3_COLD: |
405 | return PCI_D3cold; | |
ab826ca4 SL |
406 | } |
407 | return PCI_POWER_ERROR; | |
0f64474b | 408 | } |
961d9120 RW |
409 | |
410 | static bool acpi_pci_power_manageable(struct pci_dev *dev) | |
411 | { | |
85dbb3d0 RW |
412 | struct acpi_device *adev = ACPI_COMPANION(&dev->dev); |
413 | return adev ? acpi_device_power_manageable(adev) : false; | |
961d9120 | 414 | } |
0f64474b | 415 | |
b913100d DSL |
416 | static int acpi_pci_set_power_state(struct pci_dev *dev, pci_power_t state) |
417 | { | |
85dbb3d0 | 418 | struct acpi_device *adev = ACPI_COMPANION(&dev->dev); |
583c377f DB |
419 | static const u8 state_conv[] = { |
420 | [PCI_D0] = ACPI_STATE_D0, | |
421 | [PCI_D1] = ACPI_STATE_D1, | |
422 | [PCI_D2] = ACPI_STATE_D2, | |
20dacb71 | 423 | [PCI_D3hot] = ACPI_STATE_D3_HOT, |
fc6504b3 | 424 | [PCI_D3cold] = ACPI_STATE_D3_COLD, |
b913100d | 425 | }; |
44e4e66e | 426 | int error = -EINVAL; |
b913100d | 427 | |
10b3dcae | 428 | /* If the ACPI device has _EJ0, ignore the device */ |
85dbb3d0 | 429 | if (!adev || acpi_has_method(adev->handle, "_EJ0")) |
44e4e66e | 430 | return -ENODEV; |
583c377f DB |
431 | |
432 | switch (state) { | |
8b713a88 RW |
433 | case PCI_D3cold: |
434 | if (dev_pm_qos_flags(&dev->dev, PM_QOS_FLAG_NO_POWER_OFF) == | |
435 | PM_QOS_FLAGS_ALL) { | |
436 | error = -EBUSY; | |
437 | break; | |
438 | } | |
583c377f DB |
439 | case PCI_D0: |
440 | case PCI_D1: | |
441 | case PCI_D2: | |
442 | case PCI_D3hot: | |
85dbb3d0 | 443 | error = acpi_device_set_power(adev, state_conv[state]); |
583c377f | 444 | } |
44e4e66e RW |
445 | |
446 | if (!error) | |
d010e576 | 447 | dev_dbg(&dev->dev, "power state changed by ACPI to %s\n", |
fc6504b3 | 448 | acpi_power_state_string(state_conv[state])); |
44e4e66e RW |
449 | |
450 | return error; | |
b913100d DSL |
451 | } |
452 | ||
eb9d0fe4 RW |
453 | static bool acpi_pci_can_wakeup(struct pci_dev *dev) |
454 | { | |
85dbb3d0 RW |
455 | struct acpi_device *adev = ACPI_COMPANION(&dev->dev); |
456 | return adev ? acpi_device_can_wakeup(adev) : false; | |
eb9d0fe4 RW |
457 | } |
458 | ||
0baed8da RW |
459 | static void acpi_pci_propagate_wakeup_enable(struct pci_bus *bus, bool enable) |
460 | { | |
461 | while (bus->parent) { | |
dc1a94ae | 462 | if (!acpi_pm_device_sleep_wake(&bus->self->dev, enable)) |
0baed8da RW |
463 | return; |
464 | bus = bus->parent; | |
465 | } | |
466 | ||
467 | /* We have reached the root bus. */ | |
468 | if (bus->bridge) | |
469 | acpi_pm_device_sleep_wake(bus->bridge, enable); | |
470 | } | |
471 | ||
eb9d0fe4 RW |
472 | static int acpi_pci_sleep_wake(struct pci_dev *dev, bool enable) |
473 | { | |
0baed8da RW |
474 | if (acpi_pci_can_wakeup(dev)) |
475 | return acpi_pm_device_sleep_wake(&dev->dev, enable); | |
476 | ||
dc1a94ae | 477 | acpi_pci_propagate_wakeup_enable(dev->bus, enable); |
0baed8da | 478 | return 0; |
eb9d0fe4 RW |
479 | } |
480 | ||
b67ea761 RW |
481 | static void acpi_pci_propagate_run_wake(struct pci_bus *bus, bool enable) |
482 | { | |
483 | while (bus->parent) { | |
484 | struct pci_dev *bridge = bus->self; | |
485 | ||
486 | if (bridge->pme_interrupt) | |
487 | return; | |
b24e5098 | 488 | if (!acpi_pm_device_run_wake(&bridge->dev, enable)) |
b67ea761 RW |
489 | return; |
490 | bus = bus->parent; | |
491 | } | |
492 | ||
493 | /* We have reached the root bus. */ | |
494 | if (bus->bridge) | |
b24e5098 | 495 | acpi_pm_device_run_wake(bus->bridge, enable); |
b67ea761 RW |
496 | } |
497 | ||
498 | static int acpi_pci_run_wake(struct pci_dev *dev, bool enable) | |
499 | { | |
448bd857 HY |
500 | /* |
501 | * Per PCI Express Base Specification Revision 2.0 section | |
502 | * 5.3.3.2 Link Wakeup, platform support is needed for D3cold | |
503 | * waking up to power on the main link even if there is PME | |
504 | * support for D3cold | |
505 | */ | |
506 | if (dev->pme_interrupt && !dev->runtime_d3cold) | |
b67ea761 RW |
507 | return 0; |
508 | ||
b24e5098 | 509 | if (!acpi_pm_device_run_wake(&dev->dev, enable)) |
b67ea761 RW |
510 | return 0; |
511 | ||
512 | acpi_pci_propagate_run_wake(dev->bus, enable); | |
513 | return 0; | |
514 | } | |
515 | ||
bac2a909 RW |
516 | static bool acpi_pci_need_resume(struct pci_dev *dev) |
517 | { | |
518 | struct acpi_device *adev = ACPI_COMPANION(&dev->dev); | |
519 | ||
520 | if (!adev || !acpi_device_power_manageable(adev)) | |
521 | return false; | |
522 | ||
523 | if (device_may_wakeup(&dev->dev) != !!adev->wakeup.prepare_count) | |
524 | return true; | |
525 | ||
526 | if (acpi_target_system_state() == ACPI_STATE_S0) | |
527 | return false; | |
528 | ||
529 | return !!adev->power.flags.dsw_present; | |
530 | } | |
531 | ||
961d9120 RW |
532 | static struct pci_platform_pm_ops acpi_pci_platform_pm = { |
533 | .is_manageable = acpi_pci_power_manageable, | |
534 | .set_state = acpi_pci_set_power_state, | |
535 | .choose_state = acpi_pci_choose_state, | |
eb9d0fe4 | 536 | .sleep_wake = acpi_pci_sleep_wake, |
b67ea761 | 537 | .run_wake = acpi_pci_run_wake, |
bac2a909 | 538 | .need_resume = acpi_pci_need_resume, |
961d9120 | 539 | }; |
b913100d | 540 | |
5090d4a6 JL |
541 | void acpi_pci_add_bus(struct pci_bus *bus) |
542 | { | |
e33caa82 AL |
543 | union acpi_object *obj; |
544 | struct pci_host_bridge *bridge; | |
545 | ||
be1c9de9 | 546 | if (acpi_pci_disabled || !bus->bridge) |
5090d4a6 JL |
547 | return; |
548 | ||
be1c9de9 RW |
549 | acpi_pci_slot_enumerate(bus); |
550 | acpiphp_enumerate_slots(bus); | |
e33caa82 AL |
551 | |
552 | /* | |
553 | * For a host bridge, check its _DSM for function 8 and if | |
554 | * that is available, mark it in pci_host_bridge. | |
555 | */ | |
556 | if (!pci_is_root_bus(bus)) | |
557 | return; | |
558 | ||
559 | obj = acpi_evaluate_dsm(ACPI_HANDLE(bus->bridge), pci_acpi_dsm_uuid, 3, | |
560 | RESET_DELAY_DSM, NULL); | |
561 | if (!obj) | |
562 | return; | |
563 | ||
564 | if (obj->type == ACPI_TYPE_INTEGER && obj->integer.value == 1) { | |
565 | bridge = pci_find_host_bridge(bus); | |
566 | bridge->ignore_reset_delay = 1; | |
567 | } | |
568 | ACPI_FREE(obj); | |
5090d4a6 JL |
569 | } |
570 | ||
571 | void acpi_pci_remove_bus(struct pci_bus *bus) | |
572 | { | |
be1c9de9 | 573 | if (acpi_pci_disabled || !bus->bridge) |
5090d4a6 JL |
574 | return; |
575 | ||
3b63aaa7 | 576 | acpiphp_remove_slots(bus); |
5c0b04e3 | 577 | acpi_pci_slot_remove(bus); |
5090d4a6 JL |
578 | } |
579 | ||
84df749f | 580 | /* ACPI bus type */ |
e3f02c52 | 581 | static struct acpi_device *acpi_pci_find_companion(struct device *dev) |
84df749f | 582 | { |
60f75b8e | 583 | struct pci_dev *pci_dev = to_pci_dev(dev); |
5ce79d20 | 584 | bool check_children; |
60f75b8e | 585 | u64 addr; |
84df749f | 586 | |
6788a51f | 587 | check_children = pci_is_bridge(pci_dev); |
84df749f DSL |
588 | /* Please ref to ACPI spec for the syntax of _ADR */ |
589 | addr = (PCI_SLOT(pci_dev->devfn) << 16) | PCI_FUNC(pci_dev->devfn); | |
e3f02c52 | 590 | return acpi_find_child_device(ACPI_COMPANION(dev->parent), addr, |
5ce79d20 | 591 | check_children); |
84df749f DSL |
592 | } |
593 | ||
e33caa82 AL |
594 | /** |
595 | * pci_acpi_optimize_delay - optimize PCI D3 and D3cold delay from ACPI | |
596 | * @pdev: the PCI device whose delay is to be updated | |
113e0d11 | 597 | * @handle: ACPI handle of this device |
e33caa82 AL |
598 | * |
599 | * Update the d3_delay and d3cold_delay of a PCI device from the ACPI _DSM | |
600 | * control method of either the device itself or the PCI host bridge. | |
601 | * | |
602 | * Function 8, "Reset Delay," applies to the entire hierarchy below a PCI | |
603 | * host bridge. If it returns one, the OS may assume that all devices in | |
604 | * the hierarchy have already completed power-on reset delays. | |
605 | * | |
606 | * Function 9, "Device Readiness Durations," applies only to the object | |
607 | * where it is located. It returns delay durations required after various | |
608 | * events if the device requires less time than the spec requires. Delays | |
609 | * from this function take precedence over the Reset Delay function. | |
610 | * | |
611 | * These _DSM functions are defined by the draft ECN of January 28, 2014, | |
612 | * titled "ACPI additions for FW latency optimizations." | |
613 | */ | |
614 | static void pci_acpi_optimize_delay(struct pci_dev *pdev, | |
615 | acpi_handle handle) | |
616 | { | |
617 | struct pci_host_bridge *bridge = pci_find_host_bridge(pdev->bus); | |
618 | int value; | |
619 | union acpi_object *obj, *elements; | |
620 | ||
621 | if (bridge->ignore_reset_delay) | |
622 | pdev->d3cold_delay = 0; | |
623 | ||
624 | obj = acpi_evaluate_dsm(handle, pci_acpi_dsm_uuid, 3, | |
625 | FUNCTION_DELAY_DSM, NULL); | |
626 | if (!obj) | |
627 | return; | |
628 | ||
629 | if (obj->type == ACPI_TYPE_PACKAGE && obj->package.count == 5) { | |
630 | elements = obj->package.elements; | |
631 | if (elements[0].type == ACPI_TYPE_INTEGER) { | |
632 | value = (int)elements[0].integer.value / 1000; | |
633 | if (value < PCI_PM_D3COLD_WAIT) | |
634 | pdev->d3cold_delay = value; | |
635 | } | |
636 | if (elements[3].type == ACPI_TYPE_INTEGER) { | |
637 | value = (int)elements[3].integer.value / 1000; | |
638 | if (value < PCI_PM_D3_WAIT) | |
639 | pdev->d3_delay = value; | |
640 | } | |
641 | } | |
642 | ACPI_FREE(obj); | |
643 | } | |
644 | ||
38a9a67a | 645 | static void pci_acpi_setup(struct device *dev) |
d2e5f0c1 | 646 | { |
d2e5f0c1 | 647 | struct pci_dev *pci_dev = to_pci_dev(dev); |
f084280c | 648 | struct acpi_device *adev = ACPI_COMPANION(dev); |
38a9a67a | 649 | |
f084280c RW |
650 | if (!adev) |
651 | return; | |
652 | ||
e33caa82 AL |
653 | pci_acpi_optimize_delay(pci_dev, adev->handle); |
654 | ||
f084280c RW |
655 | pci_acpi_add_pm_notifier(adev, pci_dev); |
656 | if (!adev->wakeup.flags.valid) | |
d2e5f0c1 RW |
657 | return; |
658 | ||
659 | device_set_wakeup_capable(dev, true); | |
660 | acpi_pci_sleep_wake(pci_dev, false); | |
d2e5f0c1 RW |
661 | if (adev->wakeup.flags.run_wake) |
662 | device_set_run_wake(dev, true); | |
663 | } | |
664 | ||
38a9a67a | 665 | static void pci_acpi_cleanup(struct device *dev) |
d2e5f0c1 | 666 | { |
f084280c RW |
667 | struct acpi_device *adev = ACPI_COMPANION(dev); |
668 | ||
669 | if (!adev) | |
670 | return; | |
d2e5f0c1 | 671 | |
f084280c RW |
672 | pci_acpi_remove_pm_notifier(adev); |
673 | if (adev->wakeup.flags.valid) { | |
d2e5f0c1 RW |
674 | device_set_wakeup_capable(dev, false); |
675 | device_set_run_wake(dev, false); | |
d2e5f0c1 RW |
676 | } |
677 | } | |
678 | ||
53540098 RW |
679 | static bool pci_acpi_bus_match(struct device *dev) |
680 | { | |
40c368c1 | 681 | return dev_is_pci(dev); |
53540098 RW |
682 | } |
683 | ||
9c273b95 | 684 | static struct acpi_bus_type acpi_pci_bus = { |
53540098 RW |
685 | .name = "PCI", |
686 | .match = pci_acpi_bus_match, | |
e3f02c52 | 687 | .find_companion = acpi_pci_find_companion, |
38a9a67a RW |
688 | .setup = pci_acpi_setup, |
689 | .cleanup = pci_acpi_cleanup, | |
84df749f DSL |
690 | }; |
691 | ||
9c273b95 | 692 | static int __init acpi_pci_init(void) |
84df749f DSL |
693 | { |
694 | int ret; | |
695 | ||
993958fe | 696 | if (acpi_gbl_FADT.boot_flags & ACPI_FADT_NO_MSI) { |
e7d45152 | 697 | pr_info("ACPI FADT declares the system doesn't support MSI, so disable it\n"); |
f8993aff SL |
698 | pci_no_msi(); |
699 | } | |
5fde244d | 700 | |
993958fe | 701 | if (acpi_gbl_FADT.boot_flags & ACPI_FADT_NO_ASPM) { |
e7d45152 | 702 | pr_info("ACPI FADT declares the system doesn't support PCIe ASPM, so disable it\n"); |
5fde244d SL |
703 | pcie_no_aspm(); |
704 | } | |
705 | ||
9c273b95 | 706 | ret = register_acpi_bus_type(&acpi_pci_bus); |
84df749f DSL |
707 | if (ret) |
708 | return 0; | |
5c0b04e3 | 709 | |
961d9120 | 710 | pci_set_platform_pm(&acpi_pci_platform_pm); |
5c0b04e3 | 711 | acpi_pci_slot_init(); |
3b63aaa7 | 712 | acpiphp_init(); |
5c0b04e3 | 713 | |
84df749f DSL |
714 | return 0; |
715 | } | |
9c273b95 | 716 | arch_initcall(acpi_pci_init); |