[deliverable/linux.git] / drivers / pci / pci-sysfs.c

/*
 * drivers/pci/pci-sysfs.c
 *
 * (C) Copyright 2002-2004 Greg Kroah-Hartman <greg@kroah.com>
 * (C) Copyright 2002-2004 IBM Corp.
 * (C) Copyright 2003 Matthew Wilcox
 * (C) Copyright 2003 Hewlett-Packard
 * (C) Copyright 2004 Jon Smirl <jonsmirl@yahoo.com>
 * (C) Copyright 2004 Silicon Graphics, Inc. Jesse Barnes <jbarnes@sgi.com>
 *
 * File attributes for PCI devices
 *
 * Modeled after usb's driverfs.c 
 *
 */


#include <linux/config.h>
#include <linux/kernel.h>
#include <linux/pci.h>
#include <linux/stat.h>
#include <linux/topology.h>
#include <linux/mm.h>

#include "pci.h"

static int sysfs_initialized;	/* = 0 */

/* show configuration fields */
#define pci_config_attr(field, format_string)				\
static ssize_t								\
field##_show(struct device *dev, struct device_attribute *attr, char *buf)				\
{									\
	struct pci_dev *pdev;						\
									\
	pdev = to_pci_dev (dev);					\
	return sprintf (buf, format_string, pdev->field);		\
}

pci_config_attr(vendor, "0x%04x\n");
pci_config_attr(device, "0x%04x\n");
pci_config_attr(subsystem_vendor, "0x%04x\n");
pci_config_attr(subsystem_device, "0x%04x\n");
pci_config_attr(class, "0x%06x\n");
pci_config_attr(irq, "%u\n");

static ssize_t local_cpus_show(struct device *dev, struct device_attribute *attr, char *buf)
{		
	cpumask_t mask = pcibus_to_cpumask(to_pci_dev(dev)->bus);
	int len = cpumask_scnprintf(buf, PAGE_SIZE-2, mask);
	strcat(buf,"\n"); 
	return 1+len;
}

/* show resources */
static ssize_t
resource_show(struct device * dev, struct device_attribute *attr, char * buf)
{
	struct pci_dev * pci_dev = to_pci_dev(dev);
	char * str = buf;
	int i;
	int max = 7;
	u64 start, end;

	if (pci_dev->subordinate)
		max = DEVICE_COUNT_RESOURCE;

	for (i = 0; i < max; i++) {
		struct resource *res =  &pci_dev->resource[i];
		pci_resource_to_user(pci_dev, i, res, &start, &end);
		str += sprintf(str,"0x%016llx 0x%016llx 0x%016llx\n",
			       (unsigned long long)start,
			       (unsigned long long)end,
			       (unsigned long long)res->flags);
	}
	return (str - buf);
}

static ssize_t modalias_show(struct device *dev, struct device_attribute *attr, char *buf)
{
	struct pci_dev *pci_dev = to_pci_dev(dev);

	return sprintf(buf, "pci:v%08Xd%08Xsv%08Xsd%08Xbc%02Xsc%02Xi%02x\n",
		       pci_dev->vendor, pci_dev->device,
		       pci_dev->subsystem_vendor, pci_dev->subsystem_device,
		       (u8)(pci_dev->class >> 16), (u8)(pci_dev->class >> 8),
		       (u8)(pci_dev->class));
}

struct device_attribute pci_dev_attrs[] = {
	__ATTR_RO(resource),
	__ATTR_RO(vendor),
	__ATTR_RO(device),
	__ATTR_RO(subsystem_vendor),
	__ATTR_RO(subsystem_device),
	__ATTR_RO(class),
	__ATTR_RO(irq),
	__ATTR_RO(local_cpus),
	__ATTR_RO(modalias),
	__ATTR_NULL,
};

static ssize_t
pci_read_config(struct kobject *kobj, char *buf, loff_t off, size_t count)
{
	struct pci_dev *dev = to_pci_dev(container_of(kobj,struct device,kobj));
	unsigned int size = 64;
	loff_t init_off = off;
	u8 *data = (u8*) buf;

	/* Several chips lock up trying to read undefined config space */
	if (capable(CAP_SYS_ADMIN)) {
		size = dev->cfg_size;
	} else if (dev->hdr_type == PCI_HEADER_TYPE_CARDBUS) {
		size = 128;
	}

	if (off > size)
		return 0;
	if (off + count > size) {
		size -= off;
		count = size;
	} else {
		size = count;
	}

	if ((off & 1) && size) {
		u8 val;
		pci_read_config_byte(dev, off, &val);
		data[off - init_off] = val;
		off++;
		size--;
	}

	if ((off & 3) && size > 2) {
		u16 val;
		pci_read_config_word(dev, off, &val);
		data[off - init_off] = val & 0xff;
		data[off - init_off + 1] = (val >> 8) & 0xff;
		off += 2;
		size -= 2;
	}

	while (size > 3) {
		u32 val;
		pci_read_config_dword(dev, off, &val);
		data[off - init_off] = val & 0xff;
		data[off - init_off + 1] = (val >> 8) & 0xff;
		data[off - init_off + 2] = (val >> 16) & 0xff;
		data[off - init_off + 3] = (val >> 24) & 0xff;
		off += 4;
		size -= 4;
	}

	if (size >= 2) {
		u16 val;
		pci_read_config_word(dev, off, &val);
		data[off - init_off] = val & 0xff;
		data[off - init_off + 1] = (val >> 8) & 0xff;
		off += 2;
		size -= 2;
	}

	if (size > 0) {
		u8 val;
		pci_read_config_byte(dev, off, &val);
		data[off - init_off] = val;
		off++;
		--size;
	}

	return count;
}

static ssize_t
pci_write_config(struct kobject *kobj, char *buf, loff_t off, size_t count)
{
	struct pci_dev *dev = to_pci_dev(container_of(kobj,struct device,kobj));
	unsigned int size = count;
	loff_t init_off = off;
	u8 *data = (u8*) buf;

	if (off > dev->cfg_size)
		return 0;
	if (off + count > dev->cfg_size) {
		size = dev->cfg_size - off;
		count = size;
	}
	
	if ((off & 1) && size) {
		pci_write_config_byte(dev, off, data[off - init_off]);
		off++;
		size--;
	}
	
	if ((off & 3) && size > 2) {
		u16 val = data[off - init_off];
		val |= (u16) data[off - init_off + 1] << 8;
                pci_write_config_word(dev, off, val);
                off += 2;
                size -= 2;
        }

	while (size > 3) {
		u32 val = data[off - init_off];
		val |= (u32) data[off - init_off + 1] << 8;
		val |= (u32) data[off - init_off + 2] << 16;
		val |= (u32) data[off - init_off + 3] << 24;
		pci_write_config_dword(dev, off, val);
		off += 4;
		size -= 4;
	}
	
	if (size >= 2) {
		u16 val = data[off - init_off];
		val |= (u16) data[off - init_off + 1] << 8;
		pci_write_config_word(dev, off, val);
		off += 2;
		size -= 2;
	}

	if (size) {
		pci_write_config_byte(dev, off, data[off - init_off]);
		off++;
		--size;
	}

	return count;
}

#ifdef HAVE_PCI_LEGACY
/**
 * pci_read_legacy_io - read byte(s) from legacy I/O port space
 * @kobj: kobject corresponding to file to read from
 * @buf: buffer to store results
 * @off: offset into legacy I/O port space
 * @count: number of bytes to read
 *
 * Reads 1, 2, or 4 bytes from legacy I/O port space using an arch specific
 * callback routine (pci_legacy_read).
 */
ssize_t
pci_read_legacy_io(struct kobject *kobj, char *buf, loff_t off, size_t count)
{
        struct pci_bus *bus = to_pci_bus(container_of(kobj,
                                                      struct class_device,
						      kobj));

        /* Only support 1, 2 or 4 byte accesses */
        if (count != 1 && count != 2 && count != 4)
                return -EINVAL;

        return pci_legacy_read(bus, off, (u32 *)buf, count);
}

/**
 * pci_write_legacy_io - write byte(s) to legacy I/O port space
 * @kobj: kobject corresponding to file to read from
 * @buf: buffer containing value to be written
 * @off: offset into legacy I/O port space
 * @count: number of bytes to write
 *
 * Writes 1, 2, or 4 bytes from legacy I/O port space using an arch specific
 * callback routine (pci_legacy_write).
 */
ssize_t
pci_write_legacy_io(struct kobject *kobj, char *buf, loff_t off, size_t count)
{
        struct pci_bus *bus = to_pci_bus(container_of(kobj,
						      struct class_device,
						      kobj));
        /* Only support 1, 2 or 4 byte accesses */
        if (count != 1 && count != 2 && count != 4)
                return -EINVAL;

        return pci_legacy_write(bus, off, *(u32 *)buf, count);
}

/**
 * pci_mmap_legacy_mem - map legacy PCI memory into user memory space
 * @kobj: kobject corresponding to device to be mapped
 * @attr: struct bin_attribute for this file
 * @vma: struct vm_area_struct passed to mmap
 *
 * Uses an arch specific callback, pci_mmap_legacy_page_range, to mmap
 * legacy memory space (first meg of bus space) into application virtual
 * memory space.
 */
int
pci_mmap_legacy_mem(struct kobject *kobj, struct bin_attribute *attr,
                    struct vm_area_struct *vma)
{
        struct pci_bus *bus = to_pci_bus(container_of(kobj,
                                                      struct class_device,
						      kobj));

        return pci_mmap_legacy_page_range(bus, vma);
}
#endif /* HAVE_PCI_LEGACY */

#ifdef HAVE_PCI_MMAP
/**
 * pci_mmap_resource - map a PCI resource into user memory space
 * @kobj: kobject for mapping
 * @attr: struct bin_attribute for the file being mapped
 * @vma: struct vm_area_struct passed into the mmap
 *
 * Use the regular PCI mapping routines to map a PCI resource into userspace.
 * FIXME: write combining?  maybe automatic for prefetchable regions?
 */
static int
pci_mmap_resource(struct kobject *kobj, struct bin_attribute *attr,
		  struct vm_area_struct *vma)
{
	struct pci_dev *pdev = to_pci_dev(container_of(kobj,
						       struct device, kobj));
	struct resource *res = (struct resource *)attr->private;
	enum pci_mmap_state mmap_type;
	u64 start, end;
	int i;

	for (i = 0; i < PCI_ROM_RESOURCE; i++)
		if (res == &pdev->resource[i])
			break;
	if (i >= PCI_ROM_RESOURCE)
		return -ENODEV;

	/* pci_mmap_page_range() expects the same kind of entry as coming
	 * from /proc/bus/pci/ which is a "user visible" value. If this is
	 * different from the resource itself, arch will do necessary fixup.
	 */
	pci_resource_to_user(pdev, i, res, &start, &end);
	vma->vm_pgoff += start >> PAGE_SHIFT;
	mmap_type = res->flags & IORESOURCE_MEM ? pci_mmap_mem : pci_mmap_io;

	return pci_mmap_page_range(pdev, vma, mmap_type, 0);
}

/**
 * pci_create_resource_files - create resource files in sysfs for @dev
 * @dev: dev in question
 *
 * Walk the resources in @dev creating files for each resource available.
 */
static void
pci_create_resource_files(struct pci_dev *pdev)
{
	int i;

	/* Expose the PCI resources from this device as files */
	for (i = 0; i < PCI_ROM_RESOURCE; i++) {
		struct bin_attribute *res_attr;

		/* skip empty resources */
		if (!pci_resource_len(pdev, i))
			continue;

		/* allocate attribute structure, piggyback attribute name */
		res_attr = kcalloc(1, sizeof(*res_attr) + 10, GFP_ATOMIC);
		if (res_attr) {
			char *res_attr_name = (char *)(res_attr + 1);

			pdev->res_attr[i] = res_attr;
			sprintf(res_attr_name, "resource%d", i);
			res_attr->attr.name = res_attr_name;
			res_attr->attr.mode = S_IRUSR | S_IWUSR;
			res_attr->attr.owner = THIS_MODULE;
			res_attr->size = pci_resource_len(pdev, i);
			res_attr->mmap = pci_mmap_resource;
			res_attr->private = &pdev->resource[i];
			sysfs_create_bin_file(&pdev->dev.kobj, res_attr);
		}
	}
}

/**
 * pci_remove_resource_files - cleanup resource files
 * @dev: dev to cleanup
 *
 * If we created resource files for @dev, remove them from sysfs and
 * free their resources.
 */
static void
pci_remove_resource_files(struct pci_dev *pdev)
{
	int i;

	for (i = 0; i < PCI_ROM_RESOURCE; i++) {
		struct bin_attribute *res_attr;

		res_attr = pdev->res_attr[i];
		if (res_attr) {
			sysfs_remove_bin_file(&pdev->dev.kobj, res_attr);
			kfree(res_attr);
		}
	}
}
#else /* !HAVE_PCI_MMAP */
static inline void pci_create_resource_files(struct pci_dev *dev) { return; }
static inline void pci_remove_resource_files(struct pci_dev *dev) { return; }
#endif /* HAVE_PCI_MMAP */

/**
 * pci_write_rom - used to enable access to the PCI ROM display
 * @kobj: kernel object handle
 * @buf: user input
 * @off: file offset
 * @count: number of byte in input
 *
 * writing anything except 0 enables it
 */
static ssize_t
pci_write_rom(struct kobject *kobj, char *buf, loff_t off, size_t count)
{
	struct pci_dev *pdev = to_pci_dev(container_of(kobj, struct device, kobj));

	if ((off ==  0) && (*buf == '0') && (count == 2))
		pdev->rom_attr_enabled = 0;
	else
		pdev->rom_attr_enabled = 1;

	return count;
}

/**
 * pci_read_rom - read a PCI ROM
 * @kobj: kernel object handle
 * @buf: where to put the data we read from the ROM
 * @off: file offset
 * @count: number of bytes to read
 *
 * Put @count bytes starting at @off into @buf from the ROM in the PCI
 * device corresponding to @kobj.
 */
static ssize_t
pci_read_rom(struct kobject *kobj, char *buf, loff_t off, size_t count)
{
	struct pci_dev *pdev = to_pci_dev(container_of(kobj, struct device, kobj));
	void __iomem *rom;
	size_t size;

	if (!pdev->rom_attr_enabled)
		return -EINVAL;
	
	rom = pci_map_rom(pdev, &size);	/* size starts out as PCI window size */
	if (!rom)
		return 0;
		
	if (off >= size)
		count = 0;
	else {
		if (off + count > size)
			count = size - off;
		
		memcpy_fromio(buf, rom + off, count);
	}
	pci_unmap_rom(pdev, rom);
		
	return count;
}

static struct bin_attribute pci_config_attr = {
	.attr =	{
		.name = "config",
		.mode = S_IRUGO | S_IWUSR,
		.owner = THIS_MODULE,
	},
	.size = 256,
	.read = pci_read_config,
	.write = pci_write_config,
};

static struct bin_attribute pcie_config_attr = {
	.attr =	{
		.name = "config",
		.mode = S_IRUGO | S_IWUSR,
		.owner = THIS_MODULE,
	},
	.size = 4096,
	.read = pci_read_config,
	.write = pci_write_config,
};

int pci_create_sysfs_dev_files (struct pci_dev *pdev)
{
	if (!sysfs_initialized)
		return -EACCES;

	if (pdev->cfg_size < 4096)
		sysfs_create_bin_file(&pdev->dev.kobj, &pci_config_attr);
	else
		sysfs_create_bin_file(&pdev->dev.kobj, &pcie_config_attr);

	pci_create_resource_files(pdev);

	/* If the device has a ROM, try to expose it in sysfs. */
	if (pci_resource_len(pdev, PCI_ROM_RESOURCE)) {
		struct bin_attribute *rom_attr;
		
		rom_attr = kmalloc(sizeof(*rom_attr), GFP_ATOMIC);
		if (rom_attr) {
			memset(rom_attr, 0x00, sizeof(*rom_attr));
			pdev->rom_attr = rom_attr;
			rom_attr->size = pci_resource_len(pdev, PCI_ROM_RESOURCE);
			rom_attr->attr.name = "rom";
			rom_attr->attr.mode = S_IRUSR;
			rom_attr->attr.owner = THIS_MODULE;
			rom_attr->read = pci_read_rom;
			rom_attr->write = pci_write_rom;
			sysfs_create_bin_file(&pdev->dev.kobj, rom_attr);
		}
	}
	/* add platform-specific attributes */
	pcibios_add_platform_entries(pdev);
	
	return 0;
}

/**
 * pci_remove_sysfs_dev_files - cleanup PCI specific sysfs files
 * @pdev: device whose entries we should free
 *
 * Cleanup when @pdev is removed from sysfs.
 */
void pci_remove_sysfs_dev_files(struct pci_dev *pdev)
{
	if (pdev->cfg_size < 4096)
		sysfs_remove_bin_file(&pdev->dev.kobj, &pci_config_attr);
	else
		sysfs_remove_bin_file(&pdev->dev.kobj, &pcie_config_attr);

	pci_remove_resource_files(pdev);

	if (pci_resource_len(pdev, PCI_ROM_RESOURCE)) {
		if (pdev->rom_attr) {
			sysfs_remove_bin_file(&pdev->dev.kobj, pdev->rom_attr);
			kfree(pdev->rom_attr);
		}
	}
}

static int __init pci_sysfs_init(void)
{
	struct pci_dev *pdev = NULL;
	
	sysfs_initialized = 1;
	for_each_pci_dev(pdev)
		pci_create_sysfs_dev_files(pdev);

	return 0;
}

__initcall(pci_sysfs_init);
Commit	Line	Data
1da177e4 LT	1	/*
	2	* drivers/pci/pci-sysfs.c
	3	*
	4	* (C) Copyright 2002-2004 Greg Kroah-Hartman <greg@kroah.com>
	5	* (C) Copyright 2002-2004 IBM Corp.
	6	* (C) Copyright 2003 Matthew Wilcox
	7	* (C) Copyright 2003 Hewlett-Packard
	8	* (C) Copyright 2004 Jon Smirl <jonsmirl@yahoo.com>
	9	* (C) Copyright 2004 Silicon Graphics, Inc. Jesse Barnes <jbarnes@sgi.com>
	10	*
	11	* File attributes for PCI devices
	12	*
	13	* Modeled after usb's driverfs.c
	14	*
	15	*/
	16
	17
	18	#include <linux/config.h>
	19	#include <linux/kernel.h>
	20	#include <linux/pci.h>
	21	#include <linux/stat.h>
	22	#include <linux/topology.h>
	23	#include <linux/mm.h>
	24
	25	#include "pci.h"
	26
	27	static int sysfs_initialized; /* = 0 */
	28
	29	/* show configuration fields */
	30	#define pci_config_attr(field, format_string) \
	31	static ssize_t \
e404e274	32	field##_show(struct device dev, struct device_attribute attr, char *buf) \
1da177e4 LT	33	{ \
	34	struct pci_dev *pdev; \
	35	\
	36	pdev = to_pci_dev (dev); \
	37	return sprintf (buf, format_string, pdev->field); \
	38	}
	39
	40	pci_config_attr(vendor, "0x%04x\n");
	41	pci_config_attr(device, "0x%04x\n");
	42	pci_config_attr(subsystem_vendor, "0x%04x\n");
	43	pci_config_attr(subsystem_device, "0x%04x\n");
	44	pci_config_attr(class, "0x%06x\n");
	45	pci_config_attr(irq, "%u\n");
	46
e404e274	47	static ssize_t local_cpus_show(struct device dev, struct device_attribute attr, char *buf)
1da177e4 LT	48	{
	49	cpumask_t mask = pcibus_to_cpumask(to_pci_dev(dev)->bus);
	50	int len = cpumask_scnprintf(buf, PAGE_SIZE-2, mask);
	51	strcat(buf,"\n");
	52	return 1+len;
	53	}
	54
	55	/* show resources */
	56	static ssize_t
e404e274	57	resource_show(struct device * dev, struct device_attribute attr, char buf)
1da177e4 LT	58	{
	59	struct pci_dev * pci_dev = to_pci_dev(dev);
	60	char * str = buf;
	61	int i;
	62	int max = 7;
2311b1f2	63	u64 start, end;
1da177e4 LT	64
	65	if (pci_dev->subordinate)
	66	max = DEVICE_COUNT_RESOURCE;
	67
	68	for (i = 0; i < max; i++) {
2311b1f2 ME	69	struct resource *res = &pci_dev->resource[i];
	70	pci_resource_to_user(pci_dev, i, res, &start, &end);
	71	str += sprintf(str,"0x%016llx 0x%016llx 0x%016llx\n",
	72	(unsigned long long)start,
	73	(unsigned long long)end,
	74	(unsigned long long)res->flags);
1da177e4 LT	75	}
	76	return (str - buf);
	77	}
	78
87c8a443	79	static ssize_t modalias_show(struct device dev, struct device_attribute attr, char *buf)
9888549e GK	80	{
	81	struct pci_dev *pci_dev = to_pci_dev(dev);
	82
	83	return sprintf(buf, "pci:v%08Xd%08Xsv%08Xsd%08Xbc%02Xsc%02Xi%02x\n",
	84	pci_dev->vendor, pci_dev->device,
	85	pci_dev->subsystem_vendor, pci_dev->subsystem_device,
	86	(u8)(pci_dev->class >> 16), (u8)(pci_dev->class >> 8),
	87	(u8)(pci_dev->class));
	88	}
	89
1da177e4 LT	90	struct device_attribute pci_dev_attrs[] = {
	91	__ATTR_RO(resource),
	92	__ATTR_RO(vendor),
	93	__ATTR_RO(device),
	94	__ATTR_RO(subsystem_vendor),
	95	__ATTR_RO(subsystem_device),
	96	__ATTR_RO(class),
	97	__ATTR_RO(irq),
	98	__ATTR_RO(local_cpus),
9888549e	99	__ATTR_RO(modalias),
1da177e4 LT	100	__ATTR_NULL,
	101	};
	102
	103	static ssize_t
	104	pci_read_config(struct kobject kobj, char buf, loff_t off, size_t count)
	105	{
	106	struct pci_dev *dev = to_pci_dev(container_of(kobj,struct device,kobj));
	107	unsigned int size = 64;
	108	loff_t init_off = off;
4c0619ad	109	u8 data = (u8) buf;
1da177e4 LT	110
	111	/* Several chips lock up trying to read undefined config space */
	112	if (capable(CAP_SYS_ADMIN)) {
	113	size = dev->cfg_size;
	114	} else if (dev->hdr_type == PCI_HEADER_TYPE_CARDBUS) {
	115	size = 128;
	116	}
	117
	118	if (off > size)
	119	return 0;
	120	if (off + count > size) {
	121	size -= off;
	122	count = size;
	123	} else {
	124	size = count;
	125	}
	126
4c0619ad	127	if ((off & 1) && size) {
4c0619ad	128	u8 val;
1da177e4	129	pci_read_config_byte(dev, off, &val);
4c0619ad	130	data[off - init_off] = val;
1da177e4	131	off++;
4c0619ad	132	size--;
	133	}
	134
	135	if ((off & 3) && size > 2) {
	136	u16 val;
	137	pci_read_config_word(dev, off, &val);
	138	data[off - init_off] = val & 0xff;
	139	data[off - init_off + 1] = (val >> 8) & 0xff;
	140	off += 2;
	141	size -= 2;
1da177e4 LT	142	}
	143
	144	while (size > 3) {
4c0619ad	145	u32 val;
1da177e4	146	pci_read_config_dword(dev, off, &val);
4c0619ad	147	data[off - init_off] = val & 0xff;
	148	data[off - init_off + 1] = (val >> 8) & 0xff;
	149	data[off - init_off + 2] = (val >> 16) & 0xff;
	150	data[off - init_off + 3] = (val >> 24) & 0xff;
1da177e4 LT	151	off += 4;
	152	size -= 4;
	153	}
	154
4c0619ad	155	if (size >= 2) {
	156	u16 val;
	157	pci_read_config_word(dev, off, &val);
	158	data[off - init_off] = val & 0xff;
	159	data[off - init_off + 1] = (val >> 8) & 0xff;
	160	off += 2;
	161	size -= 2;
	162	}
	163
	164	if (size > 0) {
	165	u8 val;
1da177e4	166	pci_read_config_byte(dev, off, &val);
4c0619ad	167	data[off - init_off] = val;
1da177e4 LT	168	off++;
	169	--size;
	170	}
	171
	172	return count;
	173	}
	174
	175	static ssize_t
	176	pci_write_config(struct kobject kobj, char buf, loff_t off, size_t count)
	177	{
	178	struct pci_dev *dev = to_pci_dev(container_of(kobj,struct device,kobj));
	179	unsigned int size = count;
	180	loff_t init_off = off;
4c0619ad	181	u8 data = (u8) buf;
1da177e4 LT	182
	183	if (off > dev->cfg_size)
	184	return 0;
	185	if (off + count > dev->cfg_size) {
	186	size = dev->cfg_size - off;
	187	count = size;
	188	}
4c0619ad	189
	190	if ((off & 1) && size) {
	191	pci_write_config_byte(dev, off, data[off - init_off]);
1da177e4	192	off++;
4c0619ad	193	size--;
1da177e4	194	}
4c0619ad	195
	196	if ((off & 3) && size > 2) {
	197	u16 val = data[off - init_off];
	198	val \|= (u16) data[off - init_off + 1] << 8;
	199	pci_write_config_word(dev, off, val);
	200	off += 2;
	201	size -= 2;
	202	}
1da177e4 LT	203
1da177e4 LT	204	while (size > 3) {
4c0619ad	205	u32 val = data[off - init_off];
	206	val \|= (u32) data[off - init_off + 1] << 8;
	207	val \|= (u32) data[off - init_off + 2] << 16;
	208	val \|= (u32) data[off - init_off + 3] << 24;
1da177e4 LT	209	pci_write_config_dword(dev, off, val);
	210	off += 4;
	211	size -= 4;
	212	}
4c0619ad	213
	214	if (size >= 2) {
	215	u16 val = data[off - init_off];
	216	val \|= (u16) data[off - init_off + 1] << 8;
	217	pci_write_config_word(dev, off, val);
	218	off += 2;
	219	size -= 2;
	220	}
1da177e4	221
4c0619ad	222	if (size) {
4c0619ad	223	pci_write_config_byte(dev, off, data[off - init_off]);
1da177e4 LT	224	off++;
	225	--size;
	226	}
	227
	228	return count;
	229	}
	230
	231	#ifdef HAVE_PCI_LEGACY
	232	/**
	233	* pci_read_legacy_io - read byte(s) from legacy I/O port space
	234	* @kobj: kobject corresponding to file to read from
	235	* @buf: buffer to store results
	236	* @off: offset into legacy I/O port space
	237	* @count: number of bytes to read
	238	*
	239	* Reads 1, 2, or 4 bytes from legacy I/O port space using an arch specific
	240	* callback routine (pci_legacy_read).
	241	*/
	242	ssize_t
	243	pci_read_legacy_io(struct kobject kobj, char buf, loff_t off, size_t count)
	244	{
	245	struct pci_bus *bus = to_pci_bus(container_of(kobj,
	246	struct class_device,
	247	kobj));
	248
	249	/* Only support 1, 2 or 4 byte accesses */
	250	if (count != 1 && count != 2 && count != 4)
	251	return -EINVAL;
	252
	253	return pci_legacy_read(bus, off, (u32 *)buf, count);
	254	}
	255
	256	/**
	257	* pci_write_legacy_io - write byte(s) to legacy I/O port space
	258	* @kobj: kobject corresponding to file to read from
	259	* @buf: buffer containing value to be written
	260	* @off: offset into legacy I/O port space
	261	* @count: number of bytes to write
	262	*
	263	* Writes 1, 2, or 4 bytes from legacy I/O port space using an arch specific
	264	* callback routine (pci_legacy_write).
	265	*/
	266	ssize_t
	267	pci_write_legacy_io(struct kobject kobj, char buf, loff_t off, size_t count)
	268	{
	269	struct pci_bus *bus = to_pci_bus(container_of(kobj,
	270	struct class_device,
	271	kobj));
	272	/* Only support 1, 2 or 4 byte accesses */
	273	if (count != 1 && count != 2 && count != 4)
	274	return -EINVAL;
	275
	276	return pci_legacy_write(bus, off, (u32 )buf, count);
	277	}
	278
	279	/**
	280	* pci_mmap_legacy_mem - map legacy PCI memory into user memory space
	281	* @kobj: kobject corresponding to device to be mapped
	282	* @attr: struct bin_attribute for this file
	283	* @vma: struct vm_area_struct passed to mmap
	284	*
	285	* Uses an arch specific callback, pci_mmap_legacy_page_range, to mmap
	286	* legacy memory space (first meg of bus space) into application virtual
	287	* memory space.
288	*/
289	int
290	pci_mmap_legacy_mem(struct kobject kobj, struct bin_attribute attr,
291	struct vm_area_struct *vma)
292	{
293	struct pci_bus *bus = to_pci_bus(container_of(kobj,
294	struct class_device,
295	kobj));
296
297	return pci_mmap_legacy_page_range(bus, vma);
298	}
299	#endif /* HAVE_PCI_LEGACY */
300
301	#ifdef HAVE_PCI_MMAP
302	/**
303	* pci_mmap_resource - map a PCI resource into user memory space
304	* @kobj: kobject for mapping
305	* @attr: struct bin_attribute for the file being mapped
306	* @vma: struct vm_area_struct passed into the mmap
307	*
308	* Use the regular PCI mapping routines to map a PCI resource into userspace.
309	* FIXME: write combining? maybe automatic for prefetchable regions?
310	*/
311	static int
312	pci_mmap_resource(struct kobject kobj, struct bin_attribute attr,
313	struct vm_area_struct *vma)
314	{
315	struct pci_dev *pdev = to_pci_dev(container_of(kobj,
316	struct device, kobj));
317	struct resource res = (struct resource )attr->private;
318	enum pci_mmap_state mmap_type;
2311b1f2 ME	319	u64 start, end;
2311b1f2 ME	320	int i;
1da177e4	321
2311b1f2 ME	322	for (i = 0; i < PCI_ROM_RESOURCE; i++)
	323	if (res == &pdev->resource[i])
	324	break;
	325	if (i >= PCI_ROM_RESOURCE)
	326	return -ENODEV;
	327
	328	/* pci_mmap_page_range() expects the same kind of entry as coming
	329	* from /proc/bus/pci/ which is a "user visible" value. If this is
	330	* different from the resource itself, arch will do necessary fixup.
	331	*/
	332	pci_resource_to_user(pdev, i, res, &start, &end);
	333	vma->vm_pgoff += start >> PAGE_SHIFT;
1da177e4 LT	334	mmap_type = res->flags & IORESOURCE_MEM ? pci_mmap_mem : pci_mmap_io;
	335
	336	return pci_mmap_page_range(pdev, vma, mmap_type, 0);
	337	}
	338
	339	/**
	340	* pci_create_resource_files - create resource files in sysfs for @dev
	341	* @dev: dev in question
	342	*
	343	* Walk the resources in @dev creating files for each resource available.
	344	*/
	345	static void
	346	pci_create_resource_files(struct pci_dev *pdev)
	347	{
	348	int i;
	349
	350	/* Expose the PCI resources from this device as files */
	351	for (i = 0; i < PCI_ROM_RESOURCE; i++) {
	352	struct bin_attribute *res_attr;
	353
	354	/* skip empty resources */
	355	if (!pci_resource_len(pdev, i))
	356	continue;
	357
d48593bf DT	358	/* allocate attribute structure, piggyback attribute name */
d48593bf DT	359	res_attr = kcalloc(1, sizeof(*res_attr) + 10, GFP_ATOMIC);
1da177e4	360	if (res_attr) {
d48593bf DT	361	char res_attr_name = (char )(res_attr + 1);
d48593bf DT	362
1da177e4	363	pdev->res_attr[i] = res_attr;
d48593bf DT	364	sprintf(res_attr_name, "resource%d", i);
d48593bf DT	365	res_attr->attr.name = res_attr_name;
1da177e4 LT	366	res_attr->attr.mode = S_IRUSR \| S_IWUSR;
1da177e4 LT	367	res_attr->attr.owner = THIS_MODULE;
d48593bf	368	res_attr->size = pci_resource_len(pdev, i);
1da177e4 LT	369	res_attr->mmap = pci_mmap_resource;
	370	res_attr->private = &pdev->resource[i];
	371	sysfs_create_bin_file(&pdev->dev.kobj, res_attr);
	372	}
	373	}
	374	}
	375
	376	/**
	377	* pci_remove_resource_files - cleanup resource files
	378	* @dev: dev to cleanup
	379	*
	380	* If we created resource files for @dev, remove them from sysfs and
	381	* free their resources.
	382	*/
	383	static void
	384	pci_remove_resource_files(struct pci_dev *pdev)
	385	{
	386	int i;
	387
	388	for (i = 0; i < PCI_ROM_RESOURCE; i++) {
	389	struct bin_attribute *res_attr;
	390
	391	res_attr = pdev->res_attr[i];
	392	if (res_attr) {
	393	sysfs_remove_bin_file(&pdev->dev.kobj, res_attr);
	394	kfree(res_attr);
	395	}
	396	}
	397	}
	398	#else /* !HAVE_PCI_MMAP */
	399	static inline void pci_create_resource_files(struct pci_dev *dev) { return; }
	400	static inline void pci_remove_resource_files(struct pci_dev *dev) { return; }
	401	#endif /* HAVE_PCI_MMAP */
	402
	403	/**
	404	* pci_write_rom - used to enable access to the PCI ROM display
	405	* @kobj: kernel object handle
	406	* @buf: user input
	407	* @off: file offset
	408	* @count: number of byte in input
	409	*
	410	* writing anything except 0 enables it
	411	*/
	412	static ssize_t
	413	pci_write_rom(struct kobject kobj, char buf, loff_t off, size_t count)
	414	{
	415	struct pci_dev *pdev = to_pci_dev(container_of(kobj, struct device, kobj));
	416
	417	if ((off == 0) && (*buf == '0') && (count == 2))
	418	pdev->rom_attr_enabled = 0;
	419	else
	420	pdev->rom_attr_enabled = 1;
	421
	422	return count;
	423	}
	424
	425	/**
	426	* pci_read_rom - read a PCI ROM
	427	* @kobj: kernel object handle
	428	* @buf: where to put the data we read from the ROM
	429	* @off: file offset
	430	* @count: number of bytes to read
	431	*
	432	* Put @count bytes starting at @off into @buf from the ROM in the PCI
433	* device corresponding to @kobj.
434	*/
435	static ssize_t
436	pci_read_rom(struct kobject kobj, char buf, loff_t off, size_t count)
437	{
438	struct pci_dev *pdev = to_pci_dev(container_of(kobj, struct device, kobj));
439	void __iomem *rom;
440	size_t size;
441
442	if (!pdev->rom_attr_enabled)
443	return -EINVAL;
444
445	rom = pci_map_rom(pdev, &size); /* size starts out as PCI window size */
446	if (!rom)
447	return 0;
448
449	if (off >= size)
450	count = 0;
451	else {
452	if (off + count > size)
453	count = size - off;
454
455	memcpy_fromio(buf, rom + off, count);
456	}
457	pci_unmap_rom(pdev, rom);
458
459	return count;
460	}
461
462	static struct bin_attribute pci_config_attr = {
463	.attr = {
464	.name = "config",
465	.mode = S_IRUGO \| S_IWUSR,
466	.owner = THIS_MODULE,
467	},
468	.size = 256,
469	.read = pci_read_config,
470	.write = pci_write_config,
471	};
472
473	static struct bin_attribute pcie_config_attr = {
474	.attr = {
475	.name = "config",
476	.mode = S_IRUGO \| S_IWUSR,
477	.owner = THIS_MODULE,
478	},
479	.size = 4096,
480	.read = pci_read_config,
481	.write = pci_write_config,
482	};
483
484	int pci_create_sysfs_dev_files (struct pci_dev *pdev)
485	{
486	if (!sysfs_initialized)
487	return -EACCES;
488
489	if (pdev->cfg_size < 4096)
490	sysfs_create_bin_file(&pdev->dev.kobj, &pci_config_attr);
491	else
492	sysfs_create_bin_file(&pdev->dev.kobj, &pcie_config_attr);
493
494	pci_create_resource_files(pdev);
495
496	/* If the device has a ROM, try to expose it in sysfs. */
497	if (pci_resource_len(pdev, PCI_ROM_RESOURCE)) {
498	struct bin_attribute *rom_attr;
499
500	rom_attr = kmalloc(sizeof(*rom_attr), GFP_ATOMIC);
501	if (rom_attr) {
502	memset(rom_attr, 0x00, sizeof(*rom_attr));
503	pdev->rom_attr = rom_attr;
504	rom_attr->size = pci_resource_len(pdev, PCI_ROM_RESOURCE);
505	rom_attr->attr.name = "rom";
506	rom_attr->attr.mode = S_IRUSR;
507	rom_attr->attr.owner = THIS_MODULE;
508	rom_attr->read = pci_read_rom;
509	rom_attr->write = pci_write_rom;
510	sysfs_create_bin_file(&pdev->dev.kobj, rom_attr);
511	}
512	}
513	/* add platform-specific attributes */
514	pcibios_add_platform_entries(pdev);
515
516	return 0;
517	}
518
519	/**
520	* pci_remove_sysfs_dev_files - cleanup PCI specific sysfs files
521	* @pdev: device whose entries we should free
522	*
523	* Cleanup when @pdev is removed from sysfs.
524	*/
525	void pci_remove_sysfs_dev_files(struct pci_dev *pdev)
526	{
527	if (pdev->cfg_size < 4096)
528	sysfs_remove_bin_file(&pdev->dev.kobj, &pci_config_attr);
529	else
530	sysfs_remove_bin_file(&pdev->dev.kobj, &pcie_config_attr);
531
532	pci_remove_resource_files(pdev);
533
534	if (pci_resource_len(pdev, PCI_ROM_RESOURCE)) {
535	if (pdev->rom_attr) {
536	sysfs_remove_bin_file(&pdev->dev.kobj, pdev->rom_attr);
537	kfree(pdev->rom_attr);
538	}
539	}
540	}
541
542	static int __init pci_sysfs_init(void)
543	{
544	struct pci_dev *pdev = NULL;
545
546	sysfs_initialized = 1;
547	for_each_pci_dev(pdev)
548	pci_create_sysfs_dev_files(pdev);
549
550	return 0;
551	}
552
553	__initcall(pci_sysfs_init);