PCI: add rescan to /sys/.../pci_bus/.../
[deliverable/linux.git] / drivers / pci / pci-sysfs.c
CommitLineData
1da177e4
LT
1/*
2 * drivers/pci/pci-sysfs.c
3 *
4 * (C) Copyright 2002-2004 Greg Kroah-Hartman <greg@kroah.com>
5 * (C) Copyright 2002-2004 IBM Corp.
6 * (C) Copyright 2003 Matthew Wilcox
7 * (C) Copyright 2003 Hewlett-Packard
8 * (C) Copyright 2004 Jon Smirl <jonsmirl@yahoo.com>
9 * (C) Copyright 2004 Silicon Graphics, Inc. Jesse Barnes <jbarnes@sgi.com>
10 *
11 * File attributes for PCI devices
12 *
13 * Modeled after usb's driverfs.c
14 *
15 */
16
17
1da177e4 18#include <linux/kernel.h>
b5ff7df3 19#include <linux/sched.h>
1da177e4
LT
20#include <linux/pci.h>
21#include <linux/stat.h>
22#include <linux/topology.h>
23#include <linux/mm.h>
de139a33 24#include <linux/fs.h>
aa0ac365 25#include <linux/capability.h>
a628e7b8 26#include <linux/security.h>
7d715a6c 27#include <linux/pci-aspm.h>
5a0e3ad6 28#include <linux/slab.h>
1da177e4
LT
29#include "pci.h"
30
31static int sysfs_initialized; /* = 0 */
32
33/* show configuration fields */
34#define pci_config_attr(field, format_string) \
35static ssize_t \
e404e274 36field##_show(struct device *dev, struct device_attribute *attr, char *buf) \
1da177e4
LT
37{ \
38 struct pci_dev *pdev; \
39 \
40 pdev = to_pci_dev (dev); \
41 return sprintf (buf, format_string, pdev->field); \
42}
43
44pci_config_attr(vendor, "0x%04x\n");
45pci_config_attr(device, "0x%04x\n");
46pci_config_attr(subsystem_vendor, "0x%04x\n");
47pci_config_attr(subsystem_device, "0x%04x\n");
48pci_config_attr(class, "0x%06x\n");
49pci_config_attr(irq, "%u\n");
50
bdee9d98
DT
51static ssize_t broken_parity_status_show(struct device *dev,
52 struct device_attribute *attr,
53 char *buf)
54{
55 struct pci_dev *pdev = to_pci_dev(dev);
56 return sprintf (buf, "%u\n", pdev->broken_parity_status);
57}
58
59static ssize_t broken_parity_status_store(struct device *dev,
60 struct device_attribute *attr,
61 const char *buf, size_t count)
62{
63 struct pci_dev *pdev = to_pci_dev(dev);
92425a40 64 unsigned long val;
bdee9d98 65
92425a40
TP
66 if (strict_strtoul(buf, 0, &val) < 0)
67 return -EINVAL;
68
69 pdev->broken_parity_status = !!val;
70
71 return count;
bdee9d98
DT
72}
73
4327edf6
AC
74static ssize_t local_cpus_show(struct device *dev,
75 struct device_attribute *attr, char *buf)
1da177e4 76{
3be83050 77 const struct cpumask *mask;
4327edf6
AC
78 int len;
79
e0cd5160 80#ifdef CONFIG_NUMA
6be954d1
DJ
81 mask = (dev_to_node(dev) == -1) ? cpu_online_mask :
82 cpumask_of_node(dev_to_node(dev));
e0cd5160 83#else
3be83050 84 mask = cpumask_of_pcibus(to_pci_dev(dev)->bus);
e0cd5160 85#endif
3be83050 86 len = cpumask_scnprintf(buf, PAGE_SIZE-2, mask);
39106dcf
MT
87 buf[len++] = '\n';
88 buf[len] = '\0';
89 return len;
90}
91
92
93static ssize_t local_cpulist_show(struct device *dev,
94 struct device_attribute *attr, char *buf)
95{
3be83050 96 const struct cpumask *mask;
39106dcf
MT
97 int len;
98
e0cd5160 99#ifdef CONFIG_NUMA
6be954d1
DJ
100 mask = (dev_to_node(dev) == -1) ? cpu_online_mask :
101 cpumask_of_node(dev_to_node(dev));
e0cd5160 102#else
3be83050 103 mask = cpumask_of_pcibus(to_pci_dev(dev)->bus);
e0cd5160 104#endif
3be83050 105 len = cpulist_scnprintf(buf, PAGE_SIZE-2, mask);
39106dcf
MT
106 buf[len++] = '\n';
107 buf[len] = '\0';
108 return len;
1da177e4
LT
109}
110
111/* show resources */
112static ssize_t
e404e274 113resource_show(struct device * dev, struct device_attribute *attr, char * buf)
1da177e4
LT
114{
115 struct pci_dev * pci_dev = to_pci_dev(dev);
116 char * str = buf;
117 int i;
fde09c6d 118 int max;
e31dd6e4 119 resource_size_t start, end;
1da177e4
LT
120
121 if (pci_dev->subordinate)
122 max = DEVICE_COUNT_RESOURCE;
fde09c6d
YZ
123 else
124 max = PCI_BRIDGE_RESOURCES;
1da177e4
LT
125
126 for (i = 0; i < max; i++) {
2311b1f2
ME
127 struct resource *res = &pci_dev->resource[i];
128 pci_resource_to_user(pci_dev, i, res, &start, &end);
129 str += sprintf(str,"0x%016llx 0x%016llx 0x%016llx\n",
130 (unsigned long long)start,
131 (unsigned long long)end,
132 (unsigned long long)res->flags);
1da177e4
LT
133 }
134 return (str - buf);
135}
136
87c8a443 137static ssize_t modalias_show(struct device *dev, struct device_attribute *attr, char *buf)
9888549e
GK
138{
139 struct pci_dev *pci_dev = to_pci_dev(dev);
140
141 return sprintf(buf, "pci:v%08Xd%08Xsv%08Xsd%08Xbc%02Xsc%02Xi%02x\n",
142 pci_dev->vendor, pci_dev->device,
143 pci_dev->subsystem_vendor, pci_dev->subsystem_device,
144 (u8)(pci_dev->class >> 16), (u8)(pci_dev->class >> 8),
145 (u8)(pci_dev->class));
146}
bae94d02
IPG
147
148static ssize_t is_enabled_store(struct device *dev,
149 struct device_attribute *attr, const char *buf,
150 size_t count)
9f125d30
AV
151{
152 struct pci_dev *pdev = to_pci_dev(dev);
92425a40
TP
153 unsigned long val;
154 ssize_t result = strict_strtoul(buf, 0, &val);
155
156 if (result < 0)
157 return result;
9f125d30
AV
158
159 /* this can crash the machine when done on the "wrong" device */
160 if (!capable(CAP_SYS_ADMIN))
92425a40 161 return -EPERM;
9f125d30 162
92425a40 163 if (!val) {
296ccb08 164 if (pci_is_enabled(pdev))
bae94d02
IPG
165 pci_disable_device(pdev);
166 else
167 result = -EIO;
92425a40 168 } else
bae94d02 169 result = pci_enable_device(pdev);
9f125d30 170
bae94d02
IPG
171 return result < 0 ? result : count;
172}
173
174static ssize_t is_enabled_show(struct device *dev,
175 struct device_attribute *attr, char *buf)
176{
177 struct pci_dev *pdev;
9f125d30 178
bae94d02
IPG
179 pdev = to_pci_dev (dev);
180 return sprintf (buf, "%u\n", atomic_read(&pdev->enable_cnt));
9f125d30
AV
181}
182
81bb0e19
BG
183#ifdef CONFIG_NUMA
184static ssize_t
185numa_node_show(struct device *dev, struct device_attribute *attr, char *buf)
186{
187 return sprintf (buf, "%d\n", dev->numa_node);
188}
189#endif
190
bb965401
YL
191static ssize_t
192dma_mask_bits_show(struct device *dev, struct device_attribute *attr, char *buf)
193{
194 struct pci_dev *pdev = to_pci_dev(dev);
195
196 return sprintf (buf, "%d\n", fls64(pdev->dma_mask));
197}
198
199static ssize_t
200consistent_dma_mask_bits_show(struct device *dev, struct device_attribute *attr,
201 char *buf)
202{
203 return sprintf (buf, "%d\n", fls64(dev->coherent_dma_mask));
204}
205
fe97064c
BG
206static ssize_t
207msi_bus_show(struct device *dev, struct device_attribute *attr, char *buf)
208{
209 struct pci_dev *pdev = to_pci_dev(dev);
210
211 if (!pdev->subordinate)
212 return 0;
213
214 return sprintf (buf, "%u\n",
215 !(pdev->subordinate->bus_flags & PCI_BUS_FLAGS_NO_MSI));
216}
217
218static ssize_t
219msi_bus_store(struct device *dev, struct device_attribute *attr,
220 const char *buf, size_t count)
221{
222 struct pci_dev *pdev = to_pci_dev(dev);
92425a40
TP
223 unsigned long val;
224
225 if (strict_strtoul(buf, 0, &val) < 0)
226 return -EINVAL;
fe97064c
BG
227
228 /* bad things may happen if the no_msi flag is changed
229 * while some drivers are loaded */
230 if (!capable(CAP_SYS_ADMIN))
92425a40 231 return -EPERM;
fe97064c 232
92425a40
TP
233 /* Maybe pci devices without subordinate busses shouldn't even have this
234 * attribute in the first place? */
fe97064c
BG
235 if (!pdev->subordinate)
236 return count;
237
92425a40
TP
238 /* Is the flag going to change, or keep the value it already had? */
239 if (!(pdev->subordinate->bus_flags & PCI_BUS_FLAGS_NO_MSI) ^
240 !!val) {
241 pdev->subordinate->bus_flags ^= PCI_BUS_FLAGS_NO_MSI;
fe97064c 242
92425a40
TP
243 dev_warn(&pdev->dev, "forced subordinate bus to%s support MSI,"
244 " bad things could happen\n", val ? "" : " not");
fe97064c
BG
245 }
246
247 return count;
248}
9888549e 249
705b1aaa
AC
250#ifdef CONFIG_HOTPLUG
251static DEFINE_MUTEX(pci_remove_rescan_mutex);
252static ssize_t bus_rescan_store(struct bus_type *bus, const char *buf,
253 size_t count)
254{
255 unsigned long val;
256 struct pci_bus *b = NULL;
257
258 if (strict_strtoul(buf, 0, &val) < 0)
259 return -EINVAL;
260
261 if (val) {
262 mutex_lock(&pci_remove_rescan_mutex);
263 while ((b = pci_find_next_bus(b)) != NULL)
264 pci_rescan_bus(b);
265 mutex_unlock(&pci_remove_rescan_mutex);
266 }
267 return count;
268}
269
270struct bus_attribute pci_bus_attrs[] = {
271 __ATTR(rescan, (S_IWUSR|S_IWGRP), NULL, bus_rescan_store),
272 __ATTR_NULL
273};
77c27c7b 274
738a6396
AC
275static ssize_t
276dev_rescan_store(struct device *dev, struct device_attribute *attr,
277 const char *buf, size_t count)
278{
279 unsigned long val;
280 struct pci_dev *pdev = to_pci_dev(dev);
281
282 if (strict_strtoul(buf, 0, &val) < 0)
283 return -EINVAL;
284
285 if (val) {
286 mutex_lock(&pci_remove_rescan_mutex);
287 pci_rescan_bus(pdev->bus);
288 mutex_unlock(&pci_remove_rescan_mutex);
289 }
290 return count;
291}
292
77c27c7b
AC
293static void remove_callback(struct device *dev)
294{
295 struct pci_dev *pdev = to_pci_dev(dev);
296
297 mutex_lock(&pci_remove_rescan_mutex);
298 pci_remove_bus_device(pdev);
299 mutex_unlock(&pci_remove_rescan_mutex);
300}
301
302static ssize_t
303remove_store(struct device *dev, struct device_attribute *dummy,
304 const char *buf, size_t count)
305{
306 int ret = 0;
307 unsigned long val;
77c27c7b
AC
308
309 if (strict_strtoul(buf, 0, &val) < 0)
310 return -EINVAL;
311
77c27c7b
AC
312 /* An attribute cannot be unregistered by one of its own methods,
313 * so we have to use this roundabout approach.
314 */
315 if (val)
316 ret = device_schedule_callback(dev, remove_callback);
317 if (ret)
318 count = ret;
319 return count;
320}
b9d320fc
YL
321
322static ssize_t
323dev_bus_rescan_store(struct device *dev, struct device_attribute *attr,
324 const char *buf, size_t count)
325{
326 unsigned long val;
327 struct pci_bus *bus = to_pci_bus(dev);
328
329 if (strict_strtoul(buf, 0, &val) < 0)
330 return -EINVAL;
331
332 if (val) {
333 mutex_lock(&pci_remove_rescan_mutex);
334 pci_rescan_bus(bus);
335 mutex_unlock(&pci_remove_rescan_mutex);
336 }
337 return count;
338}
339
705b1aaa
AC
340#endif
341
1da177e4
LT
342struct device_attribute pci_dev_attrs[] = {
343 __ATTR_RO(resource),
344 __ATTR_RO(vendor),
345 __ATTR_RO(device),
346 __ATTR_RO(subsystem_vendor),
347 __ATTR_RO(subsystem_device),
348 __ATTR_RO(class),
349 __ATTR_RO(irq),
350 __ATTR_RO(local_cpus),
39106dcf 351 __ATTR_RO(local_cpulist),
9888549e 352 __ATTR_RO(modalias),
81bb0e19
BG
353#ifdef CONFIG_NUMA
354 __ATTR_RO(numa_node),
355#endif
bb965401
YL
356 __ATTR_RO(dma_mask_bits),
357 __ATTR_RO(consistent_dma_mask_bits),
9f125d30 358 __ATTR(enable, 0600, is_enabled_show, is_enabled_store),
bdee9d98
DT
359 __ATTR(broken_parity_status,(S_IRUGO|S_IWUSR),
360 broken_parity_status_show,broken_parity_status_store),
fe97064c 361 __ATTR(msi_bus, 0644, msi_bus_show, msi_bus_store),
77c27c7b
AC
362#ifdef CONFIG_HOTPLUG
363 __ATTR(remove, (S_IWUSR|S_IWGRP), NULL, remove_store),
738a6396 364 __ATTR(rescan, (S_IWUSR|S_IWGRP), NULL, dev_rescan_store),
77c27c7b 365#endif
1da177e4
LT
366 __ATTR_NULL,
367};
368
b9d320fc
YL
369struct device_attribute pcibus_dev_attrs[] = {
370#ifdef CONFIG_HOTPLUG
371 __ATTR(rescan, (S_IWUSR|S_IWGRP), NULL, dev_bus_rescan_store),
372#endif
373 __ATTR_NULL,
374};
375
217f45de
DA
376static ssize_t
377boot_vga_show(struct device *dev, struct device_attribute *attr, char *buf)
378{
379 struct pci_dev *pdev = to_pci_dev(dev);
380
381 return sprintf(buf, "%u\n",
382 !!(pdev->resource[PCI_ROM_RESOURCE].flags &
383 IORESOURCE_ROM_SHADOW));
384}
385struct device_attribute vga_attr = __ATTR_RO(boot_vga);
386
1da177e4 387static ssize_t
2c3c8bea
CW
388pci_read_config(struct file *filp, struct kobject *kobj,
389 struct bin_attribute *bin_attr,
91a69029 390 char *buf, loff_t off, size_t count)
1da177e4
LT
391{
392 struct pci_dev *dev = to_pci_dev(container_of(kobj,struct device,kobj));
393 unsigned int size = 64;
394 loff_t init_off = off;
4c0619ad 395 u8 *data = (u8*) buf;
1da177e4
LT
396
397 /* Several chips lock up trying to read undefined config space */
3486740a 398 if (security_capable(&init_user_ns, filp->f_cred, CAP_SYS_ADMIN) == 0) {
1da177e4
LT
399 size = dev->cfg_size;
400 } else if (dev->hdr_type == PCI_HEADER_TYPE_CARDBUS) {
401 size = 128;
402 }
403
404 if (off > size)
405 return 0;
406 if (off + count > size) {
407 size -= off;
408 count = size;
409 } else {
410 size = count;
411 }
412
4c0619ad 413 if ((off & 1) && size) {
414 u8 val;
e04b0ea2 415 pci_user_read_config_byte(dev, off, &val);
4c0619ad 416 data[off - init_off] = val;
1da177e4 417 off++;
4c0619ad 418 size--;
419 }
420
421 if ((off & 3) && size > 2) {
422 u16 val;
e04b0ea2 423 pci_user_read_config_word(dev, off, &val);
4c0619ad 424 data[off - init_off] = val & 0xff;
425 data[off - init_off + 1] = (val >> 8) & 0xff;
426 off += 2;
427 size -= 2;
1da177e4
LT
428 }
429
430 while (size > 3) {
4c0619ad 431 u32 val;
e04b0ea2 432 pci_user_read_config_dword(dev, off, &val);
4c0619ad 433 data[off - init_off] = val & 0xff;
434 data[off - init_off + 1] = (val >> 8) & 0xff;
435 data[off - init_off + 2] = (val >> 16) & 0xff;
436 data[off - init_off + 3] = (val >> 24) & 0xff;
1da177e4
LT
437 off += 4;
438 size -= 4;
439 }
440
4c0619ad 441 if (size >= 2) {
442 u16 val;
e04b0ea2 443 pci_user_read_config_word(dev, off, &val);
4c0619ad 444 data[off - init_off] = val & 0xff;
445 data[off - init_off + 1] = (val >> 8) & 0xff;
446 off += 2;
447 size -= 2;
448 }
449
450 if (size > 0) {
451 u8 val;
e04b0ea2 452 pci_user_read_config_byte(dev, off, &val);
4c0619ad 453 data[off - init_off] = val;
1da177e4
LT
454 off++;
455 --size;
456 }
457
458 return count;
459}
460
461static ssize_t
2c3c8bea
CW
462pci_write_config(struct file* filp, struct kobject *kobj,
463 struct bin_attribute *bin_attr,
91a69029 464 char *buf, loff_t off, size_t count)
1da177e4
LT
465{
466 struct pci_dev *dev = to_pci_dev(container_of(kobj,struct device,kobj));
467 unsigned int size = count;
468 loff_t init_off = off;
4c0619ad 469 u8 *data = (u8*) buf;
1da177e4
LT
470
471 if (off > dev->cfg_size)
472 return 0;
473 if (off + count > dev->cfg_size) {
474 size = dev->cfg_size - off;
475 count = size;
476 }
4c0619ad 477
478 if ((off & 1) && size) {
e04b0ea2 479 pci_user_write_config_byte(dev, off, data[off - init_off]);
1da177e4 480 off++;
4c0619ad 481 size--;
1da177e4 482 }
4c0619ad 483
484 if ((off & 3) && size > 2) {
485 u16 val = data[off - init_off];
486 val |= (u16) data[off - init_off + 1] << 8;
e04b0ea2 487 pci_user_write_config_word(dev, off, val);
4c0619ad 488 off += 2;
489 size -= 2;
490 }
1da177e4
LT
491
492 while (size > 3) {
4c0619ad 493 u32 val = data[off - init_off];
494 val |= (u32) data[off - init_off + 1] << 8;
495 val |= (u32) data[off - init_off + 2] << 16;
496 val |= (u32) data[off - init_off + 3] << 24;
e04b0ea2 497 pci_user_write_config_dword(dev, off, val);
1da177e4
LT
498 off += 4;
499 size -= 4;
500 }
4c0619ad 501
502 if (size >= 2) {
503 u16 val = data[off - init_off];
504 val |= (u16) data[off - init_off + 1] << 8;
e04b0ea2 505 pci_user_write_config_word(dev, off, val);
4c0619ad 506 off += 2;
507 size -= 2;
508 }
1da177e4 509
4c0619ad 510 if (size) {
e04b0ea2 511 pci_user_write_config_byte(dev, off, data[off - init_off]);
1da177e4
LT
512 off++;
513 --size;
514 }
515
516 return count;
517}
518
94e61088 519static ssize_t
2c3c8bea
CW
520read_vpd_attr(struct file *filp, struct kobject *kobj,
521 struct bin_attribute *bin_attr,
287d19ce 522 char *buf, loff_t off, size_t count)
94e61088
BH
523{
524 struct pci_dev *dev =
525 to_pci_dev(container_of(kobj, struct device, kobj));
94e61088
BH
526
527 if (off > bin_attr->size)
528 count = 0;
529 else if (count > bin_attr->size - off)
530 count = bin_attr->size - off;
94e61088 531
287d19ce 532 return pci_read_vpd(dev, off, count, buf);
94e61088
BH
533}
534
535static ssize_t
2c3c8bea
CW
536write_vpd_attr(struct file *filp, struct kobject *kobj,
537 struct bin_attribute *bin_attr,
287d19ce 538 char *buf, loff_t off, size_t count)
94e61088
BH
539{
540 struct pci_dev *dev =
541 to_pci_dev(container_of(kobj, struct device, kobj));
94e61088
BH
542
543 if (off > bin_attr->size)
544 count = 0;
545 else if (count > bin_attr->size - off)
546 count = bin_attr->size - off;
94e61088 547
287d19ce 548 return pci_write_vpd(dev, off, count, buf);
94e61088
BH
549}
550
1da177e4
LT
551#ifdef HAVE_PCI_LEGACY
552/**
553 * pci_read_legacy_io - read byte(s) from legacy I/O port space
2c3c8bea 554 * @filp: open sysfs file
1da177e4 555 * @kobj: kobject corresponding to file to read from
cffb2faf 556 * @bin_attr: struct bin_attribute for this file
1da177e4
LT
557 * @buf: buffer to store results
558 * @off: offset into legacy I/O port space
559 * @count: number of bytes to read
560 *
561 * Reads 1, 2, or 4 bytes from legacy I/O port space using an arch specific
562 * callback routine (pci_legacy_read).
563 */
f19aeb1f 564static ssize_t
2c3c8bea
CW
565pci_read_legacy_io(struct file *filp, struct kobject *kobj,
566 struct bin_attribute *bin_attr,
91a69029 567 char *buf, loff_t off, size_t count)
1da177e4
LT
568{
569 struct pci_bus *bus = to_pci_bus(container_of(kobj,
fd7d1ced 570 struct device,
1da177e4
LT
571 kobj));
572
573 /* Only support 1, 2 or 4 byte accesses */
574 if (count != 1 && count != 2 && count != 4)
575 return -EINVAL;
576
577 return pci_legacy_read(bus, off, (u32 *)buf, count);
578}
579
580/**
581 * pci_write_legacy_io - write byte(s) to legacy I/O port space
2c3c8bea 582 * @filp: open sysfs file
1da177e4 583 * @kobj: kobject corresponding to file to read from
cffb2faf 584 * @bin_attr: struct bin_attribute for this file
1da177e4
LT
585 * @buf: buffer containing value to be written
586 * @off: offset into legacy I/O port space
587 * @count: number of bytes to write
588 *
589 * Writes 1, 2, or 4 bytes from legacy I/O port space using an arch specific
590 * callback routine (pci_legacy_write).
591 */
f19aeb1f 592static ssize_t
2c3c8bea
CW
593pci_write_legacy_io(struct file *filp, struct kobject *kobj,
594 struct bin_attribute *bin_attr,
91a69029 595 char *buf, loff_t off, size_t count)
1da177e4
LT
596{
597 struct pci_bus *bus = to_pci_bus(container_of(kobj,
fd7d1ced 598 struct device,
1da177e4
LT
599 kobj));
600 /* Only support 1, 2 or 4 byte accesses */
601 if (count != 1 && count != 2 && count != 4)
602 return -EINVAL;
603
604 return pci_legacy_write(bus, off, *(u32 *)buf, count);
605}
606
607/**
608 * pci_mmap_legacy_mem - map legacy PCI memory into user memory space
2c3c8bea 609 * @filp: open sysfs file
1da177e4
LT
610 * @kobj: kobject corresponding to device to be mapped
611 * @attr: struct bin_attribute for this file
612 * @vma: struct vm_area_struct passed to mmap
613 *
f19aeb1f 614 * Uses an arch specific callback, pci_mmap_legacy_mem_page_range, to mmap
1da177e4
LT
615 * legacy memory space (first meg of bus space) into application virtual
616 * memory space.
617 */
f19aeb1f 618static int
2c3c8bea
CW
619pci_mmap_legacy_mem(struct file *filp, struct kobject *kobj,
620 struct bin_attribute *attr,
1da177e4
LT
621 struct vm_area_struct *vma)
622{
623 struct pci_bus *bus = to_pci_bus(container_of(kobj,
fd7d1ced 624 struct device,
1da177e4
LT
625 kobj));
626
f19aeb1f
BH
627 return pci_mmap_legacy_page_range(bus, vma, pci_mmap_mem);
628}
629
630/**
631 * pci_mmap_legacy_io - map legacy PCI IO into user memory space
2c3c8bea 632 * @filp: open sysfs file
f19aeb1f
BH
633 * @kobj: kobject corresponding to device to be mapped
634 * @attr: struct bin_attribute for this file
635 * @vma: struct vm_area_struct passed to mmap
636 *
637 * Uses an arch specific callback, pci_mmap_legacy_io_page_range, to mmap
638 * legacy IO space (first meg of bus space) into application virtual
639 * memory space. Returns -ENOSYS if the operation isn't supported
640 */
641static int
2c3c8bea
CW
642pci_mmap_legacy_io(struct file *filp, struct kobject *kobj,
643 struct bin_attribute *attr,
f19aeb1f
BH
644 struct vm_area_struct *vma)
645{
646 struct pci_bus *bus = to_pci_bus(container_of(kobj,
647 struct device,
648 kobj));
649
650 return pci_mmap_legacy_page_range(bus, vma, pci_mmap_io);
651}
652
10a0ef39
IK
653/**
654 * pci_adjust_legacy_attr - adjustment of legacy file attributes
655 * @b: bus to create files under
656 * @mmap_type: I/O port or memory
657 *
658 * Stub implementation. Can be overridden by arch if necessary.
659 */
660void __weak
661pci_adjust_legacy_attr(struct pci_bus *b, enum pci_mmap_state mmap_type)
662{
663 return;
664}
665
f19aeb1f
BH
666/**
667 * pci_create_legacy_files - create legacy I/O port and memory files
668 * @b: bus to create files under
669 *
670 * Some platforms allow access to legacy I/O port and ISA memory space on
671 * a per-bus basis. This routine creates the files and ties them into
672 * their associated read, write and mmap files from pci-sysfs.c
673 *
25985edc 674 * On error unwind, but don't propagate the error to the caller
f19aeb1f
BH
675 * as it is ok to set up the PCI bus without these files.
676 */
677void pci_create_legacy_files(struct pci_bus *b)
678{
679 int error;
680
681 b->legacy_io = kzalloc(sizeof(struct bin_attribute) * 2,
682 GFP_ATOMIC);
683 if (!b->legacy_io)
684 goto kzalloc_err;
685
62e877b8 686 sysfs_bin_attr_init(b->legacy_io);
f19aeb1f
BH
687 b->legacy_io->attr.name = "legacy_io";
688 b->legacy_io->size = 0xffff;
689 b->legacy_io->attr.mode = S_IRUSR | S_IWUSR;
690 b->legacy_io->read = pci_read_legacy_io;
691 b->legacy_io->write = pci_write_legacy_io;
692 b->legacy_io->mmap = pci_mmap_legacy_io;
10a0ef39 693 pci_adjust_legacy_attr(b, pci_mmap_io);
f19aeb1f
BH
694 error = device_create_bin_file(&b->dev, b->legacy_io);
695 if (error)
696 goto legacy_io_err;
697
698 /* Allocated above after the legacy_io struct */
699 b->legacy_mem = b->legacy_io + 1;
6757eca3 700 sysfs_bin_attr_init(b->legacy_mem);
f19aeb1f
BH
701 b->legacy_mem->attr.name = "legacy_mem";
702 b->legacy_mem->size = 1024*1024;
703 b->legacy_mem->attr.mode = S_IRUSR | S_IWUSR;
704 b->legacy_mem->mmap = pci_mmap_legacy_mem;
10a0ef39 705 pci_adjust_legacy_attr(b, pci_mmap_mem);
f19aeb1f
BH
706 error = device_create_bin_file(&b->dev, b->legacy_mem);
707 if (error)
708 goto legacy_mem_err;
709
710 return;
711
712legacy_mem_err:
713 device_remove_bin_file(&b->dev, b->legacy_io);
714legacy_io_err:
715 kfree(b->legacy_io);
716 b->legacy_io = NULL;
717kzalloc_err:
718 printk(KERN_WARNING "pci: warning: could not create legacy I/O port "
719 "and ISA memory resources to sysfs\n");
720 return;
721}
722
723void pci_remove_legacy_files(struct pci_bus *b)
724{
725 if (b->legacy_io) {
726 device_remove_bin_file(&b->dev, b->legacy_io);
727 device_remove_bin_file(&b->dev, b->legacy_mem);
728 kfree(b->legacy_io); /* both are allocated here */
729 }
1da177e4
LT
730}
731#endif /* HAVE_PCI_LEGACY */
732
733#ifdef HAVE_PCI_MMAP
b5ff7df3 734
3b519e4e
MW
735int pci_mmap_fits(struct pci_dev *pdev, int resno, struct vm_area_struct *vma,
736 enum pci_mmap_api mmap_api)
b5ff7df3 737{
3b519e4e 738 unsigned long nr, start, size, pci_start;
b5ff7df3 739
3b519e4e
MW
740 if (pci_resource_len(pdev, resno) == 0)
741 return 0;
b5ff7df3
LT
742 nr = (vma->vm_end - vma->vm_start) >> PAGE_SHIFT;
743 start = vma->vm_pgoff;
88e7df0b 744 size = ((pci_resource_len(pdev, resno) - 1) >> PAGE_SHIFT) + 1;
8c05cd08 745 pci_start = (mmap_api == PCI_MMAP_PROCFS) ?
3b519e4e
MW
746 pci_resource_start(pdev, resno) >> PAGE_SHIFT : 0;
747 if (start >= pci_start && start < pci_start + size &&
748 start + nr <= pci_start + size)
b5ff7df3 749 return 1;
b5ff7df3
LT
750 return 0;
751}
752
1da177e4
LT
753/**
754 * pci_mmap_resource - map a PCI resource into user memory space
755 * @kobj: kobject for mapping
756 * @attr: struct bin_attribute for the file being mapped
757 * @vma: struct vm_area_struct passed into the mmap
45aec1ae 758 * @write_combine: 1 for write_combine mapping
1da177e4
LT
759 *
760 * Use the regular PCI mapping routines to map a PCI resource into userspace.
1da177e4
LT
761 */
762static int
763pci_mmap_resource(struct kobject *kobj, struct bin_attribute *attr,
45aec1ae 764 struct vm_area_struct *vma, int write_combine)
1da177e4
LT
765{
766 struct pci_dev *pdev = to_pci_dev(container_of(kobj,
767 struct device, kobj));
a3f5835a 768 struct resource *res = attr->private;
1da177e4 769 enum pci_mmap_state mmap_type;
e31dd6e4 770 resource_size_t start, end;
2311b1f2 771 int i;
1da177e4 772
2311b1f2
ME
773 for (i = 0; i < PCI_ROM_RESOURCE; i++)
774 if (res == &pdev->resource[i])
775 break;
776 if (i >= PCI_ROM_RESOURCE)
777 return -ENODEV;
778
3b519e4e
MW
779 if (!pci_mmap_fits(pdev, i, vma, PCI_MMAP_SYSFS)) {
780 WARN(1, "process \"%s\" tried to map 0x%08lx bytes "
781 "at page 0x%08lx on %s BAR %d (start 0x%16Lx, size 0x%16Lx)\n",
782 current->comm, vma->vm_end-vma->vm_start, vma->vm_pgoff,
783 pci_name(pdev), i,
e25cd062
RD
784 (u64)pci_resource_start(pdev, i),
785 (u64)pci_resource_len(pdev, i));
b5ff7df3 786 return -EINVAL;
3b519e4e 787 }
b5ff7df3 788
2311b1f2
ME
789 /* pci_mmap_page_range() expects the same kind of entry as coming
790 * from /proc/bus/pci/ which is a "user visible" value. If this is
791 * different from the resource itself, arch will do necessary fixup.
792 */
793 pci_resource_to_user(pdev, i, res, &start, &end);
794 vma->vm_pgoff += start >> PAGE_SHIFT;
1da177e4
LT
795 mmap_type = res->flags & IORESOURCE_MEM ? pci_mmap_mem : pci_mmap_io;
796
e8de1481
AV
797 if (res->flags & IORESOURCE_MEM && iomem_is_exclusive(start))
798 return -EINVAL;
799
45aec1ae 800 return pci_mmap_page_range(pdev, vma, mmap_type, write_combine);
801}
802
803static int
2c3c8bea
CW
804pci_mmap_resource_uc(struct file *filp, struct kobject *kobj,
805 struct bin_attribute *attr,
45aec1ae 806 struct vm_area_struct *vma)
807{
808 return pci_mmap_resource(kobj, attr, vma, 0);
809}
810
811static int
2c3c8bea
CW
812pci_mmap_resource_wc(struct file *filp, struct kobject *kobj,
813 struct bin_attribute *attr,
45aec1ae 814 struct vm_area_struct *vma)
815{
816 return pci_mmap_resource(kobj, attr, vma, 1);
1da177e4
LT
817}
818
8633328b
AW
819static ssize_t
820pci_resource_io(struct file *filp, struct kobject *kobj,
821 struct bin_attribute *attr, char *buf,
822 loff_t off, size_t count, bool write)
823{
824 struct pci_dev *pdev = to_pci_dev(container_of(kobj,
825 struct device, kobj));
826 struct resource *res = attr->private;
827 unsigned long port = off;
828 int i;
829
830 for (i = 0; i < PCI_ROM_RESOURCE; i++)
831 if (res == &pdev->resource[i])
832 break;
833 if (i >= PCI_ROM_RESOURCE)
834 return -ENODEV;
835
836 port += pci_resource_start(pdev, i);
837
838 if (port > pci_resource_end(pdev, i))
839 return 0;
840
841 if (port + count - 1 > pci_resource_end(pdev, i))
842 return -EINVAL;
843
844 switch (count) {
845 case 1:
846 if (write)
847 outb(*(u8 *)buf, port);
848 else
849 *(u8 *)buf = inb(port);
850 return 1;
851 case 2:
852 if (write)
853 outw(*(u16 *)buf, port);
854 else
855 *(u16 *)buf = inw(port);
856 return 2;
857 case 4:
858 if (write)
859 outl(*(u32 *)buf, port);
860 else
861 *(u32 *)buf = inl(port);
862 return 4;
863 }
864 return -EINVAL;
865}
866
867static ssize_t
868pci_read_resource_io(struct file *filp, struct kobject *kobj,
869 struct bin_attribute *attr, char *buf,
870 loff_t off, size_t count)
871{
872 return pci_resource_io(filp, kobj, attr, buf, off, count, false);
873}
874
875static ssize_t
876pci_write_resource_io(struct file *filp, struct kobject *kobj,
877 struct bin_attribute *attr, char *buf,
878 loff_t off, size_t count)
879{
880 return pci_resource_io(filp, kobj, attr, buf, off, count, true);
881}
882
b19441af
GKH
883/**
884 * pci_remove_resource_files - cleanup resource files
cffb2faf 885 * @pdev: dev to cleanup
b19441af 886 *
cffb2faf 887 * If we created resource files for @pdev, remove them from sysfs and
b19441af
GKH
888 * free their resources.
889 */
890static void
891pci_remove_resource_files(struct pci_dev *pdev)
892{
893 int i;
894
895 for (i = 0; i < PCI_ROM_RESOURCE; i++) {
896 struct bin_attribute *res_attr;
897
898 res_attr = pdev->res_attr[i];
899 if (res_attr) {
900 sysfs_remove_bin_file(&pdev->dev.kobj, res_attr);
901 kfree(res_attr);
902 }
45aec1ae 903
904 res_attr = pdev->res_attr_wc[i];
905 if (res_attr) {
906 sysfs_remove_bin_file(&pdev->dev.kobj, res_attr);
907 kfree(res_attr);
908 }
b19441af
GKH
909 }
910}
911
45aec1ae 912static int pci_create_attr(struct pci_dev *pdev, int num, int write_combine)
913{
914 /* allocate attribute structure, piggyback attribute name */
915 int name_len = write_combine ? 13 : 10;
916 struct bin_attribute *res_attr;
917 int retval;
918
919 res_attr = kzalloc(sizeof(*res_attr) + name_len, GFP_ATOMIC);
920 if (res_attr) {
921 char *res_attr_name = (char *)(res_attr + 1);
922
a07e4156 923 sysfs_bin_attr_init(res_attr);
45aec1ae 924 if (write_combine) {
925 pdev->res_attr_wc[num] = res_attr;
926 sprintf(res_attr_name, "resource%d_wc", num);
927 res_attr->mmap = pci_mmap_resource_wc;
928 } else {
929 pdev->res_attr[num] = res_attr;
930 sprintf(res_attr_name, "resource%d", num);
931 res_attr->mmap = pci_mmap_resource_uc;
932 }
8633328b
AW
933 if (pci_resource_flags(pdev, num) & IORESOURCE_IO) {
934 res_attr->read = pci_read_resource_io;
935 res_attr->write = pci_write_resource_io;
936 }
45aec1ae 937 res_attr->attr.name = res_attr_name;
938 res_attr->attr.mode = S_IRUSR | S_IWUSR;
939 res_attr->size = pci_resource_len(pdev, num);
940 res_attr->private = &pdev->resource[num];
941 retval = sysfs_create_bin_file(&pdev->dev.kobj, res_attr);
942 } else
943 retval = -ENOMEM;
944
945 return retval;
946}
947
1da177e4
LT
948/**
949 * pci_create_resource_files - create resource files in sysfs for @dev
cffb2faf 950 * @pdev: dev in question
1da177e4 951 *
cffb2faf 952 * Walk the resources in @pdev creating files for each resource available.
1da177e4 953 */
b19441af 954static int pci_create_resource_files(struct pci_dev *pdev)
1da177e4
LT
955{
956 int i;
b19441af 957 int retval;
1da177e4
LT
958
959 /* Expose the PCI resources from this device as files */
960 for (i = 0; i < PCI_ROM_RESOURCE; i++) {
1da177e4
LT
961
962 /* skip empty resources */
963 if (!pci_resource_len(pdev, i))
964 continue;
965
45aec1ae 966 retval = pci_create_attr(pdev, i, 0);
967 /* for prefetchable resources, create a WC mappable file */
968 if (!retval && pdev->resource[i].flags & IORESOURCE_PREFETCH)
969 retval = pci_create_attr(pdev, i, 1);
970
971 if (retval) {
972 pci_remove_resource_files(pdev);
973 return retval;
1da177e4
LT
974 }
975 }
b19441af 976 return 0;
1da177e4
LT
977}
978#else /* !HAVE_PCI_MMAP */
10a0ef39
IK
979int __weak pci_create_resource_files(struct pci_dev *dev) { return 0; }
980void __weak pci_remove_resource_files(struct pci_dev *dev) { return; }
1da177e4
LT
981#endif /* HAVE_PCI_MMAP */
982
983/**
984 * pci_write_rom - used to enable access to the PCI ROM display
2c3c8bea 985 * @filp: sysfs file
1da177e4 986 * @kobj: kernel object handle
cffb2faf 987 * @bin_attr: struct bin_attribute for this file
1da177e4
LT
988 * @buf: user input
989 * @off: file offset
990 * @count: number of byte in input
991 *
992 * writing anything except 0 enables it
993 */
994static ssize_t
2c3c8bea
CW
995pci_write_rom(struct file *filp, struct kobject *kobj,
996 struct bin_attribute *bin_attr,
91a69029 997 char *buf, loff_t off, size_t count)
1da177e4
LT
998{
999 struct pci_dev *pdev = to_pci_dev(container_of(kobj, struct device, kobj));
1000
1001 if ((off == 0) && (*buf == '0') && (count == 2))
1002 pdev->rom_attr_enabled = 0;
1003 else
1004 pdev->rom_attr_enabled = 1;
1005
1006 return count;
1007}
1008
1009/**
1010 * pci_read_rom - read a PCI ROM
2c3c8bea 1011 * @filp: sysfs file
1da177e4 1012 * @kobj: kernel object handle
cffb2faf 1013 * @bin_attr: struct bin_attribute for this file
1da177e4
LT
1014 * @buf: where to put the data we read from the ROM
1015 * @off: file offset
1016 * @count: number of bytes to read
1017 *
1018 * Put @count bytes starting at @off into @buf from the ROM in the PCI
1019 * device corresponding to @kobj.
1020 */
1021static ssize_t
2c3c8bea
CW
1022pci_read_rom(struct file *filp, struct kobject *kobj,
1023 struct bin_attribute *bin_attr,
91a69029 1024 char *buf, loff_t off, size_t count)
1da177e4
LT
1025{
1026 struct pci_dev *pdev = to_pci_dev(container_of(kobj, struct device, kobj));
1027 void __iomem *rom;
1028 size_t size;
1029
1030 if (!pdev->rom_attr_enabled)
1031 return -EINVAL;
1032
1033 rom = pci_map_rom(pdev, &size); /* size starts out as PCI window size */
97c44836
TN
1034 if (!rom || !size)
1035 return -EIO;
1da177e4
LT
1036
1037 if (off >= size)
1038 count = 0;
1039 else {
1040 if (off + count > size)
1041 count = size - off;
1042
1043 memcpy_fromio(buf, rom + off, count);
1044 }
1045 pci_unmap_rom(pdev, rom);
1046
1047 return count;
1048}
1049
1050static struct bin_attribute pci_config_attr = {
1051 .attr = {
1052 .name = "config",
1053 .mode = S_IRUGO | S_IWUSR,
1da177e4 1054 },
557848c3 1055 .size = PCI_CFG_SPACE_SIZE,
1da177e4
LT
1056 .read = pci_read_config,
1057 .write = pci_write_config,
1058};
1059
1060static struct bin_attribute pcie_config_attr = {
1061 .attr = {
1062 .name = "config",
1063 .mode = S_IRUGO | S_IWUSR,
1da177e4 1064 },
557848c3 1065 .size = PCI_CFG_SPACE_EXP_SIZE,
1da177e4
LT
1066 .read = pci_read_config,
1067 .write = pci_write_config,
1068};
1069
a2cd52ca 1070int __attribute__ ((weak)) pcibios_add_platform_entries(struct pci_dev *dev)
575e3348 1071{
a2cd52ca 1072 return 0;
575e3348
ME
1073}
1074
711d5779
MT
1075static ssize_t reset_store(struct device *dev,
1076 struct device_attribute *attr, const char *buf,
1077 size_t count)
1078{
1079 struct pci_dev *pdev = to_pci_dev(dev);
1080 unsigned long val;
1081 ssize_t result = strict_strtoul(buf, 0, &val);
1082
1083 if (result < 0)
1084 return result;
1085
1086 if (val != 1)
1087 return -EINVAL;
447c5dd7
MS
1088
1089 result = pci_reset_function(pdev);
1090 if (result < 0)
1091 return result;
1092
1093 return count;
711d5779
MT
1094}
1095
1096static struct device_attribute reset_attr = __ATTR(reset, 0200, NULL, reset_store);
1097
280c73d3
ZY
1098static int pci_create_capabilities_sysfs(struct pci_dev *dev)
1099{
1100 int retval;
1101 struct bin_attribute *attr;
1102
1103 /* If the device has VPD, try to expose it in sysfs. */
1104 if (dev->vpd) {
1105 attr = kzalloc(sizeof(*attr), GFP_ATOMIC);
1106 if (!attr)
1107 return -ENOMEM;
1108
a07e4156 1109 sysfs_bin_attr_init(attr);
280c73d3
ZY
1110 attr->size = dev->vpd->len;
1111 attr->attr.name = "vpd";
1112 attr->attr.mode = S_IRUSR | S_IWUSR;
287d19ce
SH
1113 attr->read = read_vpd_attr;
1114 attr->write = write_vpd_attr;
280c73d3
ZY
1115 retval = sysfs_create_bin_file(&dev->dev.kobj, attr);
1116 if (retval) {
0f12a4e2 1117 kfree(attr);
280c73d3
ZY
1118 return retval;
1119 }
1120 dev->vpd->attr = attr;
1121 }
1122
1123 /* Active State Power Management */
1124 pcie_aspm_create_sysfs_dev_files(dev);
1125
711d5779
MT
1126 if (!pci_probe_reset_function(dev)) {
1127 retval = device_create_file(&dev->dev, &reset_attr);
1128 if (retval)
1129 goto error;
1130 dev->reset_fn = 1;
1131 }
280c73d3 1132 return 0;
711d5779
MT
1133
1134error:
1135 pcie_aspm_remove_sysfs_dev_files(dev);
1136 if (dev->vpd && dev->vpd->attr) {
1137 sysfs_remove_bin_file(&dev->dev.kobj, dev->vpd->attr);
1138 kfree(dev->vpd->attr);
1139 }
1140
1141 return retval;
280c73d3
ZY
1142}
1143
b19441af 1144int __must_check pci_create_sysfs_dev_files (struct pci_dev *pdev)
1da177e4 1145{
b19441af 1146 int retval;
280c73d3
ZY
1147 int rom_size = 0;
1148 struct bin_attribute *attr;
b19441af 1149
1da177e4
LT
1150 if (!sysfs_initialized)
1151 return -EACCES;
1152
557848c3 1153 if (pdev->cfg_size < PCI_CFG_SPACE_EXP_SIZE)
b19441af 1154 retval = sysfs_create_bin_file(&pdev->dev.kobj, &pci_config_attr);
1da177e4 1155 else
b19441af
GKH
1156 retval = sysfs_create_bin_file(&pdev->dev.kobj, &pcie_config_attr);
1157 if (retval)
1158 goto err;
1da177e4 1159
b19441af
GKH
1160 retval = pci_create_resource_files(pdev);
1161 if (retval)
280c73d3
ZY
1162 goto err_config_file;
1163
1164 if (pci_resource_len(pdev, PCI_ROM_RESOURCE))
1165 rom_size = pci_resource_len(pdev, PCI_ROM_RESOURCE);
1166 else if (pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW)
1167 rom_size = 0x20000;
1da177e4
LT
1168
1169 /* If the device has a ROM, try to expose it in sysfs. */
280c73d3 1170 if (rom_size) {
94e61088 1171 attr = kzalloc(sizeof(*attr), GFP_ATOMIC);
280c73d3 1172 if (!attr) {
b19441af 1173 retval = -ENOMEM;
9890b12a 1174 goto err_resource_files;
1da177e4 1175 }
a07e4156 1176 sysfs_bin_attr_init(attr);
280c73d3
ZY
1177 attr->size = rom_size;
1178 attr->attr.name = "rom";
ff29530e 1179 attr->attr.mode = S_IRUSR | S_IWUSR;
280c73d3
ZY
1180 attr->read = pci_read_rom;
1181 attr->write = pci_write_rom;
1182 retval = sysfs_create_bin_file(&pdev->dev.kobj, attr);
1183 if (retval) {
1184 kfree(attr);
1185 goto err_resource_files;
1186 }
1187 pdev->rom_attr = attr;
1da177e4 1188 }
280c73d3 1189
217f45de
DA
1190 if ((pdev->class >> 8) == PCI_CLASS_DISPLAY_VGA) {
1191 retval = device_create_file(&pdev->dev, &vga_attr);
1192 if (retval)
1193 goto err_rom_file;
1194 }
1195
1da177e4 1196 /* add platform-specific attributes */
280c73d3
ZY
1197 retval = pcibios_add_platform_entries(pdev);
1198 if (retval)
217f45de 1199 goto err_vga_file;
b19441af 1200
280c73d3
ZY
1201 /* add sysfs entries for various capabilities */
1202 retval = pci_create_capabilities_sysfs(pdev);
1203 if (retval)
217f45de 1204 goto err_vga_file;
7d715a6c 1205
911e1c9b
N
1206 pci_create_firmware_label_files(pdev);
1207
1da177e4 1208 return 0;
b19441af 1209
217f45de
DA
1210err_vga_file:
1211 if ((pdev->class >> 8) == PCI_CLASS_DISPLAY_VGA)
1212 device_remove_file(&pdev->dev, &vga_attr);
a2cd52ca 1213err_rom_file:
280c73d3 1214 if (rom_size) {
94e61088 1215 sysfs_remove_bin_file(&pdev->dev.kobj, pdev->rom_attr);
280c73d3
ZY
1216 kfree(pdev->rom_attr);
1217 pdev->rom_attr = NULL;
1218 }
9890b12a
ME
1219err_resource_files:
1220 pci_remove_resource_files(pdev);
94e61088 1221err_config_file:
557848c3 1222 if (pdev->cfg_size < PCI_CFG_SPACE_EXP_SIZE)
b19441af
GKH
1223 sysfs_remove_bin_file(&pdev->dev.kobj, &pci_config_attr);
1224 else
1225 sysfs_remove_bin_file(&pdev->dev.kobj, &pcie_config_attr);
1226err:
1227 return retval;
1da177e4
LT
1228}
1229
280c73d3
ZY
1230static void pci_remove_capabilities_sysfs(struct pci_dev *dev)
1231{
1232 if (dev->vpd && dev->vpd->attr) {
1233 sysfs_remove_bin_file(&dev->dev.kobj, dev->vpd->attr);
1234 kfree(dev->vpd->attr);
1235 }
1236
1237 pcie_aspm_remove_sysfs_dev_files(dev);
711d5779
MT
1238 if (dev->reset_fn) {
1239 device_remove_file(&dev->dev, &reset_attr);
1240 dev->reset_fn = 0;
1241 }
280c73d3
ZY
1242}
1243
1da177e4
LT
1244/**
1245 * pci_remove_sysfs_dev_files - cleanup PCI specific sysfs files
1246 * @pdev: device whose entries we should free
1247 *
1248 * Cleanup when @pdev is removed from sysfs.
1249 */
1250void pci_remove_sysfs_dev_files(struct pci_dev *pdev)
1251{
280c73d3
ZY
1252 int rom_size = 0;
1253
d67afe5e
DM
1254 if (!sysfs_initialized)
1255 return;
1256
280c73d3 1257 pci_remove_capabilities_sysfs(pdev);
7d715a6c 1258
557848c3 1259 if (pdev->cfg_size < PCI_CFG_SPACE_EXP_SIZE)
1da177e4
LT
1260 sysfs_remove_bin_file(&pdev->dev.kobj, &pci_config_attr);
1261 else
1262 sysfs_remove_bin_file(&pdev->dev.kobj, &pcie_config_attr);
1263
1264 pci_remove_resource_files(pdev);
1265
280c73d3
ZY
1266 if (pci_resource_len(pdev, PCI_ROM_RESOURCE))
1267 rom_size = pci_resource_len(pdev, PCI_ROM_RESOURCE);
1268 else if (pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW)
1269 rom_size = 0x20000;
1270
1271 if (rom_size && pdev->rom_attr) {
1272 sysfs_remove_bin_file(&pdev->dev.kobj, pdev->rom_attr);
1273 kfree(pdev->rom_attr);
1da177e4 1274 }
911e1c9b
N
1275
1276 pci_remove_firmware_label_files(pdev);
1277
1da177e4
LT
1278}
1279
1280static int __init pci_sysfs_init(void)
1281{
1282 struct pci_dev *pdev = NULL;
b19441af
GKH
1283 int retval;
1284
1da177e4 1285 sysfs_initialized = 1;
b19441af
GKH
1286 for_each_pci_dev(pdev) {
1287 retval = pci_create_sysfs_dev_files(pdev);
151fc5df
JL
1288 if (retval) {
1289 pci_dev_put(pdev);
b19441af 1290 return retval;
151fc5df 1291 }
b19441af 1292 }
1da177e4
LT
1293
1294 return 0;
1295}
1296
40ee9e9f 1297late_initcall(pci_sysfs_init);
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