PCI: Provide method to reduce the number of total VFs supported
[deliverable/linux.git] / drivers / pci / pci-sysfs.c
CommitLineData
1da177e4
LT
1/*
2 * drivers/pci/pci-sysfs.c
3 *
4 * (C) Copyright 2002-2004 Greg Kroah-Hartman <greg@kroah.com>
5 * (C) Copyright 2002-2004 IBM Corp.
6 * (C) Copyright 2003 Matthew Wilcox
7 * (C) Copyright 2003 Hewlett-Packard
8 * (C) Copyright 2004 Jon Smirl <jonsmirl@yahoo.com>
9 * (C) Copyright 2004 Silicon Graphics, Inc. Jesse Barnes <jbarnes@sgi.com>
10 *
11 * File attributes for PCI devices
12 *
13 * Modeled after usb's driverfs.c
14 *
15 */
16
17
1da177e4 18#include <linux/kernel.h>
b5ff7df3 19#include <linux/sched.h>
1da177e4
LT
20#include <linux/pci.h>
21#include <linux/stat.h>
363c75db 22#include <linux/export.h>
1da177e4
LT
23#include <linux/topology.h>
24#include <linux/mm.h>
de139a33 25#include <linux/fs.h>
aa0ac365 26#include <linux/capability.h>
a628e7b8 27#include <linux/security.h>
7d715a6c 28#include <linux/pci-aspm.h>
5a0e3ad6 29#include <linux/slab.h>
1a39b310 30#include <linux/vgaarb.h>
448bd857 31#include <linux/pm_runtime.h>
1da177e4
LT
32#include "pci.h"
33
34static int sysfs_initialized; /* = 0 */
35
36/* show configuration fields */
37#define pci_config_attr(field, format_string) \
38static ssize_t \
e404e274 39field##_show(struct device *dev, struct device_attribute *attr, char *buf) \
1da177e4
LT
40{ \
41 struct pci_dev *pdev; \
42 \
43 pdev = to_pci_dev (dev); \
44 return sprintf (buf, format_string, pdev->field); \
45}
46
47pci_config_attr(vendor, "0x%04x\n");
48pci_config_attr(device, "0x%04x\n");
49pci_config_attr(subsystem_vendor, "0x%04x\n");
50pci_config_attr(subsystem_device, "0x%04x\n");
51pci_config_attr(class, "0x%06x\n");
52pci_config_attr(irq, "%u\n");
53
bdee9d98
DT
54static ssize_t broken_parity_status_show(struct device *dev,
55 struct device_attribute *attr,
56 char *buf)
57{
58 struct pci_dev *pdev = to_pci_dev(dev);
59 return sprintf (buf, "%u\n", pdev->broken_parity_status);
60}
61
62static ssize_t broken_parity_status_store(struct device *dev,
63 struct device_attribute *attr,
64 const char *buf, size_t count)
65{
66 struct pci_dev *pdev = to_pci_dev(dev);
92425a40 67 unsigned long val;
bdee9d98 68
92425a40
TP
69 if (strict_strtoul(buf, 0, &val) < 0)
70 return -EINVAL;
71
72 pdev->broken_parity_status = !!val;
73
74 return count;
bdee9d98
DT
75}
76
4327edf6
AC
77static ssize_t local_cpus_show(struct device *dev,
78 struct device_attribute *attr, char *buf)
1da177e4 79{
3be83050 80 const struct cpumask *mask;
4327edf6
AC
81 int len;
82
e0cd5160 83#ifdef CONFIG_NUMA
6be954d1
DJ
84 mask = (dev_to_node(dev) == -1) ? cpu_online_mask :
85 cpumask_of_node(dev_to_node(dev));
e0cd5160 86#else
3be83050 87 mask = cpumask_of_pcibus(to_pci_dev(dev)->bus);
e0cd5160 88#endif
3be83050 89 len = cpumask_scnprintf(buf, PAGE_SIZE-2, mask);
39106dcf
MT
90 buf[len++] = '\n';
91 buf[len] = '\0';
92 return len;
93}
94
95
96static ssize_t local_cpulist_show(struct device *dev,
97 struct device_attribute *attr, char *buf)
98{
3be83050 99 const struct cpumask *mask;
39106dcf
MT
100 int len;
101
e0cd5160 102#ifdef CONFIG_NUMA
6be954d1
DJ
103 mask = (dev_to_node(dev) == -1) ? cpu_online_mask :
104 cpumask_of_node(dev_to_node(dev));
e0cd5160 105#else
3be83050 106 mask = cpumask_of_pcibus(to_pci_dev(dev)->bus);
e0cd5160 107#endif
3be83050 108 len = cpulist_scnprintf(buf, PAGE_SIZE-2, mask);
39106dcf
MT
109 buf[len++] = '\n';
110 buf[len] = '\0';
111 return len;
1da177e4
LT
112}
113
dc2c2c9d
YL
114/*
115 * PCI Bus Class Devices
116 */
117static ssize_t pci_bus_show_cpuaffinity(struct device *dev,
118 int type,
119 struct device_attribute *attr,
120 char *buf)
121{
122 int ret;
123 const struct cpumask *cpumask;
124
125 cpumask = cpumask_of_pcibus(to_pci_bus(dev));
126 ret = type ?
127 cpulist_scnprintf(buf, PAGE_SIZE-2, cpumask) :
128 cpumask_scnprintf(buf, PAGE_SIZE-2, cpumask);
129 buf[ret++] = '\n';
130 buf[ret] = '\0';
131 return ret;
132}
133
134static inline ssize_t pci_bus_show_cpumaskaffinity(struct device *dev,
135 struct device_attribute *attr,
136 char *buf)
137{
138 return pci_bus_show_cpuaffinity(dev, 0, attr, buf);
139}
140
141static inline ssize_t pci_bus_show_cpulistaffinity(struct device *dev,
142 struct device_attribute *attr,
143 char *buf)
144{
145 return pci_bus_show_cpuaffinity(dev, 1, attr, buf);
146}
147
1da177e4
LT
148/* show resources */
149static ssize_t
e404e274 150resource_show(struct device * dev, struct device_attribute *attr, char * buf)
1da177e4
LT
151{
152 struct pci_dev * pci_dev = to_pci_dev(dev);
153 char * str = buf;
154 int i;
fde09c6d 155 int max;
e31dd6e4 156 resource_size_t start, end;
1da177e4
LT
157
158 if (pci_dev->subordinate)
159 max = DEVICE_COUNT_RESOURCE;
fde09c6d
YZ
160 else
161 max = PCI_BRIDGE_RESOURCES;
1da177e4
LT
162
163 for (i = 0; i < max; i++) {
2311b1f2
ME
164 struct resource *res = &pci_dev->resource[i];
165 pci_resource_to_user(pci_dev, i, res, &start, &end);
166 str += sprintf(str,"0x%016llx 0x%016llx 0x%016llx\n",
167 (unsigned long long)start,
168 (unsigned long long)end,
169 (unsigned long long)res->flags);
1da177e4
LT
170 }
171 return (str - buf);
172}
173
87c8a443 174static ssize_t modalias_show(struct device *dev, struct device_attribute *attr, char *buf)
9888549e
GK
175{
176 struct pci_dev *pci_dev = to_pci_dev(dev);
177
178 return sprintf(buf, "pci:v%08Xd%08Xsv%08Xsd%08Xbc%02Xsc%02Xi%02x\n",
179 pci_dev->vendor, pci_dev->device,
180 pci_dev->subsystem_vendor, pci_dev->subsystem_device,
181 (u8)(pci_dev->class >> 16), (u8)(pci_dev->class >> 8),
182 (u8)(pci_dev->class));
183}
bae94d02
IPG
184
185static ssize_t is_enabled_store(struct device *dev,
186 struct device_attribute *attr, const char *buf,
187 size_t count)
9f125d30
AV
188{
189 struct pci_dev *pdev = to_pci_dev(dev);
92425a40
TP
190 unsigned long val;
191 ssize_t result = strict_strtoul(buf, 0, &val);
192
193 if (result < 0)
194 return result;
9f125d30
AV
195
196 /* this can crash the machine when done on the "wrong" device */
197 if (!capable(CAP_SYS_ADMIN))
92425a40 198 return -EPERM;
9f125d30 199
92425a40 200 if (!val) {
296ccb08 201 if (pci_is_enabled(pdev))
bae94d02
IPG
202 pci_disable_device(pdev);
203 else
204 result = -EIO;
92425a40 205 } else
bae94d02 206 result = pci_enable_device(pdev);
9f125d30 207
bae94d02
IPG
208 return result < 0 ? result : count;
209}
210
211static ssize_t is_enabled_show(struct device *dev,
212 struct device_attribute *attr, char *buf)
213{
214 struct pci_dev *pdev;
9f125d30 215
bae94d02
IPG
216 pdev = to_pci_dev (dev);
217 return sprintf (buf, "%u\n", atomic_read(&pdev->enable_cnt));
9f125d30
AV
218}
219
81bb0e19
BG
220#ifdef CONFIG_NUMA
221static ssize_t
222numa_node_show(struct device *dev, struct device_attribute *attr, char *buf)
223{
224 return sprintf (buf, "%d\n", dev->numa_node);
225}
226#endif
227
bb965401
YL
228static ssize_t
229dma_mask_bits_show(struct device *dev, struct device_attribute *attr, char *buf)
230{
231 struct pci_dev *pdev = to_pci_dev(dev);
232
233 return sprintf (buf, "%d\n", fls64(pdev->dma_mask));
234}
235
236static ssize_t
237consistent_dma_mask_bits_show(struct device *dev, struct device_attribute *attr,
238 char *buf)
239{
240 return sprintf (buf, "%d\n", fls64(dev->coherent_dma_mask));
241}
242
fe97064c
BG
243static ssize_t
244msi_bus_show(struct device *dev, struct device_attribute *attr, char *buf)
245{
246 struct pci_dev *pdev = to_pci_dev(dev);
247
248 if (!pdev->subordinate)
249 return 0;
250
251 return sprintf (buf, "%u\n",
252 !(pdev->subordinate->bus_flags & PCI_BUS_FLAGS_NO_MSI));
253}
254
255static ssize_t
256msi_bus_store(struct device *dev, struct device_attribute *attr,
257 const char *buf, size_t count)
258{
259 struct pci_dev *pdev = to_pci_dev(dev);
92425a40
TP
260 unsigned long val;
261
262 if (strict_strtoul(buf, 0, &val) < 0)
263 return -EINVAL;
fe97064c
BG
264
265 /* bad things may happen if the no_msi flag is changed
266 * while some drivers are loaded */
267 if (!capable(CAP_SYS_ADMIN))
92425a40 268 return -EPERM;
fe97064c 269
92425a40
TP
270 /* Maybe pci devices without subordinate busses shouldn't even have this
271 * attribute in the first place? */
fe97064c
BG
272 if (!pdev->subordinate)
273 return count;
274
92425a40
TP
275 /* Is the flag going to change, or keep the value it already had? */
276 if (!(pdev->subordinate->bus_flags & PCI_BUS_FLAGS_NO_MSI) ^
277 !!val) {
278 pdev->subordinate->bus_flags ^= PCI_BUS_FLAGS_NO_MSI;
fe97064c 279
92425a40
TP
280 dev_warn(&pdev->dev, "forced subordinate bus to%s support MSI,"
281 " bad things could happen\n", val ? "" : " not");
fe97064c
BG
282 }
283
284 return count;
285}
9888549e 286
705b1aaa
AC
287#ifdef CONFIG_HOTPLUG
288static DEFINE_MUTEX(pci_remove_rescan_mutex);
289static ssize_t bus_rescan_store(struct bus_type *bus, const char *buf,
290 size_t count)
291{
292 unsigned long val;
293 struct pci_bus *b = NULL;
294
295 if (strict_strtoul(buf, 0, &val) < 0)
296 return -EINVAL;
297
298 if (val) {
299 mutex_lock(&pci_remove_rescan_mutex);
300 while ((b = pci_find_next_bus(b)) != NULL)
301 pci_rescan_bus(b);
302 mutex_unlock(&pci_remove_rescan_mutex);
303 }
304 return count;
305}
306
307struct bus_attribute pci_bus_attrs[] = {
308 __ATTR(rescan, (S_IWUSR|S_IWGRP), NULL, bus_rescan_store),
309 __ATTR_NULL
310};
77c27c7b 311
738a6396
AC
312static ssize_t
313dev_rescan_store(struct device *dev, struct device_attribute *attr,
314 const char *buf, size_t count)
315{
316 unsigned long val;
317 struct pci_dev *pdev = to_pci_dev(dev);
318
319 if (strict_strtoul(buf, 0, &val) < 0)
320 return -EINVAL;
321
322 if (val) {
323 mutex_lock(&pci_remove_rescan_mutex);
324 pci_rescan_bus(pdev->bus);
325 mutex_unlock(&pci_remove_rescan_mutex);
326 }
327 return count;
328}
329
77c27c7b
AC
330static void remove_callback(struct device *dev)
331{
332 struct pci_dev *pdev = to_pci_dev(dev);
333
334 mutex_lock(&pci_remove_rescan_mutex);
210647af 335 pci_stop_and_remove_bus_device(pdev);
77c27c7b
AC
336 mutex_unlock(&pci_remove_rescan_mutex);
337}
338
339static ssize_t
340remove_store(struct device *dev, struct device_attribute *dummy,
341 const char *buf, size_t count)
342{
343 int ret = 0;
344 unsigned long val;
77c27c7b
AC
345
346 if (strict_strtoul(buf, 0, &val) < 0)
347 return -EINVAL;
348
77c27c7b
AC
349 /* An attribute cannot be unregistered by one of its own methods,
350 * so we have to use this roundabout approach.
351 */
352 if (val)
353 ret = device_schedule_callback(dev, remove_callback);
354 if (ret)
355 count = ret;
356 return count;
357}
b9d320fc
YL
358
359static ssize_t
360dev_bus_rescan_store(struct device *dev, struct device_attribute *attr,
361 const char *buf, size_t count)
362{
363 unsigned long val;
364 struct pci_bus *bus = to_pci_bus(dev);
365
366 if (strict_strtoul(buf, 0, &val) < 0)
367 return -EINVAL;
368
369 if (val) {
370 mutex_lock(&pci_remove_rescan_mutex);
2f320521
YL
371 if (!pci_is_root_bus(bus) && list_empty(&bus->devices))
372 pci_rescan_bus_bridge_resize(bus->self);
373 else
374 pci_rescan_bus(bus);
b9d320fc
YL
375 mutex_unlock(&pci_remove_rescan_mutex);
376 }
377 return count;
378}
379
705b1aaa
AC
380#endif
381
448bd857
HY
382#if defined(CONFIG_PM_RUNTIME) && defined(CONFIG_ACPI)
383static ssize_t d3cold_allowed_store(struct device *dev,
384 struct device_attribute *attr,
385 const char *buf, size_t count)
386{
387 struct pci_dev *pdev = to_pci_dev(dev);
388 unsigned long val;
389
390 if (strict_strtoul(buf, 0, &val) < 0)
391 return -EINVAL;
392
393 pdev->d3cold_allowed = !!val;
394 pm_runtime_resume(dev);
395
396 return count;
397}
398
399static ssize_t d3cold_allowed_show(struct device *dev,
400 struct device_attribute *attr, char *buf)
401{
402 struct pci_dev *pdev = to_pci_dev(dev);
403 return sprintf (buf, "%u\n", pdev->d3cold_allowed);
404}
405#endif
406
1789382a
DD
407#ifdef CONFIG_PCI_IOV
408static ssize_t sriov_totalvfs_show(struct device *dev,
409 struct device_attribute *attr,
410 char *buf)
411{
412 struct pci_dev *pdev = to_pci_dev(dev);
413
bff73156 414 return sprintf(buf, "%u\n", pci_sriov_get_totalvfs(pdev));
1789382a
DD
415}
416
417
418static ssize_t sriov_numvfs_show(struct device *dev,
419 struct device_attribute *attr,
420 char *buf)
421{
422 struct pci_dev *pdev = to_pci_dev(dev);
423
424 return sprintf(buf, "%u\n", pdev->sriov->nr_virtfn);
425}
426
427/*
428 * num_vfs > 0; number of vfs to enable
429 * num_vfs = 0; disable all vfs
430 *
431 * Note: SRIOV spec doesn't allow partial VF
432 * disable, so its all or none.
433 */
434static ssize_t sriov_numvfs_store(struct device *dev,
435 struct device_attribute *attr,
436 const char *buf, size_t count)
437{
438 struct pci_dev *pdev = to_pci_dev(dev);
439 int num_vfs_enabled = 0;
440 int num_vfs;
441 int ret = 0;
442 u16 total;
443
444 if (kstrtoint(buf, 0, &num_vfs) < 0)
445 return -EINVAL;
446
447 /* is PF driver loaded w/callback */
448 if (!pdev->driver || !pdev->driver->sriov_configure) {
449 dev_info(&pdev->dev,
450 "Driver doesn't support SRIOV configuration via sysfs\n");
451 return -ENOSYS;
452 }
453
454 /* if enabling vf's ... */
bff73156 455 total = pci_sriov_get_totalvfs(pdev);
1789382a
DD
456 /* Requested VFs to enable < totalvfs and none enabled already */
457 if ((num_vfs > 0) && (num_vfs <= total)) {
458 if (pdev->sriov->nr_virtfn == 0) {
459 num_vfs_enabled =
460 pdev->driver->sriov_configure(pdev, num_vfs);
461 if ((num_vfs_enabled >= 0) &&
462 (num_vfs_enabled != num_vfs)) {
463 dev_warn(&pdev->dev,
464 "Only %d VFs enabled\n",
465 num_vfs_enabled);
466 return count;
467 } else if (num_vfs_enabled < 0)
468 /* error code from driver callback */
469 return num_vfs_enabled;
470 } else if (num_vfs == pdev->sriov->nr_virtfn) {
471 dev_warn(&pdev->dev,
472 "%d VFs already enabled; no enable action taken\n",
473 num_vfs);
474 return count;
475 } else {
476 dev_warn(&pdev->dev,
477 "%d VFs already enabled. Disable before enabling %d VFs\n",
478 pdev->sriov->nr_virtfn, num_vfs);
479 return -EINVAL;
480 }
481 }
482
483 /* disable vfs */
484 if (num_vfs == 0) {
485 if (pdev->sriov->nr_virtfn != 0) {
486 ret = pdev->driver->sriov_configure(pdev, 0);
487 return ret ? ret : count;
488 } else {
489 dev_warn(&pdev->dev,
490 "All VFs disabled; no disable action taken\n");
491 return count;
492 }
493 }
494
495 dev_err(&pdev->dev,
496 "Invalid value for number of VFs to enable: %d\n", num_vfs);
497
498 return -EINVAL;
499}
500
501static struct device_attribute sriov_totalvfs_attr = __ATTR_RO(sriov_totalvfs);
502static struct device_attribute sriov_numvfs_attr =
503 __ATTR(sriov_numvfs, (S_IRUGO|S_IWUSR|S_IWGRP),
504 sriov_numvfs_show, sriov_numvfs_store);
505#endif /* CONFIG_PCI_IOV */
506
1da177e4
LT
507struct device_attribute pci_dev_attrs[] = {
508 __ATTR_RO(resource),
509 __ATTR_RO(vendor),
510 __ATTR_RO(device),
511 __ATTR_RO(subsystem_vendor),
512 __ATTR_RO(subsystem_device),
513 __ATTR_RO(class),
514 __ATTR_RO(irq),
515 __ATTR_RO(local_cpus),
39106dcf 516 __ATTR_RO(local_cpulist),
9888549e 517 __ATTR_RO(modalias),
81bb0e19
BG
518#ifdef CONFIG_NUMA
519 __ATTR_RO(numa_node),
520#endif
bb965401
YL
521 __ATTR_RO(dma_mask_bits),
522 __ATTR_RO(consistent_dma_mask_bits),
9f125d30 523 __ATTR(enable, 0600, is_enabled_show, is_enabled_store),
bdee9d98
DT
524 __ATTR(broken_parity_status,(S_IRUGO|S_IWUSR),
525 broken_parity_status_show,broken_parity_status_store),
fe97064c 526 __ATTR(msi_bus, 0644, msi_bus_show, msi_bus_store),
77c27c7b
AC
527#ifdef CONFIG_HOTPLUG
528 __ATTR(remove, (S_IWUSR|S_IWGRP), NULL, remove_store),
738a6396 529 __ATTR(rescan, (S_IWUSR|S_IWGRP), NULL, dev_rescan_store),
448bd857
HY
530#endif
531#if defined(CONFIG_PM_RUNTIME) && defined(CONFIG_ACPI)
532 __ATTR(d3cold_allowed, 0644, d3cold_allowed_show, d3cold_allowed_store),
77c27c7b 533#endif
1da177e4
LT
534 __ATTR_NULL,
535};
536
b9d320fc
YL
537struct device_attribute pcibus_dev_attrs[] = {
538#ifdef CONFIG_HOTPLUG
539 __ATTR(rescan, (S_IWUSR|S_IWGRP), NULL, dev_bus_rescan_store),
540#endif
dc2c2c9d
YL
541 __ATTR(cpuaffinity, S_IRUGO, pci_bus_show_cpumaskaffinity, NULL),
542 __ATTR(cpulistaffinity, S_IRUGO, pci_bus_show_cpulistaffinity, NULL),
b9d320fc
YL
543 __ATTR_NULL,
544};
545
217f45de
DA
546static ssize_t
547boot_vga_show(struct device *dev, struct device_attribute *attr, char *buf)
548{
549 struct pci_dev *pdev = to_pci_dev(dev);
1a39b310
MG
550 struct pci_dev *vga_dev = vga_default_device();
551
552 if (vga_dev)
553 return sprintf(buf, "%u\n", (pdev == vga_dev));
217f45de
DA
554
555 return sprintf(buf, "%u\n",
556 !!(pdev->resource[PCI_ROM_RESOURCE].flags &
557 IORESOURCE_ROM_SHADOW));
558}
559struct device_attribute vga_attr = __ATTR_RO(boot_vga);
560
3d8387ef
HY
561static void
562pci_config_pm_runtime_get(struct pci_dev *pdev)
563{
564 struct device *dev = &pdev->dev;
565 struct device *parent = dev->parent;
566
567 if (parent)
568 pm_runtime_get_sync(parent);
569 pm_runtime_get_noresume(dev);
570 /*
571 * pdev->current_state is set to PCI_D3cold during suspending,
572 * so wait until suspending completes
573 */
574 pm_runtime_barrier(dev);
575 /*
576 * Only need to resume devices in D3cold, because config
577 * registers are still accessible for devices suspended but
578 * not in D3cold.
579 */
580 if (pdev->current_state == PCI_D3cold)
581 pm_runtime_resume(dev);
582}
583
584static void
585pci_config_pm_runtime_put(struct pci_dev *pdev)
586{
587 struct device *dev = &pdev->dev;
588 struct device *parent = dev->parent;
589
590 pm_runtime_put(dev);
591 if (parent)
592 pm_runtime_put_sync(parent);
593}
594
1da177e4 595static ssize_t
2c3c8bea
CW
596pci_read_config(struct file *filp, struct kobject *kobj,
597 struct bin_attribute *bin_attr,
91a69029 598 char *buf, loff_t off, size_t count)
1da177e4
LT
599{
600 struct pci_dev *dev = to_pci_dev(container_of(kobj,struct device,kobj));
601 unsigned int size = 64;
602 loff_t init_off = off;
4c0619ad 603 u8 *data = (u8*) buf;
1da177e4
LT
604
605 /* Several chips lock up trying to read undefined config space */
b7e724d3 606 if (security_capable(filp->f_cred, &init_user_ns, CAP_SYS_ADMIN) == 0) {
1da177e4
LT
607 size = dev->cfg_size;
608 } else if (dev->hdr_type == PCI_HEADER_TYPE_CARDBUS) {
609 size = 128;
610 }
611
612 if (off > size)
613 return 0;
614 if (off + count > size) {
615 size -= off;
616 count = size;
617 } else {
618 size = count;
619 }
620
3d8387ef
HY
621 pci_config_pm_runtime_get(dev);
622
4c0619ad 623 if ((off & 1) && size) {
624 u8 val;
e04b0ea2 625 pci_user_read_config_byte(dev, off, &val);
4c0619ad 626 data[off - init_off] = val;
1da177e4 627 off++;
4c0619ad 628 size--;
629 }
630
631 if ((off & 3) && size > 2) {
632 u16 val;
e04b0ea2 633 pci_user_read_config_word(dev, off, &val);
4c0619ad 634 data[off - init_off] = val & 0xff;
635 data[off - init_off + 1] = (val >> 8) & 0xff;
636 off += 2;
637 size -= 2;
1da177e4
LT
638 }
639
640 while (size > 3) {
4c0619ad 641 u32 val;
e04b0ea2 642 pci_user_read_config_dword(dev, off, &val);
4c0619ad 643 data[off - init_off] = val & 0xff;
644 data[off - init_off + 1] = (val >> 8) & 0xff;
645 data[off - init_off + 2] = (val >> 16) & 0xff;
646 data[off - init_off + 3] = (val >> 24) & 0xff;
1da177e4
LT
647 off += 4;
648 size -= 4;
649 }
650
4c0619ad 651 if (size >= 2) {
652 u16 val;
e04b0ea2 653 pci_user_read_config_word(dev, off, &val);
4c0619ad 654 data[off - init_off] = val & 0xff;
655 data[off - init_off + 1] = (val >> 8) & 0xff;
656 off += 2;
657 size -= 2;
658 }
659
660 if (size > 0) {
661 u8 val;
e04b0ea2 662 pci_user_read_config_byte(dev, off, &val);
4c0619ad 663 data[off - init_off] = val;
1da177e4
LT
664 off++;
665 --size;
666 }
667
3d8387ef
HY
668 pci_config_pm_runtime_put(dev);
669
1da177e4
LT
670 return count;
671}
672
673static ssize_t
2c3c8bea
CW
674pci_write_config(struct file* filp, struct kobject *kobj,
675 struct bin_attribute *bin_attr,
91a69029 676 char *buf, loff_t off, size_t count)
1da177e4
LT
677{
678 struct pci_dev *dev = to_pci_dev(container_of(kobj,struct device,kobj));
679 unsigned int size = count;
680 loff_t init_off = off;
4c0619ad 681 u8 *data = (u8*) buf;
1da177e4
LT
682
683 if (off > dev->cfg_size)
684 return 0;
685 if (off + count > dev->cfg_size) {
686 size = dev->cfg_size - off;
687 count = size;
688 }
4c0619ad 689
3d8387ef
HY
690 pci_config_pm_runtime_get(dev);
691
4c0619ad 692 if ((off & 1) && size) {
e04b0ea2 693 pci_user_write_config_byte(dev, off, data[off - init_off]);
1da177e4 694 off++;
4c0619ad 695 size--;
1da177e4 696 }
4c0619ad 697
698 if ((off & 3) && size > 2) {
699 u16 val = data[off - init_off];
700 val |= (u16) data[off - init_off + 1] << 8;
e04b0ea2 701 pci_user_write_config_word(dev, off, val);
4c0619ad 702 off += 2;
703 size -= 2;
704 }
1da177e4
LT
705
706 while (size > 3) {
4c0619ad 707 u32 val = data[off - init_off];
708 val |= (u32) data[off - init_off + 1] << 8;
709 val |= (u32) data[off - init_off + 2] << 16;
710 val |= (u32) data[off - init_off + 3] << 24;
e04b0ea2 711 pci_user_write_config_dword(dev, off, val);
1da177e4
LT
712 off += 4;
713 size -= 4;
714 }
4c0619ad 715
716 if (size >= 2) {
717 u16 val = data[off - init_off];
718 val |= (u16) data[off - init_off + 1] << 8;
e04b0ea2 719 pci_user_write_config_word(dev, off, val);
4c0619ad 720 off += 2;
721 size -= 2;
722 }
1da177e4 723
4c0619ad 724 if (size) {
e04b0ea2 725 pci_user_write_config_byte(dev, off, data[off - init_off]);
1da177e4
LT
726 off++;
727 --size;
728 }
729
3d8387ef
HY
730 pci_config_pm_runtime_put(dev);
731
1da177e4
LT
732 return count;
733}
734
94e61088 735static ssize_t
2c3c8bea
CW
736read_vpd_attr(struct file *filp, struct kobject *kobj,
737 struct bin_attribute *bin_attr,
287d19ce 738 char *buf, loff_t off, size_t count)
94e61088
BH
739{
740 struct pci_dev *dev =
741 to_pci_dev(container_of(kobj, struct device, kobj));
94e61088
BH
742
743 if (off > bin_attr->size)
744 count = 0;
745 else if (count > bin_attr->size - off)
746 count = bin_attr->size - off;
94e61088 747
287d19ce 748 return pci_read_vpd(dev, off, count, buf);
94e61088
BH
749}
750
751static ssize_t
2c3c8bea
CW
752write_vpd_attr(struct file *filp, struct kobject *kobj,
753 struct bin_attribute *bin_attr,
287d19ce 754 char *buf, loff_t off, size_t count)
94e61088
BH
755{
756 struct pci_dev *dev =
757 to_pci_dev(container_of(kobj, struct device, kobj));
94e61088
BH
758
759 if (off > bin_attr->size)
760 count = 0;
761 else if (count > bin_attr->size - off)
762 count = bin_attr->size - off;
94e61088 763
287d19ce 764 return pci_write_vpd(dev, off, count, buf);
94e61088
BH
765}
766
1da177e4
LT
767#ifdef HAVE_PCI_LEGACY
768/**
769 * pci_read_legacy_io - read byte(s) from legacy I/O port space
2c3c8bea 770 * @filp: open sysfs file
1da177e4 771 * @kobj: kobject corresponding to file to read from
cffb2faf 772 * @bin_attr: struct bin_attribute for this file
1da177e4
LT
773 * @buf: buffer to store results
774 * @off: offset into legacy I/O port space
775 * @count: number of bytes to read
776 *
777 * Reads 1, 2, or 4 bytes from legacy I/O port space using an arch specific
778 * callback routine (pci_legacy_read).
779 */
f19aeb1f 780static ssize_t
2c3c8bea
CW
781pci_read_legacy_io(struct file *filp, struct kobject *kobj,
782 struct bin_attribute *bin_attr,
91a69029 783 char *buf, loff_t off, size_t count)
1da177e4
LT
784{
785 struct pci_bus *bus = to_pci_bus(container_of(kobj,
fd7d1ced 786 struct device,
1da177e4
LT
787 kobj));
788
789 /* Only support 1, 2 or 4 byte accesses */
790 if (count != 1 && count != 2 && count != 4)
791 return -EINVAL;
792
793 return pci_legacy_read(bus, off, (u32 *)buf, count);
794}
795
796/**
797 * pci_write_legacy_io - write byte(s) to legacy I/O port space
2c3c8bea 798 * @filp: open sysfs file
1da177e4 799 * @kobj: kobject corresponding to file to read from
cffb2faf 800 * @bin_attr: struct bin_attribute for this file
1da177e4
LT
801 * @buf: buffer containing value to be written
802 * @off: offset into legacy I/O port space
803 * @count: number of bytes to write
804 *
805 * Writes 1, 2, or 4 bytes from legacy I/O port space using an arch specific
806 * callback routine (pci_legacy_write).
807 */
f19aeb1f 808static ssize_t
2c3c8bea
CW
809pci_write_legacy_io(struct file *filp, struct kobject *kobj,
810 struct bin_attribute *bin_attr,
91a69029 811 char *buf, loff_t off, size_t count)
1da177e4
LT
812{
813 struct pci_bus *bus = to_pci_bus(container_of(kobj,
fd7d1ced 814 struct device,
1da177e4
LT
815 kobj));
816 /* Only support 1, 2 or 4 byte accesses */
817 if (count != 1 && count != 2 && count != 4)
818 return -EINVAL;
819
820 return pci_legacy_write(bus, off, *(u32 *)buf, count);
821}
822
823/**
824 * pci_mmap_legacy_mem - map legacy PCI memory into user memory space
2c3c8bea 825 * @filp: open sysfs file
1da177e4
LT
826 * @kobj: kobject corresponding to device to be mapped
827 * @attr: struct bin_attribute for this file
828 * @vma: struct vm_area_struct passed to mmap
829 *
f19aeb1f 830 * Uses an arch specific callback, pci_mmap_legacy_mem_page_range, to mmap
1da177e4
LT
831 * legacy memory space (first meg of bus space) into application virtual
832 * memory space.
833 */
f19aeb1f 834static int
2c3c8bea
CW
835pci_mmap_legacy_mem(struct file *filp, struct kobject *kobj,
836 struct bin_attribute *attr,
1da177e4
LT
837 struct vm_area_struct *vma)
838{
839 struct pci_bus *bus = to_pci_bus(container_of(kobj,
fd7d1ced 840 struct device,
1da177e4
LT
841 kobj));
842
f19aeb1f
BH
843 return pci_mmap_legacy_page_range(bus, vma, pci_mmap_mem);
844}
845
846/**
847 * pci_mmap_legacy_io - map legacy PCI IO into user memory space
2c3c8bea 848 * @filp: open sysfs file
f19aeb1f
BH
849 * @kobj: kobject corresponding to device to be mapped
850 * @attr: struct bin_attribute for this file
851 * @vma: struct vm_area_struct passed to mmap
852 *
853 * Uses an arch specific callback, pci_mmap_legacy_io_page_range, to mmap
854 * legacy IO space (first meg of bus space) into application virtual
855 * memory space. Returns -ENOSYS if the operation isn't supported
856 */
857static int
2c3c8bea
CW
858pci_mmap_legacy_io(struct file *filp, struct kobject *kobj,
859 struct bin_attribute *attr,
f19aeb1f
BH
860 struct vm_area_struct *vma)
861{
862 struct pci_bus *bus = to_pci_bus(container_of(kobj,
863 struct device,
864 kobj));
865
866 return pci_mmap_legacy_page_range(bus, vma, pci_mmap_io);
867}
868
10a0ef39
IK
869/**
870 * pci_adjust_legacy_attr - adjustment of legacy file attributes
871 * @b: bus to create files under
872 * @mmap_type: I/O port or memory
873 *
874 * Stub implementation. Can be overridden by arch if necessary.
875 */
876void __weak
877pci_adjust_legacy_attr(struct pci_bus *b, enum pci_mmap_state mmap_type)
878{
879 return;
880}
881
f19aeb1f
BH
882/**
883 * pci_create_legacy_files - create legacy I/O port and memory files
884 * @b: bus to create files under
885 *
886 * Some platforms allow access to legacy I/O port and ISA memory space on
887 * a per-bus basis. This routine creates the files and ties them into
888 * their associated read, write and mmap files from pci-sysfs.c
889 *
25985edc 890 * On error unwind, but don't propagate the error to the caller
f19aeb1f
BH
891 * as it is ok to set up the PCI bus without these files.
892 */
893void pci_create_legacy_files(struct pci_bus *b)
894{
895 int error;
896
897 b->legacy_io = kzalloc(sizeof(struct bin_attribute) * 2,
898 GFP_ATOMIC);
899 if (!b->legacy_io)
900 goto kzalloc_err;
901
62e877b8 902 sysfs_bin_attr_init(b->legacy_io);
f19aeb1f
BH
903 b->legacy_io->attr.name = "legacy_io";
904 b->legacy_io->size = 0xffff;
905 b->legacy_io->attr.mode = S_IRUSR | S_IWUSR;
906 b->legacy_io->read = pci_read_legacy_io;
907 b->legacy_io->write = pci_write_legacy_io;
908 b->legacy_io->mmap = pci_mmap_legacy_io;
10a0ef39 909 pci_adjust_legacy_attr(b, pci_mmap_io);
f19aeb1f
BH
910 error = device_create_bin_file(&b->dev, b->legacy_io);
911 if (error)
912 goto legacy_io_err;
913
914 /* Allocated above after the legacy_io struct */
915 b->legacy_mem = b->legacy_io + 1;
6757eca3 916 sysfs_bin_attr_init(b->legacy_mem);
f19aeb1f
BH
917 b->legacy_mem->attr.name = "legacy_mem";
918 b->legacy_mem->size = 1024*1024;
919 b->legacy_mem->attr.mode = S_IRUSR | S_IWUSR;
920 b->legacy_mem->mmap = pci_mmap_legacy_mem;
10a0ef39 921 pci_adjust_legacy_attr(b, pci_mmap_mem);
f19aeb1f
BH
922 error = device_create_bin_file(&b->dev, b->legacy_mem);
923 if (error)
924 goto legacy_mem_err;
925
926 return;
927
928legacy_mem_err:
929 device_remove_bin_file(&b->dev, b->legacy_io);
930legacy_io_err:
931 kfree(b->legacy_io);
932 b->legacy_io = NULL;
933kzalloc_err:
934 printk(KERN_WARNING "pci: warning: could not create legacy I/O port "
935 "and ISA memory resources to sysfs\n");
936 return;
937}
938
939void pci_remove_legacy_files(struct pci_bus *b)
940{
941 if (b->legacy_io) {
942 device_remove_bin_file(&b->dev, b->legacy_io);
943 device_remove_bin_file(&b->dev, b->legacy_mem);
944 kfree(b->legacy_io); /* both are allocated here */
945 }
1da177e4
LT
946}
947#endif /* HAVE_PCI_LEGACY */
948
949#ifdef HAVE_PCI_MMAP
b5ff7df3 950
3b519e4e
MW
951int pci_mmap_fits(struct pci_dev *pdev, int resno, struct vm_area_struct *vma,
952 enum pci_mmap_api mmap_api)
b5ff7df3 953{
3b519e4e 954 unsigned long nr, start, size, pci_start;
b5ff7df3 955
3b519e4e
MW
956 if (pci_resource_len(pdev, resno) == 0)
957 return 0;
b5ff7df3
LT
958 nr = (vma->vm_end - vma->vm_start) >> PAGE_SHIFT;
959 start = vma->vm_pgoff;
88e7df0b 960 size = ((pci_resource_len(pdev, resno) - 1) >> PAGE_SHIFT) + 1;
8c05cd08 961 pci_start = (mmap_api == PCI_MMAP_PROCFS) ?
3b519e4e
MW
962 pci_resource_start(pdev, resno) >> PAGE_SHIFT : 0;
963 if (start >= pci_start && start < pci_start + size &&
964 start + nr <= pci_start + size)
b5ff7df3 965 return 1;
b5ff7df3
LT
966 return 0;
967}
968
1da177e4
LT
969/**
970 * pci_mmap_resource - map a PCI resource into user memory space
971 * @kobj: kobject for mapping
972 * @attr: struct bin_attribute for the file being mapped
973 * @vma: struct vm_area_struct passed into the mmap
45aec1ae 974 * @write_combine: 1 for write_combine mapping
1da177e4
LT
975 *
976 * Use the regular PCI mapping routines to map a PCI resource into userspace.
1da177e4
LT
977 */
978static int
979pci_mmap_resource(struct kobject *kobj, struct bin_attribute *attr,
45aec1ae 980 struct vm_area_struct *vma, int write_combine)
1da177e4
LT
981{
982 struct pci_dev *pdev = to_pci_dev(container_of(kobj,
983 struct device, kobj));
a3f5835a 984 struct resource *res = attr->private;
1da177e4 985 enum pci_mmap_state mmap_type;
e31dd6e4 986 resource_size_t start, end;
2311b1f2 987 int i;
1da177e4 988
2311b1f2
ME
989 for (i = 0; i < PCI_ROM_RESOURCE; i++)
990 if (res == &pdev->resource[i])
991 break;
992 if (i >= PCI_ROM_RESOURCE)
993 return -ENODEV;
994
3b519e4e
MW
995 if (!pci_mmap_fits(pdev, i, vma, PCI_MMAP_SYSFS)) {
996 WARN(1, "process \"%s\" tried to map 0x%08lx bytes "
997 "at page 0x%08lx on %s BAR %d (start 0x%16Lx, size 0x%16Lx)\n",
998 current->comm, vma->vm_end-vma->vm_start, vma->vm_pgoff,
999 pci_name(pdev), i,
e25cd062
RD
1000 (u64)pci_resource_start(pdev, i),
1001 (u64)pci_resource_len(pdev, i));
b5ff7df3 1002 return -EINVAL;
3b519e4e 1003 }
b5ff7df3 1004
2311b1f2
ME
1005 /* pci_mmap_page_range() expects the same kind of entry as coming
1006 * from /proc/bus/pci/ which is a "user visible" value. If this is
1007 * different from the resource itself, arch will do necessary fixup.
1008 */
1009 pci_resource_to_user(pdev, i, res, &start, &end);
1010 vma->vm_pgoff += start >> PAGE_SHIFT;
1da177e4
LT
1011 mmap_type = res->flags & IORESOURCE_MEM ? pci_mmap_mem : pci_mmap_io;
1012
e8de1481
AV
1013 if (res->flags & IORESOURCE_MEM && iomem_is_exclusive(start))
1014 return -EINVAL;
1015
45aec1ae 1016 return pci_mmap_page_range(pdev, vma, mmap_type, write_combine);
1017}
1018
1019static int
2c3c8bea
CW
1020pci_mmap_resource_uc(struct file *filp, struct kobject *kobj,
1021 struct bin_attribute *attr,
45aec1ae 1022 struct vm_area_struct *vma)
1023{
1024 return pci_mmap_resource(kobj, attr, vma, 0);
1025}
1026
1027static int
2c3c8bea
CW
1028pci_mmap_resource_wc(struct file *filp, struct kobject *kobj,
1029 struct bin_attribute *attr,
45aec1ae 1030 struct vm_area_struct *vma)
1031{
1032 return pci_mmap_resource(kobj, attr, vma, 1);
1da177e4
LT
1033}
1034
8633328b
AW
1035static ssize_t
1036pci_resource_io(struct file *filp, struct kobject *kobj,
1037 struct bin_attribute *attr, char *buf,
1038 loff_t off, size_t count, bool write)
1039{
1040 struct pci_dev *pdev = to_pci_dev(container_of(kobj,
1041 struct device, kobj));
1042 struct resource *res = attr->private;
1043 unsigned long port = off;
1044 int i;
1045
1046 for (i = 0; i < PCI_ROM_RESOURCE; i++)
1047 if (res == &pdev->resource[i])
1048 break;
1049 if (i >= PCI_ROM_RESOURCE)
1050 return -ENODEV;
1051
1052 port += pci_resource_start(pdev, i);
1053
1054 if (port > pci_resource_end(pdev, i))
1055 return 0;
1056
1057 if (port + count - 1 > pci_resource_end(pdev, i))
1058 return -EINVAL;
1059
1060 switch (count) {
1061 case 1:
1062 if (write)
1063 outb(*(u8 *)buf, port);
1064 else
1065 *(u8 *)buf = inb(port);
1066 return 1;
1067 case 2:
1068 if (write)
1069 outw(*(u16 *)buf, port);
1070 else
1071 *(u16 *)buf = inw(port);
1072 return 2;
1073 case 4:
1074 if (write)
1075 outl(*(u32 *)buf, port);
1076 else
1077 *(u32 *)buf = inl(port);
1078 return 4;
1079 }
1080 return -EINVAL;
1081}
1082
1083static ssize_t
1084pci_read_resource_io(struct file *filp, struct kobject *kobj,
1085 struct bin_attribute *attr, char *buf,
1086 loff_t off, size_t count)
1087{
1088 return pci_resource_io(filp, kobj, attr, buf, off, count, false);
1089}
1090
1091static ssize_t
1092pci_write_resource_io(struct file *filp, struct kobject *kobj,
1093 struct bin_attribute *attr, char *buf,
1094 loff_t off, size_t count)
1095{
1096 return pci_resource_io(filp, kobj, attr, buf, off, count, true);
1097}
1098
b19441af
GKH
1099/**
1100 * pci_remove_resource_files - cleanup resource files
cffb2faf 1101 * @pdev: dev to cleanup
b19441af 1102 *
cffb2faf 1103 * If we created resource files for @pdev, remove them from sysfs and
b19441af
GKH
1104 * free their resources.
1105 */
1106static void
1107pci_remove_resource_files(struct pci_dev *pdev)
1108{
1109 int i;
1110
1111 for (i = 0; i < PCI_ROM_RESOURCE; i++) {
1112 struct bin_attribute *res_attr;
1113
1114 res_attr = pdev->res_attr[i];
1115 if (res_attr) {
1116 sysfs_remove_bin_file(&pdev->dev.kobj, res_attr);
1117 kfree(res_attr);
1118 }
45aec1ae 1119
1120 res_attr = pdev->res_attr_wc[i];
1121 if (res_attr) {
1122 sysfs_remove_bin_file(&pdev->dev.kobj, res_attr);
1123 kfree(res_attr);
1124 }
b19441af
GKH
1125 }
1126}
1127
45aec1ae 1128static int pci_create_attr(struct pci_dev *pdev, int num, int write_combine)
1129{
1130 /* allocate attribute structure, piggyback attribute name */
1131 int name_len = write_combine ? 13 : 10;
1132 struct bin_attribute *res_attr;
1133 int retval;
1134
1135 res_attr = kzalloc(sizeof(*res_attr) + name_len, GFP_ATOMIC);
1136 if (res_attr) {
1137 char *res_attr_name = (char *)(res_attr + 1);
1138
a07e4156 1139 sysfs_bin_attr_init(res_attr);
45aec1ae 1140 if (write_combine) {
1141 pdev->res_attr_wc[num] = res_attr;
1142 sprintf(res_attr_name, "resource%d_wc", num);
1143 res_attr->mmap = pci_mmap_resource_wc;
1144 } else {
1145 pdev->res_attr[num] = res_attr;
1146 sprintf(res_attr_name, "resource%d", num);
1147 res_attr->mmap = pci_mmap_resource_uc;
1148 }
8633328b
AW
1149 if (pci_resource_flags(pdev, num) & IORESOURCE_IO) {
1150 res_attr->read = pci_read_resource_io;
1151 res_attr->write = pci_write_resource_io;
1152 }
45aec1ae 1153 res_attr->attr.name = res_attr_name;
1154 res_attr->attr.mode = S_IRUSR | S_IWUSR;
1155 res_attr->size = pci_resource_len(pdev, num);
1156 res_attr->private = &pdev->resource[num];
1157 retval = sysfs_create_bin_file(&pdev->dev.kobj, res_attr);
1158 } else
1159 retval = -ENOMEM;
1160
1161 return retval;
1162}
1163
1da177e4
LT
1164/**
1165 * pci_create_resource_files - create resource files in sysfs for @dev
cffb2faf 1166 * @pdev: dev in question
1da177e4 1167 *
cffb2faf 1168 * Walk the resources in @pdev creating files for each resource available.
1da177e4 1169 */
b19441af 1170static int pci_create_resource_files(struct pci_dev *pdev)
1da177e4
LT
1171{
1172 int i;
b19441af 1173 int retval;
1da177e4
LT
1174
1175 /* Expose the PCI resources from this device as files */
1176 for (i = 0; i < PCI_ROM_RESOURCE; i++) {
1da177e4
LT
1177
1178 /* skip empty resources */
1179 if (!pci_resource_len(pdev, i))
1180 continue;
1181
45aec1ae 1182 retval = pci_create_attr(pdev, i, 0);
1183 /* for prefetchable resources, create a WC mappable file */
1184 if (!retval && pdev->resource[i].flags & IORESOURCE_PREFETCH)
1185 retval = pci_create_attr(pdev, i, 1);
1186
1187 if (retval) {
1188 pci_remove_resource_files(pdev);
1189 return retval;
1da177e4
LT
1190 }
1191 }
b19441af 1192 return 0;
1da177e4
LT
1193}
1194#else /* !HAVE_PCI_MMAP */
10a0ef39
IK
1195int __weak pci_create_resource_files(struct pci_dev *dev) { return 0; }
1196void __weak pci_remove_resource_files(struct pci_dev *dev) { return; }
1da177e4
LT
1197#endif /* HAVE_PCI_MMAP */
1198
1199/**
1200 * pci_write_rom - used to enable access to the PCI ROM display
2c3c8bea 1201 * @filp: sysfs file
1da177e4 1202 * @kobj: kernel object handle
cffb2faf 1203 * @bin_attr: struct bin_attribute for this file
1da177e4
LT
1204 * @buf: user input
1205 * @off: file offset
1206 * @count: number of byte in input
1207 *
1208 * writing anything except 0 enables it
1209 */
1210static ssize_t
2c3c8bea
CW
1211pci_write_rom(struct file *filp, struct kobject *kobj,
1212 struct bin_attribute *bin_attr,
91a69029 1213 char *buf, loff_t off, size_t count)
1da177e4
LT
1214{
1215 struct pci_dev *pdev = to_pci_dev(container_of(kobj, struct device, kobj));
1216
1217 if ((off == 0) && (*buf == '0') && (count == 2))
1218 pdev->rom_attr_enabled = 0;
1219 else
1220 pdev->rom_attr_enabled = 1;
1221
1222 return count;
1223}
1224
1225/**
1226 * pci_read_rom - read a PCI ROM
2c3c8bea 1227 * @filp: sysfs file
1da177e4 1228 * @kobj: kernel object handle
cffb2faf 1229 * @bin_attr: struct bin_attribute for this file
1da177e4
LT
1230 * @buf: where to put the data we read from the ROM
1231 * @off: file offset
1232 * @count: number of bytes to read
1233 *
1234 * Put @count bytes starting at @off into @buf from the ROM in the PCI
1235 * device corresponding to @kobj.
1236 */
1237static ssize_t
2c3c8bea
CW
1238pci_read_rom(struct file *filp, struct kobject *kobj,
1239 struct bin_attribute *bin_attr,
91a69029 1240 char *buf, loff_t off, size_t count)
1da177e4
LT
1241{
1242 struct pci_dev *pdev = to_pci_dev(container_of(kobj, struct device, kobj));
1243 void __iomem *rom;
1244 size_t size;
1245
1246 if (!pdev->rom_attr_enabled)
1247 return -EINVAL;
1248
1249 rom = pci_map_rom(pdev, &size); /* size starts out as PCI window size */
97c44836
TN
1250 if (!rom || !size)
1251 return -EIO;
1da177e4
LT
1252
1253 if (off >= size)
1254 count = 0;
1255 else {
1256 if (off + count > size)
1257 count = size - off;
1258
1259 memcpy_fromio(buf, rom + off, count);
1260 }
1261 pci_unmap_rom(pdev, rom);
1262
1263 return count;
1264}
1265
1266static struct bin_attribute pci_config_attr = {
1267 .attr = {
1268 .name = "config",
1269 .mode = S_IRUGO | S_IWUSR,
1da177e4 1270 },
557848c3 1271 .size = PCI_CFG_SPACE_SIZE,
1da177e4
LT
1272 .read = pci_read_config,
1273 .write = pci_write_config,
1274};
1275
1276static struct bin_attribute pcie_config_attr = {
1277 .attr = {
1278 .name = "config",
1279 .mode = S_IRUGO | S_IWUSR,
1da177e4 1280 },
557848c3 1281 .size = PCI_CFG_SPACE_EXP_SIZE,
1da177e4
LT
1282 .read = pci_read_config,
1283 .write = pci_write_config,
1284};
1285
d6d88c83 1286int __weak pcibios_add_platform_entries(struct pci_dev *dev)
575e3348 1287{
a2cd52ca 1288 return 0;
575e3348
ME
1289}
1290
711d5779
MT
1291static ssize_t reset_store(struct device *dev,
1292 struct device_attribute *attr, const char *buf,
1293 size_t count)
1294{
1295 struct pci_dev *pdev = to_pci_dev(dev);
1296 unsigned long val;
1297 ssize_t result = strict_strtoul(buf, 0, &val);
1298
1299 if (result < 0)
1300 return result;
1301
1302 if (val != 1)
1303 return -EINVAL;
447c5dd7
MS
1304
1305 result = pci_reset_function(pdev);
1306 if (result < 0)
1307 return result;
1308
1309 return count;
711d5779
MT
1310}
1311
1312static struct device_attribute reset_attr = __ATTR(reset, 0200, NULL, reset_store);
1313
280c73d3
ZY
1314static int pci_create_capabilities_sysfs(struct pci_dev *dev)
1315{
1316 int retval;
1317 struct bin_attribute *attr;
1318
1319 /* If the device has VPD, try to expose it in sysfs. */
1320 if (dev->vpd) {
1321 attr = kzalloc(sizeof(*attr), GFP_ATOMIC);
1322 if (!attr)
1323 return -ENOMEM;
1324
a07e4156 1325 sysfs_bin_attr_init(attr);
280c73d3
ZY
1326 attr->size = dev->vpd->len;
1327 attr->attr.name = "vpd";
1328 attr->attr.mode = S_IRUSR | S_IWUSR;
287d19ce
SH
1329 attr->read = read_vpd_attr;
1330 attr->write = write_vpd_attr;
280c73d3
ZY
1331 retval = sysfs_create_bin_file(&dev->dev.kobj, attr);
1332 if (retval) {
0f12a4e2 1333 kfree(attr);
280c73d3
ZY
1334 return retval;
1335 }
1336 dev->vpd->attr = attr;
1337 }
1338
1339 /* Active State Power Management */
1340 pcie_aspm_create_sysfs_dev_files(dev);
1341
711d5779
MT
1342 if (!pci_probe_reset_function(dev)) {
1343 retval = device_create_file(&dev->dev, &reset_attr);
1344 if (retval)
1345 goto error;
1346 dev->reset_fn = 1;
1347 }
280c73d3 1348 return 0;
711d5779
MT
1349
1350error:
1351 pcie_aspm_remove_sysfs_dev_files(dev);
1352 if (dev->vpd && dev->vpd->attr) {
1353 sysfs_remove_bin_file(&dev->dev.kobj, dev->vpd->attr);
1354 kfree(dev->vpd->attr);
1355 }
1356
1357 return retval;
280c73d3
ZY
1358}
1359
b19441af 1360int __must_check pci_create_sysfs_dev_files (struct pci_dev *pdev)
1da177e4 1361{
b19441af 1362 int retval;
280c73d3
ZY
1363 int rom_size = 0;
1364 struct bin_attribute *attr;
b19441af 1365
1da177e4
LT
1366 if (!sysfs_initialized)
1367 return -EACCES;
1368
557848c3 1369 if (pdev->cfg_size < PCI_CFG_SPACE_EXP_SIZE)
b19441af 1370 retval = sysfs_create_bin_file(&pdev->dev.kobj, &pci_config_attr);
1da177e4 1371 else
b19441af
GKH
1372 retval = sysfs_create_bin_file(&pdev->dev.kobj, &pcie_config_attr);
1373 if (retval)
1374 goto err;
1da177e4 1375
b19441af
GKH
1376 retval = pci_create_resource_files(pdev);
1377 if (retval)
280c73d3
ZY
1378 goto err_config_file;
1379
1380 if (pci_resource_len(pdev, PCI_ROM_RESOURCE))
1381 rom_size = pci_resource_len(pdev, PCI_ROM_RESOURCE);
1382 else if (pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW)
1383 rom_size = 0x20000;
1da177e4
LT
1384
1385 /* If the device has a ROM, try to expose it in sysfs. */
280c73d3 1386 if (rom_size) {
94e61088 1387 attr = kzalloc(sizeof(*attr), GFP_ATOMIC);
280c73d3 1388 if (!attr) {
b19441af 1389 retval = -ENOMEM;
9890b12a 1390 goto err_resource_files;
1da177e4 1391 }
a07e4156 1392 sysfs_bin_attr_init(attr);
280c73d3
ZY
1393 attr->size = rom_size;
1394 attr->attr.name = "rom";
ff29530e 1395 attr->attr.mode = S_IRUSR | S_IWUSR;
280c73d3
ZY
1396 attr->read = pci_read_rom;
1397 attr->write = pci_write_rom;
1398 retval = sysfs_create_bin_file(&pdev->dev.kobj, attr);
1399 if (retval) {
1400 kfree(attr);
1401 goto err_resource_files;
1402 }
1403 pdev->rom_attr = attr;
1da177e4 1404 }
280c73d3 1405
1da177e4 1406 /* add platform-specific attributes */
280c73d3
ZY
1407 retval = pcibios_add_platform_entries(pdev);
1408 if (retval)
625e1d59 1409 goto err_rom_file;
b19441af 1410
280c73d3
ZY
1411 /* add sysfs entries for various capabilities */
1412 retval = pci_create_capabilities_sysfs(pdev);
1413 if (retval)
625e1d59 1414 goto err_rom_file;
7d715a6c 1415
911e1c9b
N
1416 pci_create_firmware_label_files(pdev);
1417
1da177e4 1418 return 0;
b19441af 1419
a2cd52ca 1420err_rom_file:
280c73d3 1421 if (rom_size) {
94e61088 1422 sysfs_remove_bin_file(&pdev->dev.kobj, pdev->rom_attr);
280c73d3
ZY
1423 kfree(pdev->rom_attr);
1424 pdev->rom_attr = NULL;
1425 }
9890b12a
ME
1426err_resource_files:
1427 pci_remove_resource_files(pdev);
94e61088 1428err_config_file:
557848c3 1429 if (pdev->cfg_size < PCI_CFG_SPACE_EXP_SIZE)
b19441af
GKH
1430 sysfs_remove_bin_file(&pdev->dev.kobj, &pci_config_attr);
1431 else
1432 sysfs_remove_bin_file(&pdev->dev.kobj, &pcie_config_attr);
1433err:
1434 return retval;
1da177e4
LT
1435}
1436
280c73d3
ZY
1437static void pci_remove_capabilities_sysfs(struct pci_dev *dev)
1438{
1439 if (dev->vpd && dev->vpd->attr) {
1440 sysfs_remove_bin_file(&dev->dev.kobj, dev->vpd->attr);
1441 kfree(dev->vpd->attr);
1442 }
1443
1444 pcie_aspm_remove_sysfs_dev_files(dev);
711d5779
MT
1445 if (dev->reset_fn) {
1446 device_remove_file(&dev->dev, &reset_attr);
1447 dev->reset_fn = 0;
1448 }
280c73d3
ZY
1449}
1450
1da177e4
LT
1451/**
1452 * pci_remove_sysfs_dev_files - cleanup PCI specific sysfs files
1453 * @pdev: device whose entries we should free
1454 *
1455 * Cleanup when @pdev is removed from sysfs.
1456 */
1457void pci_remove_sysfs_dev_files(struct pci_dev *pdev)
1458{
280c73d3
ZY
1459 int rom_size = 0;
1460
d67afe5e
DM
1461 if (!sysfs_initialized)
1462 return;
1463
280c73d3 1464 pci_remove_capabilities_sysfs(pdev);
7d715a6c 1465
557848c3 1466 if (pdev->cfg_size < PCI_CFG_SPACE_EXP_SIZE)
1da177e4
LT
1467 sysfs_remove_bin_file(&pdev->dev.kobj, &pci_config_attr);
1468 else
1469 sysfs_remove_bin_file(&pdev->dev.kobj, &pcie_config_attr);
1470
1471 pci_remove_resource_files(pdev);
1472
280c73d3
ZY
1473 if (pci_resource_len(pdev, PCI_ROM_RESOURCE))
1474 rom_size = pci_resource_len(pdev, PCI_ROM_RESOURCE);
1475 else if (pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW)
1476 rom_size = 0x20000;
1477
1478 if (rom_size && pdev->rom_attr) {
1479 sysfs_remove_bin_file(&pdev->dev.kobj, pdev->rom_attr);
1480 kfree(pdev->rom_attr);
1da177e4 1481 }
911e1c9b
N
1482
1483 pci_remove_firmware_label_files(pdev);
1484
1da177e4
LT
1485}
1486
1487static int __init pci_sysfs_init(void)
1488{
1489 struct pci_dev *pdev = NULL;
b19441af
GKH
1490 int retval;
1491
1da177e4 1492 sysfs_initialized = 1;
b19441af
GKH
1493 for_each_pci_dev(pdev) {
1494 retval = pci_create_sysfs_dev_files(pdev);
151fc5df
JL
1495 if (retval) {
1496 pci_dev_put(pdev);
b19441af 1497 return retval;
151fc5df 1498 }
b19441af 1499 }
1da177e4
LT
1500
1501 return 0;
1502}
1503
40ee9e9f 1504late_initcall(pci_sysfs_init);
4e15c46b
YL
1505
1506static struct attribute *pci_dev_dev_attrs[] = {
625e1d59 1507 &vga_attr.attr,
4e15c46b
YL
1508 NULL,
1509};
1510
1511static umode_t pci_dev_attrs_are_visible(struct kobject *kobj,
1512 struct attribute *a, int n)
1513{
625e1d59
YL
1514 struct device *dev = container_of(kobj, struct device, kobj);
1515 struct pci_dev *pdev = to_pci_dev(dev);
1516
1517 if (a == &vga_attr.attr)
1518 if ((pdev->class >> 8) != PCI_CLASS_DISPLAY_VGA)
1519 return 0;
1520
4e15c46b
YL
1521 return a->mode;
1522}
1523
1789382a
DD
1524#ifdef CONFIG_PCI_IOV
1525static struct attribute *sriov_dev_attrs[] = {
1526 &sriov_totalvfs_attr.attr,
1527 &sriov_numvfs_attr.attr,
1528 NULL,
1529};
1530
1531static umode_t sriov_attrs_are_visible(struct kobject *kobj,
1532 struct attribute *a, int n)
1533{
1534 struct device *dev = container_of(kobj, struct device, kobj);
1535
1536 if (!dev_is_pf(dev))
1537 return 0;
1538
1539 return a->mode;
1540}
1541
1542static struct attribute_group sriov_dev_attr_group = {
1543 .attrs = sriov_dev_attrs,
1544 .is_visible = sriov_attrs_are_visible,
1545};
1546#endif /* CONFIG_PCI_IOV */
1547
4e15c46b
YL
1548static struct attribute_group pci_dev_attr_group = {
1549 .attrs = pci_dev_dev_attrs,
1550 .is_visible = pci_dev_attrs_are_visible,
1551};
1552
1553static const struct attribute_group *pci_dev_attr_groups[] = {
1554 &pci_dev_attr_group,
1789382a
DD
1555#ifdef CONFIG_PCI_IOV
1556 &sriov_dev_attr_group,
1557#endif
4e15c46b
YL
1558 NULL,
1559};
1560
1561struct device_type pci_dev_type = {
1562 .groups = pci_dev_attr_groups,
1563};
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