[deliverable/linux.git] / drivers / pci / pcie / pme.c

/*
 * PCIe Native PME support
 *
 * Copyright (C) 2007 - 2009 Intel Corp
 * Copyright (C) 2007 - 2009 Shaohua Li <shaohua.li@intel.com>
 * Copyright (C) 2009 Rafael J. Wysocki <rjw@sisk.pl>, Novell Inc.
 *
 * This file is subject to the terms and conditions of the GNU General Public
 * License V2.  See the file "COPYING" in the main directory of this archive
 * for more details.
 */

#include <linux/module.h>
#include <linux/pci.h>
#include <linux/kernel.h>
#include <linux/errno.h>
#include <linux/slab.h>
#include <linux/init.h>
#include <linux/interrupt.h>
#include <linux/device.h>
#include <linux/pcieport_if.h>
#include <linux/pm_runtime.h>

#include "../pci.h"
#include "portdrv.h"

/*
 * If this switch is set, MSI will not be used for PCIe PME signaling.  This
 * causes the PCIe port driver to use INTx interrupts only, but it turns out
 * that using MSI for PCIe PME signaling doesn't play well with PCIe PME-based
 * wake-up from system sleep states.
 */
bool pcie_pme_msi_disabled;

static int __init pcie_pme_setup(char *str)
{
	if (!strncmp(str, "nomsi", 5))
		pcie_pme_msi_disabled = true;

	return 1;
}
__setup("pcie_pme=", pcie_pme_setup);

struct pcie_pme_service_data {
	spinlock_t lock;
	struct pcie_device *srv;
	struct work_struct work;
	bool noirq; /* Don't enable the PME interrupt used by this service. */
};

/**
 * pcie_pme_interrupt_enable - Enable/disable PCIe PME interrupt generation.
 * @dev: PCIe root port or event collector.
 * @enable: Enable or disable the interrupt.
 */
void pcie_pme_interrupt_enable(struct pci_dev *dev, bool enable)
{
	if (enable)
		pcie_capability_set_word(dev, PCI_EXP_RTCTL,
					 PCI_EXP_RTCTL_PMEIE);
	else
		pcie_capability_clear_word(dev, PCI_EXP_RTCTL,
					   PCI_EXP_RTCTL_PMEIE);
}

/**
 * pcie_pme_walk_bus - Scan a PCI bus for devices asserting PME#.
 * @bus: PCI bus to scan.
 *
 * Scan given PCI bus and all buses under it for devices asserting PME#.
 */
static bool pcie_pme_walk_bus(struct pci_bus *bus)
{
	struct pci_dev *dev;
	bool ret = false;

	list_for_each_entry(dev, &bus->devices, bus_list) {
		/* Skip PCIe devices in case we started from a root port. */
		if (!pci_is_pcie(dev) && pci_check_pme_status(dev)) {
			if (dev->pme_poll)
				dev->pme_poll = false;

			pci_wakeup_event(dev);
			pm_request_resume(&dev->dev);
			ret = true;
		}

		if (dev->subordinate && pcie_pme_walk_bus(dev->subordinate))
			ret = true;
	}

	return ret;
}

/**
 * pcie_pme_from_pci_bridge - Check if PCIe-PCI bridge generated a PME.
 * @bus: Secondary bus of the bridge.
 * @devfn: Device/function number to check.
 *
 * PME from PCI devices under a PCIe-PCI bridge may be converted to an in-band
 * PCIe PME message.  In such that case the bridge should use the Requester ID
 * of device/function number 0 on its secondary bus.
 */
static bool pcie_pme_from_pci_bridge(struct pci_bus *bus, u8 devfn)
{
	struct pci_dev *dev;
	bool found = false;

	if (devfn)
		return false;

	dev = pci_dev_get(bus->self);
	if (!dev)
		return false;

	if (pci_is_pcie(dev) && pci_pcie_type(dev) == PCI_EXP_TYPE_PCI_BRIDGE) {
		down_read(&pci_bus_sem);
		if (pcie_pme_walk_bus(bus))
			found = true;
		up_read(&pci_bus_sem);
	}

	pci_dev_put(dev);
	return found;
}

/**
 * pcie_pme_handle_request - Find device that generated PME and handle it.
 * @port: Root port or event collector that generated the PME interrupt.
 * @req_id: PCIe Requester ID of the device that generated the PME.
 */
static void pcie_pme_handle_request(struct pci_dev *port, u16 req_id)
{
	u8 busnr = req_id >> 8, devfn = req_id & 0xff;
	struct pci_bus *bus;
	struct pci_dev *dev;
	bool found = false;

	/* First, check if the PME is from the root port itself. */
	if (port->devfn == devfn && port->bus->number == busnr) {
		if (port->pme_poll)
			port->pme_poll = false;

		if (pci_check_pme_status(port)) {
			pm_request_resume(&port->dev);
			found = true;
		} else {
			/*
			 * Apparently, the root port generated the PME on behalf
			 * of a non-PCIe device downstream.  If this is done by
			 * a root port, the Requester ID field in its status
			 * register may contain either the root port's, or the
			 * source device's information (PCI Express Base
			 * Specification, Rev. 2.0, Section 6.1.9).
			 */
			down_read(&pci_bus_sem);
			found = pcie_pme_walk_bus(port->subordinate);
			up_read(&pci_bus_sem);
		}
		goto out;
	}

	/* Second, find the bus the source device is on. */
	bus = pci_find_bus(pci_domain_nr(port->bus), busnr);
	if (!bus)
		goto out;

	/* Next, check if the PME is from a PCIe-PCI bridge. */
	found = pcie_pme_from_pci_bridge(bus, devfn);
	if (found)
		goto out;

	/* Finally, try to find the PME source on the bus. */
	down_read(&pci_bus_sem);
	list_for_each_entry(dev, &bus->devices, bus_list) {
		pci_dev_get(dev);
		if (dev->devfn == devfn) {
			found = true;
			break;
		}
		pci_dev_put(dev);
	}
	up_read(&pci_bus_sem);

	if (found) {
		/* The device is there, but we have to check its PME status. */
		found = pci_check_pme_status(dev);
		if (found) {
			if (dev->pme_poll)
				dev->pme_poll = false;

			pci_wakeup_event(dev);
			pm_request_resume(&dev->dev);
		}
		pci_dev_put(dev);
	} else if (devfn) {
		/*
		 * The device is not there, but we can still try to recover by
		 * assuming that the PME was reported by a PCIe-PCI bridge that
		 * used devfn different from zero.
		 */
		dev_dbg(&port->dev, "PME interrupt generated for "
			"non-existent device %02x:%02x.%d\n",
			busnr, PCI_SLOT(devfn), PCI_FUNC(devfn));
		found = pcie_pme_from_pci_bridge(bus, 0);
	}

 out:
	if (!found)
		dev_dbg(&port->dev, "Spurious native PME interrupt!\n");
}

/**
 * pcie_pme_work_fn - Work handler for PCIe PME interrupt.
 * @work: Work structure giving access to service data.
 */
static void pcie_pme_work_fn(struct work_struct *work)
{
	struct pcie_pme_service_data *data =
			container_of(work, struct pcie_pme_service_data, work);
	struct pci_dev *port = data->srv->port;
	u32 rtsta;

	spin_lock_irq(&data->lock);

	for (;;) {
		if (data->noirq)
			break;

		pcie_capability_read_dword(port, PCI_EXP_RTSTA, &rtsta);
		if (rtsta & PCI_EXP_RTSTA_PME) {
			/*
			 * Clear PME status of the port.  If there are other
			 * pending PMEs, the status will be set again.
			 */
			pcie_clear_root_pme_status(port);

			spin_unlock_irq(&data->lock);
			pcie_pme_handle_request(port, rtsta & 0xffff);
			spin_lock_irq(&data->lock);

			continue;
		}

		/* No need to loop if there are no more PMEs pending. */
		if (!(rtsta & PCI_EXP_RTSTA_PENDING))
			break;

		spin_unlock_irq(&data->lock);
		cpu_relax();
		spin_lock_irq(&data->lock);
	}

	if (!data->noirq)
		pcie_pme_interrupt_enable(port, true);

	spin_unlock_irq(&data->lock);
}

/**
 * pcie_pme_irq - Interrupt handler for PCIe root port PME interrupt.
 * @irq: Interrupt vector.
 * @context: Interrupt context pointer.
 */
static irqreturn_t pcie_pme_irq(int irq, void *context)
{
	struct pci_dev *port;
	struct pcie_pme_service_data *data;
	u32 rtsta;
	unsigned long flags;

	port = ((struct pcie_device *)context)->port;
	data = get_service_data((struct pcie_device *)context);

	spin_lock_irqsave(&data->lock, flags);
	pcie_capability_read_dword(port, PCI_EXP_RTSTA, &rtsta);

	if (!(rtsta & PCI_EXP_RTSTA_PME)) {
		spin_unlock_irqrestore(&data->lock, flags);
		return IRQ_NONE;
	}

	pcie_pme_interrupt_enable(port, false);
	spin_unlock_irqrestore(&data->lock, flags);

	/* We don't use pm_wq, because it's freezable. */
	schedule_work(&data->work);

	return IRQ_HANDLED;
}

/**
 * pcie_pme_set_native - Set the PME interrupt flag for given device.
 * @dev: PCI device to handle.
 * @ign: Ignored.
 */
static int pcie_pme_set_native(struct pci_dev *dev, void *ign)
{
	dev_info(&dev->dev, "Signaling PME through PCIe PME interrupt\n");

	device_set_run_wake(&dev->dev, true);
	dev->pme_interrupt = true;
	return 0;
}

/**
 * pcie_pme_mark_devices - Set the PME interrupt flag for devices below a port.
 * @port: PCIe root port or event collector to handle.
 *
 * For each device below given root port, including the port itself (or for each
 * root complex integrated endpoint if @port is a root complex event collector)
 * set the flag indicating that it can signal run-time wake-up events via PCIe
 * PME interrupts.
 */
static void pcie_pme_mark_devices(struct pci_dev *port)
{
	pcie_pme_set_native(port, NULL);
	if (port->subordinate) {
		pci_walk_bus(port->subordinate, pcie_pme_set_native, NULL);
	} else {
		struct pci_bus *bus = port->bus;
		struct pci_dev *dev;

		/* Check if this is a root port event collector. */
		if (pci_pcie_type(port) != PCI_EXP_TYPE_RC_EC || !bus)
			return;

		down_read(&pci_bus_sem);
		list_for_each_entry(dev, &bus->devices, bus_list)
			if (pci_is_pcie(dev)
			    && pci_pcie_type(dev) == PCI_EXP_TYPE_RC_END)
				pcie_pme_set_native(dev, NULL);
		up_read(&pci_bus_sem);
	}
}

/**
 * pcie_pme_probe - Initialize PCIe PME service for given root port.
 * @srv: PCIe service to initialize.
 */
static int pcie_pme_probe(struct pcie_device *srv)
{
	struct pci_dev *port;
	struct pcie_pme_service_data *data;
	int ret;

	data = kzalloc(sizeof(*data), GFP_KERNEL);
	if (!data)
		return -ENOMEM;

	spin_lock_init(&data->lock);
	INIT_WORK(&data->work, pcie_pme_work_fn);
	data->srv = srv;
	set_service_data(srv, data);

	port = srv->port;
	pcie_pme_interrupt_enable(port, false);
	pcie_clear_root_pme_status(port);

	ret = request_irq(srv->irq, pcie_pme_irq, IRQF_SHARED, "PCIe PME", srv);
	if (ret) {
		kfree(data);
	} else {
		pcie_pme_mark_devices(port);
		pcie_pme_interrupt_enable(port, true);
	}

	return ret;
}

/**
 * pcie_pme_suspend - Suspend PCIe PME service device.
 * @srv: PCIe service device to suspend.
 */
static int pcie_pme_suspend(struct pcie_device *srv)
{
	struct pcie_pme_service_data *data = get_service_data(srv);
	struct pci_dev *port = srv->port;

	spin_lock_irq(&data->lock);
	pcie_pme_interrupt_enable(port, false);
	pcie_clear_root_pme_status(port);
	data->noirq = true;
	spin_unlock_irq(&data->lock);

	synchronize_irq(srv->irq);

	return 0;
}

/**
 * pcie_pme_resume - Resume PCIe PME service device.
 * @srv - PCIe service device to resume.
 */
static int pcie_pme_resume(struct pcie_device *srv)
{
	struct pcie_pme_service_data *data = get_service_data(srv);
	struct pci_dev *port = srv->port;

	spin_lock_irq(&data->lock);
	data->noirq = false;
	pcie_clear_root_pme_status(port);
	pcie_pme_interrupt_enable(port, true);
	spin_unlock_irq(&data->lock);

	return 0;
}

/**
 * pcie_pme_remove - Prepare PCIe PME service device for removal.
 * @srv - PCIe service device to remove.
 */
static void pcie_pme_remove(struct pcie_device *srv)
{
	pcie_pme_suspend(srv);
	free_irq(srv->irq, srv);
	kfree(get_service_data(srv));
}

static struct pcie_port_service_driver pcie_pme_driver = {
	.name		= "pcie_pme",
	.port_type 	= PCI_EXP_TYPE_ROOT_PORT,
	.service 	= PCIE_PORT_SERVICE_PME,

	.probe		= pcie_pme_probe,
	.suspend	= pcie_pme_suspend,
	.resume		= pcie_pme_resume,
	.remove		= pcie_pme_remove,
};

/**
 * pcie_pme_service_init - Register the PCIe PME service driver.
 */
static int __init pcie_pme_service_init(void)
{
	return pcie_port_service_register(&pcie_pme_driver);
}

module_init(pcie_pme_service_init);
Commit	Line	Data
c7f48656 RW	1	/*
	2	* PCIe Native PME support
	3	*
	4	* Copyright (C) 2007 - 2009 Intel Corp
	5	* Copyright (C) 2007 - 2009 Shaohua Li <shaohua.li@intel.com>
	6	* Copyright (C) 2009 Rafael J. Wysocki <rjw@sisk.pl>, Novell Inc.
	7	*
	8	* This file is subject to the terms and conditions of the GNU General Public
	9	* License V2. See the file "COPYING" in the main directory of this archive
	10	* for more details.
	11	*/
	12
	13	#include <linux/module.h>
	14	#include <linux/pci.h>
	15	#include <linux/kernel.h>
	16	#include <linux/errno.h>
5a0e3ad6	17	#include <linux/slab.h>
c7f48656 RW	18	#include <linux/init.h>
	19	#include <linux/interrupt.h>
	20	#include <linux/device.h>
	21	#include <linux/pcieport_if.h>
c7f48656 RW	22	#include <linux/pm_runtime.h>
c7f48656 RW	23
271fb719 RW	24	#include "../pci.h"
271fb719 RW	25	#include "portdrv.h"
c7f48656	26
c39fae14 RW	27	/*
	28	* If this switch is set, MSI will not be used for PCIe PME signaling. This
	29	* causes the PCIe port driver to use INTx interrupts only, but it turns out
	30	* that using MSI for PCIe PME signaling doesn't play well with PCIe PME-based
	31	* wake-up from system sleep states.
	32	*/
	33	bool pcie_pme_msi_disabled;
	34
c7f48656 RW	35	static int __init pcie_pme_setup(char *str)
c7f48656 RW	36	{
28eb5f27 RW	37	if (!strncmp(str, "nomsi", 5))
28eb5f27 RW	38	pcie_pme_msi_disabled = true;
b27759f8	39
c7f48656 RW	40	return 1;
	41	}
	42	__setup("pcie_pme=", pcie_pme_setup);
	43
c7f48656 RW	44	struct pcie_pme_service_data {
	45	spinlock_t lock;
	46	struct pcie_device *srv;
	47	struct work_struct work;
	48	bool noirq; /* Don't enable the PME interrupt used by this service. */
	49	};
	50
	51	/**
	52	* pcie_pme_interrupt_enable - Enable/disable PCIe PME interrupt generation.
	53	* @dev: PCIe root port or event collector.
	54	* @enable: Enable or disable the interrupt.
	55	*/
28eb5f27	56	void pcie_pme_interrupt_enable(struct pci_dev *dev, bool enable)
c7f48656	57	{
c7f48656	58	if (enable)
263e54b9 JL	59	pcie_capability_set_word(dev, PCI_EXP_RTCTL,
263e54b9 JL	60	PCI_EXP_RTCTL_PMEIE);
c7f48656	61	else
263e54b9 JL	62	pcie_capability_clear_word(dev, PCI_EXP_RTCTL,
263e54b9 JL	63	PCI_EXP_RTCTL_PMEIE);
c7f48656 RW	64	}
c7f48656 RW	65
c7f48656 RW	66	/**
	67	* pcie_pme_walk_bus - Scan a PCI bus for devices asserting PME#.
	68	* @bus: PCI bus to scan.
	69	*
	70	* Scan given PCI bus and all buses under it for devices asserting PME#.
	71	*/
	72	static bool pcie_pme_walk_bus(struct pci_bus *bus)
	73	{
	74	struct pci_dev *dev;
	75	bool ret = false;
	76
	77	list_for_each_entry(dev, &bus->devices, bus_list) {
	78	/* Skip PCIe devices in case we started from a root port. */
552be54c	79	if (!pci_is_pcie(dev) && pci_check_pme_status(dev)) {
379021d5 RW	80	if (dev->pme_poll)
	81	dev->pme_poll = false;
	82
c125e96f	83	pci_wakeup_event(dev);
0f953bf6	84	pm_request_resume(&dev->dev);
c7f48656 RW	85	ret = true;
	86	}
	87
	88	if (dev->subordinate && pcie_pme_walk_bus(dev->subordinate))
	89	ret = true;
	90	}
	91
	92	return ret;
	93	}
	94
	95	/**
	96	* pcie_pme_from_pci_bridge - Check if PCIe-PCI bridge generated a PME.
	97	* @bus: Secondary bus of the bridge.
	98	* @devfn: Device/function number to check.
	99	*
	100	* PME from PCI devices under a PCIe-PCI bridge may be converted to an in-band
	101	* PCIe PME message. In such that case the bridge should use the Requester ID
	102	* of device/function number 0 on its secondary bus.
	103	*/
	104	static bool pcie_pme_from_pci_bridge(struct pci_bus *bus, u8 devfn)
	105	{
	106	struct pci_dev *dev;
	107	bool found = false;
	108
	109	if (devfn)
	110	return false;
	111
	112	dev = pci_dev_get(bus->self);
	113	if (!dev)
	114	return false;
	115
62f87c0e	116	if (pci_is_pcie(dev) && pci_pcie_type(dev) == PCI_EXP_TYPE_PCI_BRIDGE) {
c7f48656 RW	117	down_read(&pci_bus_sem);
	118	if (pcie_pme_walk_bus(bus))
	119	found = true;
	120	up_read(&pci_bus_sem);
	121	}
	122
	123	pci_dev_put(dev);
	124	return found;
	125	}
	126
	127	/**
	128	* pcie_pme_handle_request - Find device that generated PME and handle it.
	129	* @port: Root port or event collector that generated the PME interrupt.
	130	* @req_id: PCIe Requester ID of the device that generated the PME.
	131	*/
	132	static void pcie_pme_handle_request(struct pci_dev *port, u16 req_id)
	133	{
	134	u8 busnr = req_id >> 8, devfn = req_id & 0xff;
	135	struct pci_bus *bus;
	136	struct pci_dev *dev;
	137	bool found = false;
	138
	139	/* First, check if the PME is from the root port itself. */
	140	if (port->devfn == devfn && port->bus->number == busnr) {
379021d5 RW	141	if (port->pme_poll)
	142	port->pme_poll = false;
	143
c7f48656 RW	144	if (pci_check_pme_status(port)) {
	145	pm_request_resume(&port->dev);
	146	found = true;
	147	} else {
	148	/*
	149	* Apparently, the root port generated the PME on behalf
	150	* of a non-PCIe device downstream. If this is done by
	151	* a root port, the Requester ID field in its status
	152	* register may contain either the root port's, or the
	153	* source device's information (PCI Express Base
	154	* Specification, Rev. 2.0, Section 6.1.9).
	155	*/
	156	down_read(&pci_bus_sem);
	157	found = pcie_pme_walk_bus(port->subordinate);
	158	up_read(&pci_bus_sem);
	159	}
	160	goto out;
	161	}
	162
	163	/* Second, find the bus the source device is on. */
	164	bus = pci_find_bus(pci_domain_nr(port->bus), busnr);
	165	if (!bus)
	166	goto out;
	167
	168	/* Next, check if the PME is from a PCIe-PCI bridge. */
	169	found = pcie_pme_from_pci_bridge(bus, devfn);
	170	if (found)
	171	goto out;
	172
	173	/* Finally, try to find the PME source on the bus. */
	174	down_read(&pci_bus_sem);
	175	list_for_each_entry(dev, &bus->devices, bus_list) {
	176	pci_dev_get(dev);
	177	if (dev->devfn == devfn) {
	178	found = true;
	179	break;
	180	}
	181	pci_dev_put(dev);
	182	}
	183	up_read(&pci_bus_sem);
	184
	185	if (found) {
	186	/* The device is there, but we have to check its PME status. */
	187	found = pci_check_pme_status(dev);
c125e96f	188	if (found) {
379021d5 RW	189	if (dev->pme_poll)
	190	dev->pme_poll = false;
	191
c125e96f	192	pci_wakeup_event(dev);
0f953bf6	193	pm_request_resume(&dev->dev);
c125e96f	194	}
c7f48656 RW	195	pci_dev_put(dev);
	196	} else if (devfn) {
	197	/*
	198	* The device is not there, but we can still try to recover by
	199	* assuming that the PME was reported by a PCIe-PCI bridge that
	200	* used devfn different from zero.
	201	*/
	202	dev_dbg(&port->dev, "PME interrupt generated for "
	203	"non-existent device %02x:%02x.%d\n",
	204	busnr, PCI_SLOT(devfn), PCI_FUNC(devfn));
	205	found = pcie_pme_from_pci_bridge(bus, 0);
	206	}
	207
	208	out:
	209	if (!found)
	210	dev_dbg(&port->dev, "Spurious native PME interrupt!\n");
	211	}
	212
	213	/**
	214	* pcie_pme_work_fn - Work handler for PCIe PME interrupt.
	215	* @work: Work structure giving access to service data.
	216	*/
	217	static void pcie_pme_work_fn(struct work_struct *work)
	218	{
	219	struct pcie_pme_service_data *data =
	220	container_of(work, struct pcie_pme_service_data, work);
	221	struct pci_dev *port = data->srv->port;
c7f48656 RW	222	u32 rtsta;
c7f48656 RW	223
c7f48656 RW	224	spin_lock_irq(&data->lock);
	225
	226	for (;;) {
	227	if (data->noirq)
	228	break;
	229
263e54b9	230	pcie_capability_read_dword(port, PCI_EXP_RTSTA, &rtsta);
c7f48656 RW	231	if (rtsta & PCI_EXP_RTSTA_PME) {
	232	/*
	233	* Clear PME status of the port. If there are other
	234	* pending PMEs, the status will be set again.
	235	*/
fe31e697	236	pcie_clear_root_pme_status(port);
c7f48656 RW	237
	238	spin_unlock_irq(&data->lock);
	239	pcie_pme_handle_request(port, rtsta & 0xffff);
	240	spin_lock_irq(&data->lock);
	241
	242	continue;
	243	}
	244
	245	/* No need to loop if there are no more PMEs pending. */
	246	if (!(rtsta & PCI_EXP_RTSTA_PENDING))
	247	break;
	248
	249	spin_unlock_irq(&data->lock);
	250	cpu_relax();
	251	spin_lock_irq(&data->lock);
	252	}
	253
	254	if (!data->noirq)
	255	pcie_pme_interrupt_enable(port, true);
	256
	257	spin_unlock_irq(&data->lock);
	258	}
	259
	260	/**
	261	* pcie_pme_irq - Interrupt handler for PCIe root port PME interrupt.
	262	* @irq: Interrupt vector.
	263	* @context: Interrupt context pointer.
	264	*/
	265	static irqreturn_t pcie_pme_irq(int irq, void *context)
	266	{
	267	struct pci_dev *port;
	268	struct pcie_pme_service_data *data;
c7f48656 RW	269	u32 rtsta;
	270	unsigned long flags;
	271
	272	port = ((struct pcie_device *)context)->port;
	273	data = get_service_data((struct pcie_device *)context);
	274
c7f48656	275	spin_lock_irqsave(&data->lock, flags);
263e54b9	276	pcie_capability_read_dword(port, PCI_EXP_RTSTA, &rtsta);
c7f48656 RW	277
	278	if (!(rtsta & PCI_EXP_RTSTA_PME)) {
	279	spin_unlock_irqrestore(&data->lock, flags);
	280	return IRQ_NONE;
	281	}
	282
	283	pcie_pme_interrupt_enable(port, false);
	284	spin_unlock_irqrestore(&data->lock, flags);
	285
	286	/* We don't use pm_wq, because it's freezable. */
	287	schedule_work(&data->work);
	288
	289	return IRQ_HANDLED;
	290	}
	291
	292	/**
	293	* pcie_pme_set_native - Set the PME interrupt flag for given device.
	294	* @dev: PCI device to handle.
	295	* @ign: Ignored.
	296	*/
	297	static int pcie_pme_set_native(struct pci_dev dev, void ign)
	298	{
	299	dev_info(&dev->dev, "Signaling PME through PCIe PME interrupt\n");
	300
	301	device_set_run_wake(&dev->dev, true);
	302	dev->pme_interrupt = true;
	303	return 0;
	304	}
	305
	306	/**
	307	* pcie_pme_mark_devices - Set the PME interrupt flag for devices below a port.
	308	* @port: PCIe root port or event collector to handle.
	309	*
	310	* For each device below given root port, including the port itself (or for each
	311	* root complex integrated endpoint if @port is a root complex event collector)
	312	* set the flag indicating that it can signal run-time wake-up events via PCIe
	313	* PME interrupts.
	314	*/
	315	static void pcie_pme_mark_devices(struct pci_dev *port)
	316	{
	317	pcie_pme_set_native(port, NULL);
	318	if (port->subordinate) {
	319	pci_walk_bus(port->subordinate, pcie_pme_set_native, NULL);
	320	} else {
	321	struct pci_bus *bus = port->bus;
	322	struct pci_dev *dev;
	323
	324	/* Check if this is a root port event collector. */
62f87c0e	325	if (pci_pcie_type(port) != PCI_EXP_TYPE_RC_EC \|\| !bus)
c7f48656 RW	326	return;
	327
	328	down_read(&pci_bus_sem);
	329	list_for_each_entry(dev, &bus->devices, bus_list)
552be54c	330	if (pci_is_pcie(dev)
62f87c0e	331	&& pci_pcie_type(dev) == PCI_EXP_TYPE_RC_END)
c7f48656 RW	332	pcie_pme_set_native(dev, NULL);
	333	up_read(&pci_bus_sem);
	334	}
	335	}
	336
	337	/**
	338	* pcie_pme_probe - Initialize PCIe PME service for given root port.
	339	* @srv: PCIe service to initialize.
	340	*/
	341	static int pcie_pme_probe(struct pcie_device *srv)
	342	{
	343	struct pci_dev *port;
	344	struct pcie_pme_service_data *data;
	345	int ret;
	346
c7f48656 RW	347	data = kzalloc(sizeof(*data), GFP_KERNEL);
	348	if (!data)
	349	return -ENOMEM;
	350
	351	spin_lock_init(&data->lock);
	352	INIT_WORK(&data->work, pcie_pme_work_fn);
	353	data->srv = srv;
	354	set_service_data(srv, data);
	355
	356	port = srv->port;
	357	pcie_pme_interrupt_enable(port, false);
fe31e697	358	pcie_clear_root_pme_status(port);
c7f48656 RW	359
	360	ret = request_irq(srv->irq, pcie_pme_irq, IRQF_SHARED, "PCIe PME", srv);
	361	if (ret) {
	362	kfree(data);
	363	} else {
	364	pcie_pme_mark_devices(port);
	365	pcie_pme_interrupt_enable(port, true);
	366	}
	367
	368	return ret;
	369	}
	370
	371	/**
	372	* pcie_pme_suspend - Suspend PCIe PME service device.
	373	* @srv: PCIe service device to suspend.
	374	*/
	375	static int pcie_pme_suspend(struct pcie_device *srv)
	376	{
	377	struct pcie_pme_service_data *data = get_service_data(srv);
	378	struct pci_dev *port = srv->port;
	379
	380	spin_lock_irq(&data->lock);
	381	pcie_pme_interrupt_enable(port, false);
fe31e697	382	pcie_clear_root_pme_status(port);
c7f48656 RW	383	data->noirq = true;
	384	spin_unlock_irq(&data->lock);
	385
	386	synchronize_irq(srv->irq);
	387
	388	return 0;
	389	}
	390
	391	/**
	392	* pcie_pme_resume - Resume PCIe PME service device.
	393	* @srv - PCIe service device to resume.
	394	*/
	395	static int pcie_pme_resume(struct pcie_device *srv)
	396	{
	397	struct pcie_pme_service_data *data = get_service_data(srv);
	398	struct pci_dev *port = srv->port;
	399
	400	spin_lock_irq(&data->lock);
	401	data->noirq = false;
fe31e697	402	pcie_clear_root_pme_status(port);
c7f48656 RW	403	pcie_pme_interrupt_enable(port, true);
	404	spin_unlock_irq(&data->lock);
	405
	406	return 0;
	407	}
	408
	409	/**
	410	* pcie_pme_remove - Prepare PCIe PME service device for removal.
bd0c5024	411	* @srv - PCIe service device to remove.
c7f48656 RW	412	*/
	413	static void pcie_pme_remove(struct pcie_device *srv)
	414	{
	415	pcie_pme_suspend(srv);
	416	free_irq(srv->irq, srv);
	417	kfree(get_service_data(srv));
	418	}
	419
	420	static struct pcie_port_service_driver pcie_pme_driver = {
	421	.name = "pcie_pme",
	422	.port_type = PCI_EXP_TYPE_ROOT_PORT,
	423	.service = PCIE_PORT_SERVICE_PME,
	424
	425	.probe = pcie_pme_probe,
	426	.suspend = pcie_pme_suspend,
	427	.resume = pcie_pme_resume,
	428	.remove = pcie_pme_remove,
	429	};
	430
	431	/**
	432	* pcie_pme_service_init - Register the PCIe PME service driver.
	433	*/
	434	static int __init pcie_pme_service_init(void)
	435	{
28eb5f27	436	return pcie_port_service_register(&pcie_pme_driver);
c7f48656 RW	437	}
	438
	439	module_init(pcie_pme_service_init);