Merge tag 'gpio-for-v3.11-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw...
[deliverable/linux.git] / drivers / pci / pcie / portdrv_acpi.c
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1/*
2 * PCIe Port Native Services Support, ACPI-Related Part
3 *
4 * Copyright (C) 2010 Rafael J. Wysocki <rjw@sisk.pl>, Novell Inc.
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License V2. See the file "COPYING" in the main directory of this archive
8 * for more details.
9 */
10
11#include <linux/pci.h>
12#include <linux/kernel.h>
13#include <linux/errno.h>
14#include <linux/acpi.h>
15#include <linux/pci-acpi.h>
16#include <linux/pcieport_if.h>
17
18#include "aer/aerdrv.h"
19#include "../pci.h"
139f9251 20#include "portdrv.h"
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21
22/**
23 * pcie_port_acpi_setup - Request the BIOS to release control of PCIe services.
24 * @port: PCIe Port service for a root port or event collector.
25 * @srv_mask: Bit mask of services that can be enabled for @port.
26 *
27 * Invoked when @port is identified as a PCIe port device. To avoid conflicts
28 * with the BIOS PCIe port native services support requires the BIOS to yield
29 * control of these services to the kernel. The mask of services that the BIOS
30 * allows to be enabled for @port is written to @srv_mask.
31 *
32 * NOTE: It turns out that we cannot do that for individual port services
33 * separately, because that would make some systems work incorrectly.
34 */
35int pcie_port_acpi_setup(struct pci_dev *port, int *srv_mask)
36{
415e12b2 37 struct acpi_pci_root *root;
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38 acpi_handle handle;
39 u32 flags;
40
41 if (acpi_pci_disabled)
42 return 0;
43
44 handle = acpi_find_root_bridge_handle(port);
45 if (!handle)
46 return -EINVAL;
47
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48 root = acpi_pci_find_root(handle);
49 if (!root)
28eb5f27 50 return -ENODEV;
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415e12b2 52 flags = root->osc_control_set;
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53
54 *srv_mask = PCIE_PORT_SERVICE_VC;
55 if (flags & OSC_PCI_EXPRESS_NATIVE_HP_CONTROL)
56 *srv_mask |= PCIE_PORT_SERVICE_HP;
57 if (flags & OSC_PCI_EXPRESS_PME_CONTROL)
58 *srv_mask |= PCIE_PORT_SERVICE_PME;
59 if (flags & OSC_PCI_EXPRESS_AER_CONTROL)
60 *srv_mask |= PCIE_PORT_SERVICE_AER;
61
62 return 0;
63}
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