Commit | Line | Data |
---|---|---|
1da177e4 LT |
1 | /* |
2 | * drivers/pci/rom.c | |
3 | * | |
4 | * (C) Copyright 2004 Jon Smirl <jonsmirl@yahoo.com> | |
5 | * (C) Copyright 2004 Silicon Graphics, Inc. Jesse Barnes <jbarnes@sgi.com> | |
6 | * | |
7 | * PCI ROM access routines | |
8 | */ | |
1da177e4 LT |
9 | #include <linux/kernel.h> |
10 | #include <linux/pci.h> | |
4e57b681 | 11 | #include <linux/slab.h> |
1da177e4 LT |
12 | |
13 | #include "pci.h" | |
14 | ||
15 | /** | |
16 | * pci_enable_rom - enable ROM decoding for a PCI device | |
67be2dd1 | 17 | * @pdev: PCI device to enable |
1da177e4 LT |
18 | * |
19 | * Enable ROM decoding on @dev. This involves simply turning on the last | |
20 | * bit of the PCI ROM BAR. Note that some cards may share address decoders | |
21 | * between the ROM and other resources, so enabling it may disable access | |
22 | * to MMIO registers or other card memory. | |
23 | */ | |
8085ce08 | 24 | static int pci_enable_rom(struct pci_dev *pdev) |
1da177e4 | 25 | { |
8085ce08 BH |
26 | struct resource *res = pdev->resource + PCI_ROM_RESOURCE; |
27 | struct pci_bus_region region; | |
1da177e4 LT |
28 | u32 rom_addr; |
29 | ||
8085ce08 BH |
30 | if (!res->flags) |
31 | return -1; | |
32 | ||
33 | pcibios_resource_to_bus(pdev, ®ion, res); | |
1da177e4 | 34 | pci_read_config_dword(pdev, pdev->rom_base_reg, &rom_addr); |
8085ce08 BH |
35 | rom_addr &= ~PCI_ROM_ADDRESS_MASK; |
36 | rom_addr |= region.start | PCI_ROM_ADDRESS_ENABLE; | |
1da177e4 | 37 | pci_write_config_dword(pdev, pdev->rom_base_reg, rom_addr); |
8085ce08 | 38 | return 0; |
1da177e4 LT |
39 | } |
40 | ||
41 | /** | |
42 | * pci_disable_rom - disable ROM decoding for a PCI device | |
67be2dd1 | 43 | * @pdev: PCI device to disable |
1da177e4 LT |
44 | * |
45 | * Disable ROM decoding on a PCI device by turning off the last bit in the | |
46 | * ROM BAR. | |
47 | */ | |
48 | static void pci_disable_rom(struct pci_dev *pdev) | |
49 | { | |
50 | u32 rom_addr; | |
51 | pci_read_config_dword(pdev, pdev->rom_base_reg, &rom_addr); | |
52 | rom_addr &= ~PCI_ROM_ADDRESS_ENABLE; | |
53 | pci_write_config_dword(pdev, pdev->rom_base_reg, rom_addr); | |
54 | } | |
55 | ||
d7ad2254 JK |
56 | /** |
57 | * pci_get_rom_size - obtain the actual size of the ROM image | |
58 | * @rom: kernel virtual pointer to image of ROM | |
59 | * @size: size of PCI window | |
60 | * return: size of actual ROM image | |
61 | * | |
62 | * Determine the actual length of the ROM image. | |
63 | * The PCI window size could be much larger than the | |
64 | * actual image size. | |
65 | */ | |
66 | size_t pci_get_rom_size(void __iomem *rom, size_t size) | |
67 | { | |
68 | void __iomem *image; | |
69 | int last_image; | |
70 | ||
71 | image = rom; | |
72 | do { | |
73 | void __iomem *pds; | |
74 | /* Standard PCI ROMs start out with these bytes 55 AA */ | |
75 | if (readb(image) != 0x55) | |
76 | break; | |
77 | if (readb(image + 1) != 0xAA) | |
78 | break; | |
79 | /* get the PCI data structure and check its signature */ | |
80 | pds = image + readw(image + 24); | |
81 | if (readb(pds) != 'P') | |
82 | break; | |
83 | if (readb(pds + 1) != 'C') | |
84 | break; | |
85 | if (readb(pds + 2) != 'I') | |
86 | break; | |
87 | if (readb(pds + 3) != 'R') | |
88 | break; | |
89 | last_image = readb(pds + 21) & 0x80; | |
90 | /* this length is reliable */ | |
91 | image += readw(pds + 16) * 512; | |
92 | } while (!last_image); | |
93 | ||
94 | /* never return a size larger than the PCI resource window */ | |
95 | /* there are known ROMs that get the size wrong */ | |
96 | return min((size_t)(image - rom), size); | |
97 | } | |
98 | ||
1da177e4 LT |
99 | /** |
100 | * pci_map_rom - map a PCI ROM to kernel space | |
67be2dd1 | 101 | * @pdev: pointer to pci device struct |
1da177e4 LT |
102 | * @size: pointer to receive size of pci window over ROM |
103 | * @return: kernel virtual pointer to image of ROM | |
104 | * | |
105 | * Map a PCI ROM into kernel space. If ROM is boot video ROM, | |
106 | * the shadow BIOS copy will be returned instead of the | |
107 | * actual ROM. | |
108 | */ | |
109 | void __iomem *pci_map_rom(struct pci_dev *pdev, size_t *size) | |
110 | { | |
111 | struct resource *res = &pdev->resource[PCI_ROM_RESOURCE]; | |
112 | loff_t start; | |
113 | void __iomem *rom; | |
1da177e4 | 114 | |
b5e4efe7 | 115 | /* |
6b5c76b8 EO |
116 | * IORESOURCE_ROM_SHADOW set on x86, x86_64 and IA64 supports legacy |
117 | * memory map if the VGA enable bit of the Bridge Control register is | |
118 | * set for embedded VGA. | |
b5e4efe7 | 119 | */ |
1da177e4 LT |
120 | if (res->flags & IORESOURCE_ROM_SHADOW) { |
121 | /* primary video rom always starts here */ | |
122 | start = (loff_t)0xC0000; | |
123 | *size = 0x20000; /* cover C000:0 through E000:0 */ | |
124 | } else { | |
a2302c68 JK |
125 | if (res->flags & |
126 | (IORESOURCE_ROM_COPY | IORESOURCE_ROM_BIOS_COPY)) { | |
1da177e4 | 127 | *size = pci_resource_len(pdev, PCI_ROM_RESOURCE); |
e31dd6e4 GKH |
128 | return (void __iomem *)(unsigned long) |
129 | pci_resource_start(pdev, PCI_ROM_RESOURCE); | |
1da177e4 LT |
130 | } else { |
131 | /* assign the ROM an address if it doesn't have one */ | |
8085ce08 BH |
132 | if (res->parent == NULL && |
133 | pci_assign_resource(pdev,PCI_ROM_RESOURCE)) | |
134 | return NULL; | |
1da177e4 LT |
135 | start = pci_resource_start(pdev, PCI_ROM_RESOURCE); |
136 | *size = pci_resource_len(pdev, PCI_ROM_RESOURCE); | |
137 | if (*size == 0) | |
138 | return NULL; | |
139 | ||
140 | /* Enable ROM space decodes */ | |
8085ce08 BH |
141 | if (pci_enable_rom(pdev)) |
142 | return NULL; | |
1da177e4 LT |
143 | } |
144 | } | |
145 | ||
146 | rom = ioremap(start, *size); | |
147 | if (!rom) { | |
148 | /* restore enable if ioremap fails */ | |
149 | if (!(res->flags & (IORESOURCE_ROM_ENABLE | | |
150 | IORESOURCE_ROM_SHADOW | | |
151 | IORESOURCE_ROM_COPY))) | |
152 | pci_disable_rom(pdev); | |
153 | return NULL; | |
154 | } | |
155 | ||
156 | /* | |
157 | * Try to find the true size of the ROM since sometimes the PCI window | |
158 | * size is much larger than the actual size of the ROM. | |
159 | * True size is important if the ROM is going to be copied. | |
160 | */ | |
d7ad2254 | 161 | *size = pci_get_rom_size(rom, *size); |
1da177e4 LT |
162 | return rom; |
163 | } | |
164 | ||
165 | /** | |
166 | * pci_map_rom_copy - map a PCI ROM to kernel space, create a copy | |
67be2dd1 | 167 | * @pdev: pointer to pci device struct |
1da177e4 LT |
168 | * @size: pointer to receive size of pci window over ROM |
169 | * @return: kernel virtual pointer to image of ROM | |
170 | * | |
171 | * Map a PCI ROM into kernel space. If ROM is boot video ROM, | |
172 | * the shadow BIOS copy will be returned instead of the | |
173 | * actual ROM. | |
174 | */ | |
175 | void __iomem *pci_map_rom_copy(struct pci_dev *pdev, size_t *size) | |
176 | { | |
177 | struct resource *res = &pdev->resource[PCI_ROM_RESOURCE]; | |
178 | void __iomem *rom; | |
179 | ||
180 | rom = pci_map_rom(pdev, size); | |
181 | if (!rom) | |
182 | return NULL; | |
183 | ||
a2302c68 JK |
184 | if (res->flags & (IORESOURCE_ROM_COPY | IORESOURCE_ROM_SHADOW | |
185 | IORESOURCE_ROM_BIOS_COPY)) | |
1da177e4 LT |
186 | return rom; |
187 | ||
188 | res->start = (unsigned long)kmalloc(*size, GFP_KERNEL); | |
189 | if (!res->start) | |
190 | return rom; | |
191 | ||
192 | res->end = res->start + *size; | |
e31dd6e4 | 193 | memcpy_fromio((void*)(unsigned long)res->start, rom, *size); |
1da177e4 LT |
194 | pci_unmap_rom(pdev, rom); |
195 | res->flags |= IORESOURCE_ROM_COPY; | |
196 | ||
e31dd6e4 | 197 | return (void __iomem *)(unsigned long)res->start; |
1da177e4 LT |
198 | } |
199 | ||
200 | /** | |
201 | * pci_unmap_rom - unmap the ROM from kernel space | |
67be2dd1 | 202 | * @pdev: pointer to pci device struct |
1da177e4 LT |
203 | * @rom: virtual address of the previous mapping |
204 | * | |
205 | * Remove a mapping of a previously mapped ROM | |
206 | */ | |
207 | void pci_unmap_rom(struct pci_dev *pdev, void __iomem *rom) | |
208 | { | |
209 | struct resource *res = &pdev->resource[PCI_ROM_RESOURCE]; | |
210 | ||
a2302c68 | 211 | if (res->flags & (IORESOURCE_ROM_COPY | IORESOURCE_ROM_BIOS_COPY)) |
1da177e4 LT |
212 | return; |
213 | ||
214 | iounmap(rom); | |
215 | ||
216 | /* Disable again before continuing, leave enabled if pci=rom */ | |
217 | if (!(res->flags & (IORESOURCE_ROM_ENABLE | IORESOURCE_ROM_SHADOW))) | |
218 | pci_disable_rom(pdev); | |
219 | } | |
220 | ||
221 | /** | |
222 | * pci_remove_rom - disable the ROM and remove its sysfs attribute | |
67be2dd1 | 223 | * @pdev: pointer to pci device struct |
1da177e4 LT |
224 | * |
225 | * Remove the rom file in sysfs and disable ROM decoding. | |
226 | */ | |
227 | void pci_remove_rom(struct pci_dev *pdev) | |
228 | { | |
229 | struct resource *res = &pdev->resource[PCI_ROM_RESOURCE]; | |
230 | ||
231 | if (pci_resource_len(pdev, PCI_ROM_RESOURCE)) | |
232 | sysfs_remove_bin_file(&pdev->dev.kobj, pdev->rom_attr); | |
233 | if (!(res->flags & (IORESOURCE_ROM_ENABLE | | |
234 | IORESOURCE_ROM_SHADOW | | |
a2302c68 | 235 | IORESOURCE_ROM_BIOS_COPY | |
1da177e4 LT |
236 | IORESOURCE_ROM_COPY))) |
237 | pci_disable_rom(pdev); | |
238 | } | |
239 | ||
240 | /** | |
241 | * pci_cleanup_rom - internal routine for freeing the ROM copy created | |
242 | * by pci_map_rom_copy called from remove.c | |
67be2dd1 | 243 | * @pdev: pointer to pci device struct |
1da177e4 LT |
244 | * |
245 | * Free the copied ROM if we allocated one. | |
246 | */ | |
247 | void pci_cleanup_rom(struct pci_dev *pdev) | |
248 | { | |
249 | struct resource *res = &pdev->resource[PCI_ROM_RESOURCE]; | |
250 | if (res->flags & IORESOURCE_ROM_COPY) { | |
e31dd6e4 | 251 | kfree((void*)(unsigned long)res->start); |
1da177e4 LT |
252 | res->flags &= ~IORESOURCE_ROM_COPY; |
253 | res->start = 0; | |
254 | res->end = 0; | |
255 | } | |
256 | } | |
257 | ||
258 | EXPORT_SYMBOL(pci_map_rom); | |
259 | EXPORT_SYMBOL(pci_map_rom_copy); | |
260 | EXPORT_SYMBOL(pci_unmap_rom); | |
261 | EXPORT_SYMBOL(pci_remove_rom); |