Commit | Line | Data |
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1da177e4 LT |
1 | /* |
2 | * drivers/pci/setup-res.c | |
3 | * | |
4 | * Extruded from code written by | |
5 | * Dave Rusling (david.rusling@reo.mts.dec.com) | |
6 | * David Mosberger (davidm@cs.arizona.edu) | |
7 | * David Miller (davem@redhat.com) | |
8 | * | |
9 | * Support routines for initializing a PCI subsystem. | |
10 | */ | |
11 | ||
12 | /* fixed for multiple pci buses, 1999 Andrea Arcangeli <andrea@suse.de> */ | |
13 | ||
14 | /* | |
15 | * Nov 2000, Ivan Kokshaysky <ink@jurassic.park.msu.ru> | |
16 | * Resource sorting | |
17 | */ | |
18 | ||
19 | #include <linux/init.h> | |
20 | #include <linux/kernel.h> | |
21 | #include <linux/pci.h> | |
22 | #include <linux/errno.h> | |
23 | #include <linux/ioport.h> | |
24 | #include <linux/cache.h> | |
25 | #include <linux/slab.h> | |
26 | #include "pci.h" | |
27 | ||
28 | ||
80ccba11 | 29 | void pci_update_resource(struct pci_dev *dev, struct resource *res, int resno) |
1da177e4 LT |
30 | { |
31 | struct pci_bus_region region; | |
32 | u32 new, check, mask; | |
33 | int reg; | |
34 | ||
fb0f2b40 RB |
35 | /* |
36 | * Ignore resources for unimplemented BARs and unused resource slots | |
37 | * for 64 bit BARs. | |
38 | */ | |
cf7bee5a IK |
39 | if (!res->flags) |
40 | return; | |
41 | ||
fb0f2b40 RB |
42 | /* |
43 | * Ignore non-moveable resources. This might be legacy resources for | |
44 | * which no functional BAR register exists or another important | |
80ccba11 | 45 | * system resource we shouldn't move around. |
fb0f2b40 RB |
46 | */ |
47 | if (res->flags & IORESOURCE_PCI_FIXED) | |
48 | return; | |
49 | ||
1da177e4 LT |
50 | pcibios_resource_to_bus(dev, ®ion, res); |
51 | ||
096e6f67 BH |
52 | dev_dbg(&dev->dev, "BAR %d: got res %pR bus [%#llx-%#llx] " |
53 | "flags %#lx\n", resno, res, | |
6015fbef BH |
54 | (unsigned long long)region.start, |
55 | (unsigned long long)region.end, | |
80ccba11 | 56 | (unsigned long)res->flags); |
1da177e4 LT |
57 | |
58 | new = region.start | (res->flags & PCI_REGION_FLAG_MASK); | |
59 | if (res->flags & IORESOURCE_IO) | |
60 | mask = (u32)PCI_BASE_ADDRESS_IO_MASK; | |
61 | else | |
62 | mask = (u32)PCI_BASE_ADDRESS_MEM_MASK; | |
63 | ||
64 | if (resno < 6) { | |
65 | reg = PCI_BASE_ADDRESS_0 + 4 * resno; | |
66 | } else if (resno == PCI_ROM_RESOURCE) { | |
755528c8 LT |
67 | if (!(res->flags & IORESOURCE_ROM_ENABLE)) |
68 | return; | |
69 | new |= PCI_ROM_ADDRESS_ENABLE; | |
1da177e4 LT |
70 | reg = dev->rom_base_reg; |
71 | } else { | |
72 | /* Hmm, non-standard resource. */ | |
73 | ||
74 | return; /* kill uninitialised var warning */ | |
75 | } | |
76 | ||
77 | pci_write_config_dword(dev, reg, new); | |
78 | pci_read_config_dword(dev, reg, &check); | |
79 | ||
80 | if ((new ^ check) & mask) { | |
80ccba11 BH |
81 | dev_err(&dev->dev, "BAR %d: error updating (%#08x != %#08x)\n", |
82 | resno, new, check); | |
1da177e4 LT |
83 | } |
84 | ||
85 | if ((new & (PCI_BASE_ADDRESS_SPACE|PCI_BASE_ADDRESS_MEM_TYPE_MASK)) == | |
86 | (PCI_BASE_ADDRESS_SPACE_MEMORY|PCI_BASE_ADDRESS_MEM_TYPE_64)) { | |
cf7bee5a | 87 | new = region.start >> 16 >> 16; |
1da177e4 LT |
88 | pci_write_config_dword(dev, reg + 4, new); |
89 | pci_read_config_dword(dev, reg + 4, &check); | |
90 | if (check != new) { | |
80ccba11 BH |
91 | dev_err(&dev->dev, "BAR %d: error updating " |
92 | "(high %#08x != %#08x)\n", resno, new, check); | |
1da177e4 LT |
93 | } |
94 | } | |
95 | res->flags &= ~IORESOURCE_UNSET; | |
80ccba11 BH |
96 | dev_dbg(&dev->dev, "BAR %d: moved to bus [%#llx-%#llx] flags %#lx\n", |
97 | resno, (unsigned long long)region.start, | |
98 | (unsigned long long)region.end, res->flags); | |
1da177e4 LT |
99 | } |
100 | ||
96bde06a | 101 | int pci_claim_resource(struct pci_dev *dev, int resource) |
1da177e4 LT |
102 | { |
103 | struct resource *res = &dev->resource[resource]; | |
104 | struct resource *root = NULL; | |
105 | char *dtype = resource < PCI_BRIDGE_RESOURCES ? "device" : "bridge"; | |
106 | int err; | |
107 | ||
085ae41f | 108 | root = pcibios_select_root(dev, res); |
1da177e4 LT |
109 | |
110 | err = -EINVAL; | |
111 | if (root != NULL) | |
112 | err = insert_resource(root, res); | |
113 | ||
114 | if (err) { | |
096e6f67 | 115 | dev_err(&dev->dev, "BAR %d: %s of %s %pR\n", |
80ccba11 BH |
116 | resource, |
117 | root ? "address space collision on" : | |
118 | "no parent found for", | |
096e6f67 | 119 | dtype, res); |
1da177e4 LT |
120 | } |
121 | ||
122 | return err; | |
123 | } | |
124 | ||
125 | int pci_assign_resource(struct pci_dev *dev, int resno) | |
126 | { | |
127 | struct pci_bus *bus = dev->bus; | |
128 | struct resource *res = dev->resource + resno; | |
e31dd6e4 | 129 | resource_size_t size, min, align; |
1da177e4 LT |
130 | int ret; |
131 | ||
022edd86 | 132 | size = resource_size(res); |
1da177e4 | 133 | min = (res->flags & IORESOURCE_IO) ? PCIBIOS_MIN_IO : PCIBIOS_MIN_MEM; |
88452565 IK |
134 | |
135 | align = resource_alignment(res); | |
136 | if (!align) { | |
80ccba11 | 137 | dev_err(&dev->dev, "BAR %d: can't allocate resource (bogus " |
096e6f67 BH |
138 | "alignment) %pR flags %#lx\n", |
139 | resno, res, res->flags); | |
88452565 IK |
140 | return -EINVAL; |
141 | } | |
1da177e4 LT |
142 | |
143 | /* First, try exact prefetching match.. */ | |
144 | ret = pci_bus_alloc_resource(bus, res, size, align, min, | |
145 | IORESOURCE_PREFETCH, | |
146 | pcibios_align_resource, dev); | |
147 | ||
148 | if (ret < 0 && (res->flags & IORESOURCE_PREFETCH)) { | |
149 | /* | |
150 | * That failed. | |
151 | * | |
152 | * But a prefetching area can handle a non-prefetching | |
153 | * window (it will just not perform as well). | |
154 | */ | |
155 | ret = pci_bus_alloc_resource(bus, res, size, align, min, 0, | |
156 | pcibios_align_resource, dev); | |
157 | } | |
158 | ||
159 | if (ret) { | |
096e6f67 BH |
160 | dev_err(&dev->dev, "BAR %d: can't allocate %s resource %pR\n", |
161 | resno, res->flags & IORESOURCE_IO ? "I/O" : "mem", res); | |
88452565 IK |
162 | } else { |
163 | res->flags &= ~IORESOURCE_STARTALIGN; | |
164 | if (resno < PCI_BRIDGE_RESOURCES) | |
165 | pci_update_resource(dev, res, resno); | |
1da177e4 LT |
166 | } |
167 | ||
168 | return ret; | |
169 | } | |
170 | ||
2baad5f9 | 171 | #if 0 |
75acfeca KG |
172 | int pci_assign_resource_fixed(struct pci_dev *dev, int resno) |
173 | { | |
174 | struct pci_bus *bus = dev->bus; | |
175 | struct resource *res = dev->resource + resno; | |
176 | unsigned int type_mask; | |
177 | int i, ret = -EBUSY; | |
178 | ||
179 | type_mask = IORESOURCE_IO | IORESOURCE_MEM | IORESOURCE_PREFETCH; | |
180 | ||
181 | for (i = 0; i < PCI_BUS_NUM_RESOURCES; i++) { | |
182 | struct resource *r = bus->resource[i]; | |
183 | if (!r) | |
184 | continue; | |
185 | ||
186 | /* type_mask must match */ | |
187 | if ((res->flags ^ r->flags) & type_mask) | |
188 | continue; | |
189 | ||
190 | ret = request_resource(r, res); | |
191 | ||
192 | if (ret == 0) | |
193 | break; | |
194 | } | |
195 | ||
196 | if (ret) { | |
096e6f67 BH |
197 | dev_err(&dev->dev, "BAR %d: can't allocate %s resource %pR\n", |
198 | resno, res->flags & IORESOURCE_IO ? "I/O" : "mem", res); | |
75acfeca KG |
199 | } else if (resno < PCI_BRIDGE_RESOURCES) { |
200 | pci_update_resource(dev, res, resno); | |
201 | } | |
202 | ||
203 | return ret; | |
204 | } | |
205 | EXPORT_SYMBOL_GPL(pci_assign_resource_fixed); | |
206 | #endif | |
207 | ||
1da177e4 | 208 | /* Sort resources by alignment */ |
96bde06a | 209 | void pdev_sort_resources(struct pci_dev *dev, struct resource_list *head) |
1da177e4 LT |
210 | { |
211 | int i; | |
212 | ||
213 | for (i = 0; i < PCI_NUM_RESOURCES; i++) { | |
214 | struct resource *r; | |
215 | struct resource_list *list, *tmp; | |
e31dd6e4 | 216 | resource_size_t r_align; |
1da177e4 LT |
217 | |
218 | r = &dev->resource[i]; | |
fb0f2b40 RB |
219 | |
220 | if (r->flags & IORESOURCE_PCI_FIXED) | |
221 | continue; | |
222 | ||
1da177e4 LT |
223 | if (!(r->flags) || r->parent) |
224 | continue; | |
88452565 IK |
225 | |
226 | r_align = resource_alignment(r); | |
1da177e4 | 227 | if (!r_align) { |
80ccba11 | 228 | dev_warn(&dev->dev, "BAR %d: bogus alignment " |
096e6f67 BH |
229 | "%pR flags %#lx\n", |
230 | i, r, r->flags); | |
1da177e4 LT |
231 | continue; |
232 | } | |
1da177e4 | 233 | for (list = head; ; list = list->next) { |
e31dd6e4 | 234 | resource_size_t align = 0; |
1da177e4 | 235 | struct resource_list *ln = list->next; |
88452565 IK |
236 | |
237 | if (ln) | |
238 | align = resource_alignment(ln->res); | |
239 | ||
1da177e4 LT |
240 | if (r_align > align) { |
241 | tmp = kmalloc(sizeof(*tmp), GFP_KERNEL); | |
242 | if (!tmp) | |
243 | panic("pdev_sort_resources(): " | |
244 | "kmalloc() failed!\n"); | |
245 | tmp->next = ln; | |
246 | tmp->res = r; | |
247 | tmp->dev = dev; | |
248 | list->next = tmp; | |
249 | break; | |
250 | } | |
251 | } | |
252 | } | |
253 | } | |
842de40d BH |
254 | |
255 | int pci_enable_resources(struct pci_dev *dev, int mask) | |
256 | { | |
257 | u16 cmd, old_cmd; | |
258 | int i; | |
259 | struct resource *r; | |
260 | ||
261 | pci_read_config_word(dev, PCI_COMMAND, &cmd); | |
262 | old_cmd = cmd; | |
263 | ||
264 | for (i = 0; i < PCI_NUM_RESOURCES; i++) { | |
265 | if (!(mask & (1 << i))) | |
266 | continue; | |
267 | ||
268 | r = &dev->resource[i]; | |
269 | ||
270 | if (!(r->flags & (IORESOURCE_IO | IORESOURCE_MEM))) | |
271 | continue; | |
272 | if ((i == PCI_ROM_RESOURCE) && | |
273 | (!(r->flags & IORESOURCE_ROM_ENABLE))) | |
274 | continue; | |
275 | ||
276 | if (!r->parent) { | |
277 | dev_err(&dev->dev, "device not available because of " | |
096e6f67 | 278 | "BAR %d %pR collisions\n", i, r); |
842de40d BH |
279 | return -EINVAL; |
280 | } | |
281 | ||
282 | if (r->flags & IORESOURCE_IO) | |
283 | cmd |= PCI_COMMAND_IO; | |
284 | if (r->flags & IORESOURCE_MEM) | |
285 | cmd |= PCI_COMMAND_MEMORY; | |
286 | } | |
287 | ||
288 | if (cmd != old_cmd) { | |
289 | dev_info(&dev->dev, "enabling device (%04x -> %04x)\n", | |
290 | old_cmd, cmd); | |
291 | pci_write_config_word(dev, PCI_COMMAND, cmd); | |
292 | } | |
293 | return 0; | |
294 | } |