[deliverable/linux.git] / drivers / pcmcia / at91_cf.c

/*
 * at91_cf.c -- AT91 CompactFlash controller driver
 *
 * Copyright (C) 2005 David Brownell
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 */

#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/sched.h>
#include <linux/platform_device.h>
#include <linux/errno.h>
#include <linux/init.h>
#include <linux/interrupt.h>

#include <pcmcia/ss.h>

#include <asm/hardware.h>
#include <asm/io.h>
#include <asm/sizes.h>

#include <asm/arch/at91rm9200.h>
#include <asm/arch/board.h>
#include <asm/arch/gpio.h>


/*
 * A0..A10 work in each range; A23 indicates I/O space;  A25 is CFRNW;
 * some other bit in {A24,A22..A11} is nREG to flag memory access
 * (vs attributes).  So more than 2KB/region would just be waste.
 * Note: These are offsets from the physical base address.
 */
#define	CF_ATTR_PHYS	(0)
#define	CF_IO_PHYS	(1 << 23)
#define	CF_MEM_PHYS	(0x017ff800)

/*--------------------------------------------------------------------------*/

static const char driver_name[] = "at91_cf";

struct at91_cf_socket {
	struct pcmcia_socket	socket;

	unsigned		present:1;

	struct platform_device	*pdev;
	struct at91_cf_data	*board;

	unsigned long		phys_baseaddr;
};

#define	SZ_2K			(2 * SZ_1K)

static inline int at91_cf_present(struct at91_cf_socket *cf)
{
	return !at91_get_gpio_value(cf->board->det_pin);
}

/*--------------------------------------------------------------------------*/

static int at91_cf_ss_init(struct pcmcia_socket *s)
{
	return 0;
}

static irqreturn_t at91_cf_irq(int irq, void *_cf)
{
	struct at91_cf_socket *cf = _cf;

	if (irq == cf->board->det_pin) {
		unsigned present = at91_cf_present(cf);

		/* kick pccard as needed */
		if (present != cf->present) {
			cf->present = present;
			pr_debug("%s: card %s\n", driver_name,
					present ? "present" : "gone");
			pcmcia_parse_events(&cf->socket, SS_DETECT);
		}
	}

	return IRQ_HANDLED;
}

static int at91_cf_get_status(struct pcmcia_socket *s, u_int *sp)
{
	struct at91_cf_socket	*cf;

	if (!sp)
		return -EINVAL;

	cf = container_of(s, struct at91_cf_socket, socket);

	/* NOTE: CF is always 3VCARD */
	if (at91_cf_present(cf)) {
		int rdy	= cf->board->irq_pin;	/* RDY/nIRQ */
		int vcc	= cf->board->vcc_pin;

		*sp = SS_DETECT | SS_3VCARD;
		if (!rdy || at91_get_gpio_value(rdy))
			*sp |= SS_READY;
		if (!vcc || at91_get_gpio_value(vcc))
			*sp |= SS_POWERON;
	} else
		*sp = 0;

	return 0;
}

static int
at91_cf_set_socket(struct pcmcia_socket *sock, struct socket_state_t *s)
{
	struct at91_cf_socket	*cf;

	cf = container_of(sock, struct at91_cf_socket, socket);

	/* switch Vcc if needed and possible */
	if (cf->board->vcc_pin) {
		switch (s->Vcc) {
			case 0:
				at91_set_gpio_value(cf->board->vcc_pin, 0);
				break;
			case 33:
				at91_set_gpio_value(cf->board->vcc_pin, 1);
				break;
			default:
				return -EINVAL;
		}
	}

	/* toggle reset if needed */
	at91_set_gpio_value(cf->board->rst_pin, s->flags & SS_RESET);

	pr_debug("%s: Vcc %d, io_irq %d, flags %04x csc %04x\n",
		driver_name, s->Vcc, s->io_irq, s->flags, s->csc_mask);

	return 0;
}

static int at91_cf_ss_suspend(struct pcmcia_socket *s)
{
	return at91_cf_set_socket(s, &dead_socket);
}

/* we already mapped the I/O region */
static int at91_cf_set_io_map(struct pcmcia_socket *s, struct pccard_io_map *io)
{
	struct at91_cf_socket	*cf;
	u32			csr;

	cf = container_of(s, struct at91_cf_socket, socket);
	io->flags &= (MAP_ACTIVE | MAP_16BIT | MAP_AUTOSZ);

	/*
	 * Use 16 bit accesses unless/until we need 8-bit i/o space.
	 * Always set CSR4 ... PCMCIA won't always unmap things.
	 */
	csr = at91_sys_read(AT91_SMC_CSR(4)) & ~AT91_SMC_DBW;

	/*
	 * NOTE: this CF controller ignores IOIS16, so we can't really do
	 * MAP_AUTOSZ.  The 16bit mode allows single byte access on either
	 * D0-D7 (even addr) or D8-D15 (odd), so it's close enough for many
	 * purposes (and handles ide-cs).
	 *
	 * The 8bit mode is needed for odd byte access on D0-D7.  It seems
	 * some cards only like that way to get at the odd byte, despite
	 * CF 3.0 spec table 35 also giving the D8-D15 option.
	 */
	if (!(io->flags & (MAP_16BIT | MAP_AUTOSZ))) {
		csr |= AT91_SMC_DBW_8;
		pr_debug("%s: 8bit i/o bus\n", driver_name);
	} else {
		csr |= AT91_SMC_DBW_16;
		pr_debug("%s: 16bit i/o bus\n", driver_name);
	}
	at91_sys_write(AT91_SMC_CSR(4), csr);

	io->start = cf->socket.io_offset;
	io->stop = io->start + SZ_2K - 1;

	return 0;
}

/* pcmcia layer maps/unmaps mem regions */
static int
at91_cf_set_mem_map(struct pcmcia_socket *s, struct pccard_mem_map *map)
{
	struct at91_cf_socket	*cf;

	if (map->card_start)
		return -EINVAL;

	cf = container_of(s, struct at91_cf_socket, socket);

	map->flags &= (MAP_ACTIVE | MAP_ATTRIB | MAP_16BIT);
	if (map->flags & MAP_ATTRIB)
		map->static_start = cf->phys_baseaddr + CF_ATTR_PHYS;
	else
		map->static_start = cf->phys_baseaddr + CF_MEM_PHYS;

	return 0;
}

static struct pccard_operations at91_cf_ops = {
	.init			= at91_cf_ss_init,
	.suspend		= at91_cf_ss_suspend,
	.get_status		= at91_cf_get_status,
	.set_socket		= at91_cf_set_socket,
	.set_io_map		= at91_cf_set_io_map,
	.set_mem_map		= at91_cf_set_mem_map,
};

/*--------------------------------------------------------------------------*/

static int __init at91_cf_probe(struct platform_device *pdev)
{
	struct at91_cf_socket	*cf;
	struct at91_cf_data	*board = pdev->dev.platform_data;
	struct resource		*io;
	unsigned int		csa;
	int			status;

	if (!board || !board->det_pin || !board->rst_pin)
		return -ENODEV;

	io = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	if (!io)
		return -ENODEV;

	cf = kcalloc(1, sizeof *cf, GFP_KERNEL);
	if (!cf)
		return -ENOMEM;

	cf->board = board;
	cf->pdev = pdev;
	cf->phys_baseaddr = io->start;
	platform_set_drvdata(pdev, cf);

	/* CF takes over CS4, CS5, CS6 */
	csa = at91_sys_read(AT91_EBI_CSA);
	at91_sys_write(AT91_EBI_CSA, csa | AT91_EBI_CS4A_SMC_COMPACTFLASH);

	/* nWAIT is _not_ a default setting */
	(void) at91_set_A_periph(AT91_PIN_PC6, 1);	/*  nWAIT */

	/*
	 * Static memory controller timing adjustments.
	 * REVISIT:  these timings are in terms of MCK cycles, so
	 * when MCK changes (cpufreq etc) so must these values...
	 */
	at91_sys_write(AT91_SMC_CSR(4),
				  AT91_SMC_ACSS_STD
				| AT91_SMC_DBW_16
				| AT91_SMC_BAT
				| AT91_SMC_WSEN
				| AT91_SMC_NWS_(32)	/* wait states */
				| AT91_SMC_RWSETUP_(6)	/* setup time */
				| AT91_SMC_RWHOLD_(4)	/* hold time */
	);

	/* must be a GPIO; ergo must trigger on both edges */
	status = request_irq(board->det_pin, at91_cf_irq, 0, driver_name, cf);
	if (status < 0)
		goto fail0;
	device_init_wakeup(&pdev->dev, 1);

	/*
	 * The card driver will request this irq later as needed.
	 * but it causes lots of "irqNN: nobody cared" messages
	 * unless we report that we handle everything (sigh).
	 * (Note:  DK board doesn't wire the IRQ pin...)
	 */
	if (board->irq_pin) {
		status = request_irq(board->irq_pin, at91_cf_irq,
				IRQF_SHARED, driver_name, cf);
		if (status < 0)
			goto fail0a;
		cf->socket.pci_irq = board->irq_pin;
	} else
		cf->socket.pci_irq = NR_IRQS + 1;

	/* pcmcia layer only remaps "real" memory not iospace */
	cf->socket.io_offset = (unsigned long) ioremap(cf->phys_baseaddr + CF_IO_PHYS, SZ_2K);
	if (!cf->socket.io_offset) {
		status = -ENXIO;
		goto fail1;
	}

	/* reserve CS4, CS5, and CS6 regions; but use just CS4 */
	if (!request_mem_region(io->start, io->end + 1 - io->start,
				driver_name)) {
		status = -ENXIO;
		goto fail1;
	}

	pr_info("%s: irqs det #%d, io #%d\n", driver_name,
		board->det_pin, board->irq_pin);

	cf->socket.owner = THIS_MODULE;
	cf->socket.dev.dev = &pdev->dev;
	cf->socket.ops = &at91_cf_ops;
	cf->socket.resource_ops = &pccard_static_ops;
	cf->socket.features = SS_CAP_PCCARD | SS_CAP_STATIC_MAP
				| SS_CAP_MEM_ALIGN;
	cf->socket.map_size = SZ_2K;
	cf->socket.io[0].res = io;

	status = pcmcia_register_socket(&cf->socket);
	if (status < 0)
		goto fail2;

	return 0;

fail2:
	release_mem_region(io->start, io->end + 1 - io->start);
fail1:
	if (cf->socket.io_offset)
		iounmap((void __iomem *) cf->socket.io_offset);
	if (board->irq_pin)
		free_irq(board->irq_pin, cf);
fail0a:
	device_init_wakeup(&pdev->dev, 0);
	free_irq(board->det_pin, cf);
fail0:
	at91_sys_write(AT91_EBI_CSA, csa);
	kfree(cf);
	return status;
}

static int __exit at91_cf_remove(struct platform_device *pdev)
{
	struct at91_cf_socket	*cf = platform_get_drvdata(pdev);
	struct at91_cf_data	*board = cf->board;
	struct resource		*io = cf->socket.io[0].res;
	unsigned int		csa;

	pcmcia_unregister_socket(&cf->socket);
	if (board->irq_pin)
		free_irq(board->irq_pin, cf);
	device_init_wakeup(&pdev->dev, 0);
	free_irq(board->det_pin, cf);
	iounmap((void __iomem *) cf->socket.io_offset);
	release_mem_region(io->start, io->end + 1 - io->start);

	csa = at91_sys_read(AT91_EBI_CSA);
	at91_sys_write(AT91_EBI_CSA, csa & ~AT91_EBI_CS4A);

	kfree(cf);
	return 0;
}

#ifdef	CONFIG_PM

static int at91_cf_suspend(struct platform_device *pdev, pm_message_t mesg)
{
	struct at91_cf_socket	*cf = platform_get_drvdata(pdev);
	struct at91_cf_data	*board = cf->board;

	pcmcia_socket_dev_suspend(&pdev->dev, mesg);
	if (device_may_wakeup(&pdev->dev)) {
		enable_irq_wake(board->det_pin);
		if (board->irq_pin)
			enable_irq_wake(board->irq_pin);
	} else {
		disable_irq_wake(board->det_pin);
		if (board->irq_pin)
			disable_irq_wake(board->irq_pin);
	}
	return 0;
}

static int at91_cf_resume(struct platform_device *pdev)
{
	pcmcia_socket_dev_resume(&pdev->dev);
	return 0;
}

#else
#define	at91_cf_suspend		NULL
#define	at91_cf_resume		NULL
#endif

static struct platform_driver at91_cf_driver = {
	.driver = {
		.name		= (char *) driver_name,
		.owner		= THIS_MODULE,
	},
	.probe		= at91_cf_probe,
	.remove		= __exit_p(at91_cf_remove),
	.suspend	= at91_cf_suspend,
	.resume		= at91_cf_resume,
};

/*--------------------------------------------------------------------------*/

static int __init at91_cf_init(void)
{
	return platform_driver_register(&at91_cf_driver);
}
module_init(at91_cf_init);

static void __exit at91_cf_exit(void)
{
	platform_driver_unregister(&at91_cf_driver);
}
module_exit(at91_cf_exit);

MODULE_DESCRIPTION("AT91 Compact Flash Driver");
MODULE_AUTHOR("David Brownell");
MODULE_LICENSE("GPL");
Commit	Line	Data
2c1f3b7a AV	1	/*
	2	* at91_cf.c -- AT91 CompactFlash controller driver
	3	*
	4	* Copyright (C) 2005 David Brownell
	5	*
	6	* This program is free software; you can redistribute it and/or modify
	7	* it under the terms of the GNU General Public License as published by
	8	* the Free Software Foundation; either version 2 of the License, or
	9	* (at your option) any later version.
	10	*/
	11
	12	#include <linux/module.h>
	13	#include <linux/kernel.h>
	14	#include <linux/sched.h>
	15	#include <linux/platform_device.h>
	16	#include <linux/errno.h>
	17	#include <linux/init.h>
	18	#include <linux/interrupt.h>
	19
	20	#include <pcmcia/ss.h>
	21
	22	#include <asm/hardware.h>
	23	#include <asm/io.h>
	24	#include <asm/sizes.h>
	25
	26	#include <asm/arch/at91rm9200.h>
	27	#include <asm/arch/board.h>
	28	#include <asm/arch/gpio.h>
	29
	30
2c1f3b7a AV	31	/*
	32	* A0..A10 work in each range; A23 indicates I/O space; A25 is CFRNW;
	33	* some other bit in {A24,A22..A11} is nREG to flag memory access
	34	* (vs attributes). So more than 2KB/region would just be waste.
ebe5cfb3	35	* Note: These are offsets from the physical base address.
2c1f3b7a	36	*/
ebe5cfb3 AV	37	#define CF_ATTR_PHYS (0)
	38	#define CF_IO_PHYS (1 << 23)
	39	#define CF_MEM_PHYS (0x017ff800)
2c1f3b7a AV	40
	41	/--------------------------------------------------------------------------/
	42
	43	static const char driver_name[] = "at91_cf";
	44
	45	struct at91_cf_socket {
	46	struct pcmcia_socket socket;
	47
	48	unsigned present:1;
	49
	50	struct platform_device *pdev;
	51	struct at91_cf_data *board;
ebe5cfb3 AV	52
ebe5cfb3 AV	53	unsigned long phys_baseaddr;
2c1f3b7a AV	54	};
	55
	56	#define SZ_2K (2 * SZ_1K)
	57
	58	static inline int at91_cf_present(struct at91_cf_socket *cf)
	59	{
	60	return !at91_get_gpio_value(cf->board->det_pin);
	61	}
	62
	63	/--------------------------------------------------------------------------/
	64
	65	static int at91_cf_ss_init(struct pcmcia_socket *s)
	66	{
	67	return 0;
	68	}
	69
7d12e780	70	static irqreturn_t at91_cf_irq(int irq, void *_cf)
2c1f3b7a	71	{
c7bec5ab	72	struct at91_cf_socket *cf = _cf;
2c1f3b7a AV	73
	74	if (irq == cf->board->det_pin) {
	75	unsigned present = at91_cf_present(cf);
	76
	77	/* kick pccard as needed */
	78	if (present != cf->present) {
	79	cf->present = present;
2c536200 DB	80	pr_debug("%s: card %s\n", driver_name,
2c536200 DB	81	present ? "present" : "gone");
2c1f3b7a AV	82	pcmcia_parse_events(&cf->socket, SS_DETECT);
	83	}
	84	}
	85
	86	return IRQ_HANDLED;
	87	}
	88
	89	static int at91_cf_get_status(struct pcmcia_socket s, u_int sp)
	90	{
	91	struct at91_cf_socket *cf;
	92
	93	if (!sp)
	94	return -EINVAL;
	95
	96	cf = container_of(s, struct at91_cf_socket, socket);
	97
2c536200	98	/* NOTE: CF is always 3VCARD */
2c1f3b7a AV	99	if (at91_cf_present(cf)) {
	100	int rdy = cf->board->irq_pin; /* RDY/nIRQ */
	101	int vcc = cf->board->vcc_pin;
	102
	103	*sp = SS_DETECT \| SS_3VCARD;
	104	if (!rdy \|\| at91_get_gpio_value(rdy))
	105	*sp \|= SS_READY;
	106	if (!vcc \|\| at91_get_gpio_value(vcc))
	107	*sp \|= SS_POWERON;
	108	} else
	109	*sp = 0;
	110
	111	return 0;
	112	}
	113
2c536200 DB	114	static int
2c536200 DB	115	at91_cf_set_socket(struct pcmcia_socket sock, struct socket_state_t s)
2c1f3b7a AV	116	{
	117	struct at91_cf_socket *cf;
	118
	119	cf = container_of(sock, struct at91_cf_socket, socket);
	120
	121	/* switch Vcc if needed and possible */
	122	if (cf->board->vcc_pin) {
	123	switch (s->Vcc) {
	124	case 0:
	125	at91_set_gpio_value(cf->board->vcc_pin, 0);
	126	break;
	127	case 33:
	128	at91_set_gpio_value(cf->board->vcc_pin, 1);
	129	break;
	130	default:
	131	return -EINVAL;
	132	}
	133	}
	134
	135	/* toggle reset if needed */
	136	at91_set_gpio_value(cf->board->rst_pin, s->flags & SS_RESET);
	137
	138	pr_debug("%s: Vcc %d, io_irq %d, flags %04x csc %04x\n",
	139	driver_name, s->Vcc, s->io_irq, s->flags, s->csc_mask);
	140
	141	return 0;
	142	}
	143
	144	static int at91_cf_ss_suspend(struct pcmcia_socket *s)
	145	{
	146	return at91_cf_set_socket(s, &dead_socket);
	147	}
	148
	149	/* we already mapped the I/O region */
	150	static int at91_cf_set_io_map(struct pcmcia_socket s, struct pccard_io_map io)
	151	{
	152	struct at91_cf_socket *cf;
	153	u32 csr;
	154
	155	cf = container_of(s, struct at91_cf_socket, socket);
	156	io->flags &= (MAP_ACTIVE \| MAP_16BIT \| MAP_AUTOSZ);
	157
	158	/*
	159	* Use 16 bit accesses unless/until we need 8-bit i/o space.
	160	* Always set CSR4 ... PCMCIA won't always unmap things.
	161	*/
	162	csr = at91_sys_read(AT91_SMC_CSR(4)) & ~AT91_SMC_DBW;
	163
	164	/*
	165	* NOTE: this CF controller ignores IOIS16, so we can't really do
	166	* MAP_AUTOSZ. The 16bit mode allows single byte access on either
	167	* D0-D7 (even addr) or D8-D15 (odd), so it's close enough for many
	168	* purposes (and handles ide-cs).
	169	*
	170	* The 8bit mode is needed for odd byte access on D0-D7. It seems
	171	* some cards only like that way to get at the odd byte, despite
	172	* CF 3.0 spec table 35 also giving the D8-D15 option.
	173	*/
ebe5cfb3	174	if (!(io->flags & (MAP_16BIT \| MAP_AUTOSZ))) {
2c1f3b7a AV	175	csr \|= AT91_SMC_DBW_8;
	176	pr_debug("%s: 8bit i/o bus\n", driver_name);
	177	} else {
	178	csr \|= AT91_SMC_DBW_16;
	179	pr_debug("%s: 16bit i/o bus\n", driver_name);
	180	}
	181	at91_sys_write(AT91_SMC_CSR(4), csr);
	182
	183	io->start = cf->socket.io_offset;
	184	io->stop = io->start + SZ_2K - 1;
	185
	186	return 0;
	187	}
	188
	189	/* pcmcia layer maps/unmaps mem regions */
2c536200 DB	190	static int
2c536200 DB	191	at91_cf_set_mem_map(struct pcmcia_socket s, struct pccard_mem_map map)
2c1f3b7a AV	192	{
	193	struct at91_cf_socket *cf;
	194
	195	if (map->card_start)
	196	return -EINVAL;
	197
	198	cf = container_of(s, struct at91_cf_socket, socket);
	199
ebe5cfb3	200	map->flags &= (MAP_ACTIVE \| MAP_ATTRIB \| MAP_16BIT);
2c1f3b7a	201	if (map->flags & MAP_ATTRIB)
ebe5cfb3	202	map->static_start = cf->phys_baseaddr + CF_ATTR_PHYS;
2c1f3b7a	203	else
ebe5cfb3	204	map->static_start = cf->phys_baseaddr + CF_MEM_PHYS;
2c1f3b7a AV	205
	206	return 0;
	207	}
	208
	209	static struct pccard_operations at91_cf_ops = {
	210	.init = at91_cf_ss_init,
	211	.suspend = at91_cf_ss_suspend,
	212	.get_status = at91_cf_get_status,
	213	.set_socket = at91_cf_set_socket,
	214	.set_io_map = at91_cf_set_io_map,
	215	.set_mem_map = at91_cf_set_mem_map,
	216	};
	217
	218	/--------------------------------------------------------------------------/
	219
0db6095d	220	static int __init at91_cf_probe(struct platform_device *pdev)
2c1f3b7a AV	221	{
2c1f3b7a AV	222	struct at91_cf_socket *cf;
0db6095d	223	struct at91_cf_data *board = pdev->dev.platform_data;
2c536200	224	struct resource *io;
2c1f3b7a AV	225	unsigned int csa;
	226	int status;
	227
	228	if (!board \|\| !board->det_pin \|\| !board->rst_pin)
	229	return -ENODEV;
	230
2c536200 DB	231	io = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	232	if (!io)
	233	return -ENODEV;
	234
2c1f3b7a AV	235	cf = kcalloc(1, sizeof *cf, GFP_KERNEL);
	236	if (!cf)
	237	return -ENOMEM;
	238
	239	cf->board = board;
	240	cf->pdev = pdev;
ebe5cfb3	241	cf->phys_baseaddr = io->start;
0db6095d	242	platform_set_drvdata(pdev, cf);
2c1f3b7a AV	243
	244	/* CF takes over CS4, CS5, CS6 */
	245	csa = at91_sys_read(AT91_EBI_CSA);
	246	at91_sys_write(AT91_EBI_CSA, csa \| AT91_EBI_CS4A_SMC_COMPACTFLASH);
	247
2c1f3b7a AV	248	/* nWAIT is _not_ a default setting */
	249	(void) at91_set_A_periph(AT91_PIN_PC6, 1); /* nWAIT */
	250
	251	/*
	252	* Static memory controller timing adjustments.
	253	* REVISIT: these timings are in terms of MCK cycles, so
	254	* when MCK changes (cpufreq etc) so must these values...
	255	*/
2c536200 DB	256	at91_sys_write(AT91_SMC_CSR(4),
	257	AT91_SMC_ACSS_STD
	258	\| AT91_SMC_DBW_16
	259	\| AT91_SMC_BAT
	260	\| AT91_SMC_WSEN
	261	\| AT91_SMC_NWS_(32) /* wait states */
	262	\| AT91_SMC_RWSETUP_(6) /* setup time */
	263	\| AT91_SMC_RWHOLD_(4) /* hold time */
2c1f3b7a AV	264	);
	265
	266	/* must be a GPIO; ergo must trigger on both edges */
ebe5cfb3	267	status = request_irq(board->det_pin, at91_cf_irq, 0, driver_name, cf);
2c1f3b7a AV	268	if (status < 0)
2c1f3b7a AV	269	goto fail0;
0db6095d	270	device_init_wakeup(&pdev->dev, 1);
2c1f3b7a AV	271
	272	/*
	273	* The card driver will request this irq later as needed.
	274	* but it causes lots of "irqNN: nobody cared" messages
	275	* unless we report that we handle everything (sigh).
	276	* (Note: DK board doesn't wire the IRQ pin...)
	277	*/
	278	if (board->irq_pin) {
	279	status = request_irq(board->irq_pin, at91_cf_irq,
dace1453	280	IRQF_SHARED, driver_name, cf);
2c1f3b7a AV	281	if (status < 0)
	282	goto fail0a;
	283	cf->socket.pci_irq = board->irq_pin;
2c536200	284	} else
2c1f3b7a AV	285	cf->socket.pci_irq = NR_IRQS + 1;
	286
	287	/* pcmcia layer only remaps "real" memory not iospace */
ebe5cfb3 AV	288	cf->socket.io_offset = (unsigned long) ioremap(cf->phys_baseaddr + CF_IO_PHYS, SZ_2K);
	289	if (!cf->socket.io_offset) {
	290	status = -ENXIO;
2c1f3b7a	291	goto fail1;
ebe5cfb3	292	}
2c1f3b7a AV	293
2c1f3b7a AV	294	/* reserve CS4, CS5, and CS6 regions; but use just CS4 */
2c536200	295	if (!request_mem_region(io->start, io->end + 1 - io->start,
ebe5cfb3 AV	296	driver_name)) {
ebe5cfb3 AV	297	status = -ENXIO;
2c1f3b7a	298	goto fail1;
ebe5cfb3	299	}
2c1f3b7a AV	300
	301	pr_info("%s: irqs det #%d, io #%d\n", driver_name,
	302	board->det_pin, board->irq_pin);
	303
	304	cf->socket.owner = THIS_MODULE;
0db6095d	305	cf->socket.dev.dev = &pdev->dev;
2c1f3b7a AV	306	cf->socket.ops = &at91_cf_ops;
	307	cf->socket.resource_ops = &pccard_static_ops;
	308	cf->socket.features = SS_CAP_PCCARD \| SS_CAP_STATIC_MAP
	309	\| SS_CAP_MEM_ALIGN;
	310	cf->socket.map_size = SZ_2K;
2c536200	311	cf->socket.io[0].res = io;
2c1f3b7a AV	312
	313	status = pcmcia_register_socket(&cf->socket);
	314	if (status < 0)
	315	goto fail2;
	316
	317	return 0;
	318
	319	fail2:
2c536200	320	release_mem_region(io->start, io->end + 1 - io->start);
2c1f3b7a	321	fail1:
3efa9970 AL	322	if (cf->socket.io_offset)
3efa9970 AL	323	iounmap((void __iomem *) cf->socket.io_offset);
2c1f3b7a AV	324	if (board->irq_pin)
	325	free_irq(board->irq_pin, cf);
	326	fail0a:
1fbece15	327	device_init_wakeup(&pdev->dev, 0);
2c1f3b7a AV	328	free_irq(board->det_pin, cf);
	329	fail0:
	330	at91_sys_write(AT91_EBI_CSA, csa);
	331	kfree(cf);
	332	return status;
	333	}
	334
0db6095d	335	static int __exit at91_cf_remove(struct platform_device *pdev)
2c1f3b7a	336	{
0db6095d DB	337	struct at91_cf_socket *cf = platform_get_drvdata(pdev);
0db6095d DB	338	struct at91_cf_data *board = cf->board;
2c536200 DB	339	struct resource *io = cf->socket.io[0].res;
2c536200 DB	340	unsigned int csa;
2c1f3b7a AV	341
2c1f3b7a AV	342	pcmcia_unregister_socket(&cf->socket);
0db6095d DB	343	if (board->irq_pin)
0db6095d DB	344	free_irq(board->irq_pin, cf);
0db6095d	345	device_init_wakeup(&pdev->dev, 0);
ebe5cfb3	346	free_irq(board->det_pin, cf);
2c1f3b7a	347	iounmap((void __iomem *) cf->socket.io_offset);
2c536200	348	release_mem_region(io->start, io->end + 1 - io->start);
2c1f3b7a AV	349
	350	csa = at91_sys_read(AT91_EBI_CSA);
	351	at91_sys_write(AT91_EBI_CSA, csa & ~AT91_EBI_CS4A);
	352
	353	kfree(cf);
	354	return 0;
	355	}
	356
0db6095d DB	357	#ifdef CONFIG_PM
	358
	359	static int at91_cf_suspend(struct platform_device *pdev, pm_message_t mesg)
	360	{
	361	struct at91_cf_socket *cf = platform_get_drvdata(pdev);
	362	struct at91_cf_data *board = cf->board;
	363
	364	pcmcia_socket_dev_suspend(&pdev->dev, mesg);
1fbece15	365	if (device_may_wakeup(&pdev->dev)) {
0db6095d	366	enable_irq_wake(board->det_pin);
1fbece15 DB	367	if (board->irq_pin)
	368	enable_irq_wake(board->irq_pin);
	369	} else {
0db6095d	370	disable_irq_wake(board->det_pin);
1fbece15 DB	371	if (board->irq_pin)
1fbece15 DB	372	disable_irq_wake(board->irq_pin);
0db6095d	373	}
0db6095d DB	374	return 0;
	375	}
	376
	377	static int at91_cf_resume(struct platform_device *pdev)
	378	{
0db6095d DB	379	pcmcia_socket_dev_resume(&pdev->dev);
	380	return 0;
	381	}
	382
	383	#else
	384	#define at91_cf_suspend NULL
	385	#define at91_cf_resume NULL
	386	#endif
	387
	388	static struct platform_driver at91_cf_driver = {
	389	.driver = {
	390	.name = (char *) driver_name,
	391	.owner = THIS_MODULE,
	392	},
2c1f3b7a AV	393	.probe = at91_cf_probe,
2c1f3b7a AV	394	.remove = __exit_p(at91_cf_remove),
0db6095d DB	395	.suspend = at91_cf_suspend,
0db6095d DB	396	.resume = at91_cf_resume,
2c1f3b7a AV	397	};
	398
	399	/--------------------------------------------------------------------------/
	400
	401	static int __init at91_cf_init(void)
	402	{
0db6095d	403	return platform_driver_register(&at91_cf_driver);
2c1f3b7a AV	404	}
	405	module_init(at91_cf_init);
	406
	407	static void __exit at91_cf_exit(void)
	408	{
0db6095d	409	platform_driver_unregister(&at91_cf_driver);
2c1f3b7a AV	410	}
	411	module_exit(at91_cf_exit);
	412
	413	MODULE_DESCRIPTION("AT91 Compact Flash Driver");
	414	MODULE_AUTHOR("David Brownell");
	415	MODULE_LICENSE("GPL");