[deliverable/linux.git] / drivers / pcmcia / at91_cf.c

/*
 * at91_cf.c -- AT91 CompactFlash controller driver
 *
 * Copyright (C) 2005 David Brownell
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 */

#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/platform_device.h>
#include <linux/errno.h>
#include <linux/init.h>
#include <linux/interrupt.h>
#include <linux/slab.h>
#include <linux/gpio.h>
#include <linux/platform_data/atmel.h>

#include <pcmcia/ss.h>

#include <mach/hardware.h>
#include <asm/io.h>
#include <asm/sizes.h>

#include <mach/at91rm9200_mc.h>
#include <mach/at91_ramc.h>


/*
 * A0..A10 work in each range; A23 indicates I/O space;  A25 is CFRNW;
 * some other bit in {A24,A22..A11} is nREG to flag memory access
 * (vs attributes).  So more than 2KB/region would just be waste.
 * Note: These are offsets from the physical base address.
 */
#define	CF_ATTR_PHYS	(0)
#define	CF_IO_PHYS	(1 << 23)
#define	CF_MEM_PHYS	(0x017ff800)

/*--------------------------------------------------------------------------*/

struct at91_cf_socket {
	struct pcmcia_socket	socket;

	unsigned		present:1;

	struct platform_device	*pdev;
	struct at91_cf_data	*board;

	unsigned long		phys_baseaddr;
};

static inline int at91_cf_present(struct at91_cf_socket *cf)
{
	return !gpio_get_value(cf->board->det_pin);
}

/*--------------------------------------------------------------------------*/

static int at91_cf_ss_init(struct pcmcia_socket *s)
{
	return 0;
}

static irqreturn_t at91_cf_irq(int irq, void *_cf)
{
	struct at91_cf_socket *cf = _cf;

	if (irq == gpio_to_irq(cf->board->det_pin)) {
		unsigned present = at91_cf_present(cf);

		/* kick pccard as needed */
		if (present != cf->present) {
			cf->present = present;
			dev_dbg(&cf->pdev->dev, "card %s\n",
					present ? "present" : "gone");
			pcmcia_parse_events(&cf->socket, SS_DETECT);
		}
	}

	return IRQ_HANDLED;
}

static int at91_cf_get_status(struct pcmcia_socket *s, u_int *sp)
{
	struct at91_cf_socket	*cf;

	if (!sp)
		return -EINVAL;

	cf = container_of(s, struct at91_cf_socket, socket);

	/* NOTE: CF is always 3VCARD */
	if (at91_cf_present(cf)) {
		int rdy	= gpio_is_valid(cf->board->irq_pin);	/* RDY/nIRQ */
		int vcc	= gpio_is_valid(cf->board->vcc_pin);

		*sp = SS_DETECT | SS_3VCARD;
		if (!rdy || gpio_get_value(cf->board->irq_pin))
			*sp |= SS_READY;
		if (!vcc || gpio_get_value(cf->board->vcc_pin))
			*sp |= SS_POWERON;
	} else
		*sp = 0;

	return 0;
}

static int
at91_cf_set_socket(struct pcmcia_socket *sock, struct socket_state_t *s)
{
	struct at91_cf_socket	*cf;

	cf = container_of(sock, struct at91_cf_socket, socket);

	/* switch Vcc if needed and possible */
	if (gpio_is_valid(cf->board->vcc_pin)) {
		switch (s->Vcc) {
			case 0:
				gpio_set_value(cf->board->vcc_pin, 0);
				break;
			case 33:
				gpio_set_value(cf->board->vcc_pin, 1);
				break;
			default:
				return -EINVAL;
		}
	}

	/* toggle reset if needed */
	gpio_set_value(cf->board->rst_pin, s->flags & SS_RESET);

	dev_dbg(&cf->pdev->dev, "Vcc %d, io_irq %d, flags %04x csc %04x\n",
				s->Vcc, s->io_irq, s->flags, s->csc_mask);

	return 0;
}

static int at91_cf_ss_suspend(struct pcmcia_socket *s)
{
	return at91_cf_set_socket(s, &dead_socket);
}

/* we already mapped the I/O region */
static int at91_cf_set_io_map(struct pcmcia_socket *s, struct pccard_io_map *io)
{
	struct at91_cf_socket	*cf;
	u32			csr;

	cf = container_of(s, struct at91_cf_socket, socket);
	io->flags &= (MAP_ACTIVE | MAP_16BIT | MAP_AUTOSZ);

	/*
	 * Use 16 bit accesses unless/until we need 8-bit i/o space.
	 */
	csr = at91_ramc_read(0, AT91_SMC_CSR(cf->board->chipselect)) & ~AT91_SMC_DBW;

	/*
	 * NOTE: this CF controller ignores IOIS16, so we can't really do
	 * MAP_AUTOSZ.  The 16bit mode allows single byte access on either
	 * D0-D7 (even addr) or D8-D15 (odd), so it's close enough for many
	 * purposes (and handles ide-cs).
	 *
	 * The 8bit mode is needed for odd byte access on D0-D7.  It seems
	 * some cards only like that way to get at the odd byte, despite
	 * CF 3.0 spec table 35 also giving the D8-D15 option.
	 */
	if (!(io->flags & (MAP_16BIT | MAP_AUTOSZ))) {
		csr |= AT91_SMC_DBW_8;
		dev_dbg(&cf->pdev->dev, "8bit i/o bus\n");
	} else {
		csr |= AT91_SMC_DBW_16;
		dev_dbg(&cf->pdev->dev, "16bit i/o bus\n");
	}
	at91_ramc_write(0, AT91_SMC_CSR(cf->board->chipselect), csr);

	io->start = cf->socket.io_offset;
	io->stop = io->start + SZ_2K - 1;

	return 0;
}

/* pcmcia layer maps/unmaps mem regions */
static int
at91_cf_set_mem_map(struct pcmcia_socket *s, struct pccard_mem_map *map)
{
	struct at91_cf_socket	*cf;

	if (map->card_start)
		return -EINVAL;

	cf = container_of(s, struct at91_cf_socket, socket);

	map->flags &= (MAP_ACTIVE | MAP_ATTRIB | MAP_16BIT);
	if (map->flags & MAP_ATTRIB)
		map->static_start = cf->phys_baseaddr + CF_ATTR_PHYS;
	else
		map->static_start = cf->phys_baseaddr + CF_MEM_PHYS;

	return 0;
}

static struct pccard_operations at91_cf_ops = {
	.init			= at91_cf_ss_init,
	.suspend		= at91_cf_ss_suspend,
	.get_status		= at91_cf_get_status,
	.set_socket		= at91_cf_set_socket,
	.set_io_map		= at91_cf_set_io_map,
	.set_mem_map		= at91_cf_set_mem_map,
};

/*--------------------------------------------------------------------------*/

static int __init at91_cf_probe(struct platform_device *pdev)
{
	struct at91_cf_socket	*cf;
	struct at91_cf_data	*board = pdev->dev.platform_data;
	struct resource		*io;
	int			status;

	if (!board || !gpio_is_valid(board->det_pin) || !gpio_is_valid(board->rst_pin))
		return -ENODEV;

	io = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	if (!io)
		return -ENODEV;

	cf = kzalloc(sizeof *cf, GFP_KERNEL);
	if (!cf)
		return -ENOMEM;

	cf->board = board;
	cf->pdev = pdev;
	cf->phys_baseaddr = io->start;
	platform_set_drvdata(pdev, cf);

	/* must be a GPIO; ergo must trigger on both edges */
	status = gpio_request(board->det_pin, "cf_det");
	if (status < 0)
		goto fail0;
	status = request_irq(gpio_to_irq(board->det_pin), at91_cf_irq, 0, "at91_cf detect", cf);
	if (status < 0)
		goto fail00;
	device_init_wakeup(&pdev->dev, 1);

	status = gpio_request(board->rst_pin, "cf_rst");
	if (status < 0)
		goto fail0a;

	if (gpio_is_valid(board->vcc_pin)) {
		status = gpio_request(board->vcc_pin, "cf_vcc");
		if (status < 0)
			goto fail0b;
	}

	/*
	 * The card driver will request this irq later as needed.
	 * but it causes lots of "irqNN: nobody cared" messages
	 * unless we report that we handle everything (sigh).
	 * (Note:  DK board doesn't wire the IRQ pin...)
	 */
	if (gpio_is_valid(board->irq_pin)) {
		status = gpio_request(board->irq_pin, "cf_irq");
		if (status < 0)
			goto fail0c;
		status = request_irq(gpio_to_irq(board->irq_pin), at91_cf_irq,
				IRQF_SHARED, "at91_cf", cf);
		if (status < 0)
			goto fail0d;
		cf->socket.pci_irq = gpio_to_irq(board->irq_pin);
	} else
		cf->socket.pci_irq = nr_irqs + 1;

	/* pcmcia layer only remaps "real" memory not iospace */
	cf->socket.io_offset = (unsigned long)
			ioremap(cf->phys_baseaddr + CF_IO_PHYS, SZ_2K);
	if (!cf->socket.io_offset) {
		status = -ENXIO;
		goto fail1;
	}

	/* reserve chip-select regions */
	if (!request_mem_region(io->start, resource_size(io), "at91_cf")) {
		status = -ENXIO;
		goto fail1;
	}

	dev_info(&pdev->dev, "irqs det #%d, io #%d\n",
		gpio_to_irq(board->det_pin), gpio_to_irq(board->irq_pin));

	cf->socket.owner = THIS_MODULE;
	cf->socket.dev.parent = &pdev->dev;
	cf->socket.ops = &at91_cf_ops;
	cf->socket.resource_ops = &pccard_static_ops;
	cf->socket.features = SS_CAP_PCCARD | SS_CAP_STATIC_MAP
				| SS_CAP_MEM_ALIGN;
	cf->socket.map_size = SZ_2K;
	cf->socket.io[0].res = io;

	status = pcmcia_register_socket(&cf->socket);
	if (status < 0)
		goto fail2;

	return 0;

fail2:
	release_mem_region(io->start, resource_size(io));
fail1:
	if (cf->socket.io_offset)
		iounmap((void __iomem *) cf->socket.io_offset);
	if (gpio_is_valid(board->irq_pin)) {
		free_irq(gpio_to_irq(board->irq_pin), cf);
fail0d:
		gpio_free(board->irq_pin);
	}
fail0c:
	if (gpio_is_valid(board->vcc_pin))
		gpio_free(board->vcc_pin);
fail0b:
	gpio_free(board->rst_pin);
fail0a:
	device_init_wakeup(&pdev->dev, 0);
	free_irq(gpio_to_irq(board->det_pin), cf);
fail00:
	gpio_free(board->det_pin);
fail0:
	kfree(cf);
	return status;
}

static int __exit at91_cf_remove(struct platform_device *pdev)
{
	struct at91_cf_socket	*cf = platform_get_drvdata(pdev);
	struct at91_cf_data	*board = cf->board;
	struct resource		*io = cf->socket.io[0].res;

	pcmcia_unregister_socket(&cf->socket);
	release_mem_region(io->start, resource_size(io));
	iounmap((void __iomem *) cf->socket.io_offset);
	if (gpio_is_valid(board->irq_pin)) {
		free_irq(gpio_to_irq(board->irq_pin), cf);
		gpio_free(board->irq_pin);
	}
	if (gpio_is_valid(board->vcc_pin))
		gpio_free(board->vcc_pin);
	gpio_free(board->rst_pin);
	device_init_wakeup(&pdev->dev, 0);
	free_irq(gpio_to_irq(board->det_pin), cf);
	gpio_free(board->det_pin);
	kfree(cf);
	return 0;
}

#ifdef	CONFIG_PM

static int at91_cf_suspend(struct platform_device *pdev, pm_message_t mesg)
{
	struct at91_cf_socket	*cf = platform_get_drvdata(pdev);
	struct at91_cf_data	*board = cf->board;

	if (device_may_wakeup(&pdev->dev)) {
		enable_irq_wake(gpio_to_irq(board->det_pin));
		if (gpio_is_valid(board->irq_pin))
			enable_irq_wake(gpio_to_irq(board->irq_pin));
	}
	return 0;
}

static int at91_cf_resume(struct platform_device *pdev)
{
	struct at91_cf_socket	*cf = platform_get_drvdata(pdev);
	struct at91_cf_data	*board = cf->board;

	if (device_may_wakeup(&pdev->dev)) {
		disable_irq_wake(gpio_to_irq(board->det_pin));
		if (gpio_is_valid(board->irq_pin))
			disable_irq_wake(gpio_to_irq(board->irq_pin));
	}

	return 0;
}

#else
#define	at91_cf_suspend		NULL
#define	at91_cf_resume		NULL
#endif

static struct platform_driver at91_cf_driver = {
	.driver = {
		.name		= "at91_cf",
		.owner		= THIS_MODULE,
	},
	.remove		= __exit_p(at91_cf_remove),
	.suspend	= at91_cf_suspend,
	.resume		= at91_cf_resume,
};

/*--------------------------------------------------------------------------*/

static int __init at91_cf_init(void)
{
	return platform_driver_probe(&at91_cf_driver, at91_cf_probe);
}
module_init(at91_cf_init);

static void __exit at91_cf_exit(void)
{
	platform_driver_unregister(&at91_cf_driver);
}
module_exit(at91_cf_exit);

MODULE_DESCRIPTION("AT91 Compact Flash Driver");
MODULE_AUTHOR("David Brownell");
MODULE_LICENSE("GPL");
MODULE_ALIAS("platform:at91_cf");
Commit	Line	Data
2c1f3b7a AV	1	/*
	2	* at91_cf.c -- AT91 CompactFlash controller driver
	3	*
	4	* Copyright (C) 2005 David Brownell
	5	*
	6	* This program is free software; you can redistribute it and/or modify
	7	* it under the terms of the GNU General Public License as published by
	8	* the Free Software Foundation; either version 2 of the License, or
	9	* (at your option) any later version.
	10	*/
	11
	12	#include <linux/module.h>
	13	#include <linux/kernel.h>
2c1f3b7a AV	14	#include <linux/platform_device.h>
	15	#include <linux/errno.h>
	16	#include <linux/init.h>
	17	#include <linux/interrupt.h>
5a0e3ad6	18	#include <linux/slab.h>
80af9e6d	19	#include <linux/gpio.h>
bcd2360c	20	#include <linux/platform_data/atmel.h>
2c1f3b7a AV	21
	22	#include <pcmcia/ss.h>
	23
a09e64fb	24	#include <mach/hardware.h>
2c1f3b7a AV	25	#include <asm/io.h>
	26	#include <asm/sizes.h>
	27
a09e64fb	28	#include <mach/at91rm9200_mc.h>
f363c407	29	#include <mach/at91_ramc.h>
2c1f3b7a AV	30
2c1f3b7a AV	31
2c1f3b7a AV	32	/*
	33	* A0..A10 work in each range; A23 indicates I/O space; A25 is CFRNW;
	34	* some other bit in {A24,A22..A11} is nREG to flag memory access
	35	* (vs attributes). So more than 2KB/region would just be waste.
ebe5cfb3	36	* Note: These are offsets from the physical base address.
2c1f3b7a	37	*/
ebe5cfb3 AV	38	#define CF_ATTR_PHYS (0)
	39	#define CF_IO_PHYS (1 << 23)
	40	#define CF_MEM_PHYS (0x017ff800)
2c1f3b7a AV	41
	42	/--------------------------------------------------------------------------/
	43
2c1f3b7a AV	44	struct at91_cf_socket {
	45	struct pcmcia_socket socket;
	46
	47	unsigned present:1;
	48
	49	struct platform_device *pdev;
	50	struct at91_cf_data *board;
ebe5cfb3 AV	51
ebe5cfb3 AV	52	unsigned long phys_baseaddr;
2c1f3b7a AV	53	};
2c1f3b7a AV	54
2c1f3b7a AV	55	static inline int at91_cf_present(struct at91_cf_socket *cf)
2c1f3b7a AV	56	{
4c1fc445	57	return !gpio_get_value(cf->board->det_pin);
2c1f3b7a AV	58	}
	59
	60	/--------------------------------------------------------------------------/
	61
	62	static int at91_cf_ss_init(struct pcmcia_socket *s)
	63	{
	64	return 0;
	65	}
	66
7d12e780	67	static irqreturn_t at91_cf_irq(int irq, void *_cf)
2c1f3b7a	68	{
c7bec5ab	69	struct at91_cf_socket *cf = _cf;
2c1f3b7a	70
80af9e6d	71	if (irq == gpio_to_irq(cf->board->det_pin)) {
2c1f3b7a AV	72	unsigned present = at91_cf_present(cf);
	73
	74	/* kick pccard as needed */
	75	if (present != cf->present) {
	76	cf->present = present;
40ca0209	77	dev_dbg(&cf->pdev->dev, "card %s\n",
2c536200	78	present ? "present" : "gone");
2c1f3b7a AV	79	pcmcia_parse_events(&cf->socket, SS_DETECT);
	80	}
	81	}
	82
	83	return IRQ_HANDLED;
	84	}
	85
	86	static int at91_cf_get_status(struct pcmcia_socket s, u_int sp)
	87	{
	88	struct at91_cf_socket *cf;
	89
	90	if (!sp)
	91	return -EINVAL;
	92
	93	cf = container_of(s, struct at91_cf_socket, socket);
	94
2c536200	95	/* NOTE: CF is always 3VCARD */
2c1f3b7a	96	if (at91_cf_present(cf)) {
80af9e6d JE	97	int rdy = gpio_is_valid(cf->board->irq_pin); /* RDY/nIRQ */
80af9e6d JE	98	int vcc = gpio_is_valid(cf->board->vcc_pin);
2c1f3b7a AV	99
2c1f3b7a AV	100	*sp = SS_DETECT \| SS_3VCARD;
e39506b4	101	if (!rdy \|\| gpio_get_value(cf->board->irq_pin))
2c1f3b7a	102	*sp \|= SS_READY;
e39506b4	103	if (!vcc \|\| gpio_get_value(cf->board->vcc_pin))
2c1f3b7a AV	104	*sp \|= SS_POWERON;
	105	} else
	106	*sp = 0;
	107
	108	return 0;
	109	}
	110
2c536200 DB	111	static int
2c536200 DB	112	at91_cf_set_socket(struct pcmcia_socket sock, struct socket_state_t s)
2c1f3b7a AV	113	{
	114	struct at91_cf_socket *cf;
	115
	116	cf = container_of(sock, struct at91_cf_socket, socket);
	117
	118	/* switch Vcc if needed and possible */
80af9e6d	119	if (gpio_is_valid(cf->board->vcc_pin)) {
2c1f3b7a AV	120	switch (s->Vcc) {
2c1f3b7a AV	121	case 0:
4c1fc445	122	gpio_set_value(cf->board->vcc_pin, 0);
2c1f3b7a AV	123	break;
2c1f3b7a AV	124	case 33:
4c1fc445	125	gpio_set_value(cf->board->vcc_pin, 1);
2c1f3b7a AV	126	break;
	127	default:
	128	return -EINVAL;
	129	}
	130	}
	131
	132	/* toggle reset if needed */
4c1fc445	133	gpio_set_value(cf->board->rst_pin, s->flags & SS_RESET);
2c1f3b7a	134
40ca0209 JE	135	dev_dbg(&cf->pdev->dev, "Vcc %d, io_irq %d, flags %04x csc %04x\n",
40ca0209 JE	136	s->Vcc, s->io_irq, s->flags, s->csc_mask);
2c1f3b7a AV	137
	138	return 0;
	139	}
	140
	141	static int at91_cf_ss_suspend(struct pcmcia_socket *s)
	142	{
	143	return at91_cf_set_socket(s, &dead_socket);
	144	}
	145
	146	/* we already mapped the I/O region */
	147	static int at91_cf_set_io_map(struct pcmcia_socket s, struct pccard_io_map io)
	148	{
	149	struct at91_cf_socket *cf;
	150	u32 csr;
	151
	152	cf = container_of(s, struct at91_cf_socket, socket);
	153	io->flags &= (MAP_ACTIVE \| MAP_16BIT \| MAP_AUTOSZ);
	154
	155	/*
	156	* Use 16 bit accesses unless/until we need 8-bit i/o space.
2c1f3b7a	157	*/
f363c407	158	csr = at91_ramc_read(0, AT91_SMC_CSR(cf->board->chipselect)) & ~AT91_SMC_DBW;
2c1f3b7a AV	159
	160	/*
	161	* NOTE: this CF controller ignores IOIS16, so we can't really do
	162	* MAP_AUTOSZ. The 16bit mode allows single byte access on either
	163	* D0-D7 (even addr) or D8-D15 (odd), so it's close enough for many
	164	* purposes (and handles ide-cs).
	165	*
	166	* The 8bit mode is needed for odd byte access on D0-D7. It seems
	167	* some cards only like that way to get at the odd byte, despite
	168	* CF 3.0 spec table 35 also giving the D8-D15 option.
	169	*/
ebe5cfb3	170	if (!(io->flags & (MAP_16BIT \| MAP_AUTOSZ))) {
2c1f3b7a	171	csr \|= AT91_SMC_DBW_8;
40ca0209	172	dev_dbg(&cf->pdev->dev, "8bit i/o bus\n");
2c1f3b7a AV	173	} else {
2c1f3b7a AV	174	csr \|= AT91_SMC_DBW_16;
40ca0209	175	dev_dbg(&cf->pdev->dev, "16bit i/o bus\n");
2c1f3b7a	176	}
f363c407	177	at91_ramc_write(0, AT91_SMC_CSR(cf->board->chipselect), csr);
2c1f3b7a AV	178
	179	io->start = cf->socket.io_offset;
	180	io->stop = io->start + SZ_2K - 1;
	181
	182	return 0;
	183	}
	184
	185	/* pcmcia layer maps/unmaps mem regions */
2c536200 DB	186	static int
2c536200 DB	187	at91_cf_set_mem_map(struct pcmcia_socket s, struct pccard_mem_map map)
2c1f3b7a AV	188	{
	189	struct at91_cf_socket *cf;
	190
	191	if (map->card_start)
	192	return -EINVAL;
	193
	194	cf = container_of(s, struct at91_cf_socket, socket);
	195
ebe5cfb3	196	map->flags &= (MAP_ACTIVE \| MAP_ATTRIB \| MAP_16BIT);
2c1f3b7a	197	if (map->flags & MAP_ATTRIB)
ebe5cfb3	198	map->static_start = cf->phys_baseaddr + CF_ATTR_PHYS;
2c1f3b7a	199	else
ebe5cfb3	200	map->static_start = cf->phys_baseaddr + CF_MEM_PHYS;
2c1f3b7a AV	201
	202	return 0;
	203	}
	204
	205	static struct pccard_operations at91_cf_ops = {
	206	.init = at91_cf_ss_init,
	207	.suspend = at91_cf_ss_suspend,
	208	.get_status = at91_cf_get_status,
	209	.set_socket = at91_cf_set_socket,
	210	.set_io_map = at91_cf_set_io_map,
	211	.set_mem_map = at91_cf_set_mem_map,
	212	};
	213
	214	/--------------------------------------------------------------------------/
	215
0db6095d	216	static int __init at91_cf_probe(struct platform_device *pdev)
2c1f3b7a AV	217	{
2c1f3b7a AV	218	struct at91_cf_socket *cf;
0db6095d	219	struct at91_cf_data *board = pdev->dev.platform_data;
2c536200	220	struct resource *io;
2c1f3b7a AV	221	int status;
2c1f3b7a AV	222
80af9e6d	223	if (!board \|\| !gpio_is_valid(board->det_pin) \|\| !gpio_is_valid(board->rst_pin))
2c1f3b7a AV	224	return -ENODEV;
2c1f3b7a AV	225
2c536200 DB	226	io = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	227	if (!io)
	228	return -ENODEV;
	229
cd861280	230	cf = kzalloc(sizeof *cf, GFP_KERNEL);
2c1f3b7a AV	231	if (!cf)
	232	return -ENOMEM;
	233
	234	cf->board = board;
	235	cf->pdev = pdev;
ebe5cfb3	236	cf->phys_baseaddr = io->start;
0db6095d	237	platform_set_drvdata(pdev, cf);
2c1f3b7a	238
2c1f3b7a	239	/* must be a GPIO; ergo must trigger on both edges */
4c1fc445	240	status = gpio_request(board->det_pin, "cf_det");
2c1f3b7a AV	241	if (status < 0)
2c1f3b7a AV	242	goto fail0;
40ca0209	243	status = request_irq(gpio_to_irq(board->det_pin), at91_cf_irq, 0, "at91_cf detect", cf);
4c1fc445 DB	244	if (status < 0)
4c1fc445 DB	245	goto fail00;
0db6095d	246	device_init_wakeup(&pdev->dev, 1);
2c1f3b7a	247
4c1fc445 DB	248	status = gpio_request(board->rst_pin, "cf_rst");
	249	if (status < 0)
	250	goto fail0a;
	251
80af9e6d	252	if (gpio_is_valid(board->vcc_pin)) {
4c1fc445 DB	253	status = gpio_request(board->vcc_pin, "cf_vcc");
	254	if (status < 0)
	255	goto fail0b;
	256	}
	257
2c1f3b7a AV	258	/*
	259	* The card driver will request this irq later as needed.
	260	* but it causes lots of "irqNN: nobody cared" messages
	261	* unless we report that we handle everything (sigh).
	262	* (Note: DK board doesn't wire the IRQ pin...)
	263	*/
80af9e6d	264	if (gpio_is_valid(board->irq_pin)) {
4c1fc445 DB	265	status = gpio_request(board->irq_pin, "cf_irq");
	266	if (status < 0)
	267	goto fail0c;
80af9e6d	268	status = request_irq(gpio_to_irq(board->irq_pin), at91_cf_irq,
40ca0209	269	IRQF_SHARED, "at91_cf", cf);
2c1f3b7a	270	if (status < 0)
4c1fc445	271	goto fail0d;
80af9e6d	272	cf->socket.pci_irq = gpio_to_irq(board->irq_pin);
2c536200	273	} else
9130adda	274	cf->socket.pci_irq = nr_irqs + 1;
2c1f3b7a AV	275
2c1f3b7a AV	276	/* pcmcia layer only remaps "real" memory not iospace */
4c1fc445 DB	277	cf->socket.io_offset = (unsigned long)
4c1fc445 DB	278	ioremap(cf->phys_baseaddr + CF_IO_PHYS, SZ_2K);
ebe5cfb3 AV	279	if (!cf->socket.io_offset) {
ebe5cfb3 AV	280	status = -ENXIO;
2c1f3b7a	281	goto fail1;
ebe5cfb3	282	}
2c1f3b7a	283
40a0017e	284	/* reserve chip-select regions */
40ca0209	285	if (!request_mem_region(io->start, resource_size(io), "at91_cf")) {
ebe5cfb3	286	status = -ENXIO;
2c1f3b7a	287	goto fail1;
ebe5cfb3	288	}
2c1f3b7a	289
40ca0209	290	dev_info(&pdev->dev, "irqs det #%d, io #%d\n",
80af9e6d	291	gpio_to_irq(board->det_pin), gpio_to_irq(board->irq_pin));
2c1f3b7a AV	292
2c1f3b7a AV	293	cf->socket.owner = THIS_MODULE;
e4a3c3f0	294	cf->socket.dev.parent = &pdev->dev;
2c1f3b7a AV	295	cf->socket.ops = &at91_cf_ops;
	296	cf->socket.resource_ops = &pccard_static_ops;
	297	cf->socket.features = SS_CAP_PCCARD \| SS_CAP_STATIC_MAP
	298	\| SS_CAP_MEM_ALIGN;
	299	cf->socket.map_size = SZ_2K;
2c536200	300	cf->socket.io[0].res = io;
2c1f3b7a AV	301
	302	status = pcmcia_register_socket(&cf->socket);
	303	if (status < 0)
	304	goto fail2;
	305
	306	return 0;
	307
	308	fail2:
28f65c11	309	release_mem_region(io->start, resource_size(io));
2c1f3b7a	310	fail1:
3efa9970 AL	311	if (cf->socket.io_offset)
3efa9970 AL	312	iounmap((void __iomem *) cf->socket.io_offset);
80af9e6d JE	313	if (gpio_is_valid(board->irq_pin)) {
80af9e6d JE	314	free_irq(gpio_to_irq(board->irq_pin), cf);
4c1fc445 DB	315	fail0d:
	316	gpio_free(board->irq_pin);
	317	}
	318	fail0c:
80af9e6d	319	if (gpio_is_valid(board->vcc_pin))
4c1fc445 DB	320	gpio_free(board->vcc_pin);
	321	fail0b:
	322	gpio_free(board->rst_pin);
2c1f3b7a	323	fail0a:
1fbece15	324	device_init_wakeup(&pdev->dev, 0);
80af9e6d	325	free_irq(gpio_to_irq(board->det_pin), cf);
4c1fc445 DB	326	fail00:
4c1fc445 DB	327	gpio_free(board->det_pin);
2c1f3b7a	328	fail0:
2c1f3b7a AV	329	kfree(cf);
	330	return status;
	331	}
	332
0db6095d	333	static int __exit at91_cf_remove(struct platform_device *pdev)
2c1f3b7a	334	{
0db6095d DB	335	struct at91_cf_socket *cf = platform_get_drvdata(pdev);
0db6095d DB	336	struct at91_cf_data *board = cf->board;
2c536200	337	struct resource *io = cf->socket.io[0].res;
2c1f3b7a AV	338
2c1f3b7a AV	339	pcmcia_unregister_socket(&cf->socket);
28f65c11	340	release_mem_region(io->start, resource_size(io));
4c1fc445	341	iounmap((void __iomem *) cf->socket.io_offset);
80af9e6d JE	342	if (gpio_is_valid(board->irq_pin)) {
80af9e6d JE	343	free_irq(gpio_to_irq(board->irq_pin), cf);
4c1fc445 DB	344	gpio_free(board->irq_pin);
4c1fc445 DB	345	}
80af9e6d	346	if (gpio_is_valid(board->vcc_pin))
4c1fc445 DB	347	gpio_free(board->vcc_pin);
4c1fc445 DB	348	gpio_free(board->rst_pin);
0db6095d	349	device_init_wakeup(&pdev->dev, 0);
80af9e6d	350	free_irq(gpio_to_irq(board->det_pin), cf);
4c1fc445	351	gpio_free(board->det_pin);
2c1f3b7a AV	352	kfree(cf);
	353	return 0;
	354	}
	355
0db6095d DB	356	#ifdef CONFIG_PM
	357
	358	static int at91_cf_suspend(struct platform_device *pdev, pm_message_t mesg)
	359	{
	360	struct at91_cf_socket *cf = platform_get_drvdata(pdev);
	361	struct at91_cf_data *board = cf->board;
	362
1fbece15	363	if (device_may_wakeup(&pdev->dev)) {
80af9e6d JE	364	enable_irq_wake(gpio_to_irq(board->det_pin));
	365	if (gpio_is_valid(board->irq_pin))
	366	enable_irq_wake(gpio_to_irq(board->irq_pin));
0db6095d	367	}
0db6095d DB	368	return 0;
	369	}
	370
	371	static int at91_cf_resume(struct platform_device *pdev)
	372	{
9af20376 MP	373	struct at91_cf_socket *cf = platform_get_drvdata(pdev);
	374	struct at91_cf_data *board = cf->board;
	375
	376	if (device_may_wakeup(&pdev->dev)) {
80af9e6d JE	377	disable_irq_wake(gpio_to_irq(board->det_pin));
	378	if (gpio_is_valid(board->irq_pin))
	379	disable_irq_wake(gpio_to_irq(board->irq_pin));
9af20376 MP	380	}
9af20376 MP	381
0db6095d DB	382	return 0;
	383	}
	384
	385	#else
	386	#define at91_cf_suspend NULL
	387	#define at91_cf_resume NULL
	388	#endif
	389
	390	static struct platform_driver at91_cf_driver = {
	391	.driver = {
40ca0209	392	.name = "at91_cf",
0db6095d DB	393	.owner = THIS_MODULE,
0db6095d DB	394	},
2c1f3b7a	395	.remove = __exit_p(at91_cf_remove),
0db6095d DB	396	.suspend = at91_cf_suspend,
0db6095d DB	397	.resume = at91_cf_resume,
2c1f3b7a AV	398	};
	399
	400	/--------------------------------------------------------------------------/
	401
	402	static int __init at91_cf_init(void)
	403	{
02c83595	404	return platform_driver_probe(&at91_cf_driver, at91_cf_probe);
2c1f3b7a AV	405	}
	406	module_init(at91_cf_init);
	407
	408	static void __exit at91_cf_exit(void)
	409	{
0db6095d	410	platform_driver_unregister(&at91_cf_driver);
2c1f3b7a AV	411	}
	412	module_exit(at91_cf_exit);
	413
	414	MODULE_DESCRIPTION("AT91 Compact Flash Driver");
	415	MODULE_AUTHOR("David Brownell");
	416	MODULE_LICENSE("GPL");
12c2c019	417	MODULE_ALIAS("platform:at91_cf");