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1da177e4 LT |
1 | /* |
2 | * Alchemy Semi Au1000 pcmcia driver include file | |
3 | * | |
4 | * Copyright 2001 MontaVista Software Inc. | |
5 | * Author: MontaVista Software, Inc. | |
6 | * ppopov@mvista.com or source@mvista.com | |
7 | * | |
8 | * This program is free software; you can distribute it and/or modify it | |
9 | * under the terms of the GNU General Public License (Version 2) as | |
10 | * published by the Free Software Foundation. | |
11 | * | |
12 | * This program is distributed in the hope it will be useful, but WITHOUT | |
13 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
14 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | |
15 | * for more details. | |
16 | * | |
17 | * You should have received a copy of the GNU General Public License along | |
18 | * with this program; if not, write to the Free Software Foundation, Inc., | |
19 | * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA. | |
20 | */ | |
21 | #ifndef __ASM_AU1000_PCMCIA_H | |
22 | #define __ASM_AU1000_PCMCIA_H | |
23 | ||
24 | /* include the world */ | |
1da177e4 LT |
25 | #include <pcmcia/cs_types.h> |
26 | #include <pcmcia/cs.h> | |
27 | #include <pcmcia/ss.h> | |
28 | #include <pcmcia/bulkmem.h> | |
29 | #include <pcmcia/cistpl.h> | |
30 | #include "cs_internal.h" | |
31 | ||
32 | #define AU1000_PCMCIA_POLL_PERIOD (2*HZ) | |
33 | #define AU1000_PCMCIA_IO_SPEED (255) | |
34 | #define AU1000_PCMCIA_MEM_SPEED (300) | |
35 | ||
36 | #define AU1X_SOCK0_IO 0xF00000000 | |
37 | #define AU1X_SOCK0_PHYS_ATTR 0xF40000000 | |
38 | #define AU1X_SOCK0_PHYS_MEM 0xF80000000 | |
39 | /* pseudo 32 bit phys addresses, which get fixed up to the | |
40 | * real 36 bit address in fixup_bigphys_addr() */ | |
41 | #define AU1X_SOCK0_PSEUDO_PHYS_ATTR 0xF4000000 | |
42 | #define AU1X_SOCK0_PSEUDO_PHYS_MEM 0xF8000000 | |
43 | ||
44 | /* pcmcia socket 1 needs external glue logic so the memory map | |
45 | * differs from board to board. | |
46 | */ | |
47 | #if defined(CONFIG_MIPS_PB1000) || defined(CONFIG_MIPS_PB1100) || defined(CONFIG_MIPS_PB1500) || defined(CONFIG_MIPS_PB1550) | |
48 | #define AU1X_SOCK1_IO 0xF08000000 | |
49 | #define AU1X_SOCK1_PHYS_ATTR 0xF48000000 | |
50 | #define AU1X_SOCK1_PHYS_MEM 0xF88000000 | |
51 | #define AU1X_SOCK1_PSEUDO_PHYS_ATTR 0xF4800000 | |
52 | #define AU1X_SOCK1_PSEUDO_PHYS_MEM 0xF8800000 | |
53 | #elif defined(CONFIG_MIPS_DB1000) || defined(CONFIG_MIPS_DB1100) || defined(CONFIG_MIPS_DB1500) || defined(CONFIG_MIPS_DB1550) | |
54 | #define AU1X_SOCK1_IO 0xF04000000 | |
55 | #define AU1X_SOCK1_PHYS_ATTR 0xF44000000 | |
56 | #define AU1X_SOCK1_PHYS_MEM 0xF84000000 | |
57 | #define AU1X_SOCK1_PSEUDO_PHYS_ATTR 0xF4400000 | |
58 | #define AU1X_SOCK1_PSEUDO_PHYS_MEM 0xF8400000 | |
59 | #endif | |
60 | ||
61 | struct pcmcia_state { | |
62 | unsigned detect: 1, | |
63 | ready: 1, | |
64 | wrprot: 1, | |
65 | bvd1: 1, | |
66 | bvd2: 1, | |
67 | vs_3v: 1, | |
68 | vs_Xv: 1; | |
69 | }; | |
70 | ||
71 | struct pcmcia_configure { | |
72 | unsigned sock: 8, | |
73 | vcc: 8, | |
74 | vpp: 8, | |
75 | output: 1, | |
76 | speaker: 1, | |
77 | reset: 1; | |
78 | }; | |
79 | ||
80 | struct pcmcia_irqs { | |
81 | int sock; | |
82 | int irq; | |
83 | const char *str; | |
84 | }; | |
85 | ||
86 | ||
87 | struct au1000_pcmcia_socket { | |
88 | struct pcmcia_socket socket; | |
89 | ||
90 | /* | |
91 | * Info from low level handler | |
92 | */ | |
93 | struct device *dev; | |
94 | unsigned int nr; | |
95 | unsigned int irq; | |
96 | ||
97 | /* | |
98 | * Core PCMCIA state | |
99 | */ | |
100 | struct pcmcia_low_level *ops; | |
101 | ||
102 | unsigned int status; | |
103 | socket_state_t cs_state; | |
104 | ||
105 | unsigned short spd_io[MAX_IO_WIN]; | |
106 | unsigned short spd_mem[MAX_WIN]; | |
107 | unsigned short spd_attr[MAX_WIN]; | |
108 | ||
109 | struct resource res_skt; | |
110 | struct resource res_io; | |
111 | struct resource res_mem; | |
112 | struct resource res_attr; | |
113 | ||
114 | void * virt_io; | |
115 | ioaddr_t phys_io; | |
116 | unsigned int phys_attr; | |
117 | unsigned int phys_mem; | |
118 | unsigned short speed_io, speed_attr, speed_mem; | |
119 | ||
120 | unsigned int irq_state; | |
121 | ||
122 | struct timer_list poll_timer; | |
123 | }; | |
124 | ||
125 | struct pcmcia_low_level { | |
126 | struct module *owner; | |
127 | ||
128 | int (*hw_init)(struct au1000_pcmcia_socket *); | |
129 | void (*hw_shutdown)(struct au1000_pcmcia_socket *); | |
130 | ||
131 | void (*socket_state)(struct au1000_pcmcia_socket *, struct pcmcia_state *); | |
132 | int (*configure_socket)(struct au1000_pcmcia_socket *, struct socket_state_t *); | |
133 | ||
134 | /* | |
135 | * Enable card status IRQs on (re-)initialisation. This can | |
136 | * be called at initialisation, power management event, or | |
137 | * pcmcia event. | |
138 | */ | |
139 | void (*socket_init)(struct au1000_pcmcia_socket *); | |
140 | ||
141 | /* | |
142 | * Disable card status IRQs and PCMCIA bus on suspend. | |
143 | */ | |
144 | void (*socket_suspend)(struct au1000_pcmcia_socket *); | |
145 | }; | |
146 | ||
147 | extern int au1x_board_init(struct device *dev); | |
148 | ||
149 | #endif /* __ASM_AU1000_PCMCIA_H */ |