[deliverable/linux.git] / drivers / pcmcia / cardbus.c

/*
 * cardbus.c -- 16-bit PCMCIA core support
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 *
 * The initial developer of the original code is David A. Hinds
 * <dahinds@users.sourceforge.net>.  Portions created by David A. Hinds
 * are Copyright (C) 1999 David A. Hinds.  All Rights Reserved.
 *
 * (C) 1999		David A. Hinds
 */

/*
 * Cardbus handling has been re-written to be more of a PCI bridge thing,
 * and the PCI code basically does all the resource handling.
 *
 *		Linus, Jan 2000
 */


#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/string.h>
#include <linux/slab.h>
#include <linux/mm.h>
#include <linux/pci.h>
#include <linux/ioport.h>
#include <asm/irq.h>
#include <asm/io.h>

#define IN_CARD_SERVICES
#include <pcmcia/cs_types.h>
#include <pcmcia/ss.h>
#include <pcmcia/cs.h>
#include <pcmcia/bulkmem.h>
#include <pcmcia/cistpl.h>
#include "cs_internal.h"

/*====================================================================*/

#define FIND_FIRST_BIT(n)	((n) - ((n) & ((n)-1)))

/* Offsets in the Expansion ROM Image Header */
#define ROM_SIGNATURE		0x0000	/* 2 bytes */
#define ROM_DATA_PTR		0x0018	/* 2 bytes */

/* Offsets in the CardBus PC Card Data Structure */
#define PCDATA_SIGNATURE	0x0000	/* 4 bytes */
#define PCDATA_VPD_PTR		0x0008	/* 2 bytes */
#define PCDATA_LENGTH		0x000a	/* 2 bytes */
#define PCDATA_REVISION		0x000c
#define PCDATA_IMAGE_SZ		0x0010	/* 2 bytes */
#define PCDATA_ROM_LEVEL	0x0012	/* 2 bytes */
#define PCDATA_CODE_TYPE	0x0014
#define PCDATA_INDICATOR	0x0015

/*=====================================================================

    Expansion ROM's have a special layout, and pointers specify an
    image number and an offset within that image.  xlate_rom_addr()
    converts an image/offset address to an absolute offset from the
    ROM's base address.
    
=====================================================================*/

static u_int xlate_rom_addr(void __iomem *b, u_int addr)
{
	u_int img = 0, ofs = 0, sz;
	u_short data;
	while ((readb(b) == 0x55) && (readb(b + 1) == 0xaa)) {
		if (img == (addr >> 28))
			return (addr & 0x0fffffff) + ofs;
		data = readb(b + ROM_DATA_PTR) + (readb(b + ROM_DATA_PTR + 1) << 8);
		sz = 512 * (readb(b + data + PCDATA_IMAGE_SZ) +
			    (readb(b + data + PCDATA_IMAGE_SZ + 1) << 8));
		if ((sz == 0) || (readb(b + data + PCDATA_INDICATOR) & 0x80))
			break;
		b += sz;
		ofs += sz;
		img++;
	}
	return 0;
}

/*=====================================================================

    These are similar to setup_cis_mem and release_cis_mem for 16-bit
    cards.  The "result" that is used externally is the cb_cis_virt
    pointer in the struct pcmcia_socket structure.
    
=====================================================================*/

static void cb_release_cis_mem(struct pcmcia_socket * s)
{
	if (s->cb_cis_virt) {
		cs_dbg(s, 1, "cb_release_cis_mem()\n");
		iounmap(s->cb_cis_virt);
		s->cb_cis_virt = NULL;
		s->cb_cis_res = NULL;
	}
}

static int cb_setup_cis_mem(struct pcmcia_socket * s, struct resource *res)
{
	unsigned int start, size;

	if (res == s->cb_cis_res)
		return 0;

	if (s->cb_cis_res)
		cb_release_cis_mem(s);

	start = res->start;
	size = res->end - start + 1;
	s->cb_cis_virt = ioremap(start, size);

	if (!s->cb_cis_virt)
		return -1;

	s->cb_cis_res = res;

	return 0;
}

/*=====================================================================

    This is used by the CIS processing code to read CIS information
    from a CardBus device.
    
=====================================================================*/

int read_cb_mem(struct pcmcia_socket * s, int space, u_int addr, u_int len, void *ptr)
{
	struct pci_dev *dev;
	struct resource *res;

	cs_dbg(s, 3, "read_cb_mem(%d, %#x, %u)\n", space, addr, len);

	dev = pci_get_slot(s->cb_dev->subordinate, 0);
	if (!dev)
		goto fail;

	/* Config space? */
	if (space == 0) {
		if (addr + len > 0x100)
			goto fail;
		for (; len; addr++, ptr++, len--)
			pci_read_config_byte(dev, addr, ptr);
		return 0;
	}

	res = dev->resource + space - 1;

	pci_dev_put(dev);

	if (!res->flags)
		goto fail;

	if (cb_setup_cis_mem(s, res) != 0)
		goto fail;

	if (space == 7) {
		addr = xlate_rom_addr(s->cb_cis_virt, addr);
		if (addr == 0)
			goto fail;
	}

	if (addr + len > res->end - res->start)
		goto fail;

	memcpy_fromio(ptr, s->cb_cis_virt + addr, len);
	return 0;

fail:
	memset(ptr, 0xff, len);
	return -1;
}

/*=====================================================================

    cb_alloc() and cb_free() allocate and free the kernel data
    structures for a Cardbus device, and handle the lowest level PCI
    device setup issues.
    
=====================================================================*/

/*
 * Since there is only one interrupt available to CardBus
 * devices, all devices downstream of this device must
 * be using this IRQ.
 */
static void cardbus_assign_irqs(struct pci_bus *bus, int irq)
{
	struct pci_dev *dev;

	list_for_each_entry(dev, &bus->devices, bus_list) {
		u8 irq_pin;

		pci_read_config_byte(dev, PCI_INTERRUPT_PIN, &irq_pin);
		if (irq_pin) {
			dev->irq = irq;
			pci_write_config_byte(dev, PCI_INTERRUPT_LINE, dev->irq);
		}

		if (dev->subordinate)
			cardbus_assign_irqs(dev->subordinate, irq);
	}
}

int cb_alloc(struct pcmcia_socket * s)
{
	struct pci_bus *bus = s->cb_dev->subordinate;
	struct pci_dev *dev;
	unsigned int max, pass;

	s->functions = pci_scan_slot(bus, PCI_DEVFN(0, 0));
//	pcibios_fixup_bus(bus);

	max = bus->secondary;
	for (pass = 0; pass < 2; pass++)
		list_for_each_entry(dev, &bus->devices, bus_list)
			if (dev->hdr_type == PCI_HEADER_TYPE_BRIDGE ||
			    dev->hdr_type == PCI_HEADER_TYPE_CARDBUS)
				max = pci_scan_bridge(bus, dev, max, pass);

	/*
	 * Size all resources below the CardBus controller.
	 */
	pci_bus_size_bridges(bus);
	pci_bus_assign_resources(bus);
	cardbus_assign_irqs(bus, s->pci_irq);

	/* socket specific tune function */
	if (s->tune_bridge)
		s->tune_bridge(s, bus);

	pci_enable_bridges(bus);
	pci_bus_add_devices(bus);

	s->irq.AssignedIRQ = s->pci_irq;
	return CS_SUCCESS;
}

void cb_free(struct pcmcia_socket * s)
{
	struct pci_dev *bridge = s->cb_dev;

	cb_release_cis_mem(s);

	if (bridge)
		pci_remove_behind_bridge(bridge);
}
Commit	Line	Data
1da177e4 LT	1	/*
	2	* cardbus.c -- 16-bit PCMCIA core support
	3	*
	4	* This program is free software; you can redistribute it and/or modify
	5	* it under the terms of the GNU General Public License version 2 as
	6	* published by the Free Software Foundation.
	7	*
	8	* The initial developer of the original code is David A. Hinds
	9	* <dahinds@users.sourceforge.net>. Portions created by David A. Hinds
	10	* are Copyright (C) 1999 David A. Hinds. All Rights Reserved.
	11	*
	12	* (C) 1999 David A. Hinds
	13	*/
	14
	15	/*
	16	* Cardbus handling has been re-written to be more of a PCI bridge thing,
	17	* and the PCI code basically does all the resource handling.
	18	*
	19	* Linus, Jan 2000
	20	*/
	21
	22
	23	#include <linux/module.h>
	24	#include <linux/kernel.h>
	25	#include <linux/string.h>
	26	#include <linux/slab.h>
	27	#include <linux/mm.h>
	28	#include <linux/pci.h>
	29	#include <linux/ioport.h>
	30	#include <asm/irq.h>
	31	#include <asm/io.h>
	32
	33	#define IN_CARD_SERVICES
1da177e4 LT	34	#include <pcmcia/cs_types.h>
	35	#include <pcmcia/ss.h>
	36	#include <pcmcia/cs.h>
	37	#include <pcmcia/bulkmem.h>
	38	#include <pcmcia/cistpl.h>
	39	#include "cs_internal.h"
	40
	41	/====================================================================/
	42
	43	#define FIND_FIRST_BIT(n) ((n) - ((n) & ((n)-1)))
	44
	45	/* Offsets in the Expansion ROM Image Header */
	46	#define ROM_SIGNATURE 0x0000 /* 2 bytes */
	47	#define ROM_DATA_PTR 0x0018 /* 2 bytes */
	48
	49	/* Offsets in the CardBus PC Card Data Structure */
	50	#define PCDATA_SIGNATURE 0x0000 /* 4 bytes */
	51	#define PCDATA_VPD_PTR 0x0008 /* 2 bytes */
	52	#define PCDATA_LENGTH 0x000a /* 2 bytes */
	53	#define PCDATA_REVISION 0x000c
	54	#define PCDATA_IMAGE_SZ 0x0010 /* 2 bytes */
	55	#define PCDATA_ROM_LEVEL 0x0012 /* 2 bytes */
	56	#define PCDATA_CODE_TYPE 0x0014
	57	#define PCDATA_INDICATOR 0x0015
	58
	59	/*=====================================================================
	60
	61	Expansion ROM's have a special layout, and pointers specify an
	62	image number and an offset within that image. xlate_rom_addr()
	63	converts an image/offset address to an absolute offset from the
	64	ROM's base address.
	65
	66	=====================================================================*/
	67
	68	static u_int xlate_rom_addr(void __iomem *b, u_int addr)
	69	{
	70	u_int img = 0, ofs = 0, sz;
	71	u_short data;
	72	while ((readb(b) == 0x55) && (readb(b + 1) == 0xaa)) {
	73	if (img == (addr >> 28))
	74	return (addr & 0x0fffffff) + ofs;
	75	data = readb(b + ROM_DATA_PTR) + (readb(b + ROM_DATA_PTR + 1) << 8);
	76	sz = 512 * (readb(b + data + PCDATA_IMAGE_SZ) +
	77	(readb(b + data + PCDATA_IMAGE_SZ + 1) << 8));
	78	if ((sz == 0) \|\| (readb(b + data + PCDATA_INDICATOR) & 0x80))
	79	break;
	80	b += sz;
	81	ofs += sz;
	82	img++;
	83	}
	84	return 0;
	85	}
	86
	87	/*=====================================================================
	88
	89	These are similar to setup_cis_mem and release_cis_mem for 16-bit
	90	cards. The "result" that is used externally is the cb_cis_virt
	91	pointer in the struct pcmcia_socket structure.
	92
	93	=====================================================================*/
	94
	95	static void cb_release_cis_mem(struct pcmcia_socket * s)
	96	{
	97	if (s->cb_cis_virt) {
98	cs_dbg(s, 1, "cb_release_cis_mem()\n");
99	iounmap(s->cb_cis_virt);
100	s->cb_cis_virt = NULL;
101	s->cb_cis_res = NULL;
102	}
103	}
104
105	static int cb_setup_cis_mem(struct pcmcia_socket * s, struct resource *res)
106	{
107	unsigned int start, size;
108
109	if (res == s->cb_cis_res)
110	return 0;
111
112	if (s->cb_cis_res)
113	cb_release_cis_mem(s);
114
115	start = res->start;
116	size = res->end - start + 1;
117	s->cb_cis_virt = ioremap(start, size);
118
119	if (!s->cb_cis_virt)
120	return -1;
121
122	s->cb_cis_res = res;
123
124	return 0;
125	}
126
127	/*=====================================================================
128
129	This is used by the CIS processing code to read CIS information
130	from a CardBus device.
131
132	=====================================================================*/
133
134	int read_cb_mem(struct pcmcia_socket * s, int space, u_int addr, u_int len, void *ptr)
135	{
136	struct pci_dev *dev;
137	struct resource *res;
138
139	cs_dbg(s, 3, "read_cb_mem(%d, %#x, %u)\n", space, addr, len);
140
74ae3221	141	dev = pci_get_slot(s->cb_dev->subordinate, 0);
1da177e4 LT	142	if (!dev)
	143	goto fail;
	144
	145	/* Config space? */
	146	if (space == 0) {
	147	if (addr + len > 0x100)
	148	goto fail;
	149	for (; len; addr++, ptr++, len--)
	150	pci_read_config_byte(dev, addr, ptr);
	151	return 0;
	152	}
	153
	154	res = dev->resource + space - 1;
74ae3221 AC	155
	156	pci_dev_put(dev);
	157
1da177e4 LT	158	if (!res->flags)
	159	goto fail;
	160
	161	if (cb_setup_cis_mem(s, res) != 0)
	162	goto fail;
	163
	164	if (space == 7) {
	165	addr = xlate_rom_addr(s->cb_cis_virt, addr);
	166	if (addr == 0)
	167	goto fail;
	168	}
	169
	170	if (addr + len > res->end - res->start)
	171	goto fail;
	172
	173	memcpy_fromio(ptr, s->cb_cis_virt + addr, len);
	174	return 0;
	175
	176	fail:
	177	memset(ptr, 0xff, len);
	178	return -1;
	179	}
	180
	181	/*=====================================================================
	182
	183	cb_alloc() and cb_free() allocate and free the kernel data
	184	structures for a Cardbus device, and handle the lowest level PCI
	185	device setup issues.
	186
	187	=====================================================================*/
	188
	189	/*
	190	* Since there is only one interrupt available to CardBus
	191	* devices, all devices downstream of this device must
	192	* be using this IRQ.
	193	*/
	194	static void cardbus_assign_irqs(struct pci_bus *bus, int irq)
	195	{
	196	struct pci_dev *dev;
	197
	198	list_for_each_entry(dev, &bus->devices, bus_list) {
	199	u8 irq_pin;
	200
	201	pci_read_config_byte(dev, PCI_INTERRUPT_PIN, &irq_pin);
	202	if (irq_pin) {
	203	dev->irq = irq;
	204	pci_write_config_byte(dev, PCI_INTERRUPT_LINE, dev->irq);
	205	}
	206
	207	if (dev->subordinate)
	208	cardbus_assign_irqs(dev->subordinate, irq);
	209	}
	210	}
	211
	212	int cb_alloc(struct pcmcia_socket * s)
	213	{
	214	struct pci_bus *bus = s->cb_dev->subordinate;
	215	struct pci_dev *dev;
	216	unsigned int max, pass;
	217
	218	s->functions = pci_scan_slot(bus, PCI_DEVFN(0, 0));
	219	// pcibios_fixup_bus(bus);
	220
	221	max = bus->secondary;
222	for (pass = 0; pass < 2; pass++)
223	list_for_each_entry(dev, &bus->devices, bus_list)
224	if (dev->hdr_type == PCI_HEADER_TYPE_BRIDGE \|\|
225	dev->hdr_type == PCI_HEADER_TYPE_CARDBUS)
226	max = pci_scan_bridge(bus, dev, max, pass);
227
228	/*
229	* Size all resources below the CardBus controller.
230	*/
231	pci_bus_size_bridges(bus);
232	pci_bus_assign_resources(bus);
233	cardbus_assign_irqs(bus, s->pci_irq);
8c3520d4 DR	234
	235	/* socket specific tune function */
	236	if (s->tune_bridge)
	237	s->tune_bridge(s, bus);
	238
1da177e4 LT	239	pci_enable_bridges(bus);
	240	pci_bus_add_devices(bus);
	241
	242	s->irq.AssignedIRQ = s->pci_irq;
	243	return CS_SUCCESS;
	244	}
	245
	246	void cb_free(struct pcmcia_socket * s)
	247	{
	248	struct pci_dev *bridge = s->cb_dev;
	249
	250	cb_release_cis_mem(s);
	251
	252	if (bridge)
	253	pci_remove_behind_bridge(bridge);
	254	}