Commit | Line | Data |
---|---|---|
2744e8af LW |
1 | /* |
2 | * Core driver for the pin control subsystem | |
3 | * | |
befe5bdf | 4 | * Copyright (C) 2011-2012 ST-Ericsson SA |
2744e8af LW |
5 | * Written on behalf of Linaro for ST-Ericsson |
6 | * Based on bits of regulator core, gpio core and clk core | |
7 | * | |
8 | * Author: Linus Walleij <linus.walleij@linaro.org> | |
9 | * | |
b2b3e66e SW |
10 | * Copyright (C) 2012 NVIDIA CORPORATION. All rights reserved. |
11 | * | |
2744e8af LW |
12 | * License terms: GNU General Public License (GPL) version 2 |
13 | */ | |
14 | #define pr_fmt(fmt) "pinctrl core: " fmt | |
15 | ||
16 | #include <linux/kernel.h> | |
ab78029e | 17 | #include <linux/kref.h> |
a5a697cd | 18 | #include <linux/export.h> |
2744e8af LW |
19 | #include <linux/init.h> |
20 | #include <linux/device.h> | |
21 | #include <linux/slab.h> | |
2744e8af LW |
22 | #include <linux/err.h> |
23 | #include <linux/list.h> | |
2744e8af LW |
24 | #include <linux/sysfs.h> |
25 | #include <linux/debugfs.h> | |
26 | #include <linux/seq_file.h> | |
6d4ca1fb | 27 | #include <linux/pinctrl/consumer.h> |
2744e8af LW |
28 | #include <linux/pinctrl/pinctrl.h> |
29 | #include <linux/pinctrl/machine.h> | |
2afe8229 HZ |
30 | |
31 | #ifdef CONFIG_GPIOLIB | |
51e13c24 | 32 | #include <asm-generic/gpio.h> |
2afe8229 HZ |
33 | #endif |
34 | ||
2744e8af | 35 | #include "core.h" |
57291ce2 | 36 | #include "devicetree.h" |
2744e8af | 37 | #include "pinmux.h" |
ae6b4d85 | 38 | #include "pinconf.h" |
2744e8af | 39 | |
b2b3e66e | 40 | |
5b3aa5f7 DA |
41 | static bool pinctrl_dummy_state; |
42 | ||
42fed7ba | 43 | /* Mutex taken to protect pinctrl_list */ |
843aec96 | 44 | static DEFINE_MUTEX(pinctrl_list_mutex); |
42fed7ba PC |
45 | |
46 | /* Mutex taken to protect pinctrl_maps */ | |
47 | DEFINE_MUTEX(pinctrl_maps_mutex); | |
48 | ||
49 | /* Mutex taken to protect pinctrldev_list */ | |
843aec96 | 50 | static DEFINE_MUTEX(pinctrldev_list_mutex); |
57b676f9 SW |
51 | |
52 | /* Global list of pin control devices (struct pinctrl_dev) */ | |
42fed7ba | 53 | static LIST_HEAD(pinctrldev_list); |
2744e8af | 54 | |
57b676f9 | 55 | /* List of pin controller handles (struct pinctrl) */ |
befe5bdf LW |
56 | static LIST_HEAD(pinctrl_list); |
57 | ||
57b676f9 | 58 | /* List of pinctrl maps (struct pinctrl_maps) */ |
6f9e41f4 | 59 | LIST_HEAD(pinctrl_maps); |
b2b3e66e | 60 | |
befe5bdf | 61 | |
5b3aa5f7 DA |
62 | /** |
63 | * pinctrl_provide_dummies() - indicate if pinctrl provides dummy state support | |
64 | * | |
65 | * Usually this function is called by platforms without pinctrl driver support | |
66 | * but run with some shared drivers using pinctrl APIs. | |
67 | * After calling this function, the pinctrl core will return successfully | |
68 | * with creating a dummy state for the driver to keep going smoothly. | |
69 | */ | |
70 | void pinctrl_provide_dummies(void) | |
71 | { | |
72 | pinctrl_dummy_state = true; | |
73 | } | |
74 | ||
2744e8af LW |
75 | const char *pinctrl_dev_get_name(struct pinctrl_dev *pctldev) |
76 | { | |
77 | /* We're not allowed to register devices without name */ | |
78 | return pctldev->desc->name; | |
79 | } | |
80 | EXPORT_SYMBOL_GPL(pinctrl_dev_get_name); | |
81 | ||
d6e99abb HZ |
82 | const char *pinctrl_dev_get_devname(struct pinctrl_dev *pctldev) |
83 | { | |
84 | return dev_name(pctldev->dev); | |
85 | } | |
86 | EXPORT_SYMBOL_GPL(pinctrl_dev_get_devname); | |
87 | ||
2744e8af LW |
88 | void *pinctrl_dev_get_drvdata(struct pinctrl_dev *pctldev) |
89 | { | |
90 | return pctldev->driver_data; | |
91 | } | |
92 | EXPORT_SYMBOL_GPL(pinctrl_dev_get_drvdata); | |
93 | ||
94 | /** | |
9dfac4fd LW |
95 | * get_pinctrl_dev_from_devname() - look up pin controller device |
96 | * @devname: the name of a device instance, as returned by dev_name() | |
2744e8af LW |
97 | * |
98 | * Looks up a pin control device matching a certain device name or pure device | |
99 | * pointer, the pure device pointer will take precedence. | |
100 | */ | |
9dfac4fd | 101 | struct pinctrl_dev *get_pinctrl_dev_from_devname(const char *devname) |
2744e8af LW |
102 | { |
103 | struct pinctrl_dev *pctldev = NULL; | |
2744e8af | 104 | |
9dfac4fd LW |
105 | if (!devname) |
106 | return NULL; | |
107 | ||
44d5f7bb LW |
108 | mutex_lock(&pinctrldev_list_mutex); |
109 | ||
2744e8af | 110 | list_for_each_entry(pctldev, &pinctrldev_list, node) { |
9dfac4fd | 111 | if (!strcmp(dev_name(pctldev->dev), devname)) { |
2744e8af | 112 | /* Matched on device name */ |
44d5f7bb LW |
113 | mutex_unlock(&pinctrldev_list_mutex); |
114 | return pctldev; | |
2744e8af LW |
115 | } |
116 | } | |
2744e8af | 117 | |
44d5f7bb LW |
118 | mutex_unlock(&pinctrldev_list_mutex); |
119 | ||
120 | return NULL; | |
2744e8af LW |
121 | } |
122 | ||
42fed7ba PC |
123 | struct pinctrl_dev *get_pinctrl_dev_from_of_node(struct device_node *np) |
124 | { | |
125 | struct pinctrl_dev *pctldev; | |
126 | ||
127 | mutex_lock(&pinctrldev_list_mutex); | |
128 | ||
129 | list_for_each_entry(pctldev, &pinctrldev_list, node) | |
130 | if (pctldev->dev->of_node == np) { | |
131 | mutex_unlock(&pinctrldev_list_mutex); | |
132 | return pctldev; | |
133 | } | |
134 | ||
d463f82d | 135 | mutex_unlock(&pinctrldev_list_mutex); |
42fed7ba PC |
136 | |
137 | return NULL; | |
138 | } | |
139 | ||
ae6b4d85 LW |
140 | /** |
141 | * pin_get_from_name() - look up a pin number from a name | |
142 | * @pctldev: the pin control device to lookup the pin on | |
143 | * @name: the name of the pin to look up | |
144 | */ | |
145 | int pin_get_from_name(struct pinctrl_dev *pctldev, const char *name) | |
146 | { | |
706e8520 | 147 | unsigned i, pin; |
ae6b4d85 | 148 | |
706e8520 CP |
149 | /* The pin number can be retrived from the pin controller descriptor */ |
150 | for (i = 0; i < pctldev->desc->npins; i++) { | |
ae6b4d85 LW |
151 | struct pin_desc *desc; |
152 | ||
706e8520 | 153 | pin = pctldev->desc->pins[i].number; |
ae6b4d85 LW |
154 | desc = pin_desc_get(pctldev, pin); |
155 | /* Pin space may be sparse */ | |
156 | if (desc == NULL) | |
157 | continue; | |
158 | if (desc->name && !strcmp(name, desc->name)) | |
159 | return pin; | |
160 | } | |
161 | ||
162 | return -EINVAL; | |
163 | } | |
164 | ||
dcb5dbc3 DA |
165 | /** |
166 | * pin_get_name_from_id() - look up a pin name from a pin id | |
167 | * @pctldev: the pin control device to lookup the pin on | |
168 | * @name: the name of the pin to look up | |
169 | */ | |
170 | const char *pin_get_name(struct pinctrl_dev *pctldev, const unsigned pin) | |
171 | { | |
172 | const struct pin_desc *desc; | |
173 | ||
174 | desc = pin_desc_get(pctldev, pin); | |
175 | if (desc == NULL) { | |
176 | dev_err(pctldev->dev, "failed to get pin(%d) name\n", | |
177 | pin); | |
178 | return NULL; | |
179 | } | |
180 | ||
181 | return desc->name; | |
182 | } | |
183 | ||
2744e8af LW |
184 | /** |
185 | * pin_is_valid() - check if pin exists on controller | |
186 | * @pctldev: the pin control device to check the pin on | |
187 | * @pin: pin to check, use the local pin controller index number | |
188 | * | |
189 | * This tells us whether a certain pin exist on a certain pin controller or | |
190 | * not. Pin lists may be sparse, so some pins may not exist. | |
191 | */ | |
192 | bool pin_is_valid(struct pinctrl_dev *pctldev, int pin) | |
193 | { | |
194 | struct pin_desc *pindesc; | |
195 | ||
196 | if (pin < 0) | |
197 | return false; | |
198 | ||
42fed7ba | 199 | mutex_lock(&pctldev->mutex); |
2744e8af | 200 | pindesc = pin_desc_get(pctldev, pin); |
42fed7ba | 201 | mutex_unlock(&pctldev->mutex); |
2744e8af | 202 | |
57b676f9 | 203 | return pindesc != NULL; |
2744e8af LW |
204 | } |
205 | EXPORT_SYMBOL_GPL(pin_is_valid); | |
206 | ||
207 | /* Deletes a range of pin descriptors */ | |
208 | static void pinctrl_free_pindescs(struct pinctrl_dev *pctldev, | |
209 | const struct pinctrl_pin_desc *pins, | |
210 | unsigned num_pins) | |
211 | { | |
212 | int i; | |
213 | ||
2744e8af LW |
214 | for (i = 0; i < num_pins; i++) { |
215 | struct pin_desc *pindesc; | |
216 | ||
217 | pindesc = radix_tree_lookup(&pctldev->pin_desc_tree, | |
218 | pins[i].number); | |
219 | if (pindesc != NULL) { | |
220 | radix_tree_delete(&pctldev->pin_desc_tree, | |
221 | pins[i].number); | |
ca53c5f1 LW |
222 | if (pindesc->dynamic_name) |
223 | kfree(pindesc->name); | |
2744e8af LW |
224 | } |
225 | kfree(pindesc); | |
226 | } | |
2744e8af LW |
227 | } |
228 | ||
229 | static int pinctrl_register_one_pin(struct pinctrl_dev *pctldev, | |
230 | unsigned number, const char *name) | |
231 | { | |
232 | struct pin_desc *pindesc; | |
233 | ||
234 | pindesc = pin_desc_get(pctldev, number); | |
235 | if (pindesc != NULL) { | |
236 | pr_err("pin %d already registered on %s\n", number, | |
237 | pctldev->desc->name); | |
238 | return -EINVAL; | |
239 | } | |
240 | ||
241 | pindesc = kzalloc(sizeof(*pindesc), GFP_KERNEL); | |
95dcd4ae SW |
242 | if (pindesc == NULL) { |
243 | dev_err(pctldev->dev, "failed to alloc struct pin_desc\n"); | |
2744e8af | 244 | return -ENOMEM; |
95dcd4ae | 245 | } |
ae6b4d85 | 246 | |
2744e8af LW |
247 | /* Set owner */ |
248 | pindesc->pctldev = pctldev; | |
249 | ||
9af1e44f | 250 | /* Copy basic pin info */ |
8dc6ae4d | 251 | if (name) { |
ca53c5f1 LW |
252 | pindesc->name = name; |
253 | } else { | |
254 | pindesc->name = kasprintf(GFP_KERNEL, "PIN%u", number); | |
eb26cc9c SK |
255 | if (pindesc->name == NULL) { |
256 | kfree(pindesc); | |
ca53c5f1 | 257 | return -ENOMEM; |
eb26cc9c | 258 | } |
ca53c5f1 LW |
259 | pindesc->dynamic_name = true; |
260 | } | |
2744e8af | 261 | |
2744e8af | 262 | radix_tree_insert(&pctldev->pin_desc_tree, number, pindesc); |
2744e8af | 263 | pr_debug("registered pin %d (%s) on %s\n", |
ca53c5f1 | 264 | number, pindesc->name, pctldev->desc->name); |
2744e8af LW |
265 | return 0; |
266 | } | |
267 | ||
268 | static int pinctrl_register_pins(struct pinctrl_dev *pctldev, | |
269 | struct pinctrl_pin_desc const *pins, | |
270 | unsigned num_descs) | |
271 | { | |
272 | unsigned i; | |
273 | int ret = 0; | |
274 | ||
275 | for (i = 0; i < num_descs; i++) { | |
276 | ret = pinctrl_register_one_pin(pctldev, | |
277 | pins[i].number, pins[i].name); | |
278 | if (ret) | |
279 | return ret; | |
280 | } | |
281 | ||
282 | return 0; | |
283 | } | |
284 | ||
c8587eee CR |
285 | /** |
286 | * gpio_to_pin() - GPIO range GPIO number to pin number translation | |
287 | * @range: GPIO range used for the translation | |
288 | * @gpio: gpio pin to translate to a pin number | |
289 | * | |
290 | * Finds the pin number for a given GPIO using the specified GPIO range | |
291 | * as a base for translation. The distinction between linear GPIO ranges | |
292 | * and pin list based GPIO ranges is managed correctly by this function. | |
293 | * | |
294 | * This function assumes the gpio is part of the specified GPIO range, use | |
295 | * only after making sure this is the case (e.g. by calling it on the | |
296 | * result of successful pinctrl_get_device_gpio_range calls)! | |
297 | */ | |
298 | static inline int gpio_to_pin(struct pinctrl_gpio_range *range, | |
299 | unsigned int gpio) | |
300 | { | |
301 | unsigned int offset = gpio - range->base; | |
302 | if (range->pins) | |
303 | return range->pins[offset]; | |
304 | else | |
305 | return range->pin_base + offset; | |
306 | } | |
307 | ||
2744e8af LW |
308 | /** |
309 | * pinctrl_match_gpio_range() - check if a certain GPIO pin is in range | |
310 | * @pctldev: pin controller device to check | |
311 | * @gpio: gpio pin to check taken from the global GPIO pin space | |
312 | * | |
313 | * Tries to match a GPIO pin number to the ranges handled by a certain pin | |
314 | * controller, return the range or NULL | |
315 | */ | |
316 | static struct pinctrl_gpio_range * | |
317 | pinctrl_match_gpio_range(struct pinctrl_dev *pctldev, unsigned gpio) | |
318 | { | |
319 | struct pinctrl_gpio_range *range = NULL; | |
320 | ||
42fed7ba | 321 | mutex_lock(&pctldev->mutex); |
2744e8af | 322 | /* Loop over the ranges */ |
2744e8af LW |
323 | list_for_each_entry(range, &pctldev->gpio_ranges, node) { |
324 | /* Check if we're in the valid range */ | |
325 | if (gpio >= range->base && | |
326 | gpio < range->base + range->npins) { | |
42fed7ba | 327 | mutex_unlock(&pctldev->mutex); |
2744e8af LW |
328 | return range; |
329 | } | |
330 | } | |
42fed7ba | 331 | mutex_unlock(&pctldev->mutex); |
2744e8af LW |
332 | return NULL; |
333 | } | |
334 | ||
51e13c24 HZ |
335 | /** |
336 | * pinctrl_ready_for_gpio_range() - check if other GPIO pins of | |
337 | * the same GPIO chip are in range | |
338 | * @gpio: gpio pin to check taken from the global GPIO pin space | |
339 | * | |
340 | * This function is complement of pinctrl_match_gpio_range(). If the return | |
341 | * value of pinctrl_match_gpio_range() is NULL, this function could be used | |
342 | * to check whether pinctrl device is ready or not. Maybe some GPIO pins | |
343 | * of the same GPIO chip don't have back-end pinctrl interface. | |
344 | * If the return value is true, it means that pinctrl device is ready & the | |
345 | * certain GPIO pin doesn't have back-end pinctrl device. If the return value | |
346 | * is false, it means that pinctrl device may not be ready. | |
347 | */ | |
2afe8229 | 348 | #ifdef CONFIG_GPIOLIB |
51e13c24 HZ |
349 | static bool pinctrl_ready_for_gpio_range(unsigned gpio) |
350 | { | |
351 | struct pinctrl_dev *pctldev; | |
352 | struct pinctrl_gpio_range *range = NULL; | |
353 | struct gpio_chip *chip = gpio_to_chip(gpio); | |
354 | ||
44d5f7bb LW |
355 | mutex_lock(&pinctrldev_list_mutex); |
356 | ||
51e13c24 HZ |
357 | /* Loop over the pin controllers */ |
358 | list_for_each_entry(pctldev, &pinctrldev_list, node) { | |
359 | /* Loop over the ranges */ | |
360 | list_for_each_entry(range, &pctldev->gpio_ranges, node) { | |
361 | /* Check if any gpio range overlapped with gpio chip */ | |
362 | if (range->base + range->npins - 1 < chip->base || | |
363 | range->base > chip->base + chip->ngpio - 1) | |
364 | continue; | |
44d5f7bb | 365 | mutex_unlock(&pinctrldev_list_mutex); |
51e13c24 HZ |
366 | return true; |
367 | } | |
368 | } | |
44d5f7bb LW |
369 | |
370 | mutex_unlock(&pinctrldev_list_mutex); | |
371 | ||
51e13c24 HZ |
372 | return false; |
373 | } | |
2afe8229 HZ |
374 | #else |
375 | static bool pinctrl_ready_for_gpio_range(unsigned gpio) { return true; } | |
376 | #endif | |
51e13c24 | 377 | |
2744e8af LW |
378 | /** |
379 | * pinctrl_get_device_gpio_range() - find device for GPIO range | |
380 | * @gpio: the pin to locate the pin controller for | |
381 | * @outdev: the pin control device if found | |
382 | * @outrange: the GPIO range if found | |
383 | * | |
384 | * Find the pin controller handling a certain GPIO pin from the pinspace of | |
385 | * the GPIO subsystem, return the device and the matching GPIO range. Returns | |
4650b7cb DA |
386 | * -EPROBE_DEFER if the GPIO range could not be found in any device since it |
387 | * may still have not been registered. | |
2744e8af | 388 | */ |
4ecce45d SW |
389 | static int pinctrl_get_device_gpio_range(unsigned gpio, |
390 | struct pinctrl_dev **outdev, | |
391 | struct pinctrl_gpio_range **outrange) | |
2744e8af LW |
392 | { |
393 | struct pinctrl_dev *pctldev = NULL; | |
394 | ||
395 | /* Loop over the pin controllers */ | |
2744e8af LW |
396 | list_for_each_entry(pctldev, &pinctrldev_list, node) { |
397 | struct pinctrl_gpio_range *range; | |
398 | ||
399 | range = pinctrl_match_gpio_range(pctldev, gpio); | |
400 | if (range != NULL) { | |
401 | *outdev = pctldev; | |
402 | *outrange = range; | |
2744e8af LW |
403 | return 0; |
404 | } | |
405 | } | |
2744e8af | 406 | |
4650b7cb | 407 | return -EPROBE_DEFER; |
2744e8af LW |
408 | } |
409 | ||
410 | /** | |
411 | * pinctrl_add_gpio_range() - register a GPIO range for a controller | |
412 | * @pctldev: pin controller device to add the range to | |
413 | * @range: the GPIO range to add | |
414 | * | |
415 | * This adds a range of GPIOs to be handled by a certain pin controller. Call | |
416 | * this to register handled ranges after registering your pin controller. | |
417 | */ | |
418 | void pinctrl_add_gpio_range(struct pinctrl_dev *pctldev, | |
419 | struct pinctrl_gpio_range *range) | |
420 | { | |
42fed7ba | 421 | mutex_lock(&pctldev->mutex); |
8b9c139f | 422 | list_add_tail(&range->node, &pctldev->gpio_ranges); |
42fed7ba | 423 | mutex_unlock(&pctldev->mutex); |
2744e8af | 424 | } |
4ecce45d | 425 | EXPORT_SYMBOL_GPL(pinctrl_add_gpio_range); |
2744e8af | 426 | |
3e5e00b6 DA |
427 | void pinctrl_add_gpio_ranges(struct pinctrl_dev *pctldev, |
428 | struct pinctrl_gpio_range *ranges, | |
429 | unsigned nranges) | |
430 | { | |
431 | int i; | |
432 | ||
433 | for (i = 0; i < nranges; i++) | |
434 | pinctrl_add_gpio_range(pctldev, &ranges[i]); | |
435 | } | |
436 | EXPORT_SYMBOL_GPL(pinctrl_add_gpio_ranges); | |
437 | ||
192c369c | 438 | struct pinctrl_dev *pinctrl_find_and_add_gpio_range(const char *devname, |
f23f1516 SH |
439 | struct pinctrl_gpio_range *range) |
440 | { | |
42fed7ba PC |
441 | struct pinctrl_dev *pctldev; |
442 | ||
42fed7ba | 443 | pctldev = get_pinctrl_dev_from_devname(devname); |
f23f1516 | 444 | |
dfa97515 LW |
445 | /* |
446 | * If we can't find this device, let's assume that is because | |
447 | * it has not probed yet, so the driver trying to register this | |
448 | * range need to defer probing. | |
449 | */ | |
42fed7ba | 450 | if (!pctldev) { |
dfa97515 | 451 | return ERR_PTR(-EPROBE_DEFER); |
42fed7ba | 452 | } |
f23f1516 | 453 | pinctrl_add_gpio_range(pctldev, range); |
42fed7ba | 454 | |
f23f1516 SH |
455 | return pctldev; |
456 | } | |
192c369c | 457 | EXPORT_SYMBOL_GPL(pinctrl_find_and_add_gpio_range); |
f23f1516 | 458 | |
9afbefb2 LW |
459 | /** |
460 | * pinctrl_find_gpio_range_from_pin() - locate the GPIO range for a pin | |
461 | * @pctldev: the pin controller device to look in | |
462 | * @pin: a controller-local number to find the range for | |
463 | */ | |
464 | struct pinctrl_gpio_range * | |
465 | pinctrl_find_gpio_range_from_pin(struct pinctrl_dev *pctldev, | |
466 | unsigned int pin) | |
467 | { | |
c8f50e86 | 468 | struct pinctrl_gpio_range *range; |
9afbefb2 | 469 | |
42fed7ba | 470 | mutex_lock(&pctldev->mutex); |
9afbefb2 LW |
471 | /* Loop over the ranges */ |
472 | list_for_each_entry(range, &pctldev->gpio_ranges, node) { | |
473 | /* Check if we're in the valid range */ | |
c8587eee CR |
474 | if (range->pins) { |
475 | int a; | |
476 | for (a = 0; a < range->npins; a++) { | |
477 | if (range->pins[a] == pin) | |
c8f50e86 | 478 | goto out; |
c8587eee CR |
479 | } |
480 | } else if (pin >= range->pin_base && | |
c8f50e86 WY |
481 | pin < range->pin_base + range->npins) |
482 | goto out; | |
9afbefb2 | 483 | } |
c8f50e86 WY |
484 | range = NULL; |
485 | out: | |
42fed7ba | 486 | mutex_unlock(&pctldev->mutex); |
c8f50e86 | 487 | return range; |
9afbefb2 LW |
488 | } |
489 | EXPORT_SYMBOL_GPL(pinctrl_find_gpio_range_from_pin); | |
490 | ||
7e10ee68 VK |
491 | /** |
492 | * pinctrl_remove_gpio_range() - remove a range of GPIOs fro a pin controller | |
493 | * @pctldev: pin controller device to remove the range from | |
494 | * @range: the GPIO range to remove | |
495 | */ | |
496 | void pinctrl_remove_gpio_range(struct pinctrl_dev *pctldev, | |
497 | struct pinctrl_gpio_range *range) | |
498 | { | |
42fed7ba | 499 | mutex_lock(&pctldev->mutex); |
7e10ee68 | 500 | list_del(&range->node); |
42fed7ba | 501 | mutex_unlock(&pctldev->mutex); |
7e10ee68 VK |
502 | } |
503 | EXPORT_SYMBOL_GPL(pinctrl_remove_gpio_range); | |
504 | ||
7afde8ba LW |
505 | /** |
506 | * pinctrl_get_group_selector() - returns the group selector for a group | |
507 | * @pctldev: the pin controller handling the group | |
508 | * @pin_group: the pin group to look up | |
509 | */ | |
510 | int pinctrl_get_group_selector(struct pinctrl_dev *pctldev, | |
511 | const char *pin_group) | |
512 | { | |
513 | const struct pinctrl_ops *pctlops = pctldev->desc->pctlops; | |
d1e90e9e | 514 | unsigned ngroups = pctlops->get_groups_count(pctldev); |
7afde8ba LW |
515 | unsigned group_selector = 0; |
516 | ||
d1e90e9e | 517 | while (group_selector < ngroups) { |
7afde8ba LW |
518 | const char *gname = pctlops->get_group_name(pctldev, |
519 | group_selector); | |
520 | if (!strcmp(gname, pin_group)) { | |
51cd24ee | 521 | dev_dbg(pctldev->dev, |
7afde8ba LW |
522 | "found group selector %u for %s\n", |
523 | group_selector, | |
524 | pin_group); | |
525 | return group_selector; | |
526 | } | |
527 | ||
528 | group_selector++; | |
529 | } | |
530 | ||
51cd24ee | 531 | dev_err(pctldev->dev, "does not have pin group %s\n", |
7afde8ba LW |
532 | pin_group); |
533 | ||
534 | return -EINVAL; | |
535 | } | |
536 | ||
befe5bdf LW |
537 | /** |
538 | * pinctrl_request_gpio() - request a single pin to be used in as GPIO | |
539 | * @gpio: the GPIO pin number from the GPIO subsystem number space | |
540 | * | |
541 | * This function should *ONLY* be used from gpiolib-based GPIO drivers, | |
542 | * as part of their gpio_request() semantics, platforms and individual drivers | |
543 | * shall *NOT* request GPIO pins to be muxed in. | |
544 | */ | |
545 | int pinctrl_request_gpio(unsigned gpio) | |
546 | { | |
547 | struct pinctrl_dev *pctldev; | |
548 | struct pinctrl_gpio_range *range; | |
549 | int ret; | |
550 | int pin; | |
551 | ||
552 | ret = pinctrl_get_device_gpio_range(gpio, &pctldev, &range); | |
57b676f9 | 553 | if (ret) { |
51e13c24 HZ |
554 | if (pinctrl_ready_for_gpio_range(gpio)) |
555 | ret = 0; | |
4650b7cb | 556 | return ret; |
57b676f9 | 557 | } |
befe5bdf LW |
558 | |
559 | /* Convert to the pin controllers number space */ | |
c8587eee | 560 | pin = gpio_to_pin(range, gpio); |
befe5bdf | 561 | |
57b676f9 SW |
562 | ret = pinmux_request_gpio(pctldev, range, pin, gpio); |
563 | ||
57b676f9 | 564 | return ret; |
befe5bdf LW |
565 | } |
566 | EXPORT_SYMBOL_GPL(pinctrl_request_gpio); | |
567 | ||
568 | /** | |
569 | * pinctrl_free_gpio() - free control on a single pin, currently used as GPIO | |
570 | * @gpio: the GPIO pin number from the GPIO subsystem number space | |
571 | * | |
572 | * This function should *ONLY* be used from gpiolib-based GPIO drivers, | |
573 | * as part of their gpio_free() semantics, platforms and individual drivers | |
574 | * shall *NOT* request GPIO pins to be muxed out. | |
575 | */ | |
576 | void pinctrl_free_gpio(unsigned gpio) | |
577 | { | |
578 | struct pinctrl_dev *pctldev; | |
579 | struct pinctrl_gpio_range *range; | |
580 | int ret; | |
581 | int pin; | |
582 | ||
583 | ret = pinctrl_get_device_gpio_range(gpio, &pctldev, &range); | |
57b676f9 | 584 | if (ret) { |
befe5bdf | 585 | return; |
57b676f9 | 586 | } |
42fed7ba | 587 | mutex_lock(&pctldev->mutex); |
befe5bdf LW |
588 | |
589 | /* Convert to the pin controllers number space */ | |
c8587eee | 590 | pin = gpio_to_pin(range, gpio); |
befe5bdf | 591 | |
57b676f9 SW |
592 | pinmux_free_gpio(pctldev, pin, range); |
593 | ||
42fed7ba | 594 | mutex_unlock(&pctldev->mutex); |
befe5bdf LW |
595 | } |
596 | EXPORT_SYMBOL_GPL(pinctrl_free_gpio); | |
597 | ||
598 | static int pinctrl_gpio_direction(unsigned gpio, bool input) | |
599 | { | |
600 | struct pinctrl_dev *pctldev; | |
601 | struct pinctrl_gpio_range *range; | |
602 | int ret; | |
603 | int pin; | |
604 | ||
605 | ret = pinctrl_get_device_gpio_range(gpio, &pctldev, &range); | |
42fed7ba | 606 | if (ret) { |
befe5bdf | 607 | return ret; |
42fed7ba PC |
608 | } |
609 | ||
610 | mutex_lock(&pctldev->mutex); | |
befe5bdf LW |
611 | |
612 | /* Convert to the pin controllers number space */ | |
c8587eee | 613 | pin = gpio_to_pin(range, gpio); |
42fed7ba PC |
614 | ret = pinmux_gpio_direction(pctldev, range, pin, input); |
615 | ||
616 | mutex_unlock(&pctldev->mutex); | |
befe5bdf | 617 | |
42fed7ba | 618 | return ret; |
befe5bdf LW |
619 | } |
620 | ||
621 | /** | |
622 | * pinctrl_gpio_direction_input() - request a GPIO pin to go into input mode | |
623 | * @gpio: the GPIO pin number from the GPIO subsystem number space | |
624 | * | |
625 | * This function should *ONLY* be used from gpiolib-based GPIO drivers, | |
626 | * as part of their gpio_direction_input() semantics, platforms and individual | |
627 | * drivers shall *NOT* touch pin control GPIO calls. | |
628 | */ | |
629 | int pinctrl_gpio_direction_input(unsigned gpio) | |
630 | { | |
42fed7ba | 631 | return pinctrl_gpio_direction(gpio, true); |
befe5bdf LW |
632 | } |
633 | EXPORT_SYMBOL_GPL(pinctrl_gpio_direction_input); | |
634 | ||
635 | /** | |
636 | * pinctrl_gpio_direction_output() - request a GPIO pin to go into output mode | |
637 | * @gpio: the GPIO pin number from the GPIO subsystem number space | |
638 | * | |
639 | * This function should *ONLY* be used from gpiolib-based GPIO drivers, | |
640 | * as part of their gpio_direction_output() semantics, platforms and individual | |
641 | * drivers shall *NOT* touch pin control GPIO calls. | |
642 | */ | |
643 | int pinctrl_gpio_direction_output(unsigned gpio) | |
644 | { | |
42fed7ba | 645 | return pinctrl_gpio_direction(gpio, false); |
befe5bdf LW |
646 | } |
647 | EXPORT_SYMBOL_GPL(pinctrl_gpio_direction_output); | |
648 | ||
6e5e959d SW |
649 | static struct pinctrl_state *find_state(struct pinctrl *p, |
650 | const char *name) | |
befe5bdf | 651 | { |
6e5e959d SW |
652 | struct pinctrl_state *state; |
653 | ||
654 | list_for_each_entry(state, &p->states, node) | |
655 | if (!strcmp(state->name, name)) | |
656 | return state; | |
657 | ||
658 | return NULL; | |
659 | } | |
660 | ||
661 | static struct pinctrl_state *create_state(struct pinctrl *p, | |
662 | const char *name) | |
663 | { | |
664 | struct pinctrl_state *state; | |
665 | ||
666 | state = kzalloc(sizeof(*state), GFP_KERNEL); | |
667 | if (state == NULL) { | |
668 | dev_err(p->dev, | |
669 | "failed to alloc struct pinctrl_state\n"); | |
670 | return ERR_PTR(-ENOMEM); | |
671 | } | |
672 | ||
673 | state->name = name; | |
674 | INIT_LIST_HEAD(&state->settings); | |
675 | ||
676 | list_add_tail(&state->node, &p->states); | |
677 | ||
678 | return state; | |
679 | } | |
680 | ||
681 | static int add_setting(struct pinctrl *p, struct pinctrl_map const *map) | |
682 | { | |
683 | struct pinctrl_state *state; | |
7ecdb16f | 684 | struct pinctrl_setting *setting; |
6e5e959d | 685 | int ret; |
befe5bdf | 686 | |
6e5e959d SW |
687 | state = find_state(p, map->name); |
688 | if (!state) | |
689 | state = create_state(p, map->name); | |
690 | if (IS_ERR(state)) | |
691 | return PTR_ERR(state); | |
befe5bdf | 692 | |
1e2082b5 SW |
693 | if (map->type == PIN_MAP_TYPE_DUMMY_STATE) |
694 | return 0; | |
695 | ||
6e5e959d SW |
696 | setting = kzalloc(sizeof(*setting), GFP_KERNEL); |
697 | if (setting == NULL) { | |
698 | dev_err(p->dev, | |
699 | "failed to alloc struct pinctrl_setting\n"); | |
700 | return -ENOMEM; | |
701 | } | |
befe5bdf | 702 | |
1e2082b5 SW |
703 | setting->type = map->type; |
704 | ||
6e5e959d SW |
705 | setting->pctldev = get_pinctrl_dev_from_devname(map->ctrl_dev_name); |
706 | if (setting->pctldev == NULL) { | |
6e5e959d | 707 | kfree(setting); |
89216494 LW |
708 | /* Do not defer probing of hogs (circular loop) */ |
709 | if (!strcmp(map->ctrl_dev_name, map->dev_name)) | |
710 | return -ENODEV; | |
c05127c4 LW |
711 | /* |
712 | * OK let us guess that the driver is not there yet, and | |
713 | * let's defer obtaining this pinctrl handle to later... | |
714 | */ | |
89216494 LW |
715 | dev_info(p->dev, "unknown pinctrl device %s in map entry, deferring probe", |
716 | map->ctrl_dev_name); | |
c05127c4 | 717 | return -EPROBE_DEFER; |
6e5e959d SW |
718 | } |
719 | ||
1a78958d LW |
720 | setting->dev_name = map->dev_name; |
721 | ||
1e2082b5 SW |
722 | switch (map->type) { |
723 | case PIN_MAP_TYPE_MUX_GROUP: | |
724 | ret = pinmux_map_to_setting(map, setting); | |
725 | break; | |
726 | case PIN_MAP_TYPE_CONFIGS_PIN: | |
727 | case PIN_MAP_TYPE_CONFIGS_GROUP: | |
728 | ret = pinconf_map_to_setting(map, setting); | |
729 | break; | |
730 | default: | |
731 | ret = -EINVAL; | |
732 | break; | |
733 | } | |
6e5e959d SW |
734 | if (ret < 0) { |
735 | kfree(setting); | |
736 | return ret; | |
737 | } | |
738 | ||
739 | list_add_tail(&setting->node, &state->settings); | |
740 | ||
741 | return 0; | |
742 | } | |
743 | ||
744 | static struct pinctrl *find_pinctrl(struct device *dev) | |
745 | { | |
746 | struct pinctrl *p; | |
747 | ||
42fed7ba | 748 | mutex_lock(&pinctrl_list_mutex); |
1e2082b5 | 749 | list_for_each_entry(p, &pinctrl_list, node) |
42fed7ba PC |
750 | if (p->dev == dev) { |
751 | mutex_unlock(&pinctrl_list_mutex); | |
6e5e959d | 752 | return p; |
42fed7ba | 753 | } |
6e5e959d | 754 | |
42fed7ba | 755 | mutex_unlock(&pinctrl_list_mutex); |
6e5e959d SW |
756 | return NULL; |
757 | } | |
758 | ||
42fed7ba | 759 | static void pinctrl_free(struct pinctrl *p, bool inlist); |
6e5e959d SW |
760 | |
761 | static struct pinctrl *create_pinctrl(struct device *dev) | |
762 | { | |
763 | struct pinctrl *p; | |
764 | const char *devname; | |
765 | struct pinctrl_maps *maps_node; | |
766 | int i; | |
767 | struct pinctrl_map const *map; | |
768 | int ret; | |
befe5bdf LW |
769 | |
770 | /* | |
771 | * create the state cookie holder struct pinctrl for each | |
772 | * mapping, this is what consumers will get when requesting | |
773 | * a pin control handle with pinctrl_get() | |
774 | */ | |
02f5b989 | 775 | p = kzalloc(sizeof(*p), GFP_KERNEL); |
95dcd4ae SW |
776 | if (p == NULL) { |
777 | dev_err(dev, "failed to alloc struct pinctrl\n"); | |
befe5bdf | 778 | return ERR_PTR(-ENOMEM); |
95dcd4ae | 779 | } |
7ecdb16f | 780 | p->dev = dev; |
6e5e959d | 781 | INIT_LIST_HEAD(&p->states); |
57291ce2 SW |
782 | INIT_LIST_HEAD(&p->dt_maps); |
783 | ||
784 | ret = pinctrl_dt_to_map(p); | |
785 | if (ret < 0) { | |
786 | kfree(p); | |
787 | return ERR_PTR(ret); | |
788 | } | |
6e5e959d SW |
789 | |
790 | devname = dev_name(dev); | |
befe5bdf | 791 | |
42fed7ba | 792 | mutex_lock(&pinctrl_maps_mutex); |
befe5bdf | 793 | /* Iterate over the pin control maps to locate the right ones */ |
b2b3e66e | 794 | for_each_maps(maps_node, i, map) { |
7ecdb16f SW |
795 | /* Map must be for this device */ |
796 | if (strcmp(map->dev_name, devname)) | |
797 | continue; | |
798 | ||
6e5e959d | 799 | ret = add_setting(p, map); |
89216494 LW |
800 | /* |
801 | * At this point the adding of a setting may: | |
802 | * | |
803 | * - Defer, if the pinctrl device is not yet available | |
804 | * - Fail, if the pinctrl device is not yet available, | |
805 | * AND the setting is a hog. We cannot defer that, since | |
806 | * the hog will kick in immediately after the device | |
807 | * is registered. | |
808 | * | |
809 | * If the error returned was not -EPROBE_DEFER then we | |
810 | * accumulate the errors to see if we end up with | |
811 | * an -EPROBE_DEFER later, as that is the worst case. | |
812 | */ | |
813 | if (ret == -EPROBE_DEFER) { | |
42fed7ba PC |
814 | pinctrl_free(p, false); |
815 | mutex_unlock(&pinctrl_maps_mutex); | |
6e5e959d | 816 | return ERR_PTR(ret); |
7ecdb16f | 817 | } |
befe5bdf | 818 | } |
42fed7ba PC |
819 | mutex_unlock(&pinctrl_maps_mutex); |
820 | ||
89216494 LW |
821 | if (ret < 0) { |
822 | /* If some other error than deferral occured, return here */ | |
42fed7ba | 823 | pinctrl_free(p, false); |
89216494 LW |
824 | return ERR_PTR(ret); |
825 | } | |
befe5bdf | 826 | |
ab78029e LW |
827 | kref_init(&p->users); |
828 | ||
b0666ba4 | 829 | /* Add the pinctrl handle to the global list */ |
8b9c139f | 830 | list_add_tail(&p->node, &pinctrl_list); |
befe5bdf LW |
831 | |
832 | return p; | |
6e5e959d | 833 | } |
7ecdb16f | 834 | |
42fed7ba PC |
835 | /** |
836 | * pinctrl_get() - retrieves the pinctrl handle for a device | |
837 | * @dev: the device to obtain the handle for | |
838 | */ | |
839 | struct pinctrl *pinctrl_get(struct device *dev) | |
6e5e959d SW |
840 | { |
841 | struct pinctrl *p; | |
7ecdb16f | 842 | |
6e5e959d SW |
843 | if (WARN_ON(!dev)) |
844 | return ERR_PTR(-EINVAL); | |
845 | ||
ab78029e LW |
846 | /* |
847 | * See if somebody else (such as the device core) has already | |
848 | * obtained a handle to the pinctrl for this device. In that case, | |
849 | * return another pointer to it. | |
850 | */ | |
6e5e959d | 851 | p = find_pinctrl(dev); |
ab78029e LW |
852 | if (p != NULL) { |
853 | dev_dbg(dev, "obtain a copy of previously claimed pinctrl\n"); | |
854 | kref_get(&p->users); | |
855 | return p; | |
856 | } | |
7ecdb16f | 857 | |
d599bfb3 | 858 | return create_pinctrl(dev); |
befe5bdf LW |
859 | } |
860 | EXPORT_SYMBOL_GPL(pinctrl_get); | |
861 | ||
d3cee830 RG |
862 | static void pinctrl_free_setting(bool disable_setting, |
863 | struct pinctrl_setting *setting) | |
864 | { | |
865 | switch (setting->type) { | |
866 | case PIN_MAP_TYPE_MUX_GROUP: | |
867 | if (disable_setting) | |
868 | pinmux_disable_setting(setting); | |
869 | pinmux_free_setting(setting); | |
870 | break; | |
871 | case PIN_MAP_TYPE_CONFIGS_PIN: | |
872 | case PIN_MAP_TYPE_CONFIGS_GROUP: | |
873 | pinconf_free_setting(setting); | |
874 | break; | |
875 | default: | |
876 | break; | |
877 | } | |
878 | } | |
879 | ||
42fed7ba | 880 | static void pinctrl_free(struct pinctrl *p, bool inlist) |
befe5bdf | 881 | { |
6e5e959d SW |
882 | struct pinctrl_state *state, *n1; |
883 | struct pinctrl_setting *setting, *n2; | |
884 | ||
42fed7ba | 885 | mutex_lock(&pinctrl_list_mutex); |
6e5e959d SW |
886 | list_for_each_entry_safe(state, n1, &p->states, node) { |
887 | list_for_each_entry_safe(setting, n2, &state->settings, node) { | |
d3cee830 | 888 | pinctrl_free_setting(state == p->state, setting); |
6e5e959d SW |
889 | list_del(&setting->node); |
890 | kfree(setting); | |
891 | } | |
892 | list_del(&state->node); | |
893 | kfree(state); | |
7ecdb16f | 894 | } |
befe5bdf | 895 | |
57291ce2 SW |
896 | pinctrl_dt_free_maps(p); |
897 | ||
6e5e959d SW |
898 | if (inlist) |
899 | list_del(&p->node); | |
befe5bdf | 900 | kfree(p); |
42fed7ba | 901 | mutex_unlock(&pinctrl_list_mutex); |
befe5bdf | 902 | } |
befe5bdf LW |
903 | |
904 | /** | |
ab78029e LW |
905 | * pinctrl_release() - release the pinctrl handle |
906 | * @kref: the kref in the pinctrl being released | |
907 | */ | |
2917e833 | 908 | static void pinctrl_release(struct kref *kref) |
ab78029e LW |
909 | { |
910 | struct pinctrl *p = container_of(kref, struct pinctrl, users); | |
911 | ||
42fed7ba | 912 | pinctrl_free(p, true); |
ab78029e LW |
913 | } |
914 | ||
915 | /** | |
916 | * pinctrl_put() - decrease use count on a previously claimed pinctrl handle | |
6e5e959d | 917 | * @p: the pinctrl handle to release |
befe5bdf | 918 | */ |
57b676f9 SW |
919 | void pinctrl_put(struct pinctrl *p) |
920 | { | |
ab78029e | 921 | kref_put(&p->users, pinctrl_release); |
57b676f9 SW |
922 | } |
923 | EXPORT_SYMBOL_GPL(pinctrl_put); | |
924 | ||
42fed7ba PC |
925 | /** |
926 | * pinctrl_lookup_state() - retrieves a state handle from a pinctrl handle | |
927 | * @p: the pinctrl handle to retrieve the state from | |
928 | * @name: the state name to retrieve | |
929 | */ | |
930 | struct pinctrl_state *pinctrl_lookup_state(struct pinctrl *p, | |
931 | const char *name) | |
befe5bdf | 932 | { |
6e5e959d | 933 | struct pinctrl_state *state; |
befe5bdf | 934 | |
6e5e959d | 935 | state = find_state(p, name); |
5b3aa5f7 DA |
936 | if (!state) { |
937 | if (pinctrl_dummy_state) { | |
938 | /* create dummy state */ | |
939 | dev_dbg(p->dev, "using pinctrl dummy state (%s)\n", | |
940 | name); | |
941 | state = create_state(p, name); | |
d599bfb3 RG |
942 | } else |
943 | state = ERR_PTR(-ENODEV); | |
5b3aa5f7 | 944 | } |
57b676f9 | 945 | |
6e5e959d | 946 | return state; |
befe5bdf | 947 | } |
42fed7ba | 948 | EXPORT_SYMBOL_GPL(pinctrl_lookup_state); |
befe5bdf LW |
949 | |
950 | /** | |
42fed7ba PC |
951 | * pinctrl_select_state() - select/activate/program a pinctrl state to HW |
952 | * @p: the pinctrl handle for the device that requests configuration | |
953 | * @state: the state handle to select/activate/program | |
befe5bdf | 954 | */ |
42fed7ba | 955 | int pinctrl_select_state(struct pinctrl *p, struct pinctrl_state *state) |
befe5bdf | 956 | { |
6e5e959d | 957 | struct pinctrl_setting *setting, *setting2; |
50cf7c8a | 958 | struct pinctrl_state *old_state = p->state; |
6e5e959d | 959 | int ret; |
7ecdb16f | 960 | |
6e5e959d SW |
961 | if (p->state == state) |
962 | return 0; | |
befe5bdf | 963 | |
6e5e959d SW |
964 | if (p->state) { |
965 | /* | |
966 | * The set of groups with a mux configuration in the old state | |
967 | * may not be identical to the set of groups with a mux setting | |
968 | * in the new state. While this might be unusual, it's entirely | |
969 | * possible for the "user"-supplied mapping table to be written | |
970 | * that way. For each group that was configured in the old state | |
971 | * but not in the new state, this code puts that group into a | |
972 | * safe/disabled state. | |
973 | */ | |
974 | list_for_each_entry(setting, &p->state->settings, node) { | |
975 | bool found = false; | |
1e2082b5 SW |
976 | if (setting->type != PIN_MAP_TYPE_MUX_GROUP) |
977 | continue; | |
6e5e959d | 978 | list_for_each_entry(setting2, &state->settings, node) { |
1e2082b5 SW |
979 | if (setting2->type != PIN_MAP_TYPE_MUX_GROUP) |
980 | continue; | |
981 | if (setting2->data.mux.group == | |
982 | setting->data.mux.group) { | |
6e5e959d SW |
983 | found = true; |
984 | break; | |
985 | } | |
986 | } | |
987 | if (!found) | |
988 | pinmux_disable_setting(setting); | |
989 | } | |
990 | } | |
991 | ||
3102a76c | 992 | p->state = NULL; |
6e5e959d SW |
993 | |
994 | /* Apply all the settings for the new state */ | |
995 | list_for_each_entry(setting, &state->settings, node) { | |
1e2082b5 SW |
996 | switch (setting->type) { |
997 | case PIN_MAP_TYPE_MUX_GROUP: | |
998 | ret = pinmux_enable_setting(setting); | |
999 | break; | |
1000 | case PIN_MAP_TYPE_CONFIGS_PIN: | |
1001 | case PIN_MAP_TYPE_CONFIGS_GROUP: | |
1002 | ret = pinconf_apply_setting(setting); | |
1003 | break; | |
1004 | default: | |
1005 | ret = -EINVAL; | |
1006 | break; | |
1007 | } | |
3102a76c | 1008 | |
42fed7ba | 1009 | if (ret < 0) { |
3102a76c | 1010 | goto unapply_new_state; |
42fed7ba | 1011 | } |
befe5bdf | 1012 | } |
6e5e959d | 1013 | |
3102a76c RG |
1014 | p->state = state; |
1015 | ||
6e5e959d | 1016 | return 0; |
3102a76c RG |
1017 | |
1018 | unapply_new_state: | |
da58751c | 1019 | dev_err(p->dev, "Error applying setting, reverse things back\n"); |
3102a76c | 1020 | |
3102a76c RG |
1021 | list_for_each_entry(setting2, &state->settings, node) { |
1022 | if (&setting2->node == &setting->node) | |
1023 | break; | |
af606177 RG |
1024 | /* |
1025 | * All we can do here is pinmux_disable_setting. | |
1026 | * That means that some pins are muxed differently now | |
1027 | * than they were before applying the setting (We can't | |
1028 | * "unmux a pin"!), but it's not a big deal since the pins | |
1029 | * are free to be muxed by another apply_setting. | |
1030 | */ | |
1031 | if (setting2->type == PIN_MAP_TYPE_MUX_GROUP) | |
1032 | pinmux_disable_setting(setting2); | |
3102a76c | 1033 | } |
8009d5ff | 1034 | |
385d9424 RG |
1035 | /* There's no infinite recursive loop here because p->state is NULL */ |
1036 | if (old_state) | |
42fed7ba | 1037 | pinctrl_select_state(p, old_state); |
6e5e959d SW |
1038 | |
1039 | return ret; | |
befe5bdf | 1040 | } |
6e5e959d | 1041 | EXPORT_SYMBOL_GPL(pinctrl_select_state); |
befe5bdf | 1042 | |
6d4ca1fb SW |
1043 | static void devm_pinctrl_release(struct device *dev, void *res) |
1044 | { | |
1045 | pinctrl_put(*(struct pinctrl **)res); | |
1046 | } | |
1047 | ||
1048 | /** | |
1049 | * struct devm_pinctrl_get() - Resource managed pinctrl_get() | |
1050 | * @dev: the device to obtain the handle for | |
1051 | * | |
1052 | * If there is a need to explicitly destroy the returned struct pinctrl, | |
1053 | * devm_pinctrl_put() should be used, rather than plain pinctrl_put(). | |
1054 | */ | |
1055 | struct pinctrl *devm_pinctrl_get(struct device *dev) | |
1056 | { | |
1057 | struct pinctrl **ptr, *p; | |
1058 | ||
1059 | ptr = devres_alloc(devm_pinctrl_release, sizeof(*ptr), GFP_KERNEL); | |
1060 | if (!ptr) | |
1061 | return ERR_PTR(-ENOMEM); | |
1062 | ||
1063 | p = pinctrl_get(dev); | |
1064 | if (!IS_ERR(p)) { | |
1065 | *ptr = p; | |
1066 | devres_add(dev, ptr); | |
1067 | } else { | |
1068 | devres_free(ptr); | |
1069 | } | |
1070 | ||
1071 | return p; | |
1072 | } | |
1073 | EXPORT_SYMBOL_GPL(devm_pinctrl_get); | |
1074 | ||
1075 | static int devm_pinctrl_match(struct device *dev, void *res, void *data) | |
1076 | { | |
1077 | struct pinctrl **p = res; | |
1078 | ||
1079 | return *p == data; | |
1080 | } | |
1081 | ||
1082 | /** | |
1083 | * devm_pinctrl_put() - Resource managed pinctrl_put() | |
1084 | * @p: the pinctrl handle to release | |
1085 | * | |
1086 | * Deallocate a struct pinctrl obtained via devm_pinctrl_get(). Normally | |
1087 | * this function will not need to be called and the resource management | |
1088 | * code will ensure that the resource is freed. | |
1089 | */ | |
1090 | void devm_pinctrl_put(struct pinctrl *p) | |
1091 | { | |
a72149e8 | 1092 | WARN_ON(devres_release(p->dev, devm_pinctrl_release, |
6d4ca1fb | 1093 | devm_pinctrl_match, p)); |
6d4ca1fb SW |
1094 | } |
1095 | EXPORT_SYMBOL_GPL(devm_pinctrl_put); | |
1096 | ||
57291ce2 SW |
1097 | int pinctrl_register_map(struct pinctrl_map const *maps, unsigned num_maps, |
1098 | bool dup, bool locked) | |
befe5bdf | 1099 | { |
1e2082b5 | 1100 | int i, ret; |
b2b3e66e | 1101 | struct pinctrl_maps *maps_node; |
befe5bdf LW |
1102 | |
1103 | pr_debug("add %d pinmux maps\n", num_maps); | |
1104 | ||
1105 | /* First sanity check the new mapping */ | |
1106 | for (i = 0; i < num_maps; i++) { | |
1e2082b5 SW |
1107 | if (!maps[i].dev_name) { |
1108 | pr_err("failed to register map %s (%d): no device given\n", | |
1109 | maps[i].name, i); | |
1110 | return -EINVAL; | |
1111 | } | |
1112 | ||
befe5bdf LW |
1113 | if (!maps[i].name) { |
1114 | pr_err("failed to register map %d: no map name given\n", | |
95dcd4ae | 1115 | i); |
befe5bdf LW |
1116 | return -EINVAL; |
1117 | } | |
1118 | ||
1e2082b5 SW |
1119 | if (maps[i].type != PIN_MAP_TYPE_DUMMY_STATE && |
1120 | !maps[i].ctrl_dev_name) { | |
befe5bdf LW |
1121 | pr_err("failed to register map %s (%d): no pin control device given\n", |
1122 | maps[i].name, i); | |
1123 | return -EINVAL; | |
1124 | } | |
1125 | ||
1e2082b5 SW |
1126 | switch (maps[i].type) { |
1127 | case PIN_MAP_TYPE_DUMMY_STATE: | |
1128 | break; | |
1129 | case PIN_MAP_TYPE_MUX_GROUP: | |
1130 | ret = pinmux_validate_map(&maps[i], i); | |
1131 | if (ret < 0) | |
fde04f41 | 1132 | return ret; |
1e2082b5 SW |
1133 | break; |
1134 | case PIN_MAP_TYPE_CONFIGS_PIN: | |
1135 | case PIN_MAP_TYPE_CONFIGS_GROUP: | |
1136 | ret = pinconf_validate_map(&maps[i], i); | |
1137 | if (ret < 0) | |
fde04f41 | 1138 | return ret; |
1e2082b5 SW |
1139 | break; |
1140 | default: | |
1141 | pr_err("failed to register map %s (%d): invalid type given\n", | |
95dcd4ae | 1142 | maps[i].name, i); |
1681f5ae SW |
1143 | return -EINVAL; |
1144 | } | |
befe5bdf LW |
1145 | } |
1146 | ||
b2b3e66e SW |
1147 | maps_node = kzalloc(sizeof(*maps_node), GFP_KERNEL); |
1148 | if (!maps_node) { | |
1149 | pr_err("failed to alloc struct pinctrl_maps\n"); | |
1150 | return -ENOMEM; | |
1151 | } | |
befe5bdf | 1152 | |
b2b3e66e | 1153 | maps_node->num_maps = num_maps; |
57291ce2 SW |
1154 | if (dup) { |
1155 | maps_node->maps = kmemdup(maps, sizeof(*maps) * num_maps, | |
1156 | GFP_KERNEL); | |
1157 | if (!maps_node->maps) { | |
1158 | pr_err("failed to duplicate mapping table\n"); | |
1159 | kfree(maps_node); | |
1160 | return -ENOMEM; | |
1161 | } | |
1162 | } else { | |
1163 | maps_node->maps = maps; | |
befe5bdf LW |
1164 | } |
1165 | ||
57291ce2 | 1166 | if (!locked) |
42fed7ba | 1167 | mutex_lock(&pinctrl_maps_mutex); |
b2b3e66e | 1168 | list_add_tail(&maps_node->node, &pinctrl_maps); |
57291ce2 | 1169 | if (!locked) |
42fed7ba | 1170 | mutex_unlock(&pinctrl_maps_mutex); |
b2b3e66e | 1171 | |
befe5bdf LW |
1172 | return 0; |
1173 | } | |
1174 | ||
57291ce2 SW |
1175 | /** |
1176 | * pinctrl_register_mappings() - register a set of pin controller mappings | |
1177 | * @maps: the pincontrol mappings table to register. This should probably be | |
1178 | * marked with __initdata so it can be discarded after boot. This | |
1179 | * function will perform a shallow copy for the mapping entries. | |
1180 | * @num_maps: the number of maps in the mapping table | |
1181 | */ | |
1182 | int pinctrl_register_mappings(struct pinctrl_map const *maps, | |
1183 | unsigned num_maps) | |
1184 | { | |
1185 | return pinctrl_register_map(maps, num_maps, true, false); | |
1186 | } | |
1187 | ||
1188 | void pinctrl_unregister_map(struct pinctrl_map const *map) | |
1189 | { | |
1190 | struct pinctrl_maps *maps_node; | |
1191 | ||
42fed7ba | 1192 | mutex_lock(&pinctrl_maps_mutex); |
57291ce2 SW |
1193 | list_for_each_entry(maps_node, &pinctrl_maps, node) { |
1194 | if (maps_node->maps == map) { | |
1195 | list_del(&maps_node->node); | |
db6c2c69 | 1196 | kfree(maps_node); |
42fed7ba | 1197 | mutex_unlock(&pinctrl_maps_mutex); |
57291ce2 SW |
1198 | return; |
1199 | } | |
1200 | } | |
42fed7ba | 1201 | mutex_unlock(&pinctrl_maps_mutex); |
57291ce2 SW |
1202 | } |
1203 | ||
840a47ba JD |
1204 | /** |
1205 | * pinctrl_force_sleep() - turn a given controller device into sleep state | |
1206 | * @pctldev: pin controller device | |
1207 | */ | |
1208 | int pinctrl_force_sleep(struct pinctrl_dev *pctldev) | |
1209 | { | |
1210 | if (!IS_ERR(pctldev->p) && !IS_ERR(pctldev->hog_sleep)) | |
1211 | return pinctrl_select_state(pctldev->p, pctldev->hog_sleep); | |
1212 | return 0; | |
1213 | } | |
1214 | EXPORT_SYMBOL_GPL(pinctrl_force_sleep); | |
1215 | ||
1216 | /** | |
1217 | * pinctrl_force_default() - turn a given controller device into default state | |
1218 | * @pctldev: pin controller device | |
1219 | */ | |
1220 | int pinctrl_force_default(struct pinctrl_dev *pctldev) | |
1221 | { | |
1222 | if (!IS_ERR(pctldev->p) && !IS_ERR(pctldev->hog_default)) | |
1223 | return pinctrl_select_state(pctldev->p, pctldev->hog_default); | |
1224 | return 0; | |
1225 | } | |
1226 | EXPORT_SYMBOL_GPL(pinctrl_force_default); | |
1227 | ||
14005ee2 LW |
1228 | #ifdef CONFIG_PM |
1229 | ||
1230 | /** | |
1231 | * pinctrl_pm_select_default_state() - select default pinctrl state for PM | |
1232 | * @dev: device to select default state for | |
1233 | */ | |
1234 | int pinctrl_pm_select_default_state(struct device *dev) | |
1235 | { | |
1236 | struct dev_pin_info *pins = dev->pins; | |
1237 | int ret; | |
1238 | ||
1239 | if (!pins) | |
1240 | return 0; | |
1241 | if (IS_ERR(pins->default_state)) | |
1242 | return 0; /* No default state */ | |
1243 | ret = pinctrl_select_state(pins->p, pins->default_state); | |
1244 | if (ret) | |
1245 | dev_err(dev, "failed to activate default pinctrl state\n"); | |
1246 | return ret; | |
1247 | } | |
f472dead | 1248 | EXPORT_SYMBOL_GPL(pinctrl_pm_select_default_state); |
14005ee2 LW |
1249 | |
1250 | /** | |
1251 | * pinctrl_pm_select_sleep_state() - select sleep pinctrl state for PM | |
1252 | * @dev: device to select sleep state for | |
1253 | */ | |
1254 | int pinctrl_pm_select_sleep_state(struct device *dev) | |
1255 | { | |
1256 | struct dev_pin_info *pins = dev->pins; | |
1257 | int ret; | |
1258 | ||
1259 | if (!pins) | |
1260 | return 0; | |
1261 | if (IS_ERR(pins->sleep_state)) | |
1262 | return 0; /* No sleep state */ | |
1263 | ret = pinctrl_select_state(pins->p, pins->sleep_state); | |
1264 | if (ret) | |
1265 | dev_err(dev, "failed to activate pinctrl sleep state\n"); | |
1266 | return ret; | |
1267 | } | |
f472dead | 1268 | EXPORT_SYMBOL_GPL(pinctrl_pm_select_sleep_state); |
14005ee2 LW |
1269 | |
1270 | /** | |
1271 | * pinctrl_pm_select_idle_state() - select idle pinctrl state for PM | |
1272 | * @dev: device to select idle state for | |
1273 | */ | |
1274 | int pinctrl_pm_select_idle_state(struct device *dev) | |
1275 | { | |
1276 | struct dev_pin_info *pins = dev->pins; | |
1277 | int ret; | |
1278 | ||
1279 | if (!pins) | |
1280 | return 0; | |
1281 | if (IS_ERR(pins->idle_state)) | |
1282 | return 0; /* No idle state */ | |
1283 | ret = pinctrl_select_state(pins->p, pins->idle_state); | |
1284 | if (ret) | |
1285 | dev_err(dev, "failed to activate pinctrl idle state\n"); | |
1286 | return ret; | |
1287 | } | |
f472dead | 1288 | EXPORT_SYMBOL_GPL(pinctrl_pm_select_idle_state); |
14005ee2 LW |
1289 | #endif |
1290 | ||
2744e8af LW |
1291 | #ifdef CONFIG_DEBUG_FS |
1292 | ||
1293 | static int pinctrl_pins_show(struct seq_file *s, void *what) | |
1294 | { | |
1295 | struct pinctrl_dev *pctldev = s->private; | |
1296 | const struct pinctrl_ops *ops = pctldev->desc->pctlops; | |
706e8520 | 1297 | unsigned i, pin; |
2744e8af LW |
1298 | |
1299 | seq_printf(s, "registered pins: %d\n", pctldev->desc->npins); | |
2744e8af | 1300 | |
42fed7ba | 1301 | mutex_lock(&pctldev->mutex); |
57b676f9 | 1302 | |
706e8520 CP |
1303 | /* The pin number can be retrived from the pin controller descriptor */ |
1304 | for (i = 0; i < pctldev->desc->npins; i++) { | |
2744e8af LW |
1305 | struct pin_desc *desc; |
1306 | ||
706e8520 | 1307 | pin = pctldev->desc->pins[i].number; |
2744e8af LW |
1308 | desc = pin_desc_get(pctldev, pin); |
1309 | /* Pin space may be sparse */ | |
1310 | if (desc == NULL) | |
1311 | continue; | |
1312 | ||
1313 | seq_printf(s, "pin %d (%s) ", pin, | |
1314 | desc->name ? desc->name : "unnamed"); | |
1315 | ||
1316 | /* Driver-specific info per pin */ | |
1317 | if (ops->pin_dbg_show) | |
1318 | ops->pin_dbg_show(pctldev, s, pin); | |
1319 | ||
1320 | seq_puts(s, "\n"); | |
1321 | } | |
1322 | ||
42fed7ba | 1323 | mutex_unlock(&pctldev->mutex); |
57b676f9 | 1324 | |
2744e8af LW |
1325 | return 0; |
1326 | } | |
1327 | ||
1328 | static int pinctrl_groups_show(struct seq_file *s, void *what) | |
1329 | { | |
1330 | struct pinctrl_dev *pctldev = s->private; | |
1331 | const struct pinctrl_ops *ops = pctldev->desc->pctlops; | |
d1e90e9e | 1332 | unsigned ngroups, selector = 0; |
2744e8af | 1333 | |
42fed7ba PC |
1334 | mutex_lock(&pctldev->mutex); |
1335 | ||
d1e90e9e | 1336 | ngroups = ops->get_groups_count(pctldev); |
57b676f9 | 1337 | |
2744e8af | 1338 | seq_puts(s, "registered pin groups:\n"); |
d1e90e9e | 1339 | while (selector < ngroups) { |
a5818a8b | 1340 | const unsigned *pins; |
2744e8af LW |
1341 | unsigned num_pins; |
1342 | const char *gname = ops->get_group_name(pctldev, selector); | |
dcb5dbc3 | 1343 | const char *pname; |
2744e8af LW |
1344 | int ret; |
1345 | int i; | |
1346 | ||
1347 | ret = ops->get_group_pins(pctldev, selector, | |
1348 | &pins, &num_pins); | |
1349 | if (ret) | |
1350 | seq_printf(s, "%s [ERROR GETTING PINS]\n", | |
1351 | gname); | |
1352 | else { | |
dcb5dbc3 DA |
1353 | seq_printf(s, "group: %s\n", gname); |
1354 | for (i = 0; i < num_pins; i++) { | |
1355 | pname = pin_get_name(pctldev, pins[i]); | |
b4dd784b | 1356 | if (WARN_ON(!pname)) { |
42fed7ba | 1357 | mutex_unlock(&pctldev->mutex); |
dcb5dbc3 | 1358 | return -EINVAL; |
b4dd784b | 1359 | } |
dcb5dbc3 DA |
1360 | seq_printf(s, "pin %d (%s)\n", pins[i], pname); |
1361 | } | |
1362 | seq_puts(s, "\n"); | |
2744e8af LW |
1363 | } |
1364 | selector++; | |
1365 | } | |
1366 | ||
42fed7ba | 1367 | mutex_unlock(&pctldev->mutex); |
2744e8af LW |
1368 | |
1369 | return 0; | |
1370 | } | |
1371 | ||
1372 | static int pinctrl_gpioranges_show(struct seq_file *s, void *what) | |
1373 | { | |
1374 | struct pinctrl_dev *pctldev = s->private; | |
1375 | struct pinctrl_gpio_range *range = NULL; | |
1376 | ||
1377 | seq_puts(s, "GPIO ranges handled:\n"); | |
1378 | ||
42fed7ba | 1379 | mutex_lock(&pctldev->mutex); |
57b676f9 | 1380 | |
2744e8af | 1381 | /* Loop over the ranges */ |
2744e8af | 1382 | list_for_each_entry(range, &pctldev->gpio_ranges, node) { |
c8587eee CR |
1383 | if (range->pins) { |
1384 | int a; | |
1385 | seq_printf(s, "%u: %s GPIOS [%u - %u] PINS {", | |
1386 | range->id, range->name, | |
1387 | range->base, (range->base + range->npins - 1)); | |
1388 | for (a = 0; a < range->npins - 1; a++) | |
1389 | seq_printf(s, "%u, ", range->pins[a]); | |
1390 | seq_printf(s, "%u}\n", range->pins[a]); | |
1391 | } | |
1392 | else | |
1393 | seq_printf(s, "%u: %s GPIOS [%u - %u] PINS [%u - %u]\n", | |
1394 | range->id, range->name, | |
1395 | range->base, (range->base + range->npins - 1), | |
1396 | range->pin_base, | |
1397 | (range->pin_base + range->npins - 1)); | |
2744e8af | 1398 | } |
57b676f9 | 1399 | |
42fed7ba | 1400 | mutex_unlock(&pctldev->mutex); |
2744e8af LW |
1401 | |
1402 | return 0; | |
1403 | } | |
1404 | ||
1405 | static int pinctrl_devices_show(struct seq_file *s, void *what) | |
1406 | { | |
1407 | struct pinctrl_dev *pctldev; | |
1408 | ||
ae6b4d85 | 1409 | seq_puts(s, "name [pinmux] [pinconf]\n"); |
57b676f9 | 1410 | |
42fed7ba | 1411 | mutex_lock(&pinctrldev_list_mutex); |
57b676f9 | 1412 | |
2744e8af LW |
1413 | list_for_each_entry(pctldev, &pinctrldev_list, node) { |
1414 | seq_printf(s, "%s ", pctldev->desc->name); | |
1415 | if (pctldev->desc->pmxops) | |
ae6b4d85 LW |
1416 | seq_puts(s, "yes "); |
1417 | else | |
1418 | seq_puts(s, "no "); | |
1419 | if (pctldev->desc->confops) | |
2744e8af LW |
1420 | seq_puts(s, "yes"); |
1421 | else | |
1422 | seq_puts(s, "no"); | |
1423 | seq_puts(s, "\n"); | |
1424 | } | |
57b676f9 | 1425 | |
42fed7ba | 1426 | mutex_unlock(&pinctrldev_list_mutex); |
2744e8af LW |
1427 | |
1428 | return 0; | |
1429 | } | |
1430 | ||
1e2082b5 SW |
1431 | static inline const char *map_type(enum pinctrl_map_type type) |
1432 | { | |
1433 | static const char * const names[] = { | |
1434 | "INVALID", | |
1435 | "DUMMY_STATE", | |
1436 | "MUX_GROUP", | |
1437 | "CONFIGS_PIN", | |
1438 | "CONFIGS_GROUP", | |
1439 | }; | |
1440 | ||
1441 | if (type >= ARRAY_SIZE(names)) | |
1442 | return "UNKNOWN"; | |
1443 | ||
1444 | return names[type]; | |
1445 | } | |
1446 | ||
3eedb437 SW |
1447 | static int pinctrl_maps_show(struct seq_file *s, void *what) |
1448 | { | |
1449 | struct pinctrl_maps *maps_node; | |
1450 | int i; | |
1451 | struct pinctrl_map const *map; | |
1452 | ||
1453 | seq_puts(s, "Pinctrl maps:\n"); | |
1454 | ||
42fed7ba | 1455 | mutex_lock(&pinctrl_maps_mutex); |
3eedb437 | 1456 | for_each_maps(maps_node, i, map) { |
1e2082b5 SW |
1457 | seq_printf(s, "device %s\nstate %s\ntype %s (%d)\n", |
1458 | map->dev_name, map->name, map_type(map->type), | |
1459 | map->type); | |
1460 | ||
1461 | if (map->type != PIN_MAP_TYPE_DUMMY_STATE) | |
1462 | seq_printf(s, "controlling device %s\n", | |
1463 | map->ctrl_dev_name); | |
1464 | ||
1465 | switch (map->type) { | |
1466 | case PIN_MAP_TYPE_MUX_GROUP: | |
1467 | pinmux_show_map(s, map); | |
1468 | break; | |
1469 | case PIN_MAP_TYPE_CONFIGS_PIN: | |
1470 | case PIN_MAP_TYPE_CONFIGS_GROUP: | |
1471 | pinconf_show_map(s, map); | |
1472 | break; | |
1473 | default: | |
1474 | break; | |
1475 | } | |
1476 | ||
1477 | seq_printf(s, "\n"); | |
3eedb437 | 1478 | } |
42fed7ba | 1479 | mutex_unlock(&pinctrl_maps_mutex); |
3eedb437 SW |
1480 | |
1481 | return 0; | |
1482 | } | |
1483 | ||
befe5bdf LW |
1484 | static int pinctrl_show(struct seq_file *s, void *what) |
1485 | { | |
1486 | struct pinctrl *p; | |
6e5e959d | 1487 | struct pinctrl_state *state; |
7ecdb16f | 1488 | struct pinctrl_setting *setting; |
befe5bdf LW |
1489 | |
1490 | seq_puts(s, "Requested pin control handlers their pinmux maps:\n"); | |
57b676f9 | 1491 | |
42fed7ba | 1492 | mutex_lock(&pinctrl_list_mutex); |
57b676f9 | 1493 | |
befe5bdf | 1494 | list_for_each_entry(p, &pinctrl_list, node) { |
6e5e959d SW |
1495 | seq_printf(s, "device: %s current state: %s\n", |
1496 | dev_name(p->dev), | |
1497 | p->state ? p->state->name : "none"); | |
1498 | ||
1499 | list_for_each_entry(state, &p->states, node) { | |
1500 | seq_printf(s, " state: %s\n", state->name); | |
befe5bdf | 1501 | |
6e5e959d | 1502 | list_for_each_entry(setting, &state->settings, node) { |
1e2082b5 SW |
1503 | struct pinctrl_dev *pctldev = setting->pctldev; |
1504 | ||
1505 | seq_printf(s, " type: %s controller %s ", | |
1506 | map_type(setting->type), | |
1507 | pinctrl_dev_get_name(pctldev)); | |
1508 | ||
1509 | switch (setting->type) { | |
1510 | case PIN_MAP_TYPE_MUX_GROUP: | |
1511 | pinmux_show_setting(s, setting); | |
1512 | break; | |
1513 | case PIN_MAP_TYPE_CONFIGS_PIN: | |
1514 | case PIN_MAP_TYPE_CONFIGS_GROUP: | |
1515 | pinconf_show_setting(s, setting); | |
1516 | break; | |
1517 | default: | |
1518 | break; | |
1519 | } | |
6e5e959d | 1520 | } |
befe5bdf | 1521 | } |
befe5bdf LW |
1522 | } |
1523 | ||
42fed7ba | 1524 | mutex_unlock(&pinctrl_list_mutex); |
57b676f9 | 1525 | |
befe5bdf LW |
1526 | return 0; |
1527 | } | |
1528 | ||
2744e8af LW |
1529 | static int pinctrl_pins_open(struct inode *inode, struct file *file) |
1530 | { | |
1531 | return single_open(file, pinctrl_pins_show, inode->i_private); | |
1532 | } | |
1533 | ||
1534 | static int pinctrl_groups_open(struct inode *inode, struct file *file) | |
1535 | { | |
1536 | return single_open(file, pinctrl_groups_show, inode->i_private); | |
1537 | } | |
1538 | ||
1539 | static int pinctrl_gpioranges_open(struct inode *inode, struct file *file) | |
1540 | { | |
1541 | return single_open(file, pinctrl_gpioranges_show, inode->i_private); | |
1542 | } | |
1543 | ||
1544 | static int pinctrl_devices_open(struct inode *inode, struct file *file) | |
1545 | { | |
1546 | return single_open(file, pinctrl_devices_show, NULL); | |
1547 | } | |
1548 | ||
3eedb437 SW |
1549 | static int pinctrl_maps_open(struct inode *inode, struct file *file) |
1550 | { | |
1551 | return single_open(file, pinctrl_maps_show, NULL); | |
1552 | } | |
1553 | ||
befe5bdf LW |
1554 | static int pinctrl_open(struct inode *inode, struct file *file) |
1555 | { | |
1556 | return single_open(file, pinctrl_show, NULL); | |
1557 | } | |
1558 | ||
2744e8af LW |
1559 | static const struct file_operations pinctrl_pins_ops = { |
1560 | .open = pinctrl_pins_open, | |
1561 | .read = seq_read, | |
1562 | .llseek = seq_lseek, | |
1563 | .release = single_release, | |
1564 | }; | |
1565 | ||
1566 | static const struct file_operations pinctrl_groups_ops = { | |
1567 | .open = pinctrl_groups_open, | |
1568 | .read = seq_read, | |
1569 | .llseek = seq_lseek, | |
1570 | .release = single_release, | |
1571 | }; | |
1572 | ||
1573 | static const struct file_operations pinctrl_gpioranges_ops = { | |
1574 | .open = pinctrl_gpioranges_open, | |
1575 | .read = seq_read, | |
1576 | .llseek = seq_lseek, | |
1577 | .release = single_release, | |
1578 | }; | |
1579 | ||
3eedb437 SW |
1580 | static const struct file_operations pinctrl_devices_ops = { |
1581 | .open = pinctrl_devices_open, | |
befe5bdf LW |
1582 | .read = seq_read, |
1583 | .llseek = seq_lseek, | |
1584 | .release = single_release, | |
1585 | }; | |
1586 | ||
3eedb437 SW |
1587 | static const struct file_operations pinctrl_maps_ops = { |
1588 | .open = pinctrl_maps_open, | |
2744e8af LW |
1589 | .read = seq_read, |
1590 | .llseek = seq_lseek, | |
1591 | .release = single_release, | |
1592 | }; | |
1593 | ||
befe5bdf LW |
1594 | static const struct file_operations pinctrl_ops = { |
1595 | .open = pinctrl_open, | |
1596 | .read = seq_read, | |
1597 | .llseek = seq_lseek, | |
1598 | .release = single_release, | |
1599 | }; | |
1600 | ||
2744e8af LW |
1601 | static struct dentry *debugfs_root; |
1602 | ||
1603 | static void pinctrl_init_device_debugfs(struct pinctrl_dev *pctldev) | |
1604 | { | |
02157160 | 1605 | struct dentry *device_root; |
2744e8af | 1606 | |
51cd24ee | 1607 | device_root = debugfs_create_dir(dev_name(pctldev->dev), |
2744e8af | 1608 | debugfs_root); |
02157160 TL |
1609 | pctldev->device_root = device_root; |
1610 | ||
2744e8af LW |
1611 | if (IS_ERR(device_root) || !device_root) { |
1612 | pr_warn("failed to create debugfs directory for %s\n", | |
51cd24ee | 1613 | dev_name(pctldev->dev)); |
2744e8af LW |
1614 | return; |
1615 | } | |
1616 | debugfs_create_file("pins", S_IFREG | S_IRUGO, | |
1617 | device_root, pctldev, &pinctrl_pins_ops); | |
1618 | debugfs_create_file("pingroups", S_IFREG | S_IRUGO, | |
1619 | device_root, pctldev, &pinctrl_groups_ops); | |
1620 | debugfs_create_file("gpio-ranges", S_IFREG | S_IRUGO, | |
1621 | device_root, pctldev, &pinctrl_gpioranges_ops); | |
1622 | pinmux_init_device_debugfs(device_root, pctldev); | |
ae6b4d85 | 1623 | pinconf_init_device_debugfs(device_root, pctldev); |
2744e8af LW |
1624 | } |
1625 | ||
02157160 TL |
1626 | static void pinctrl_remove_device_debugfs(struct pinctrl_dev *pctldev) |
1627 | { | |
1628 | debugfs_remove_recursive(pctldev->device_root); | |
1629 | } | |
1630 | ||
2744e8af LW |
1631 | static void pinctrl_init_debugfs(void) |
1632 | { | |
1633 | debugfs_root = debugfs_create_dir("pinctrl", NULL); | |
1634 | if (IS_ERR(debugfs_root) || !debugfs_root) { | |
1635 | pr_warn("failed to create debugfs directory\n"); | |
1636 | debugfs_root = NULL; | |
1637 | return; | |
1638 | } | |
1639 | ||
1640 | debugfs_create_file("pinctrl-devices", S_IFREG | S_IRUGO, | |
1641 | debugfs_root, NULL, &pinctrl_devices_ops); | |
3eedb437 SW |
1642 | debugfs_create_file("pinctrl-maps", S_IFREG | S_IRUGO, |
1643 | debugfs_root, NULL, &pinctrl_maps_ops); | |
befe5bdf LW |
1644 | debugfs_create_file("pinctrl-handles", S_IFREG | S_IRUGO, |
1645 | debugfs_root, NULL, &pinctrl_ops); | |
2744e8af LW |
1646 | } |
1647 | ||
1648 | #else /* CONFIG_DEBUG_FS */ | |
1649 | ||
1650 | static void pinctrl_init_device_debugfs(struct pinctrl_dev *pctldev) | |
1651 | { | |
1652 | } | |
1653 | ||
1654 | static void pinctrl_init_debugfs(void) | |
1655 | { | |
1656 | } | |
1657 | ||
02157160 TL |
1658 | static void pinctrl_remove_device_debugfs(struct pinctrl_dev *pctldev) |
1659 | { | |
1660 | } | |
1661 | ||
2744e8af LW |
1662 | #endif |
1663 | ||
d26bc49f SW |
1664 | static int pinctrl_check_ops(struct pinctrl_dev *pctldev) |
1665 | { | |
1666 | const struct pinctrl_ops *ops = pctldev->desc->pctlops; | |
1667 | ||
1668 | if (!ops || | |
d1e90e9e | 1669 | !ops->get_groups_count || |
d26bc49f SW |
1670 | !ops->get_group_name || |
1671 | !ops->get_group_pins) | |
1672 | return -EINVAL; | |
1673 | ||
57291ce2 SW |
1674 | if (ops->dt_node_to_map && !ops->dt_free_map) |
1675 | return -EINVAL; | |
1676 | ||
d26bc49f SW |
1677 | return 0; |
1678 | } | |
1679 | ||
2744e8af LW |
1680 | /** |
1681 | * pinctrl_register() - register a pin controller device | |
1682 | * @pctldesc: descriptor for this pin controller | |
1683 | * @dev: parent device for this pin controller | |
1684 | * @driver_data: private pin controller data for this pin controller | |
1685 | */ | |
1686 | struct pinctrl_dev *pinctrl_register(struct pinctrl_desc *pctldesc, | |
1687 | struct device *dev, void *driver_data) | |
1688 | { | |
2744e8af LW |
1689 | struct pinctrl_dev *pctldev; |
1690 | int ret; | |
1691 | ||
da9aecb0 | 1692 | if (!pctldesc) |
2744e8af | 1693 | return NULL; |
da9aecb0 | 1694 | if (!pctldesc->name) |
2744e8af LW |
1695 | return NULL; |
1696 | ||
02f5b989 | 1697 | pctldev = kzalloc(sizeof(*pctldev), GFP_KERNEL); |
95dcd4ae SW |
1698 | if (pctldev == NULL) { |
1699 | dev_err(dev, "failed to alloc struct pinctrl_dev\n"); | |
b9130b77 | 1700 | return NULL; |
95dcd4ae | 1701 | } |
b9130b77 TL |
1702 | |
1703 | /* Initialize pin control device struct */ | |
1704 | pctldev->owner = pctldesc->owner; | |
1705 | pctldev->desc = pctldesc; | |
1706 | pctldev->driver_data = driver_data; | |
1707 | INIT_RADIX_TREE(&pctldev->pin_desc_tree, GFP_KERNEL); | |
b9130b77 | 1708 | INIT_LIST_HEAD(&pctldev->gpio_ranges); |
b9130b77 | 1709 | pctldev->dev = dev; |
42fed7ba | 1710 | mutex_init(&pctldev->mutex); |
b9130b77 | 1711 | |
d26bc49f | 1712 | /* check core ops for sanity */ |
da9aecb0 | 1713 | if (pinctrl_check_ops(pctldev)) { |
ad6e1107 | 1714 | dev_err(dev, "pinctrl ops lacks necessary functions\n"); |
d26bc49f SW |
1715 | goto out_err; |
1716 | } | |
1717 | ||
2744e8af LW |
1718 | /* If we're implementing pinmuxing, check the ops for sanity */ |
1719 | if (pctldesc->pmxops) { | |
da9aecb0 | 1720 | if (pinmux_check_ops(pctldev)) |
b9130b77 | 1721 | goto out_err; |
2744e8af LW |
1722 | } |
1723 | ||
ae6b4d85 LW |
1724 | /* If we're implementing pinconfig, check the ops for sanity */ |
1725 | if (pctldesc->confops) { | |
da9aecb0 | 1726 | if (pinconf_check_ops(pctldev)) |
b9130b77 | 1727 | goto out_err; |
ae6b4d85 LW |
1728 | } |
1729 | ||
2744e8af | 1730 | /* Register all the pins */ |
ad6e1107 | 1731 | dev_dbg(dev, "try to register %d pins ...\n", pctldesc->npins); |
2744e8af LW |
1732 | ret = pinctrl_register_pins(pctldev, pctldesc->pins, pctldesc->npins); |
1733 | if (ret) { | |
ad6e1107 | 1734 | dev_err(dev, "error during pin registration\n"); |
2744e8af LW |
1735 | pinctrl_free_pindescs(pctldev, pctldesc->pins, |
1736 | pctldesc->npins); | |
51cd24ee | 1737 | goto out_err; |
2744e8af LW |
1738 | } |
1739 | ||
42fed7ba | 1740 | mutex_lock(&pinctrldev_list_mutex); |
8b9c139f | 1741 | list_add_tail(&pctldev->node, &pinctrldev_list); |
42fed7ba PC |
1742 | mutex_unlock(&pinctrldev_list_mutex); |
1743 | ||
1744 | pctldev->p = pinctrl_get(pctldev->dev); | |
57b676f9 | 1745 | |
6e5e959d | 1746 | if (!IS_ERR(pctldev->p)) { |
840a47ba | 1747 | pctldev->hog_default = |
42fed7ba | 1748 | pinctrl_lookup_state(pctldev->p, PINCTRL_STATE_DEFAULT); |
840a47ba | 1749 | if (IS_ERR(pctldev->hog_default)) { |
ad6e1107 JC |
1750 | dev_dbg(dev, "failed to lookup the default state\n"); |
1751 | } else { | |
42fed7ba | 1752 | if (pinctrl_select_state(pctldev->p, |
840a47ba | 1753 | pctldev->hog_default)) |
ad6e1107 JC |
1754 | dev_err(dev, |
1755 | "failed to select default state\n"); | |
ad6e1107 | 1756 | } |
840a47ba JD |
1757 | |
1758 | pctldev->hog_sleep = | |
42fed7ba | 1759 | pinctrl_lookup_state(pctldev->p, |
840a47ba JD |
1760 | PINCTRL_STATE_SLEEP); |
1761 | if (IS_ERR(pctldev->hog_sleep)) | |
1762 | dev_dbg(dev, "failed to lookup the sleep state\n"); | |
6e5e959d | 1763 | } |
57b676f9 | 1764 | |
2304b473 SW |
1765 | pinctrl_init_device_debugfs(pctldev); |
1766 | ||
2744e8af LW |
1767 | return pctldev; |
1768 | ||
51cd24ee | 1769 | out_err: |
42fed7ba | 1770 | mutex_destroy(&pctldev->mutex); |
51cd24ee | 1771 | kfree(pctldev); |
2744e8af LW |
1772 | return NULL; |
1773 | } | |
1774 | EXPORT_SYMBOL_GPL(pinctrl_register); | |
1775 | ||
1776 | /** | |
1777 | * pinctrl_unregister() - unregister pinmux | |
1778 | * @pctldev: pin controller to unregister | |
1779 | * | |
1780 | * Called by pinmux drivers to unregister a pinmux. | |
1781 | */ | |
1782 | void pinctrl_unregister(struct pinctrl_dev *pctldev) | |
1783 | { | |
5d589b09 | 1784 | struct pinctrl_gpio_range *range, *n; |
2744e8af LW |
1785 | if (pctldev == NULL) |
1786 | return; | |
1787 | ||
42fed7ba PC |
1788 | mutex_lock(&pinctrldev_list_mutex); |
1789 | mutex_lock(&pctldev->mutex); | |
57b676f9 | 1790 | |
42fed7ba | 1791 | pinctrl_remove_device_debugfs(pctldev); |
57b676f9 | 1792 | |
6e5e959d | 1793 | if (!IS_ERR(pctldev->p)) |
42fed7ba | 1794 | pinctrl_put(pctldev->p); |
57b676f9 | 1795 | |
2744e8af | 1796 | /* TODO: check that no pinmuxes are still active? */ |
2744e8af | 1797 | list_del(&pctldev->node); |
2744e8af LW |
1798 | /* Destroy descriptor tree */ |
1799 | pinctrl_free_pindescs(pctldev, pctldev->desc->pins, | |
1800 | pctldev->desc->npins); | |
5d589b09 DA |
1801 | /* remove gpio ranges map */ |
1802 | list_for_each_entry_safe(range, n, &pctldev->gpio_ranges, node) | |
1803 | list_del(&range->node); | |
1804 | ||
42fed7ba PC |
1805 | mutex_unlock(&pctldev->mutex); |
1806 | mutex_destroy(&pctldev->mutex); | |
51cd24ee | 1807 | kfree(pctldev); |
42fed7ba | 1808 | mutex_unlock(&pinctrldev_list_mutex); |
2744e8af LW |
1809 | } |
1810 | EXPORT_SYMBOL_GPL(pinctrl_unregister); | |
1811 | ||
1812 | static int __init pinctrl_init(void) | |
1813 | { | |
1814 | pr_info("initialized pinctrl subsystem\n"); | |
1815 | pinctrl_init_debugfs(); | |
1816 | return 0; | |
1817 | } | |
1818 | ||
1819 | /* init early since many drivers really need to initialized pinmux early */ | |
1820 | core_initcall(pinctrl_init); |