Commit | Line | Data |
---|---|---|
2744e8af LW |
1 | /* |
2 | * Core driver for the pin control subsystem | |
3 | * | |
befe5bdf | 4 | * Copyright (C) 2011-2012 ST-Ericsson SA |
2744e8af LW |
5 | * Written on behalf of Linaro for ST-Ericsson |
6 | * Based on bits of regulator core, gpio core and clk core | |
7 | * | |
8 | * Author: Linus Walleij <linus.walleij@linaro.org> | |
9 | * | |
b2b3e66e SW |
10 | * Copyright (C) 2012 NVIDIA CORPORATION. All rights reserved. |
11 | * | |
2744e8af LW |
12 | * License terms: GNU General Public License (GPL) version 2 |
13 | */ | |
14 | #define pr_fmt(fmt) "pinctrl core: " fmt | |
15 | ||
16 | #include <linux/kernel.h> | |
ab78029e | 17 | #include <linux/kref.h> |
a5a697cd | 18 | #include <linux/export.h> |
2744e8af LW |
19 | #include <linux/init.h> |
20 | #include <linux/device.h> | |
21 | #include <linux/slab.h> | |
2744e8af LW |
22 | #include <linux/err.h> |
23 | #include <linux/list.h> | |
2744e8af LW |
24 | #include <linux/sysfs.h> |
25 | #include <linux/debugfs.h> | |
26 | #include <linux/seq_file.h> | |
6d4ca1fb | 27 | #include <linux/pinctrl/consumer.h> |
2744e8af LW |
28 | #include <linux/pinctrl/pinctrl.h> |
29 | #include <linux/pinctrl/machine.h> | |
2afe8229 HZ |
30 | |
31 | #ifdef CONFIG_GPIOLIB | |
51e13c24 | 32 | #include <asm-generic/gpio.h> |
2afe8229 HZ |
33 | #endif |
34 | ||
2744e8af | 35 | #include "core.h" |
57291ce2 | 36 | #include "devicetree.h" |
2744e8af | 37 | #include "pinmux.h" |
ae6b4d85 | 38 | #include "pinconf.h" |
2744e8af | 39 | |
b2b3e66e | 40 | |
5b3aa5f7 DA |
41 | static bool pinctrl_dummy_state; |
42 | ||
42fed7ba | 43 | /* Mutex taken to protect pinctrl_list */ |
843aec96 | 44 | static DEFINE_MUTEX(pinctrl_list_mutex); |
42fed7ba PC |
45 | |
46 | /* Mutex taken to protect pinctrl_maps */ | |
47 | DEFINE_MUTEX(pinctrl_maps_mutex); | |
48 | ||
49 | /* Mutex taken to protect pinctrldev_list */ | |
843aec96 | 50 | static DEFINE_MUTEX(pinctrldev_list_mutex); |
57b676f9 SW |
51 | |
52 | /* Global list of pin control devices (struct pinctrl_dev) */ | |
42fed7ba | 53 | static LIST_HEAD(pinctrldev_list); |
2744e8af | 54 | |
57b676f9 | 55 | /* List of pin controller handles (struct pinctrl) */ |
befe5bdf LW |
56 | static LIST_HEAD(pinctrl_list); |
57 | ||
57b676f9 | 58 | /* List of pinctrl maps (struct pinctrl_maps) */ |
6f9e41f4 | 59 | LIST_HEAD(pinctrl_maps); |
b2b3e66e | 60 | |
befe5bdf | 61 | |
5b3aa5f7 DA |
62 | /** |
63 | * pinctrl_provide_dummies() - indicate if pinctrl provides dummy state support | |
64 | * | |
65 | * Usually this function is called by platforms without pinctrl driver support | |
66 | * but run with some shared drivers using pinctrl APIs. | |
67 | * After calling this function, the pinctrl core will return successfully | |
68 | * with creating a dummy state for the driver to keep going smoothly. | |
69 | */ | |
70 | void pinctrl_provide_dummies(void) | |
71 | { | |
72 | pinctrl_dummy_state = true; | |
73 | } | |
74 | ||
2744e8af LW |
75 | const char *pinctrl_dev_get_name(struct pinctrl_dev *pctldev) |
76 | { | |
77 | /* We're not allowed to register devices without name */ | |
78 | return pctldev->desc->name; | |
79 | } | |
80 | EXPORT_SYMBOL_GPL(pinctrl_dev_get_name); | |
81 | ||
d6e99abb HZ |
82 | const char *pinctrl_dev_get_devname(struct pinctrl_dev *pctldev) |
83 | { | |
84 | return dev_name(pctldev->dev); | |
85 | } | |
86 | EXPORT_SYMBOL_GPL(pinctrl_dev_get_devname); | |
87 | ||
2744e8af LW |
88 | void *pinctrl_dev_get_drvdata(struct pinctrl_dev *pctldev) |
89 | { | |
90 | return pctldev->driver_data; | |
91 | } | |
92 | EXPORT_SYMBOL_GPL(pinctrl_dev_get_drvdata); | |
93 | ||
94 | /** | |
9dfac4fd LW |
95 | * get_pinctrl_dev_from_devname() - look up pin controller device |
96 | * @devname: the name of a device instance, as returned by dev_name() | |
2744e8af LW |
97 | * |
98 | * Looks up a pin control device matching a certain device name or pure device | |
99 | * pointer, the pure device pointer will take precedence. | |
100 | */ | |
9dfac4fd | 101 | struct pinctrl_dev *get_pinctrl_dev_from_devname(const char *devname) |
2744e8af LW |
102 | { |
103 | struct pinctrl_dev *pctldev = NULL; | |
2744e8af | 104 | |
9dfac4fd LW |
105 | if (!devname) |
106 | return NULL; | |
107 | ||
44d5f7bb LW |
108 | mutex_lock(&pinctrldev_list_mutex); |
109 | ||
2744e8af | 110 | list_for_each_entry(pctldev, &pinctrldev_list, node) { |
9dfac4fd | 111 | if (!strcmp(dev_name(pctldev->dev), devname)) { |
2744e8af | 112 | /* Matched on device name */ |
44d5f7bb LW |
113 | mutex_unlock(&pinctrldev_list_mutex); |
114 | return pctldev; | |
2744e8af LW |
115 | } |
116 | } | |
2744e8af | 117 | |
44d5f7bb LW |
118 | mutex_unlock(&pinctrldev_list_mutex); |
119 | ||
120 | return NULL; | |
2744e8af LW |
121 | } |
122 | ||
42fed7ba PC |
123 | struct pinctrl_dev *get_pinctrl_dev_from_of_node(struct device_node *np) |
124 | { | |
125 | struct pinctrl_dev *pctldev; | |
126 | ||
127 | mutex_lock(&pinctrldev_list_mutex); | |
128 | ||
129 | list_for_each_entry(pctldev, &pinctrldev_list, node) | |
130 | if (pctldev->dev->of_node == np) { | |
131 | mutex_unlock(&pinctrldev_list_mutex); | |
132 | return pctldev; | |
133 | } | |
134 | ||
d463f82d | 135 | mutex_unlock(&pinctrldev_list_mutex); |
42fed7ba PC |
136 | |
137 | return NULL; | |
138 | } | |
139 | ||
ae6b4d85 LW |
140 | /** |
141 | * pin_get_from_name() - look up a pin number from a name | |
142 | * @pctldev: the pin control device to lookup the pin on | |
143 | * @name: the name of the pin to look up | |
144 | */ | |
145 | int pin_get_from_name(struct pinctrl_dev *pctldev, const char *name) | |
146 | { | |
706e8520 | 147 | unsigned i, pin; |
ae6b4d85 | 148 | |
706e8520 CP |
149 | /* The pin number can be retrived from the pin controller descriptor */ |
150 | for (i = 0; i < pctldev->desc->npins; i++) { | |
ae6b4d85 LW |
151 | struct pin_desc *desc; |
152 | ||
706e8520 | 153 | pin = pctldev->desc->pins[i].number; |
ae6b4d85 LW |
154 | desc = pin_desc_get(pctldev, pin); |
155 | /* Pin space may be sparse */ | |
6c325f87 | 156 | if (desc && !strcmp(name, desc->name)) |
ae6b4d85 LW |
157 | return pin; |
158 | } | |
159 | ||
160 | return -EINVAL; | |
161 | } | |
162 | ||
dcb5dbc3 DA |
163 | /** |
164 | * pin_get_name_from_id() - look up a pin name from a pin id | |
165 | * @pctldev: the pin control device to lookup the pin on | |
166 | * @name: the name of the pin to look up | |
167 | */ | |
168 | const char *pin_get_name(struct pinctrl_dev *pctldev, const unsigned pin) | |
169 | { | |
170 | const struct pin_desc *desc; | |
171 | ||
172 | desc = pin_desc_get(pctldev, pin); | |
173 | if (desc == NULL) { | |
174 | dev_err(pctldev->dev, "failed to get pin(%d) name\n", | |
175 | pin); | |
176 | return NULL; | |
177 | } | |
178 | ||
179 | return desc->name; | |
180 | } | |
181 | ||
2744e8af LW |
182 | /** |
183 | * pin_is_valid() - check if pin exists on controller | |
184 | * @pctldev: the pin control device to check the pin on | |
185 | * @pin: pin to check, use the local pin controller index number | |
186 | * | |
187 | * This tells us whether a certain pin exist on a certain pin controller or | |
188 | * not. Pin lists may be sparse, so some pins may not exist. | |
189 | */ | |
190 | bool pin_is_valid(struct pinctrl_dev *pctldev, int pin) | |
191 | { | |
192 | struct pin_desc *pindesc; | |
193 | ||
194 | if (pin < 0) | |
195 | return false; | |
196 | ||
42fed7ba | 197 | mutex_lock(&pctldev->mutex); |
2744e8af | 198 | pindesc = pin_desc_get(pctldev, pin); |
42fed7ba | 199 | mutex_unlock(&pctldev->mutex); |
2744e8af | 200 | |
57b676f9 | 201 | return pindesc != NULL; |
2744e8af LW |
202 | } |
203 | EXPORT_SYMBOL_GPL(pin_is_valid); | |
204 | ||
205 | /* Deletes a range of pin descriptors */ | |
206 | static void pinctrl_free_pindescs(struct pinctrl_dev *pctldev, | |
207 | const struct pinctrl_pin_desc *pins, | |
208 | unsigned num_pins) | |
209 | { | |
210 | int i; | |
211 | ||
2744e8af LW |
212 | for (i = 0; i < num_pins; i++) { |
213 | struct pin_desc *pindesc; | |
214 | ||
215 | pindesc = radix_tree_lookup(&pctldev->pin_desc_tree, | |
216 | pins[i].number); | |
217 | if (pindesc != NULL) { | |
218 | radix_tree_delete(&pctldev->pin_desc_tree, | |
219 | pins[i].number); | |
ca53c5f1 LW |
220 | if (pindesc->dynamic_name) |
221 | kfree(pindesc->name); | |
2744e8af LW |
222 | } |
223 | kfree(pindesc); | |
224 | } | |
2744e8af LW |
225 | } |
226 | ||
227 | static int pinctrl_register_one_pin(struct pinctrl_dev *pctldev, | |
228 | unsigned number, const char *name) | |
229 | { | |
230 | struct pin_desc *pindesc; | |
231 | ||
232 | pindesc = pin_desc_get(pctldev, number); | |
233 | if (pindesc != NULL) { | |
234 | pr_err("pin %d already registered on %s\n", number, | |
235 | pctldev->desc->name); | |
236 | return -EINVAL; | |
237 | } | |
238 | ||
239 | pindesc = kzalloc(sizeof(*pindesc), GFP_KERNEL); | |
95dcd4ae SW |
240 | if (pindesc == NULL) { |
241 | dev_err(pctldev->dev, "failed to alloc struct pin_desc\n"); | |
2744e8af | 242 | return -ENOMEM; |
95dcd4ae | 243 | } |
ae6b4d85 | 244 | |
2744e8af LW |
245 | /* Set owner */ |
246 | pindesc->pctldev = pctldev; | |
247 | ||
9af1e44f | 248 | /* Copy basic pin info */ |
8dc6ae4d | 249 | if (name) { |
ca53c5f1 LW |
250 | pindesc->name = name; |
251 | } else { | |
252 | pindesc->name = kasprintf(GFP_KERNEL, "PIN%u", number); | |
eb26cc9c SK |
253 | if (pindesc->name == NULL) { |
254 | kfree(pindesc); | |
ca53c5f1 | 255 | return -ENOMEM; |
eb26cc9c | 256 | } |
ca53c5f1 LW |
257 | pindesc->dynamic_name = true; |
258 | } | |
2744e8af | 259 | |
2744e8af | 260 | radix_tree_insert(&pctldev->pin_desc_tree, number, pindesc); |
2744e8af | 261 | pr_debug("registered pin %d (%s) on %s\n", |
ca53c5f1 | 262 | number, pindesc->name, pctldev->desc->name); |
2744e8af LW |
263 | return 0; |
264 | } | |
265 | ||
266 | static int pinctrl_register_pins(struct pinctrl_dev *pctldev, | |
267 | struct pinctrl_pin_desc const *pins, | |
268 | unsigned num_descs) | |
269 | { | |
270 | unsigned i; | |
271 | int ret = 0; | |
272 | ||
273 | for (i = 0; i < num_descs; i++) { | |
274 | ret = pinctrl_register_one_pin(pctldev, | |
275 | pins[i].number, pins[i].name); | |
276 | if (ret) | |
277 | return ret; | |
278 | } | |
279 | ||
280 | return 0; | |
281 | } | |
282 | ||
c8587eee CR |
283 | /** |
284 | * gpio_to_pin() - GPIO range GPIO number to pin number translation | |
285 | * @range: GPIO range used for the translation | |
286 | * @gpio: gpio pin to translate to a pin number | |
287 | * | |
288 | * Finds the pin number for a given GPIO using the specified GPIO range | |
289 | * as a base for translation. The distinction between linear GPIO ranges | |
290 | * and pin list based GPIO ranges is managed correctly by this function. | |
291 | * | |
292 | * This function assumes the gpio is part of the specified GPIO range, use | |
293 | * only after making sure this is the case (e.g. by calling it on the | |
294 | * result of successful pinctrl_get_device_gpio_range calls)! | |
295 | */ | |
296 | static inline int gpio_to_pin(struct pinctrl_gpio_range *range, | |
297 | unsigned int gpio) | |
298 | { | |
299 | unsigned int offset = gpio - range->base; | |
300 | if (range->pins) | |
301 | return range->pins[offset]; | |
302 | else | |
303 | return range->pin_base + offset; | |
304 | } | |
305 | ||
2744e8af LW |
306 | /** |
307 | * pinctrl_match_gpio_range() - check if a certain GPIO pin is in range | |
308 | * @pctldev: pin controller device to check | |
309 | * @gpio: gpio pin to check taken from the global GPIO pin space | |
310 | * | |
311 | * Tries to match a GPIO pin number to the ranges handled by a certain pin | |
312 | * controller, return the range or NULL | |
313 | */ | |
314 | static struct pinctrl_gpio_range * | |
315 | pinctrl_match_gpio_range(struct pinctrl_dev *pctldev, unsigned gpio) | |
316 | { | |
317 | struct pinctrl_gpio_range *range = NULL; | |
318 | ||
42fed7ba | 319 | mutex_lock(&pctldev->mutex); |
2744e8af | 320 | /* Loop over the ranges */ |
2744e8af LW |
321 | list_for_each_entry(range, &pctldev->gpio_ranges, node) { |
322 | /* Check if we're in the valid range */ | |
323 | if (gpio >= range->base && | |
324 | gpio < range->base + range->npins) { | |
42fed7ba | 325 | mutex_unlock(&pctldev->mutex); |
2744e8af LW |
326 | return range; |
327 | } | |
328 | } | |
42fed7ba | 329 | mutex_unlock(&pctldev->mutex); |
2744e8af LW |
330 | return NULL; |
331 | } | |
332 | ||
51e13c24 HZ |
333 | /** |
334 | * pinctrl_ready_for_gpio_range() - check if other GPIO pins of | |
335 | * the same GPIO chip are in range | |
336 | * @gpio: gpio pin to check taken from the global GPIO pin space | |
337 | * | |
338 | * This function is complement of pinctrl_match_gpio_range(). If the return | |
339 | * value of pinctrl_match_gpio_range() is NULL, this function could be used | |
340 | * to check whether pinctrl device is ready or not. Maybe some GPIO pins | |
341 | * of the same GPIO chip don't have back-end pinctrl interface. | |
342 | * If the return value is true, it means that pinctrl device is ready & the | |
343 | * certain GPIO pin doesn't have back-end pinctrl device. If the return value | |
344 | * is false, it means that pinctrl device may not be ready. | |
345 | */ | |
2afe8229 | 346 | #ifdef CONFIG_GPIOLIB |
51e13c24 HZ |
347 | static bool pinctrl_ready_for_gpio_range(unsigned gpio) |
348 | { | |
349 | struct pinctrl_dev *pctldev; | |
350 | struct pinctrl_gpio_range *range = NULL; | |
351 | struct gpio_chip *chip = gpio_to_chip(gpio); | |
352 | ||
44d5f7bb LW |
353 | mutex_lock(&pinctrldev_list_mutex); |
354 | ||
51e13c24 HZ |
355 | /* Loop over the pin controllers */ |
356 | list_for_each_entry(pctldev, &pinctrldev_list, node) { | |
357 | /* Loop over the ranges */ | |
5ffbe2e6 | 358 | mutex_lock(&pctldev->mutex); |
51e13c24 HZ |
359 | list_for_each_entry(range, &pctldev->gpio_ranges, node) { |
360 | /* Check if any gpio range overlapped with gpio chip */ | |
361 | if (range->base + range->npins - 1 < chip->base || | |
362 | range->base > chip->base + chip->ngpio - 1) | |
363 | continue; | |
5ffbe2e6 | 364 | mutex_unlock(&pctldev->mutex); |
44d5f7bb | 365 | mutex_unlock(&pinctrldev_list_mutex); |
51e13c24 HZ |
366 | return true; |
367 | } | |
5ffbe2e6 | 368 | mutex_unlock(&pctldev->mutex); |
51e13c24 | 369 | } |
44d5f7bb LW |
370 | |
371 | mutex_unlock(&pinctrldev_list_mutex); | |
372 | ||
51e13c24 HZ |
373 | return false; |
374 | } | |
2afe8229 HZ |
375 | #else |
376 | static bool pinctrl_ready_for_gpio_range(unsigned gpio) { return true; } | |
377 | #endif | |
51e13c24 | 378 | |
2744e8af LW |
379 | /** |
380 | * pinctrl_get_device_gpio_range() - find device for GPIO range | |
381 | * @gpio: the pin to locate the pin controller for | |
382 | * @outdev: the pin control device if found | |
383 | * @outrange: the GPIO range if found | |
384 | * | |
385 | * Find the pin controller handling a certain GPIO pin from the pinspace of | |
386 | * the GPIO subsystem, return the device and the matching GPIO range. Returns | |
4650b7cb DA |
387 | * -EPROBE_DEFER if the GPIO range could not be found in any device since it |
388 | * may still have not been registered. | |
2744e8af | 389 | */ |
4ecce45d SW |
390 | static int pinctrl_get_device_gpio_range(unsigned gpio, |
391 | struct pinctrl_dev **outdev, | |
392 | struct pinctrl_gpio_range **outrange) | |
2744e8af LW |
393 | { |
394 | struct pinctrl_dev *pctldev = NULL; | |
395 | ||
f0059021 AL |
396 | mutex_lock(&pinctrldev_list_mutex); |
397 | ||
2744e8af | 398 | /* Loop over the pin controllers */ |
2744e8af LW |
399 | list_for_each_entry(pctldev, &pinctrldev_list, node) { |
400 | struct pinctrl_gpio_range *range; | |
401 | ||
402 | range = pinctrl_match_gpio_range(pctldev, gpio); | |
403 | if (range != NULL) { | |
404 | *outdev = pctldev; | |
405 | *outrange = range; | |
f0059021 | 406 | mutex_unlock(&pinctrldev_list_mutex); |
2744e8af LW |
407 | return 0; |
408 | } | |
409 | } | |
2744e8af | 410 | |
f0059021 AL |
411 | mutex_unlock(&pinctrldev_list_mutex); |
412 | ||
4650b7cb | 413 | return -EPROBE_DEFER; |
2744e8af LW |
414 | } |
415 | ||
416 | /** | |
417 | * pinctrl_add_gpio_range() - register a GPIO range for a controller | |
418 | * @pctldev: pin controller device to add the range to | |
419 | * @range: the GPIO range to add | |
420 | * | |
421 | * This adds a range of GPIOs to be handled by a certain pin controller. Call | |
422 | * this to register handled ranges after registering your pin controller. | |
423 | */ | |
424 | void pinctrl_add_gpio_range(struct pinctrl_dev *pctldev, | |
425 | struct pinctrl_gpio_range *range) | |
426 | { | |
42fed7ba | 427 | mutex_lock(&pctldev->mutex); |
8b9c139f | 428 | list_add_tail(&range->node, &pctldev->gpio_ranges); |
42fed7ba | 429 | mutex_unlock(&pctldev->mutex); |
2744e8af | 430 | } |
4ecce45d | 431 | EXPORT_SYMBOL_GPL(pinctrl_add_gpio_range); |
2744e8af | 432 | |
3e5e00b6 DA |
433 | void pinctrl_add_gpio_ranges(struct pinctrl_dev *pctldev, |
434 | struct pinctrl_gpio_range *ranges, | |
435 | unsigned nranges) | |
436 | { | |
437 | int i; | |
438 | ||
439 | for (i = 0; i < nranges; i++) | |
440 | pinctrl_add_gpio_range(pctldev, &ranges[i]); | |
441 | } | |
442 | EXPORT_SYMBOL_GPL(pinctrl_add_gpio_ranges); | |
443 | ||
192c369c | 444 | struct pinctrl_dev *pinctrl_find_and_add_gpio_range(const char *devname, |
f23f1516 SH |
445 | struct pinctrl_gpio_range *range) |
446 | { | |
42fed7ba PC |
447 | struct pinctrl_dev *pctldev; |
448 | ||
42fed7ba | 449 | pctldev = get_pinctrl_dev_from_devname(devname); |
f23f1516 | 450 | |
dfa97515 LW |
451 | /* |
452 | * If we can't find this device, let's assume that is because | |
453 | * it has not probed yet, so the driver trying to register this | |
454 | * range need to defer probing. | |
455 | */ | |
42fed7ba | 456 | if (!pctldev) { |
dfa97515 | 457 | return ERR_PTR(-EPROBE_DEFER); |
42fed7ba | 458 | } |
f23f1516 | 459 | pinctrl_add_gpio_range(pctldev, range); |
42fed7ba | 460 | |
f23f1516 SH |
461 | return pctldev; |
462 | } | |
192c369c | 463 | EXPORT_SYMBOL_GPL(pinctrl_find_and_add_gpio_range); |
f23f1516 | 464 | |
9afbefb2 LW |
465 | /** |
466 | * pinctrl_find_gpio_range_from_pin() - locate the GPIO range for a pin | |
467 | * @pctldev: the pin controller device to look in | |
468 | * @pin: a controller-local number to find the range for | |
469 | */ | |
470 | struct pinctrl_gpio_range * | |
471 | pinctrl_find_gpio_range_from_pin(struct pinctrl_dev *pctldev, | |
472 | unsigned int pin) | |
473 | { | |
c8f50e86 | 474 | struct pinctrl_gpio_range *range; |
9afbefb2 | 475 | |
42fed7ba | 476 | mutex_lock(&pctldev->mutex); |
9afbefb2 LW |
477 | /* Loop over the ranges */ |
478 | list_for_each_entry(range, &pctldev->gpio_ranges, node) { | |
479 | /* Check if we're in the valid range */ | |
c8587eee CR |
480 | if (range->pins) { |
481 | int a; | |
482 | for (a = 0; a < range->npins; a++) { | |
483 | if (range->pins[a] == pin) | |
c8f50e86 | 484 | goto out; |
c8587eee CR |
485 | } |
486 | } else if (pin >= range->pin_base && | |
c8f50e86 WY |
487 | pin < range->pin_base + range->npins) |
488 | goto out; | |
9afbefb2 | 489 | } |
c8f50e86 WY |
490 | range = NULL; |
491 | out: | |
42fed7ba | 492 | mutex_unlock(&pctldev->mutex); |
c8f50e86 | 493 | return range; |
9afbefb2 LW |
494 | } |
495 | EXPORT_SYMBOL_GPL(pinctrl_find_gpio_range_from_pin); | |
496 | ||
7e10ee68 VK |
497 | /** |
498 | * pinctrl_remove_gpio_range() - remove a range of GPIOs fro a pin controller | |
499 | * @pctldev: pin controller device to remove the range from | |
500 | * @range: the GPIO range to remove | |
501 | */ | |
502 | void pinctrl_remove_gpio_range(struct pinctrl_dev *pctldev, | |
503 | struct pinctrl_gpio_range *range) | |
504 | { | |
42fed7ba | 505 | mutex_lock(&pctldev->mutex); |
7e10ee68 | 506 | list_del(&range->node); |
42fed7ba | 507 | mutex_unlock(&pctldev->mutex); |
7e10ee68 VK |
508 | } |
509 | EXPORT_SYMBOL_GPL(pinctrl_remove_gpio_range); | |
510 | ||
7afde8ba LW |
511 | /** |
512 | * pinctrl_get_group_selector() - returns the group selector for a group | |
513 | * @pctldev: the pin controller handling the group | |
514 | * @pin_group: the pin group to look up | |
515 | */ | |
516 | int pinctrl_get_group_selector(struct pinctrl_dev *pctldev, | |
517 | const char *pin_group) | |
518 | { | |
519 | const struct pinctrl_ops *pctlops = pctldev->desc->pctlops; | |
d1e90e9e | 520 | unsigned ngroups = pctlops->get_groups_count(pctldev); |
7afde8ba LW |
521 | unsigned group_selector = 0; |
522 | ||
d1e90e9e | 523 | while (group_selector < ngroups) { |
7afde8ba LW |
524 | const char *gname = pctlops->get_group_name(pctldev, |
525 | group_selector); | |
526 | if (!strcmp(gname, pin_group)) { | |
51cd24ee | 527 | dev_dbg(pctldev->dev, |
7afde8ba LW |
528 | "found group selector %u for %s\n", |
529 | group_selector, | |
530 | pin_group); | |
531 | return group_selector; | |
532 | } | |
533 | ||
534 | group_selector++; | |
535 | } | |
536 | ||
51cd24ee | 537 | dev_err(pctldev->dev, "does not have pin group %s\n", |
7afde8ba LW |
538 | pin_group); |
539 | ||
540 | return -EINVAL; | |
541 | } | |
542 | ||
befe5bdf LW |
543 | /** |
544 | * pinctrl_request_gpio() - request a single pin to be used in as GPIO | |
545 | * @gpio: the GPIO pin number from the GPIO subsystem number space | |
546 | * | |
547 | * This function should *ONLY* be used from gpiolib-based GPIO drivers, | |
548 | * as part of their gpio_request() semantics, platforms and individual drivers | |
549 | * shall *NOT* request GPIO pins to be muxed in. | |
550 | */ | |
551 | int pinctrl_request_gpio(unsigned gpio) | |
552 | { | |
553 | struct pinctrl_dev *pctldev; | |
554 | struct pinctrl_gpio_range *range; | |
555 | int ret; | |
556 | int pin; | |
557 | ||
558 | ret = pinctrl_get_device_gpio_range(gpio, &pctldev, &range); | |
57b676f9 | 559 | if (ret) { |
51e13c24 HZ |
560 | if (pinctrl_ready_for_gpio_range(gpio)) |
561 | ret = 0; | |
4650b7cb | 562 | return ret; |
57b676f9 | 563 | } |
befe5bdf | 564 | |
9b77ace4 AL |
565 | mutex_lock(&pctldev->mutex); |
566 | ||
befe5bdf | 567 | /* Convert to the pin controllers number space */ |
c8587eee | 568 | pin = gpio_to_pin(range, gpio); |
befe5bdf | 569 | |
57b676f9 SW |
570 | ret = pinmux_request_gpio(pctldev, range, pin, gpio); |
571 | ||
9b77ace4 AL |
572 | mutex_unlock(&pctldev->mutex); |
573 | ||
57b676f9 | 574 | return ret; |
befe5bdf LW |
575 | } |
576 | EXPORT_SYMBOL_GPL(pinctrl_request_gpio); | |
577 | ||
578 | /** | |
579 | * pinctrl_free_gpio() - free control on a single pin, currently used as GPIO | |
580 | * @gpio: the GPIO pin number from the GPIO subsystem number space | |
581 | * | |
582 | * This function should *ONLY* be used from gpiolib-based GPIO drivers, | |
583 | * as part of their gpio_free() semantics, platforms and individual drivers | |
584 | * shall *NOT* request GPIO pins to be muxed out. | |
585 | */ | |
586 | void pinctrl_free_gpio(unsigned gpio) | |
587 | { | |
588 | struct pinctrl_dev *pctldev; | |
589 | struct pinctrl_gpio_range *range; | |
590 | int ret; | |
591 | int pin; | |
592 | ||
593 | ret = pinctrl_get_device_gpio_range(gpio, &pctldev, &range); | |
57b676f9 | 594 | if (ret) { |
befe5bdf | 595 | return; |
57b676f9 | 596 | } |
42fed7ba | 597 | mutex_lock(&pctldev->mutex); |
befe5bdf LW |
598 | |
599 | /* Convert to the pin controllers number space */ | |
c8587eee | 600 | pin = gpio_to_pin(range, gpio); |
befe5bdf | 601 | |
57b676f9 SW |
602 | pinmux_free_gpio(pctldev, pin, range); |
603 | ||
42fed7ba | 604 | mutex_unlock(&pctldev->mutex); |
befe5bdf LW |
605 | } |
606 | EXPORT_SYMBOL_GPL(pinctrl_free_gpio); | |
607 | ||
608 | static int pinctrl_gpio_direction(unsigned gpio, bool input) | |
609 | { | |
610 | struct pinctrl_dev *pctldev; | |
611 | struct pinctrl_gpio_range *range; | |
612 | int ret; | |
613 | int pin; | |
614 | ||
615 | ret = pinctrl_get_device_gpio_range(gpio, &pctldev, &range); | |
42fed7ba | 616 | if (ret) { |
befe5bdf | 617 | return ret; |
42fed7ba PC |
618 | } |
619 | ||
620 | mutex_lock(&pctldev->mutex); | |
befe5bdf LW |
621 | |
622 | /* Convert to the pin controllers number space */ | |
c8587eee | 623 | pin = gpio_to_pin(range, gpio); |
42fed7ba PC |
624 | ret = pinmux_gpio_direction(pctldev, range, pin, input); |
625 | ||
626 | mutex_unlock(&pctldev->mutex); | |
befe5bdf | 627 | |
42fed7ba | 628 | return ret; |
befe5bdf LW |
629 | } |
630 | ||
631 | /** | |
632 | * pinctrl_gpio_direction_input() - request a GPIO pin to go into input mode | |
633 | * @gpio: the GPIO pin number from the GPIO subsystem number space | |
634 | * | |
635 | * This function should *ONLY* be used from gpiolib-based GPIO drivers, | |
636 | * as part of their gpio_direction_input() semantics, platforms and individual | |
637 | * drivers shall *NOT* touch pin control GPIO calls. | |
638 | */ | |
639 | int pinctrl_gpio_direction_input(unsigned gpio) | |
640 | { | |
42fed7ba | 641 | return pinctrl_gpio_direction(gpio, true); |
befe5bdf LW |
642 | } |
643 | EXPORT_SYMBOL_GPL(pinctrl_gpio_direction_input); | |
644 | ||
645 | /** | |
646 | * pinctrl_gpio_direction_output() - request a GPIO pin to go into output mode | |
647 | * @gpio: the GPIO pin number from the GPIO subsystem number space | |
648 | * | |
649 | * This function should *ONLY* be used from gpiolib-based GPIO drivers, | |
650 | * as part of their gpio_direction_output() semantics, platforms and individual | |
651 | * drivers shall *NOT* touch pin control GPIO calls. | |
652 | */ | |
653 | int pinctrl_gpio_direction_output(unsigned gpio) | |
654 | { | |
42fed7ba | 655 | return pinctrl_gpio_direction(gpio, false); |
befe5bdf LW |
656 | } |
657 | EXPORT_SYMBOL_GPL(pinctrl_gpio_direction_output); | |
658 | ||
6e5e959d SW |
659 | static struct pinctrl_state *find_state(struct pinctrl *p, |
660 | const char *name) | |
befe5bdf | 661 | { |
6e5e959d SW |
662 | struct pinctrl_state *state; |
663 | ||
664 | list_for_each_entry(state, &p->states, node) | |
665 | if (!strcmp(state->name, name)) | |
666 | return state; | |
667 | ||
668 | return NULL; | |
669 | } | |
670 | ||
671 | static struct pinctrl_state *create_state(struct pinctrl *p, | |
672 | const char *name) | |
673 | { | |
674 | struct pinctrl_state *state; | |
675 | ||
676 | state = kzalloc(sizeof(*state), GFP_KERNEL); | |
677 | if (state == NULL) { | |
678 | dev_err(p->dev, | |
679 | "failed to alloc struct pinctrl_state\n"); | |
680 | return ERR_PTR(-ENOMEM); | |
681 | } | |
682 | ||
683 | state->name = name; | |
684 | INIT_LIST_HEAD(&state->settings); | |
685 | ||
686 | list_add_tail(&state->node, &p->states); | |
687 | ||
688 | return state; | |
689 | } | |
690 | ||
691 | static int add_setting(struct pinctrl *p, struct pinctrl_map const *map) | |
692 | { | |
693 | struct pinctrl_state *state; | |
7ecdb16f | 694 | struct pinctrl_setting *setting; |
6e5e959d | 695 | int ret; |
befe5bdf | 696 | |
6e5e959d SW |
697 | state = find_state(p, map->name); |
698 | if (!state) | |
699 | state = create_state(p, map->name); | |
700 | if (IS_ERR(state)) | |
701 | return PTR_ERR(state); | |
befe5bdf | 702 | |
1e2082b5 SW |
703 | if (map->type == PIN_MAP_TYPE_DUMMY_STATE) |
704 | return 0; | |
705 | ||
6e5e959d SW |
706 | setting = kzalloc(sizeof(*setting), GFP_KERNEL); |
707 | if (setting == NULL) { | |
708 | dev_err(p->dev, | |
709 | "failed to alloc struct pinctrl_setting\n"); | |
710 | return -ENOMEM; | |
711 | } | |
befe5bdf | 712 | |
1e2082b5 SW |
713 | setting->type = map->type; |
714 | ||
6e5e959d SW |
715 | setting->pctldev = get_pinctrl_dev_from_devname(map->ctrl_dev_name); |
716 | if (setting->pctldev == NULL) { | |
6e5e959d | 717 | kfree(setting); |
89216494 LW |
718 | /* Do not defer probing of hogs (circular loop) */ |
719 | if (!strcmp(map->ctrl_dev_name, map->dev_name)) | |
720 | return -ENODEV; | |
c05127c4 LW |
721 | /* |
722 | * OK let us guess that the driver is not there yet, and | |
723 | * let's defer obtaining this pinctrl handle to later... | |
724 | */ | |
89216494 LW |
725 | dev_info(p->dev, "unknown pinctrl device %s in map entry, deferring probe", |
726 | map->ctrl_dev_name); | |
c05127c4 | 727 | return -EPROBE_DEFER; |
6e5e959d SW |
728 | } |
729 | ||
1a78958d LW |
730 | setting->dev_name = map->dev_name; |
731 | ||
1e2082b5 SW |
732 | switch (map->type) { |
733 | case PIN_MAP_TYPE_MUX_GROUP: | |
734 | ret = pinmux_map_to_setting(map, setting); | |
735 | break; | |
736 | case PIN_MAP_TYPE_CONFIGS_PIN: | |
737 | case PIN_MAP_TYPE_CONFIGS_GROUP: | |
738 | ret = pinconf_map_to_setting(map, setting); | |
739 | break; | |
740 | default: | |
741 | ret = -EINVAL; | |
742 | break; | |
743 | } | |
6e5e959d SW |
744 | if (ret < 0) { |
745 | kfree(setting); | |
746 | return ret; | |
747 | } | |
748 | ||
749 | list_add_tail(&setting->node, &state->settings); | |
750 | ||
751 | return 0; | |
752 | } | |
753 | ||
754 | static struct pinctrl *find_pinctrl(struct device *dev) | |
755 | { | |
756 | struct pinctrl *p; | |
757 | ||
42fed7ba | 758 | mutex_lock(&pinctrl_list_mutex); |
1e2082b5 | 759 | list_for_each_entry(p, &pinctrl_list, node) |
42fed7ba PC |
760 | if (p->dev == dev) { |
761 | mutex_unlock(&pinctrl_list_mutex); | |
6e5e959d | 762 | return p; |
42fed7ba | 763 | } |
6e5e959d | 764 | |
42fed7ba | 765 | mutex_unlock(&pinctrl_list_mutex); |
6e5e959d SW |
766 | return NULL; |
767 | } | |
768 | ||
42fed7ba | 769 | static void pinctrl_free(struct pinctrl *p, bool inlist); |
6e5e959d SW |
770 | |
771 | static struct pinctrl *create_pinctrl(struct device *dev) | |
772 | { | |
773 | struct pinctrl *p; | |
774 | const char *devname; | |
775 | struct pinctrl_maps *maps_node; | |
776 | int i; | |
777 | struct pinctrl_map const *map; | |
778 | int ret; | |
befe5bdf LW |
779 | |
780 | /* | |
781 | * create the state cookie holder struct pinctrl for each | |
782 | * mapping, this is what consumers will get when requesting | |
783 | * a pin control handle with pinctrl_get() | |
784 | */ | |
02f5b989 | 785 | p = kzalloc(sizeof(*p), GFP_KERNEL); |
95dcd4ae SW |
786 | if (p == NULL) { |
787 | dev_err(dev, "failed to alloc struct pinctrl\n"); | |
befe5bdf | 788 | return ERR_PTR(-ENOMEM); |
95dcd4ae | 789 | } |
7ecdb16f | 790 | p->dev = dev; |
6e5e959d | 791 | INIT_LIST_HEAD(&p->states); |
57291ce2 SW |
792 | INIT_LIST_HEAD(&p->dt_maps); |
793 | ||
794 | ret = pinctrl_dt_to_map(p); | |
795 | if (ret < 0) { | |
796 | kfree(p); | |
797 | return ERR_PTR(ret); | |
798 | } | |
6e5e959d SW |
799 | |
800 | devname = dev_name(dev); | |
befe5bdf | 801 | |
42fed7ba | 802 | mutex_lock(&pinctrl_maps_mutex); |
befe5bdf | 803 | /* Iterate over the pin control maps to locate the right ones */ |
b2b3e66e | 804 | for_each_maps(maps_node, i, map) { |
7ecdb16f SW |
805 | /* Map must be for this device */ |
806 | if (strcmp(map->dev_name, devname)) | |
807 | continue; | |
808 | ||
6e5e959d | 809 | ret = add_setting(p, map); |
89216494 LW |
810 | /* |
811 | * At this point the adding of a setting may: | |
812 | * | |
813 | * - Defer, if the pinctrl device is not yet available | |
814 | * - Fail, if the pinctrl device is not yet available, | |
815 | * AND the setting is a hog. We cannot defer that, since | |
816 | * the hog will kick in immediately after the device | |
817 | * is registered. | |
818 | * | |
819 | * If the error returned was not -EPROBE_DEFER then we | |
820 | * accumulate the errors to see if we end up with | |
821 | * an -EPROBE_DEFER later, as that is the worst case. | |
822 | */ | |
823 | if (ret == -EPROBE_DEFER) { | |
42fed7ba PC |
824 | pinctrl_free(p, false); |
825 | mutex_unlock(&pinctrl_maps_mutex); | |
6e5e959d | 826 | return ERR_PTR(ret); |
7ecdb16f | 827 | } |
befe5bdf | 828 | } |
42fed7ba PC |
829 | mutex_unlock(&pinctrl_maps_mutex); |
830 | ||
89216494 LW |
831 | if (ret < 0) { |
832 | /* If some other error than deferral occured, return here */ | |
42fed7ba | 833 | pinctrl_free(p, false); |
89216494 LW |
834 | return ERR_PTR(ret); |
835 | } | |
befe5bdf | 836 | |
ab78029e LW |
837 | kref_init(&p->users); |
838 | ||
b0666ba4 | 839 | /* Add the pinctrl handle to the global list */ |
8b9c139f | 840 | list_add_tail(&p->node, &pinctrl_list); |
befe5bdf LW |
841 | |
842 | return p; | |
6e5e959d | 843 | } |
7ecdb16f | 844 | |
42fed7ba PC |
845 | /** |
846 | * pinctrl_get() - retrieves the pinctrl handle for a device | |
847 | * @dev: the device to obtain the handle for | |
848 | */ | |
849 | struct pinctrl *pinctrl_get(struct device *dev) | |
6e5e959d SW |
850 | { |
851 | struct pinctrl *p; | |
7ecdb16f | 852 | |
6e5e959d SW |
853 | if (WARN_ON(!dev)) |
854 | return ERR_PTR(-EINVAL); | |
855 | ||
ab78029e LW |
856 | /* |
857 | * See if somebody else (such as the device core) has already | |
858 | * obtained a handle to the pinctrl for this device. In that case, | |
859 | * return another pointer to it. | |
860 | */ | |
6e5e959d | 861 | p = find_pinctrl(dev); |
ab78029e LW |
862 | if (p != NULL) { |
863 | dev_dbg(dev, "obtain a copy of previously claimed pinctrl\n"); | |
864 | kref_get(&p->users); | |
865 | return p; | |
866 | } | |
7ecdb16f | 867 | |
d599bfb3 | 868 | return create_pinctrl(dev); |
befe5bdf LW |
869 | } |
870 | EXPORT_SYMBOL_GPL(pinctrl_get); | |
871 | ||
d3cee830 RG |
872 | static void pinctrl_free_setting(bool disable_setting, |
873 | struct pinctrl_setting *setting) | |
874 | { | |
875 | switch (setting->type) { | |
876 | case PIN_MAP_TYPE_MUX_GROUP: | |
877 | if (disable_setting) | |
878 | pinmux_disable_setting(setting); | |
879 | pinmux_free_setting(setting); | |
880 | break; | |
881 | case PIN_MAP_TYPE_CONFIGS_PIN: | |
882 | case PIN_MAP_TYPE_CONFIGS_GROUP: | |
883 | pinconf_free_setting(setting); | |
884 | break; | |
885 | default: | |
886 | break; | |
887 | } | |
888 | } | |
889 | ||
42fed7ba | 890 | static void pinctrl_free(struct pinctrl *p, bool inlist) |
befe5bdf | 891 | { |
6e5e959d SW |
892 | struct pinctrl_state *state, *n1; |
893 | struct pinctrl_setting *setting, *n2; | |
894 | ||
42fed7ba | 895 | mutex_lock(&pinctrl_list_mutex); |
6e5e959d SW |
896 | list_for_each_entry_safe(state, n1, &p->states, node) { |
897 | list_for_each_entry_safe(setting, n2, &state->settings, node) { | |
d3cee830 | 898 | pinctrl_free_setting(state == p->state, setting); |
6e5e959d SW |
899 | list_del(&setting->node); |
900 | kfree(setting); | |
901 | } | |
902 | list_del(&state->node); | |
903 | kfree(state); | |
7ecdb16f | 904 | } |
befe5bdf | 905 | |
57291ce2 SW |
906 | pinctrl_dt_free_maps(p); |
907 | ||
6e5e959d SW |
908 | if (inlist) |
909 | list_del(&p->node); | |
befe5bdf | 910 | kfree(p); |
42fed7ba | 911 | mutex_unlock(&pinctrl_list_mutex); |
befe5bdf | 912 | } |
befe5bdf LW |
913 | |
914 | /** | |
ab78029e LW |
915 | * pinctrl_release() - release the pinctrl handle |
916 | * @kref: the kref in the pinctrl being released | |
917 | */ | |
2917e833 | 918 | static void pinctrl_release(struct kref *kref) |
ab78029e LW |
919 | { |
920 | struct pinctrl *p = container_of(kref, struct pinctrl, users); | |
921 | ||
42fed7ba | 922 | pinctrl_free(p, true); |
ab78029e LW |
923 | } |
924 | ||
925 | /** | |
926 | * pinctrl_put() - decrease use count on a previously claimed pinctrl handle | |
6e5e959d | 927 | * @p: the pinctrl handle to release |
befe5bdf | 928 | */ |
57b676f9 SW |
929 | void pinctrl_put(struct pinctrl *p) |
930 | { | |
ab78029e | 931 | kref_put(&p->users, pinctrl_release); |
57b676f9 SW |
932 | } |
933 | EXPORT_SYMBOL_GPL(pinctrl_put); | |
934 | ||
42fed7ba PC |
935 | /** |
936 | * pinctrl_lookup_state() - retrieves a state handle from a pinctrl handle | |
937 | * @p: the pinctrl handle to retrieve the state from | |
938 | * @name: the state name to retrieve | |
939 | */ | |
940 | struct pinctrl_state *pinctrl_lookup_state(struct pinctrl *p, | |
941 | const char *name) | |
befe5bdf | 942 | { |
6e5e959d | 943 | struct pinctrl_state *state; |
befe5bdf | 944 | |
6e5e959d | 945 | state = find_state(p, name); |
5b3aa5f7 DA |
946 | if (!state) { |
947 | if (pinctrl_dummy_state) { | |
948 | /* create dummy state */ | |
949 | dev_dbg(p->dev, "using pinctrl dummy state (%s)\n", | |
950 | name); | |
951 | state = create_state(p, name); | |
d599bfb3 RG |
952 | } else |
953 | state = ERR_PTR(-ENODEV); | |
5b3aa5f7 | 954 | } |
57b676f9 | 955 | |
6e5e959d | 956 | return state; |
befe5bdf | 957 | } |
42fed7ba | 958 | EXPORT_SYMBOL_GPL(pinctrl_lookup_state); |
befe5bdf LW |
959 | |
960 | /** | |
42fed7ba PC |
961 | * pinctrl_select_state() - select/activate/program a pinctrl state to HW |
962 | * @p: the pinctrl handle for the device that requests configuration | |
963 | * @state: the state handle to select/activate/program | |
befe5bdf | 964 | */ |
42fed7ba | 965 | int pinctrl_select_state(struct pinctrl *p, struct pinctrl_state *state) |
befe5bdf | 966 | { |
6e5e959d | 967 | struct pinctrl_setting *setting, *setting2; |
50cf7c8a | 968 | struct pinctrl_state *old_state = p->state; |
6e5e959d | 969 | int ret; |
7ecdb16f | 970 | |
6e5e959d SW |
971 | if (p->state == state) |
972 | return 0; | |
befe5bdf | 973 | |
6e5e959d SW |
974 | if (p->state) { |
975 | /* | |
976 | * The set of groups with a mux configuration in the old state | |
977 | * may not be identical to the set of groups with a mux setting | |
978 | * in the new state. While this might be unusual, it's entirely | |
979 | * possible for the "user"-supplied mapping table to be written | |
980 | * that way. For each group that was configured in the old state | |
981 | * but not in the new state, this code puts that group into a | |
982 | * safe/disabled state. | |
983 | */ | |
984 | list_for_each_entry(setting, &p->state->settings, node) { | |
985 | bool found = false; | |
1e2082b5 SW |
986 | if (setting->type != PIN_MAP_TYPE_MUX_GROUP) |
987 | continue; | |
6e5e959d | 988 | list_for_each_entry(setting2, &state->settings, node) { |
1e2082b5 SW |
989 | if (setting2->type != PIN_MAP_TYPE_MUX_GROUP) |
990 | continue; | |
991 | if (setting2->data.mux.group == | |
992 | setting->data.mux.group) { | |
6e5e959d SW |
993 | found = true; |
994 | break; | |
995 | } | |
996 | } | |
997 | if (!found) | |
998 | pinmux_disable_setting(setting); | |
999 | } | |
1000 | } | |
1001 | ||
3102a76c | 1002 | p->state = NULL; |
6e5e959d SW |
1003 | |
1004 | /* Apply all the settings for the new state */ | |
1005 | list_for_each_entry(setting, &state->settings, node) { | |
1e2082b5 SW |
1006 | switch (setting->type) { |
1007 | case PIN_MAP_TYPE_MUX_GROUP: | |
1008 | ret = pinmux_enable_setting(setting); | |
1009 | break; | |
1010 | case PIN_MAP_TYPE_CONFIGS_PIN: | |
1011 | case PIN_MAP_TYPE_CONFIGS_GROUP: | |
1012 | ret = pinconf_apply_setting(setting); | |
1013 | break; | |
1014 | default: | |
1015 | ret = -EINVAL; | |
1016 | break; | |
1017 | } | |
3102a76c | 1018 | |
42fed7ba | 1019 | if (ret < 0) { |
3102a76c | 1020 | goto unapply_new_state; |
42fed7ba | 1021 | } |
befe5bdf | 1022 | } |
6e5e959d | 1023 | |
3102a76c RG |
1024 | p->state = state; |
1025 | ||
6e5e959d | 1026 | return 0; |
3102a76c RG |
1027 | |
1028 | unapply_new_state: | |
da58751c | 1029 | dev_err(p->dev, "Error applying setting, reverse things back\n"); |
3102a76c | 1030 | |
3102a76c RG |
1031 | list_for_each_entry(setting2, &state->settings, node) { |
1032 | if (&setting2->node == &setting->node) | |
1033 | break; | |
af606177 RG |
1034 | /* |
1035 | * All we can do here is pinmux_disable_setting. | |
1036 | * That means that some pins are muxed differently now | |
1037 | * than they were before applying the setting (We can't | |
1038 | * "unmux a pin"!), but it's not a big deal since the pins | |
1039 | * are free to be muxed by another apply_setting. | |
1040 | */ | |
1041 | if (setting2->type == PIN_MAP_TYPE_MUX_GROUP) | |
1042 | pinmux_disable_setting(setting2); | |
3102a76c | 1043 | } |
8009d5ff | 1044 | |
385d9424 RG |
1045 | /* There's no infinite recursive loop here because p->state is NULL */ |
1046 | if (old_state) | |
42fed7ba | 1047 | pinctrl_select_state(p, old_state); |
6e5e959d SW |
1048 | |
1049 | return ret; | |
befe5bdf | 1050 | } |
6e5e959d | 1051 | EXPORT_SYMBOL_GPL(pinctrl_select_state); |
befe5bdf | 1052 | |
6d4ca1fb SW |
1053 | static void devm_pinctrl_release(struct device *dev, void *res) |
1054 | { | |
1055 | pinctrl_put(*(struct pinctrl **)res); | |
1056 | } | |
1057 | ||
1058 | /** | |
1059 | * struct devm_pinctrl_get() - Resource managed pinctrl_get() | |
1060 | * @dev: the device to obtain the handle for | |
1061 | * | |
1062 | * If there is a need to explicitly destroy the returned struct pinctrl, | |
1063 | * devm_pinctrl_put() should be used, rather than plain pinctrl_put(). | |
1064 | */ | |
1065 | struct pinctrl *devm_pinctrl_get(struct device *dev) | |
1066 | { | |
1067 | struct pinctrl **ptr, *p; | |
1068 | ||
1069 | ptr = devres_alloc(devm_pinctrl_release, sizeof(*ptr), GFP_KERNEL); | |
1070 | if (!ptr) | |
1071 | return ERR_PTR(-ENOMEM); | |
1072 | ||
1073 | p = pinctrl_get(dev); | |
1074 | if (!IS_ERR(p)) { | |
1075 | *ptr = p; | |
1076 | devres_add(dev, ptr); | |
1077 | } else { | |
1078 | devres_free(ptr); | |
1079 | } | |
1080 | ||
1081 | return p; | |
1082 | } | |
1083 | EXPORT_SYMBOL_GPL(devm_pinctrl_get); | |
1084 | ||
1085 | static int devm_pinctrl_match(struct device *dev, void *res, void *data) | |
1086 | { | |
1087 | struct pinctrl **p = res; | |
1088 | ||
1089 | return *p == data; | |
1090 | } | |
1091 | ||
1092 | /** | |
1093 | * devm_pinctrl_put() - Resource managed pinctrl_put() | |
1094 | * @p: the pinctrl handle to release | |
1095 | * | |
1096 | * Deallocate a struct pinctrl obtained via devm_pinctrl_get(). Normally | |
1097 | * this function will not need to be called and the resource management | |
1098 | * code will ensure that the resource is freed. | |
1099 | */ | |
1100 | void devm_pinctrl_put(struct pinctrl *p) | |
1101 | { | |
a72149e8 | 1102 | WARN_ON(devres_release(p->dev, devm_pinctrl_release, |
6d4ca1fb | 1103 | devm_pinctrl_match, p)); |
6d4ca1fb SW |
1104 | } |
1105 | EXPORT_SYMBOL_GPL(devm_pinctrl_put); | |
1106 | ||
57291ce2 SW |
1107 | int pinctrl_register_map(struct pinctrl_map const *maps, unsigned num_maps, |
1108 | bool dup, bool locked) | |
befe5bdf | 1109 | { |
1e2082b5 | 1110 | int i, ret; |
b2b3e66e | 1111 | struct pinctrl_maps *maps_node; |
befe5bdf LW |
1112 | |
1113 | pr_debug("add %d pinmux maps\n", num_maps); | |
1114 | ||
1115 | /* First sanity check the new mapping */ | |
1116 | for (i = 0; i < num_maps; i++) { | |
1e2082b5 SW |
1117 | if (!maps[i].dev_name) { |
1118 | pr_err("failed to register map %s (%d): no device given\n", | |
1119 | maps[i].name, i); | |
1120 | return -EINVAL; | |
1121 | } | |
1122 | ||
befe5bdf LW |
1123 | if (!maps[i].name) { |
1124 | pr_err("failed to register map %d: no map name given\n", | |
95dcd4ae | 1125 | i); |
befe5bdf LW |
1126 | return -EINVAL; |
1127 | } | |
1128 | ||
1e2082b5 SW |
1129 | if (maps[i].type != PIN_MAP_TYPE_DUMMY_STATE && |
1130 | !maps[i].ctrl_dev_name) { | |
befe5bdf LW |
1131 | pr_err("failed to register map %s (%d): no pin control device given\n", |
1132 | maps[i].name, i); | |
1133 | return -EINVAL; | |
1134 | } | |
1135 | ||
1e2082b5 SW |
1136 | switch (maps[i].type) { |
1137 | case PIN_MAP_TYPE_DUMMY_STATE: | |
1138 | break; | |
1139 | case PIN_MAP_TYPE_MUX_GROUP: | |
1140 | ret = pinmux_validate_map(&maps[i], i); | |
1141 | if (ret < 0) | |
fde04f41 | 1142 | return ret; |
1e2082b5 SW |
1143 | break; |
1144 | case PIN_MAP_TYPE_CONFIGS_PIN: | |
1145 | case PIN_MAP_TYPE_CONFIGS_GROUP: | |
1146 | ret = pinconf_validate_map(&maps[i], i); | |
1147 | if (ret < 0) | |
fde04f41 | 1148 | return ret; |
1e2082b5 SW |
1149 | break; |
1150 | default: | |
1151 | pr_err("failed to register map %s (%d): invalid type given\n", | |
95dcd4ae | 1152 | maps[i].name, i); |
1681f5ae SW |
1153 | return -EINVAL; |
1154 | } | |
befe5bdf LW |
1155 | } |
1156 | ||
b2b3e66e SW |
1157 | maps_node = kzalloc(sizeof(*maps_node), GFP_KERNEL); |
1158 | if (!maps_node) { | |
1159 | pr_err("failed to alloc struct pinctrl_maps\n"); | |
1160 | return -ENOMEM; | |
1161 | } | |
befe5bdf | 1162 | |
b2b3e66e | 1163 | maps_node->num_maps = num_maps; |
57291ce2 SW |
1164 | if (dup) { |
1165 | maps_node->maps = kmemdup(maps, sizeof(*maps) * num_maps, | |
1166 | GFP_KERNEL); | |
1167 | if (!maps_node->maps) { | |
1168 | pr_err("failed to duplicate mapping table\n"); | |
1169 | kfree(maps_node); | |
1170 | return -ENOMEM; | |
1171 | } | |
1172 | } else { | |
1173 | maps_node->maps = maps; | |
befe5bdf LW |
1174 | } |
1175 | ||
57291ce2 | 1176 | if (!locked) |
42fed7ba | 1177 | mutex_lock(&pinctrl_maps_mutex); |
b2b3e66e | 1178 | list_add_tail(&maps_node->node, &pinctrl_maps); |
57291ce2 | 1179 | if (!locked) |
42fed7ba | 1180 | mutex_unlock(&pinctrl_maps_mutex); |
b2b3e66e | 1181 | |
befe5bdf LW |
1182 | return 0; |
1183 | } | |
1184 | ||
57291ce2 SW |
1185 | /** |
1186 | * pinctrl_register_mappings() - register a set of pin controller mappings | |
1187 | * @maps: the pincontrol mappings table to register. This should probably be | |
1188 | * marked with __initdata so it can be discarded after boot. This | |
1189 | * function will perform a shallow copy for the mapping entries. | |
1190 | * @num_maps: the number of maps in the mapping table | |
1191 | */ | |
1192 | int pinctrl_register_mappings(struct pinctrl_map const *maps, | |
1193 | unsigned num_maps) | |
1194 | { | |
1195 | return pinctrl_register_map(maps, num_maps, true, false); | |
1196 | } | |
1197 | ||
1198 | void pinctrl_unregister_map(struct pinctrl_map const *map) | |
1199 | { | |
1200 | struct pinctrl_maps *maps_node; | |
1201 | ||
42fed7ba | 1202 | mutex_lock(&pinctrl_maps_mutex); |
57291ce2 SW |
1203 | list_for_each_entry(maps_node, &pinctrl_maps, node) { |
1204 | if (maps_node->maps == map) { | |
1205 | list_del(&maps_node->node); | |
db6c2c69 | 1206 | kfree(maps_node); |
42fed7ba | 1207 | mutex_unlock(&pinctrl_maps_mutex); |
57291ce2 SW |
1208 | return; |
1209 | } | |
1210 | } | |
42fed7ba | 1211 | mutex_unlock(&pinctrl_maps_mutex); |
57291ce2 SW |
1212 | } |
1213 | ||
840a47ba JD |
1214 | /** |
1215 | * pinctrl_force_sleep() - turn a given controller device into sleep state | |
1216 | * @pctldev: pin controller device | |
1217 | */ | |
1218 | int pinctrl_force_sleep(struct pinctrl_dev *pctldev) | |
1219 | { | |
1220 | if (!IS_ERR(pctldev->p) && !IS_ERR(pctldev->hog_sleep)) | |
1221 | return pinctrl_select_state(pctldev->p, pctldev->hog_sleep); | |
1222 | return 0; | |
1223 | } | |
1224 | EXPORT_SYMBOL_GPL(pinctrl_force_sleep); | |
1225 | ||
1226 | /** | |
1227 | * pinctrl_force_default() - turn a given controller device into default state | |
1228 | * @pctldev: pin controller device | |
1229 | */ | |
1230 | int pinctrl_force_default(struct pinctrl_dev *pctldev) | |
1231 | { | |
1232 | if (!IS_ERR(pctldev->p) && !IS_ERR(pctldev->hog_default)) | |
1233 | return pinctrl_select_state(pctldev->p, pctldev->hog_default); | |
1234 | return 0; | |
1235 | } | |
1236 | EXPORT_SYMBOL_GPL(pinctrl_force_default); | |
1237 | ||
14005ee2 LW |
1238 | #ifdef CONFIG_PM |
1239 | ||
1240 | /** | |
f3333497 | 1241 | * pinctrl_pm_select_state() - select pinctrl state for PM |
14005ee2 | 1242 | * @dev: device to select default state for |
f3333497 | 1243 | * @state: state to set |
14005ee2 | 1244 | */ |
f3333497 TL |
1245 | static int pinctrl_pm_select_state(struct device *dev, |
1246 | struct pinctrl_state *state) | |
14005ee2 LW |
1247 | { |
1248 | struct dev_pin_info *pins = dev->pins; | |
1249 | int ret; | |
1250 | ||
f3333497 TL |
1251 | if (IS_ERR(state)) |
1252 | return 0; /* No such state */ | |
1253 | ret = pinctrl_select_state(pins->p, state); | |
14005ee2 | 1254 | if (ret) |
f3333497 TL |
1255 | dev_err(dev, "failed to activate pinctrl state %s\n", |
1256 | state->name); | |
14005ee2 LW |
1257 | return ret; |
1258 | } | |
f3333497 TL |
1259 | |
1260 | /** | |
1261 | * pinctrl_pm_select_default_state() - select default pinctrl state for PM | |
1262 | * @dev: device to select default state for | |
1263 | */ | |
1264 | int pinctrl_pm_select_default_state(struct device *dev) | |
1265 | { | |
1266 | if (!dev->pins) | |
1267 | return 0; | |
1268 | ||
1269 | return pinctrl_pm_select_state(dev, dev->pins->default_state); | |
1270 | } | |
f472dead | 1271 | EXPORT_SYMBOL_GPL(pinctrl_pm_select_default_state); |
14005ee2 LW |
1272 | |
1273 | /** | |
1274 | * pinctrl_pm_select_sleep_state() - select sleep pinctrl state for PM | |
1275 | * @dev: device to select sleep state for | |
1276 | */ | |
1277 | int pinctrl_pm_select_sleep_state(struct device *dev) | |
1278 | { | |
f3333497 | 1279 | if (!dev->pins) |
14005ee2 | 1280 | return 0; |
f3333497 TL |
1281 | |
1282 | return pinctrl_pm_select_state(dev, dev->pins->sleep_state); | |
14005ee2 | 1283 | } |
f472dead | 1284 | EXPORT_SYMBOL_GPL(pinctrl_pm_select_sleep_state); |
14005ee2 LW |
1285 | |
1286 | /** | |
1287 | * pinctrl_pm_select_idle_state() - select idle pinctrl state for PM | |
1288 | * @dev: device to select idle state for | |
1289 | */ | |
1290 | int pinctrl_pm_select_idle_state(struct device *dev) | |
1291 | { | |
f3333497 | 1292 | if (!dev->pins) |
14005ee2 | 1293 | return 0; |
f3333497 TL |
1294 | |
1295 | return pinctrl_pm_select_state(dev, dev->pins->idle_state); | |
14005ee2 | 1296 | } |
f472dead | 1297 | EXPORT_SYMBOL_GPL(pinctrl_pm_select_idle_state); |
14005ee2 LW |
1298 | #endif |
1299 | ||
2744e8af LW |
1300 | #ifdef CONFIG_DEBUG_FS |
1301 | ||
1302 | static int pinctrl_pins_show(struct seq_file *s, void *what) | |
1303 | { | |
1304 | struct pinctrl_dev *pctldev = s->private; | |
1305 | const struct pinctrl_ops *ops = pctldev->desc->pctlops; | |
706e8520 | 1306 | unsigned i, pin; |
2744e8af LW |
1307 | |
1308 | seq_printf(s, "registered pins: %d\n", pctldev->desc->npins); | |
2744e8af | 1309 | |
42fed7ba | 1310 | mutex_lock(&pctldev->mutex); |
57b676f9 | 1311 | |
706e8520 CP |
1312 | /* The pin number can be retrived from the pin controller descriptor */ |
1313 | for (i = 0; i < pctldev->desc->npins; i++) { | |
2744e8af LW |
1314 | struct pin_desc *desc; |
1315 | ||
706e8520 | 1316 | pin = pctldev->desc->pins[i].number; |
2744e8af LW |
1317 | desc = pin_desc_get(pctldev, pin); |
1318 | /* Pin space may be sparse */ | |
1319 | if (desc == NULL) | |
1320 | continue; | |
1321 | ||
1322 | seq_printf(s, "pin %d (%s) ", pin, | |
1323 | desc->name ? desc->name : "unnamed"); | |
1324 | ||
1325 | /* Driver-specific info per pin */ | |
1326 | if (ops->pin_dbg_show) | |
1327 | ops->pin_dbg_show(pctldev, s, pin); | |
1328 | ||
1329 | seq_puts(s, "\n"); | |
1330 | } | |
1331 | ||
42fed7ba | 1332 | mutex_unlock(&pctldev->mutex); |
57b676f9 | 1333 | |
2744e8af LW |
1334 | return 0; |
1335 | } | |
1336 | ||
1337 | static int pinctrl_groups_show(struct seq_file *s, void *what) | |
1338 | { | |
1339 | struct pinctrl_dev *pctldev = s->private; | |
1340 | const struct pinctrl_ops *ops = pctldev->desc->pctlops; | |
d1e90e9e | 1341 | unsigned ngroups, selector = 0; |
2744e8af | 1342 | |
42fed7ba PC |
1343 | mutex_lock(&pctldev->mutex); |
1344 | ||
d1e90e9e | 1345 | ngroups = ops->get_groups_count(pctldev); |
57b676f9 | 1346 | |
2744e8af | 1347 | seq_puts(s, "registered pin groups:\n"); |
d1e90e9e | 1348 | while (selector < ngroups) { |
a5818a8b | 1349 | const unsigned *pins; |
2744e8af LW |
1350 | unsigned num_pins; |
1351 | const char *gname = ops->get_group_name(pctldev, selector); | |
dcb5dbc3 | 1352 | const char *pname; |
2744e8af LW |
1353 | int ret; |
1354 | int i; | |
1355 | ||
1356 | ret = ops->get_group_pins(pctldev, selector, | |
1357 | &pins, &num_pins); | |
1358 | if (ret) | |
1359 | seq_printf(s, "%s [ERROR GETTING PINS]\n", | |
1360 | gname); | |
1361 | else { | |
dcb5dbc3 DA |
1362 | seq_printf(s, "group: %s\n", gname); |
1363 | for (i = 0; i < num_pins; i++) { | |
1364 | pname = pin_get_name(pctldev, pins[i]); | |
b4dd784b | 1365 | if (WARN_ON(!pname)) { |
42fed7ba | 1366 | mutex_unlock(&pctldev->mutex); |
dcb5dbc3 | 1367 | return -EINVAL; |
b4dd784b | 1368 | } |
dcb5dbc3 DA |
1369 | seq_printf(s, "pin %d (%s)\n", pins[i], pname); |
1370 | } | |
1371 | seq_puts(s, "\n"); | |
2744e8af LW |
1372 | } |
1373 | selector++; | |
1374 | } | |
1375 | ||
42fed7ba | 1376 | mutex_unlock(&pctldev->mutex); |
2744e8af LW |
1377 | |
1378 | return 0; | |
1379 | } | |
1380 | ||
1381 | static int pinctrl_gpioranges_show(struct seq_file *s, void *what) | |
1382 | { | |
1383 | struct pinctrl_dev *pctldev = s->private; | |
1384 | struct pinctrl_gpio_range *range = NULL; | |
1385 | ||
1386 | seq_puts(s, "GPIO ranges handled:\n"); | |
1387 | ||
42fed7ba | 1388 | mutex_lock(&pctldev->mutex); |
57b676f9 | 1389 | |
2744e8af | 1390 | /* Loop over the ranges */ |
2744e8af | 1391 | list_for_each_entry(range, &pctldev->gpio_ranges, node) { |
c8587eee CR |
1392 | if (range->pins) { |
1393 | int a; | |
1394 | seq_printf(s, "%u: %s GPIOS [%u - %u] PINS {", | |
1395 | range->id, range->name, | |
1396 | range->base, (range->base + range->npins - 1)); | |
1397 | for (a = 0; a < range->npins - 1; a++) | |
1398 | seq_printf(s, "%u, ", range->pins[a]); | |
1399 | seq_printf(s, "%u}\n", range->pins[a]); | |
1400 | } | |
1401 | else | |
1402 | seq_printf(s, "%u: %s GPIOS [%u - %u] PINS [%u - %u]\n", | |
1403 | range->id, range->name, | |
1404 | range->base, (range->base + range->npins - 1), | |
1405 | range->pin_base, | |
1406 | (range->pin_base + range->npins - 1)); | |
2744e8af | 1407 | } |
57b676f9 | 1408 | |
42fed7ba | 1409 | mutex_unlock(&pctldev->mutex); |
2744e8af LW |
1410 | |
1411 | return 0; | |
1412 | } | |
1413 | ||
1414 | static int pinctrl_devices_show(struct seq_file *s, void *what) | |
1415 | { | |
1416 | struct pinctrl_dev *pctldev; | |
1417 | ||
ae6b4d85 | 1418 | seq_puts(s, "name [pinmux] [pinconf]\n"); |
57b676f9 | 1419 | |
42fed7ba | 1420 | mutex_lock(&pinctrldev_list_mutex); |
57b676f9 | 1421 | |
2744e8af LW |
1422 | list_for_each_entry(pctldev, &pinctrldev_list, node) { |
1423 | seq_printf(s, "%s ", pctldev->desc->name); | |
1424 | if (pctldev->desc->pmxops) | |
ae6b4d85 LW |
1425 | seq_puts(s, "yes "); |
1426 | else | |
1427 | seq_puts(s, "no "); | |
1428 | if (pctldev->desc->confops) | |
2744e8af LW |
1429 | seq_puts(s, "yes"); |
1430 | else | |
1431 | seq_puts(s, "no"); | |
1432 | seq_puts(s, "\n"); | |
1433 | } | |
57b676f9 | 1434 | |
42fed7ba | 1435 | mutex_unlock(&pinctrldev_list_mutex); |
2744e8af LW |
1436 | |
1437 | return 0; | |
1438 | } | |
1439 | ||
1e2082b5 SW |
1440 | static inline const char *map_type(enum pinctrl_map_type type) |
1441 | { | |
1442 | static const char * const names[] = { | |
1443 | "INVALID", | |
1444 | "DUMMY_STATE", | |
1445 | "MUX_GROUP", | |
1446 | "CONFIGS_PIN", | |
1447 | "CONFIGS_GROUP", | |
1448 | }; | |
1449 | ||
1450 | if (type >= ARRAY_SIZE(names)) | |
1451 | return "UNKNOWN"; | |
1452 | ||
1453 | return names[type]; | |
1454 | } | |
1455 | ||
3eedb437 SW |
1456 | static int pinctrl_maps_show(struct seq_file *s, void *what) |
1457 | { | |
1458 | struct pinctrl_maps *maps_node; | |
1459 | int i; | |
1460 | struct pinctrl_map const *map; | |
1461 | ||
1462 | seq_puts(s, "Pinctrl maps:\n"); | |
1463 | ||
42fed7ba | 1464 | mutex_lock(&pinctrl_maps_mutex); |
3eedb437 | 1465 | for_each_maps(maps_node, i, map) { |
1e2082b5 SW |
1466 | seq_printf(s, "device %s\nstate %s\ntype %s (%d)\n", |
1467 | map->dev_name, map->name, map_type(map->type), | |
1468 | map->type); | |
1469 | ||
1470 | if (map->type != PIN_MAP_TYPE_DUMMY_STATE) | |
1471 | seq_printf(s, "controlling device %s\n", | |
1472 | map->ctrl_dev_name); | |
1473 | ||
1474 | switch (map->type) { | |
1475 | case PIN_MAP_TYPE_MUX_GROUP: | |
1476 | pinmux_show_map(s, map); | |
1477 | break; | |
1478 | case PIN_MAP_TYPE_CONFIGS_PIN: | |
1479 | case PIN_MAP_TYPE_CONFIGS_GROUP: | |
1480 | pinconf_show_map(s, map); | |
1481 | break; | |
1482 | default: | |
1483 | break; | |
1484 | } | |
1485 | ||
1486 | seq_printf(s, "\n"); | |
3eedb437 | 1487 | } |
42fed7ba | 1488 | mutex_unlock(&pinctrl_maps_mutex); |
3eedb437 SW |
1489 | |
1490 | return 0; | |
1491 | } | |
1492 | ||
befe5bdf LW |
1493 | static int pinctrl_show(struct seq_file *s, void *what) |
1494 | { | |
1495 | struct pinctrl *p; | |
6e5e959d | 1496 | struct pinctrl_state *state; |
7ecdb16f | 1497 | struct pinctrl_setting *setting; |
befe5bdf LW |
1498 | |
1499 | seq_puts(s, "Requested pin control handlers their pinmux maps:\n"); | |
57b676f9 | 1500 | |
42fed7ba | 1501 | mutex_lock(&pinctrl_list_mutex); |
57b676f9 | 1502 | |
befe5bdf | 1503 | list_for_each_entry(p, &pinctrl_list, node) { |
6e5e959d SW |
1504 | seq_printf(s, "device: %s current state: %s\n", |
1505 | dev_name(p->dev), | |
1506 | p->state ? p->state->name : "none"); | |
1507 | ||
1508 | list_for_each_entry(state, &p->states, node) { | |
1509 | seq_printf(s, " state: %s\n", state->name); | |
befe5bdf | 1510 | |
6e5e959d | 1511 | list_for_each_entry(setting, &state->settings, node) { |
1e2082b5 SW |
1512 | struct pinctrl_dev *pctldev = setting->pctldev; |
1513 | ||
1514 | seq_printf(s, " type: %s controller %s ", | |
1515 | map_type(setting->type), | |
1516 | pinctrl_dev_get_name(pctldev)); | |
1517 | ||
1518 | switch (setting->type) { | |
1519 | case PIN_MAP_TYPE_MUX_GROUP: | |
1520 | pinmux_show_setting(s, setting); | |
1521 | break; | |
1522 | case PIN_MAP_TYPE_CONFIGS_PIN: | |
1523 | case PIN_MAP_TYPE_CONFIGS_GROUP: | |
1524 | pinconf_show_setting(s, setting); | |
1525 | break; | |
1526 | default: | |
1527 | break; | |
1528 | } | |
6e5e959d | 1529 | } |
befe5bdf | 1530 | } |
befe5bdf LW |
1531 | } |
1532 | ||
42fed7ba | 1533 | mutex_unlock(&pinctrl_list_mutex); |
57b676f9 | 1534 | |
befe5bdf LW |
1535 | return 0; |
1536 | } | |
1537 | ||
2744e8af LW |
1538 | static int pinctrl_pins_open(struct inode *inode, struct file *file) |
1539 | { | |
1540 | return single_open(file, pinctrl_pins_show, inode->i_private); | |
1541 | } | |
1542 | ||
1543 | static int pinctrl_groups_open(struct inode *inode, struct file *file) | |
1544 | { | |
1545 | return single_open(file, pinctrl_groups_show, inode->i_private); | |
1546 | } | |
1547 | ||
1548 | static int pinctrl_gpioranges_open(struct inode *inode, struct file *file) | |
1549 | { | |
1550 | return single_open(file, pinctrl_gpioranges_show, inode->i_private); | |
1551 | } | |
1552 | ||
1553 | static int pinctrl_devices_open(struct inode *inode, struct file *file) | |
1554 | { | |
1555 | return single_open(file, pinctrl_devices_show, NULL); | |
1556 | } | |
1557 | ||
3eedb437 SW |
1558 | static int pinctrl_maps_open(struct inode *inode, struct file *file) |
1559 | { | |
1560 | return single_open(file, pinctrl_maps_show, NULL); | |
1561 | } | |
1562 | ||
befe5bdf LW |
1563 | static int pinctrl_open(struct inode *inode, struct file *file) |
1564 | { | |
1565 | return single_open(file, pinctrl_show, NULL); | |
1566 | } | |
1567 | ||
2744e8af LW |
1568 | static const struct file_operations pinctrl_pins_ops = { |
1569 | .open = pinctrl_pins_open, | |
1570 | .read = seq_read, | |
1571 | .llseek = seq_lseek, | |
1572 | .release = single_release, | |
1573 | }; | |
1574 | ||
1575 | static const struct file_operations pinctrl_groups_ops = { | |
1576 | .open = pinctrl_groups_open, | |
1577 | .read = seq_read, | |
1578 | .llseek = seq_lseek, | |
1579 | .release = single_release, | |
1580 | }; | |
1581 | ||
1582 | static const struct file_operations pinctrl_gpioranges_ops = { | |
1583 | .open = pinctrl_gpioranges_open, | |
1584 | .read = seq_read, | |
1585 | .llseek = seq_lseek, | |
1586 | .release = single_release, | |
1587 | }; | |
1588 | ||
3eedb437 SW |
1589 | static const struct file_operations pinctrl_devices_ops = { |
1590 | .open = pinctrl_devices_open, | |
befe5bdf LW |
1591 | .read = seq_read, |
1592 | .llseek = seq_lseek, | |
1593 | .release = single_release, | |
1594 | }; | |
1595 | ||
3eedb437 SW |
1596 | static const struct file_operations pinctrl_maps_ops = { |
1597 | .open = pinctrl_maps_open, | |
2744e8af LW |
1598 | .read = seq_read, |
1599 | .llseek = seq_lseek, | |
1600 | .release = single_release, | |
1601 | }; | |
1602 | ||
befe5bdf LW |
1603 | static const struct file_operations pinctrl_ops = { |
1604 | .open = pinctrl_open, | |
1605 | .read = seq_read, | |
1606 | .llseek = seq_lseek, | |
1607 | .release = single_release, | |
1608 | }; | |
1609 | ||
2744e8af LW |
1610 | static struct dentry *debugfs_root; |
1611 | ||
1612 | static void pinctrl_init_device_debugfs(struct pinctrl_dev *pctldev) | |
1613 | { | |
02157160 | 1614 | struct dentry *device_root; |
2744e8af | 1615 | |
51cd24ee | 1616 | device_root = debugfs_create_dir(dev_name(pctldev->dev), |
2744e8af | 1617 | debugfs_root); |
02157160 TL |
1618 | pctldev->device_root = device_root; |
1619 | ||
2744e8af LW |
1620 | if (IS_ERR(device_root) || !device_root) { |
1621 | pr_warn("failed to create debugfs directory for %s\n", | |
51cd24ee | 1622 | dev_name(pctldev->dev)); |
2744e8af LW |
1623 | return; |
1624 | } | |
1625 | debugfs_create_file("pins", S_IFREG | S_IRUGO, | |
1626 | device_root, pctldev, &pinctrl_pins_ops); | |
1627 | debugfs_create_file("pingroups", S_IFREG | S_IRUGO, | |
1628 | device_root, pctldev, &pinctrl_groups_ops); | |
1629 | debugfs_create_file("gpio-ranges", S_IFREG | S_IRUGO, | |
1630 | device_root, pctldev, &pinctrl_gpioranges_ops); | |
1631 | pinmux_init_device_debugfs(device_root, pctldev); | |
ae6b4d85 | 1632 | pinconf_init_device_debugfs(device_root, pctldev); |
2744e8af LW |
1633 | } |
1634 | ||
02157160 TL |
1635 | static void pinctrl_remove_device_debugfs(struct pinctrl_dev *pctldev) |
1636 | { | |
1637 | debugfs_remove_recursive(pctldev->device_root); | |
1638 | } | |
1639 | ||
2744e8af LW |
1640 | static void pinctrl_init_debugfs(void) |
1641 | { | |
1642 | debugfs_root = debugfs_create_dir("pinctrl", NULL); | |
1643 | if (IS_ERR(debugfs_root) || !debugfs_root) { | |
1644 | pr_warn("failed to create debugfs directory\n"); | |
1645 | debugfs_root = NULL; | |
1646 | return; | |
1647 | } | |
1648 | ||
1649 | debugfs_create_file("pinctrl-devices", S_IFREG | S_IRUGO, | |
1650 | debugfs_root, NULL, &pinctrl_devices_ops); | |
3eedb437 SW |
1651 | debugfs_create_file("pinctrl-maps", S_IFREG | S_IRUGO, |
1652 | debugfs_root, NULL, &pinctrl_maps_ops); | |
befe5bdf LW |
1653 | debugfs_create_file("pinctrl-handles", S_IFREG | S_IRUGO, |
1654 | debugfs_root, NULL, &pinctrl_ops); | |
2744e8af LW |
1655 | } |
1656 | ||
1657 | #else /* CONFIG_DEBUG_FS */ | |
1658 | ||
1659 | static void pinctrl_init_device_debugfs(struct pinctrl_dev *pctldev) | |
1660 | { | |
1661 | } | |
1662 | ||
1663 | static void pinctrl_init_debugfs(void) | |
1664 | { | |
1665 | } | |
1666 | ||
02157160 TL |
1667 | static void pinctrl_remove_device_debugfs(struct pinctrl_dev *pctldev) |
1668 | { | |
1669 | } | |
1670 | ||
2744e8af LW |
1671 | #endif |
1672 | ||
d26bc49f SW |
1673 | static int pinctrl_check_ops(struct pinctrl_dev *pctldev) |
1674 | { | |
1675 | const struct pinctrl_ops *ops = pctldev->desc->pctlops; | |
1676 | ||
1677 | if (!ops || | |
d1e90e9e | 1678 | !ops->get_groups_count || |
d26bc49f SW |
1679 | !ops->get_group_name || |
1680 | !ops->get_group_pins) | |
1681 | return -EINVAL; | |
1682 | ||
57291ce2 SW |
1683 | if (ops->dt_node_to_map && !ops->dt_free_map) |
1684 | return -EINVAL; | |
1685 | ||
d26bc49f SW |
1686 | return 0; |
1687 | } | |
1688 | ||
2744e8af LW |
1689 | /** |
1690 | * pinctrl_register() - register a pin controller device | |
1691 | * @pctldesc: descriptor for this pin controller | |
1692 | * @dev: parent device for this pin controller | |
1693 | * @driver_data: private pin controller data for this pin controller | |
1694 | */ | |
1695 | struct pinctrl_dev *pinctrl_register(struct pinctrl_desc *pctldesc, | |
1696 | struct device *dev, void *driver_data) | |
1697 | { | |
2744e8af LW |
1698 | struct pinctrl_dev *pctldev; |
1699 | int ret; | |
1700 | ||
da9aecb0 | 1701 | if (!pctldesc) |
2744e8af | 1702 | return NULL; |
da9aecb0 | 1703 | if (!pctldesc->name) |
2744e8af LW |
1704 | return NULL; |
1705 | ||
02f5b989 | 1706 | pctldev = kzalloc(sizeof(*pctldev), GFP_KERNEL); |
95dcd4ae SW |
1707 | if (pctldev == NULL) { |
1708 | dev_err(dev, "failed to alloc struct pinctrl_dev\n"); | |
b9130b77 | 1709 | return NULL; |
95dcd4ae | 1710 | } |
b9130b77 TL |
1711 | |
1712 | /* Initialize pin control device struct */ | |
1713 | pctldev->owner = pctldesc->owner; | |
1714 | pctldev->desc = pctldesc; | |
1715 | pctldev->driver_data = driver_data; | |
1716 | INIT_RADIX_TREE(&pctldev->pin_desc_tree, GFP_KERNEL); | |
b9130b77 | 1717 | INIT_LIST_HEAD(&pctldev->gpio_ranges); |
b9130b77 | 1718 | pctldev->dev = dev; |
42fed7ba | 1719 | mutex_init(&pctldev->mutex); |
b9130b77 | 1720 | |
d26bc49f | 1721 | /* check core ops for sanity */ |
da9aecb0 | 1722 | if (pinctrl_check_ops(pctldev)) { |
ad6e1107 | 1723 | dev_err(dev, "pinctrl ops lacks necessary functions\n"); |
d26bc49f SW |
1724 | goto out_err; |
1725 | } | |
1726 | ||
2744e8af LW |
1727 | /* If we're implementing pinmuxing, check the ops for sanity */ |
1728 | if (pctldesc->pmxops) { | |
da9aecb0 | 1729 | if (pinmux_check_ops(pctldev)) |
b9130b77 | 1730 | goto out_err; |
2744e8af LW |
1731 | } |
1732 | ||
ae6b4d85 LW |
1733 | /* If we're implementing pinconfig, check the ops for sanity */ |
1734 | if (pctldesc->confops) { | |
da9aecb0 | 1735 | if (pinconf_check_ops(pctldev)) |
b9130b77 | 1736 | goto out_err; |
ae6b4d85 LW |
1737 | } |
1738 | ||
2744e8af | 1739 | /* Register all the pins */ |
ad6e1107 | 1740 | dev_dbg(dev, "try to register %d pins ...\n", pctldesc->npins); |
2744e8af LW |
1741 | ret = pinctrl_register_pins(pctldev, pctldesc->pins, pctldesc->npins); |
1742 | if (ret) { | |
ad6e1107 | 1743 | dev_err(dev, "error during pin registration\n"); |
2744e8af LW |
1744 | pinctrl_free_pindescs(pctldev, pctldesc->pins, |
1745 | pctldesc->npins); | |
51cd24ee | 1746 | goto out_err; |
2744e8af LW |
1747 | } |
1748 | ||
42fed7ba | 1749 | mutex_lock(&pinctrldev_list_mutex); |
8b9c139f | 1750 | list_add_tail(&pctldev->node, &pinctrldev_list); |
42fed7ba PC |
1751 | mutex_unlock(&pinctrldev_list_mutex); |
1752 | ||
1753 | pctldev->p = pinctrl_get(pctldev->dev); | |
57b676f9 | 1754 | |
6e5e959d | 1755 | if (!IS_ERR(pctldev->p)) { |
840a47ba | 1756 | pctldev->hog_default = |
42fed7ba | 1757 | pinctrl_lookup_state(pctldev->p, PINCTRL_STATE_DEFAULT); |
840a47ba | 1758 | if (IS_ERR(pctldev->hog_default)) { |
ad6e1107 JC |
1759 | dev_dbg(dev, "failed to lookup the default state\n"); |
1760 | } else { | |
42fed7ba | 1761 | if (pinctrl_select_state(pctldev->p, |
840a47ba | 1762 | pctldev->hog_default)) |
ad6e1107 JC |
1763 | dev_err(dev, |
1764 | "failed to select default state\n"); | |
ad6e1107 | 1765 | } |
840a47ba JD |
1766 | |
1767 | pctldev->hog_sleep = | |
42fed7ba | 1768 | pinctrl_lookup_state(pctldev->p, |
840a47ba JD |
1769 | PINCTRL_STATE_SLEEP); |
1770 | if (IS_ERR(pctldev->hog_sleep)) | |
1771 | dev_dbg(dev, "failed to lookup the sleep state\n"); | |
6e5e959d | 1772 | } |
57b676f9 | 1773 | |
2304b473 SW |
1774 | pinctrl_init_device_debugfs(pctldev); |
1775 | ||
2744e8af LW |
1776 | return pctldev; |
1777 | ||
51cd24ee | 1778 | out_err: |
42fed7ba | 1779 | mutex_destroy(&pctldev->mutex); |
51cd24ee | 1780 | kfree(pctldev); |
2744e8af LW |
1781 | return NULL; |
1782 | } | |
1783 | EXPORT_SYMBOL_GPL(pinctrl_register); | |
1784 | ||
1785 | /** | |
1786 | * pinctrl_unregister() - unregister pinmux | |
1787 | * @pctldev: pin controller to unregister | |
1788 | * | |
1789 | * Called by pinmux drivers to unregister a pinmux. | |
1790 | */ | |
1791 | void pinctrl_unregister(struct pinctrl_dev *pctldev) | |
1792 | { | |
5d589b09 | 1793 | struct pinctrl_gpio_range *range, *n; |
2744e8af LW |
1794 | if (pctldev == NULL) |
1795 | return; | |
1796 | ||
42fed7ba PC |
1797 | mutex_lock(&pinctrldev_list_mutex); |
1798 | mutex_lock(&pctldev->mutex); | |
57b676f9 | 1799 | |
42fed7ba | 1800 | pinctrl_remove_device_debugfs(pctldev); |
57b676f9 | 1801 | |
6e5e959d | 1802 | if (!IS_ERR(pctldev->p)) |
42fed7ba | 1803 | pinctrl_put(pctldev->p); |
57b676f9 | 1804 | |
2744e8af | 1805 | /* TODO: check that no pinmuxes are still active? */ |
2744e8af | 1806 | list_del(&pctldev->node); |
2744e8af LW |
1807 | /* Destroy descriptor tree */ |
1808 | pinctrl_free_pindescs(pctldev, pctldev->desc->pins, | |
1809 | pctldev->desc->npins); | |
5d589b09 DA |
1810 | /* remove gpio ranges map */ |
1811 | list_for_each_entry_safe(range, n, &pctldev->gpio_ranges, node) | |
1812 | list_del(&range->node); | |
1813 | ||
42fed7ba PC |
1814 | mutex_unlock(&pctldev->mutex); |
1815 | mutex_destroy(&pctldev->mutex); | |
51cd24ee | 1816 | kfree(pctldev); |
42fed7ba | 1817 | mutex_unlock(&pinctrldev_list_mutex); |
2744e8af LW |
1818 | } |
1819 | EXPORT_SYMBOL_GPL(pinctrl_unregister); | |
1820 | ||
1821 | static int __init pinctrl_init(void) | |
1822 | { | |
1823 | pr_info("initialized pinctrl subsystem\n"); | |
1824 | pinctrl_init_debugfs(); | |
1825 | return 0; | |
1826 | } | |
1827 | ||
1828 | /* init early since many drivers really need to initialized pinmux early */ | |
1829 | core_initcall(pinctrl_init); |