Commit | Line | Data |
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2744e8af LW |
1 | /* |
2 | * Core driver for the pin control subsystem | |
3 | * | |
befe5bdf | 4 | * Copyright (C) 2011-2012 ST-Ericsson SA |
2744e8af LW |
5 | * Written on behalf of Linaro for ST-Ericsson |
6 | * Based on bits of regulator core, gpio core and clk core | |
7 | * | |
8 | * Author: Linus Walleij <linus.walleij@linaro.org> | |
9 | * | |
b2b3e66e SW |
10 | * Copyright (C) 2012 NVIDIA CORPORATION. All rights reserved. |
11 | * | |
2744e8af LW |
12 | * License terms: GNU General Public License (GPL) version 2 |
13 | */ | |
14 | #define pr_fmt(fmt) "pinctrl core: " fmt | |
15 | ||
16 | #include <linux/kernel.h> | |
a5a697cd | 17 | #include <linux/export.h> |
2744e8af LW |
18 | #include <linux/init.h> |
19 | #include <linux/device.h> | |
20 | #include <linux/slab.h> | |
2744e8af LW |
21 | #include <linux/err.h> |
22 | #include <linux/list.h> | |
2744e8af LW |
23 | #include <linux/sysfs.h> |
24 | #include <linux/debugfs.h> | |
25 | #include <linux/seq_file.h> | |
6d4ca1fb | 26 | #include <linux/pinctrl/consumer.h> |
2744e8af LW |
27 | #include <linux/pinctrl/pinctrl.h> |
28 | #include <linux/pinctrl/machine.h> | |
29 | #include "core.h" | |
57291ce2 | 30 | #include "devicetree.h" |
2744e8af | 31 | #include "pinmux.h" |
ae6b4d85 | 32 | #include "pinconf.h" |
2744e8af | 33 | |
b2b3e66e SW |
34 | /** |
35 | * struct pinctrl_maps - a list item containing part of the mapping table | |
36 | * @node: mapping table list node | |
37 | * @maps: array of mapping table entries | |
38 | * @num_maps: the number of entries in @maps | |
39 | */ | |
40 | struct pinctrl_maps { | |
41 | struct list_head node; | |
42 | struct pinctrl_map const *maps; | |
43 | unsigned num_maps; | |
44 | }; | |
45 | ||
5b3aa5f7 DA |
46 | static bool pinctrl_dummy_state; |
47 | ||
57b676f9 SW |
48 | /* Mutex taken by all entry points */ |
49 | DEFINE_MUTEX(pinctrl_mutex); | |
50 | ||
51 | /* Global list of pin control devices (struct pinctrl_dev) */ | |
57291ce2 | 52 | LIST_HEAD(pinctrldev_list); |
2744e8af | 53 | |
57b676f9 | 54 | /* List of pin controller handles (struct pinctrl) */ |
befe5bdf LW |
55 | static LIST_HEAD(pinctrl_list); |
56 | ||
57b676f9 | 57 | /* List of pinctrl maps (struct pinctrl_maps) */ |
b2b3e66e SW |
58 | static LIST_HEAD(pinctrl_maps); |
59 | ||
60 | #define for_each_maps(_maps_node_, _i_, _map_) \ | |
61 | list_for_each_entry(_maps_node_, &pinctrl_maps, node) \ | |
62 | for (_i_ = 0, _map_ = &_maps_node_->maps[_i_]; \ | |
63 | _i_ < _maps_node_->num_maps; \ | |
bc66468c | 64 | _i_++, _map_ = &_maps_node_->maps[_i_]) |
befe5bdf | 65 | |
5b3aa5f7 DA |
66 | /** |
67 | * pinctrl_provide_dummies() - indicate if pinctrl provides dummy state support | |
68 | * | |
69 | * Usually this function is called by platforms without pinctrl driver support | |
70 | * but run with some shared drivers using pinctrl APIs. | |
71 | * After calling this function, the pinctrl core will return successfully | |
72 | * with creating a dummy state for the driver to keep going smoothly. | |
73 | */ | |
74 | void pinctrl_provide_dummies(void) | |
75 | { | |
76 | pinctrl_dummy_state = true; | |
77 | } | |
78 | ||
2744e8af LW |
79 | const char *pinctrl_dev_get_name(struct pinctrl_dev *pctldev) |
80 | { | |
81 | /* We're not allowed to register devices without name */ | |
82 | return pctldev->desc->name; | |
83 | } | |
84 | EXPORT_SYMBOL_GPL(pinctrl_dev_get_name); | |
85 | ||
86 | void *pinctrl_dev_get_drvdata(struct pinctrl_dev *pctldev) | |
87 | { | |
88 | return pctldev->driver_data; | |
89 | } | |
90 | EXPORT_SYMBOL_GPL(pinctrl_dev_get_drvdata); | |
91 | ||
92 | /** | |
9dfac4fd LW |
93 | * get_pinctrl_dev_from_devname() - look up pin controller device |
94 | * @devname: the name of a device instance, as returned by dev_name() | |
2744e8af LW |
95 | * |
96 | * Looks up a pin control device matching a certain device name or pure device | |
97 | * pointer, the pure device pointer will take precedence. | |
98 | */ | |
9dfac4fd | 99 | struct pinctrl_dev *get_pinctrl_dev_from_devname(const char *devname) |
2744e8af LW |
100 | { |
101 | struct pinctrl_dev *pctldev = NULL; | |
102 | bool found = false; | |
103 | ||
9dfac4fd LW |
104 | if (!devname) |
105 | return NULL; | |
106 | ||
2744e8af | 107 | list_for_each_entry(pctldev, &pinctrldev_list, node) { |
9dfac4fd | 108 | if (!strcmp(dev_name(pctldev->dev), devname)) { |
2744e8af LW |
109 | /* Matched on device name */ |
110 | found = true; | |
111 | break; | |
112 | } | |
113 | } | |
2744e8af LW |
114 | |
115 | return found ? pctldev : NULL; | |
116 | } | |
117 | ||
ae6b4d85 LW |
118 | /** |
119 | * pin_get_from_name() - look up a pin number from a name | |
120 | * @pctldev: the pin control device to lookup the pin on | |
121 | * @name: the name of the pin to look up | |
122 | */ | |
123 | int pin_get_from_name(struct pinctrl_dev *pctldev, const char *name) | |
124 | { | |
706e8520 | 125 | unsigned i, pin; |
ae6b4d85 | 126 | |
706e8520 CP |
127 | /* The pin number can be retrived from the pin controller descriptor */ |
128 | for (i = 0; i < pctldev->desc->npins; i++) { | |
ae6b4d85 LW |
129 | struct pin_desc *desc; |
130 | ||
706e8520 | 131 | pin = pctldev->desc->pins[i].number; |
ae6b4d85 LW |
132 | desc = pin_desc_get(pctldev, pin); |
133 | /* Pin space may be sparse */ | |
134 | if (desc == NULL) | |
135 | continue; | |
136 | if (desc->name && !strcmp(name, desc->name)) | |
137 | return pin; | |
138 | } | |
139 | ||
140 | return -EINVAL; | |
141 | } | |
142 | ||
dcb5dbc3 DA |
143 | /** |
144 | * pin_get_name_from_id() - look up a pin name from a pin id | |
145 | * @pctldev: the pin control device to lookup the pin on | |
146 | * @name: the name of the pin to look up | |
147 | */ | |
148 | const char *pin_get_name(struct pinctrl_dev *pctldev, const unsigned pin) | |
149 | { | |
150 | const struct pin_desc *desc; | |
151 | ||
152 | desc = pin_desc_get(pctldev, pin); | |
153 | if (desc == NULL) { | |
154 | dev_err(pctldev->dev, "failed to get pin(%d) name\n", | |
155 | pin); | |
156 | return NULL; | |
157 | } | |
158 | ||
159 | return desc->name; | |
160 | } | |
161 | ||
2744e8af LW |
162 | /** |
163 | * pin_is_valid() - check if pin exists on controller | |
164 | * @pctldev: the pin control device to check the pin on | |
165 | * @pin: pin to check, use the local pin controller index number | |
166 | * | |
167 | * This tells us whether a certain pin exist on a certain pin controller or | |
168 | * not. Pin lists may be sparse, so some pins may not exist. | |
169 | */ | |
170 | bool pin_is_valid(struct pinctrl_dev *pctldev, int pin) | |
171 | { | |
172 | struct pin_desc *pindesc; | |
173 | ||
174 | if (pin < 0) | |
175 | return false; | |
176 | ||
57b676f9 | 177 | mutex_lock(&pinctrl_mutex); |
2744e8af | 178 | pindesc = pin_desc_get(pctldev, pin); |
57b676f9 | 179 | mutex_unlock(&pinctrl_mutex); |
2744e8af | 180 | |
57b676f9 | 181 | return pindesc != NULL; |
2744e8af LW |
182 | } |
183 | EXPORT_SYMBOL_GPL(pin_is_valid); | |
184 | ||
185 | /* Deletes a range of pin descriptors */ | |
186 | static void pinctrl_free_pindescs(struct pinctrl_dev *pctldev, | |
187 | const struct pinctrl_pin_desc *pins, | |
188 | unsigned num_pins) | |
189 | { | |
190 | int i; | |
191 | ||
2744e8af LW |
192 | for (i = 0; i < num_pins; i++) { |
193 | struct pin_desc *pindesc; | |
194 | ||
195 | pindesc = radix_tree_lookup(&pctldev->pin_desc_tree, | |
196 | pins[i].number); | |
197 | if (pindesc != NULL) { | |
198 | radix_tree_delete(&pctldev->pin_desc_tree, | |
199 | pins[i].number); | |
ca53c5f1 LW |
200 | if (pindesc->dynamic_name) |
201 | kfree(pindesc->name); | |
2744e8af LW |
202 | } |
203 | kfree(pindesc); | |
204 | } | |
2744e8af LW |
205 | } |
206 | ||
207 | static int pinctrl_register_one_pin(struct pinctrl_dev *pctldev, | |
208 | unsigned number, const char *name) | |
209 | { | |
210 | struct pin_desc *pindesc; | |
211 | ||
212 | pindesc = pin_desc_get(pctldev, number); | |
213 | if (pindesc != NULL) { | |
214 | pr_err("pin %d already registered on %s\n", number, | |
215 | pctldev->desc->name); | |
216 | return -EINVAL; | |
217 | } | |
218 | ||
219 | pindesc = kzalloc(sizeof(*pindesc), GFP_KERNEL); | |
95dcd4ae SW |
220 | if (pindesc == NULL) { |
221 | dev_err(pctldev->dev, "failed to alloc struct pin_desc\n"); | |
2744e8af | 222 | return -ENOMEM; |
95dcd4ae | 223 | } |
ae6b4d85 | 224 | |
2744e8af LW |
225 | /* Set owner */ |
226 | pindesc->pctldev = pctldev; | |
227 | ||
9af1e44f | 228 | /* Copy basic pin info */ |
8dc6ae4d | 229 | if (name) { |
ca53c5f1 LW |
230 | pindesc->name = name; |
231 | } else { | |
232 | pindesc->name = kasprintf(GFP_KERNEL, "PIN%u", number); | |
233 | if (pindesc->name == NULL) | |
234 | return -ENOMEM; | |
235 | pindesc->dynamic_name = true; | |
236 | } | |
2744e8af | 237 | |
2744e8af | 238 | radix_tree_insert(&pctldev->pin_desc_tree, number, pindesc); |
2744e8af | 239 | pr_debug("registered pin %d (%s) on %s\n", |
ca53c5f1 | 240 | number, pindesc->name, pctldev->desc->name); |
2744e8af LW |
241 | return 0; |
242 | } | |
243 | ||
244 | static int pinctrl_register_pins(struct pinctrl_dev *pctldev, | |
245 | struct pinctrl_pin_desc const *pins, | |
246 | unsigned num_descs) | |
247 | { | |
248 | unsigned i; | |
249 | int ret = 0; | |
250 | ||
251 | for (i = 0; i < num_descs; i++) { | |
252 | ret = pinctrl_register_one_pin(pctldev, | |
253 | pins[i].number, pins[i].name); | |
254 | if (ret) | |
255 | return ret; | |
256 | } | |
257 | ||
258 | return 0; | |
259 | } | |
260 | ||
261 | /** | |
262 | * pinctrl_match_gpio_range() - check if a certain GPIO pin is in range | |
263 | * @pctldev: pin controller device to check | |
264 | * @gpio: gpio pin to check taken from the global GPIO pin space | |
265 | * | |
266 | * Tries to match a GPIO pin number to the ranges handled by a certain pin | |
267 | * controller, return the range or NULL | |
268 | */ | |
269 | static struct pinctrl_gpio_range * | |
270 | pinctrl_match_gpio_range(struct pinctrl_dev *pctldev, unsigned gpio) | |
271 | { | |
272 | struct pinctrl_gpio_range *range = NULL; | |
273 | ||
274 | /* Loop over the ranges */ | |
2744e8af LW |
275 | list_for_each_entry(range, &pctldev->gpio_ranges, node) { |
276 | /* Check if we're in the valid range */ | |
277 | if (gpio >= range->base && | |
278 | gpio < range->base + range->npins) { | |
2744e8af LW |
279 | return range; |
280 | } | |
281 | } | |
2744e8af LW |
282 | |
283 | return NULL; | |
284 | } | |
285 | ||
286 | /** | |
287 | * pinctrl_get_device_gpio_range() - find device for GPIO range | |
288 | * @gpio: the pin to locate the pin controller for | |
289 | * @outdev: the pin control device if found | |
290 | * @outrange: the GPIO range if found | |
291 | * | |
292 | * Find the pin controller handling a certain GPIO pin from the pinspace of | |
293 | * the GPIO subsystem, return the device and the matching GPIO range. Returns | |
4650b7cb DA |
294 | * -EPROBE_DEFER if the GPIO range could not be found in any device since it |
295 | * may still have not been registered. | |
2744e8af | 296 | */ |
4ecce45d SW |
297 | static int pinctrl_get_device_gpio_range(unsigned gpio, |
298 | struct pinctrl_dev **outdev, | |
299 | struct pinctrl_gpio_range **outrange) | |
2744e8af LW |
300 | { |
301 | struct pinctrl_dev *pctldev = NULL; | |
302 | ||
303 | /* Loop over the pin controllers */ | |
2744e8af LW |
304 | list_for_each_entry(pctldev, &pinctrldev_list, node) { |
305 | struct pinctrl_gpio_range *range; | |
306 | ||
307 | range = pinctrl_match_gpio_range(pctldev, gpio); | |
308 | if (range != NULL) { | |
309 | *outdev = pctldev; | |
310 | *outrange = range; | |
2744e8af LW |
311 | return 0; |
312 | } | |
313 | } | |
2744e8af | 314 | |
4650b7cb | 315 | return -EPROBE_DEFER; |
2744e8af LW |
316 | } |
317 | ||
318 | /** | |
319 | * pinctrl_add_gpio_range() - register a GPIO range for a controller | |
320 | * @pctldev: pin controller device to add the range to | |
321 | * @range: the GPIO range to add | |
322 | * | |
323 | * This adds a range of GPIOs to be handled by a certain pin controller. Call | |
324 | * this to register handled ranges after registering your pin controller. | |
325 | */ | |
326 | void pinctrl_add_gpio_range(struct pinctrl_dev *pctldev, | |
327 | struct pinctrl_gpio_range *range) | |
328 | { | |
57b676f9 | 329 | mutex_lock(&pinctrl_mutex); |
8b9c139f | 330 | list_add_tail(&range->node, &pctldev->gpio_ranges); |
57b676f9 | 331 | mutex_unlock(&pinctrl_mutex); |
2744e8af | 332 | } |
4ecce45d | 333 | EXPORT_SYMBOL_GPL(pinctrl_add_gpio_range); |
2744e8af | 334 | |
3e5e00b6 DA |
335 | void pinctrl_add_gpio_ranges(struct pinctrl_dev *pctldev, |
336 | struct pinctrl_gpio_range *ranges, | |
337 | unsigned nranges) | |
338 | { | |
339 | int i; | |
340 | ||
341 | for (i = 0; i < nranges; i++) | |
342 | pinctrl_add_gpio_range(pctldev, &ranges[i]); | |
343 | } | |
344 | EXPORT_SYMBOL_GPL(pinctrl_add_gpio_ranges); | |
345 | ||
7afde8ba LW |
346 | /** |
347 | * pinctrl_get_group_selector() - returns the group selector for a group | |
348 | * @pctldev: the pin controller handling the group | |
349 | * @pin_group: the pin group to look up | |
350 | */ | |
351 | int pinctrl_get_group_selector(struct pinctrl_dev *pctldev, | |
352 | const char *pin_group) | |
353 | { | |
354 | const struct pinctrl_ops *pctlops = pctldev->desc->pctlops; | |
d1e90e9e | 355 | unsigned ngroups = pctlops->get_groups_count(pctldev); |
7afde8ba LW |
356 | unsigned group_selector = 0; |
357 | ||
d1e90e9e | 358 | while (group_selector < ngroups) { |
7afde8ba LW |
359 | const char *gname = pctlops->get_group_name(pctldev, |
360 | group_selector); | |
361 | if (!strcmp(gname, pin_group)) { | |
51cd24ee | 362 | dev_dbg(pctldev->dev, |
7afde8ba LW |
363 | "found group selector %u for %s\n", |
364 | group_selector, | |
365 | pin_group); | |
366 | return group_selector; | |
367 | } | |
368 | ||
369 | group_selector++; | |
370 | } | |
371 | ||
51cd24ee | 372 | dev_err(pctldev->dev, "does not have pin group %s\n", |
7afde8ba LW |
373 | pin_group); |
374 | ||
375 | return -EINVAL; | |
376 | } | |
377 | ||
befe5bdf LW |
378 | /** |
379 | * pinctrl_request_gpio() - request a single pin to be used in as GPIO | |
380 | * @gpio: the GPIO pin number from the GPIO subsystem number space | |
381 | * | |
382 | * This function should *ONLY* be used from gpiolib-based GPIO drivers, | |
383 | * as part of their gpio_request() semantics, platforms and individual drivers | |
384 | * shall *NOT* request GPIO pins to be muxed in. | |
385 | */ | |
386 | int pinctrl_request_gpio(unsigned gpio) | |
387 | { | |
388 | struct pinctrl_dev *pctldev; | |
389 | struct pinctrl_gpio_range *range; | |
390 | int ret; | |
391 | int pin; | |
392 | ||
57b676f9 SW |
393 | mutex_lock(&pinctrl_mutex); |
394 | ||
befe5bdf | 395 | ret = pinctrl_get_device_gpio_range(gpio, &pctldev, &range); |
57b676f9 SW |
396 | if (ret) { |
397 | mutex_unlock(&pinctrl_mutex); | |
4650b7cb | 398 | return ret; |
57b676f9 | 399 | } |
befe5bdf LW |
400 | |
401 | /* Convert to the pin controllers number space */ | |
402 | pin = gpio - range->base + range->pin_base; | |
403 | ||
57b676f9 SW |
404 | ret = pinmux_request_gpio(pctldev, range, pin, gpio); |
405 | ||
406 | mutex_unlock(&pinctrl_mutex); | |
407 | return ret; | |
befe5bdf LW |
408 | } |
409 | EXPORT_SYMBOL_GPL(pinctrl_request_gpio); | |
410 | ||
411 | /** | |
412 | * pinctrl_free_gpio() - free control on a single pin, currently used as GPIO | |
413 | * @gpio: the GPIO pin number from the GPIO subsystem number space | |
414 | * | |
415 | * This function should *ONLY* be used from gpiolib-based GPIO drivers, | |
416 | * as part of their gpio_free() semantics, platforms and individual drivers | |
417 | * shall *NOT* request GPIO pins to be muxed out. | |
418 | */ | |
419 | void pinctrl_free_gpio(unsigned gpio) | |
420 | { | |
421 | struct pinctrl_dev *pctldev; | |
422 | struct pinctrl_gpio_range *range; | |
423 | int ret; | |
424 | int pin; | |
425 | ||
57b676f9 SW |
426 | mutex_lock(&pinctrl_mutex); |
427 | ||
befe5bdf | 428 | ret = pinctrl_get_device_gpio_range(gpio, &pctldev, &range); |
57b676f9 SW |
429 | if (ret) { |
430 | mutex_unlock(&pinctrl_mutex); | |
befe5bdf | 431 | return; |
57b676f9 | 432 | } |
befe5bdf LW |
433 | |
434 | /* Convert to the pin controllers number space */ | |
435 | pin = gpio - range->base + range->pin_base; | |
436 | ||
57b676f9 SW |
437 | pinmux_free_gpio(pctldev, pin, range); |
438 | ||
439 | mutex_unlock(&pinctrl_mutex); | |
befe5bdf LW |
440 | } |
441 | EXPORT_SYMBOL_GPL(pinctrl_free_gpio); | |
442 | ||
443 | static int pinctrl_gpio_direction(unsigned gpio, bool input) | |
444 | { | |
445 | struct pinctrl_dev *pctldev; | |
446 | struct pinctrl_gpio_range *range; | |
447 | int ret; | |
448 | int pin; | |
449 | ||
450 | ret = pinctrl_get_device_gpio_range(gpio, &pctldev, &range); | |
451 | if (ret) | |
452 | return ret; | |
453 | ||
454 | /* Convert to the pin controllers number space */ | |
455 | pin = gpio - range->base + range->pin_base; | |
456 | ||
457 | return pinmux_gpio_direction(pctldev, range, pin, input); | |
458 | } | |
459 | ||
460 | /** | |
461 | * pinctrl_gpio_direction_input() - request a GPIO pin to go into input mode | |
462 | * @gpio: the GPIO pin number from the GPIO subsystem number space | |
463 | * | |
464 | * This function should *ONLY* be used from gpiolib-based GPIO drivers, | |
465 | * as part of their gpio_direction_input() semantics, platforms and individual | |
466 | * drivers shall *NOT* touch pin control GPIO calls. | |
467 | */ | |
468 | int pinctrl_gpio_direction_input(unsigned gpio) | |
469 | { | |
57b676f9 SW |
470 | int ret; |
471 | mutex_lock(&pinctrl_mutex); | |
472 | ret = pinctrl_gpio_direction(gpio, true); | |
473 | mutex_unlock(&pinctrl_mutex); | |
474 | return ret; | |
befe5bdf LW |
475 | } |
476 | EXPORT_SYMBOL_GPL(pinctrl_gpio_direction_input); | |
477 | ||
478 | /** | |
479 | * pinctrl_gpio_direction_output() - request a GPIO pin to go into output mode | |
480 | * @gpio: the GPIO pin number from the GPIO subsystem number space | |
481 | * | |
482 | * This function should *ONLY* be used from gpiolib-based GPIO drivers, | |
483 | * as part of their gpio_direction_output() semantics, platforms and individual | |
484 | * drivers shall *NOT* touch pin control GPIO calls. | |
485 | */ | |
486 | int pinctrl_gpio_direction_output(unsigned gpio) | |
487 | { | |
57b676f9 SW |
488 | int ret; |
489 | mutex_lock(&pinctrl_mutex); | |
490 | ret = pinctrl_gpio_direction(gpio, false); | |
491 | mutex_unlock(&pinctrl_mutex); | |
492 | return ret; | |
befe5bdf LW |
493 | } |
494 | EXPORT_SYMBOL_GPL(pinctrl_gpio_direction_output); | |
495 | ||
6e5e959d SW |
496 | static struct pinctrl_state *find_state(struct pinctrl *p, |
497 | const char *name) | |
befe5bdf | 498 | { |
6e5e959d SW |
499 | struct pinctrl_state *state; |
500 | ||
501 | list_for_each_entry(state, &p->states, node) | |
502 | if (!strcmp(state->name, name)) | |
503 | return state; | |
504 | ||
505 | return NULL; | |
506 | } | |
507 | ||
508 | static struct pinctrl_state *create_state(struct pinctrl *p, | |
509 | const char *name) | |
510 | { | |
511 | struct pinctrl_state *state; | |
512 | ||
513 | state = kzalloc(sizeof(*state), GFP_KERNEL); | |
514 | if (state == NULL) { | |
515 | dev_err(p->dev, | |
516 | "failed to alloc struct pinctrl_state\n"); | |
517 | return ERR_PTR(-ENOMEM); | |
518 | } | |
519 | ||
520 | state->name = name; | |
521 | INIT_LIST_HEAD(&state->settings); | |
522 | ||
523 | list_add_tail(&state->node, &p->states); | |
524 | ||
525 | return state; | |
526 | } | |
527 | ||
528 | static int add_setting(struct pinctrl *p, struct pinctrl_map const *map) | |
529 | { | |
530 | struct pinctrl_state *state; | |
7ecdb16f | 531 | struct pinctrl_setting *setting; |
6e5e959d | 532 | int ret; |
befe5bdf | 533 | |
6e5e959d SW |
534 | state = find_state(p, map->name); |
535 | if (!state) | |
536 | state = create_state(p, map->name); | |
537 | if (IS_ERR(state)) | |
538 | return PTR_ERR(state); | |
befe5bdf | 539 | |
1e2082b5 SW |
540 | if (map->type == PIN_MAP_TYPE_DUMMY_STATE) |
541 | return 0; | |
542 | ||
6e5e959d SW |
543 | setting = kzalloc(sizeof(*setting), GFP_KERNEL); |
544 | if (setting == NULL) { | |
545 | dev_err(p->dev, | |
546 | "failed to alloc struct pinctrl_setting\n"); | |
547 | return -ENOMEM; | |
548 | } | |
befe5bdf | 549 | |
1e2082b5 SW |
550 | setting->type = map->type; |
551 | ||
6e5e959d SW |
552 | setting->pctldev = get_pinctrl_dev_from_devname(map->ctrl_dev_name); |
553 | if (setting->pctldev == NULL) { | |
c05127c4 | 554 | dev_info(p->dev, "unknown pinctrl device %s in map entry, deferring probe", |
6e5e959d SW |
555 | map->ctrl_dev_name); |
556 | kfree(setting); | |
c05127c4 LW |
557 | /* |
558 | * OK let us guess that the driver is not there yet, and | |
559 | * let's defer obtaining this pinctrl handle to later... | |
560 | */ | |
561 | return -EPROBE_DEFER; | |
6e5e959d SW |
562 | } |
563 | ||
1e2082b5 SW |
564 | switch (map->type) { |
565 | case PIN_MAP_TYPE_MUX_GROUP: | |
566 | ret = pinmux_map_to_setting(map, setting); | |
567 | break; | |
568 | case PIN_MAP_TYPE_CONFIGS_PIN: | |
569 | case PIN_MAP_TYPE_CONFIGS_GROUP: | |
570 | ret = pinconf_map_to_setting(map, setting); | |
571 | break; | |
572 | default: | |
573 | ret = -EINVAL; | |
574 | break; | |
575 | } | |
6e5e959d SW |
576 | if (ret < 0) { |
577 | kfree(setting); | |
578 | return ret; | |
579 | } | |
580 | ||
581 | list_add_tail(&setting->node, &state->settings); | |
582 | ||
583 | return 0; | |
584 | } | |
585 | ||
586 | static struct pinctrl *find_pinctrl(struct device *dev) | |
587 | { | |
588 | struct pinctrl *p; | |
589 | ||
1e2082b5 | 590 | list_for_each_entry(p, &pinctrl_list, node) |
6e5e959d SW |
591 | if (p->dev == dev) |
592 | return p; | |
593 | ||
594 | return NULL; | |
595 | } | |
596 | ||
597 | static void pinctrl_put_locked(struct pinctrl *p, bool inlist); | |
598 | ||
599 | static struct pinctrl *create_pinctrl(struct device *dev) | |
600 | { | |
601 | struct pinctrl *p; | |
602 | const char *devname; | |
603 | struct pinctrl_maps *maps_node; | |
604 | int i; | |
605 | struct pinctrl_map const *map; | |
606 | int ret; | |
befe5bdf LW |
607 | |
608 | /* | |
609 | * create the state cookie holder struct pinctrl for each | |
610 | * mapping, this is what consumers will get when requesting | |
611 | * a pin control handle with pinctrl_get() | |
612 | */ | |
02f5b989 | 613 | p = kzalloc(sizeof(*p), GFP_KERNEL); |
95dcd4ae SW |
614 | if (p == NULL) { |
615 | dev_err(dev, "failed to alloc struct pinctrl\n"); | |
befe5bdf | 616 | return ERR_PTR(-ENOMEM); |
95dcd4ae | 617 | } |
7ecdb16f | 618 | p->dev = dev; |
6e5e959d | 619 | INIT_LIST_HEAD(&p->states); |
57291ce2 SW |
620 | INIT_LIST_HEAD(&p->dt_maps); |
621 | ||
622 | ret = pinctrl_dt_to_map(p); | |
623 | if (ret < 0) { | |
624 | kfree(p); | |
625 | return ERR_PTR(ret); | |
626 | } | |
6e5e959d SW |
627 | |
628 | devname = dev_name(dev); | |
befe5bdf LW |
629 | |
630 | /* Iterate over the pin control maps to locate the right ones */ | |
b2b3e66e | 631 | for_each_maps(maps_node, i, map) { |
7ecdb16f SW |
632 | /* Map must be for this device */ |
633 | if (strcmp(map->dev_name, devname)) | |
634 | continue; | |
635 | ||
6e5e959d SW |
636 | ret = add_setting(p, map); |
637 | if (ret < 0) { | |
638 | pinctrl_put_locked(p, false); | |
639 | return ERR_PTR(ret); | |
7ecdb16f | 640 | } |
befe5bdf LW |
641 | } |
642 | ||
befe5bdf | 643 | /* Add the pinmux to the global list */ |
8b9c139f | 644 | list_add_tail(&p->node, &pinctrl_list); |
befe5bdf LW |
645 | |
646 | return p; | |
6e5e959d | 647 | } |
7ecdb16f | 648 | |
6e5e959d SW |
649 | static struct pinctrl *pinctrl_get_locked(struct device *dev) |
650 | { | |
651 | struct pinctrl *p; | |
7ecdb16f | 652 | |
6e5e959d SW |
653 | if (WARN_ON(!dev)) |
654 | return ERR_PTR(-EINVAL); | |
655 | ||
656 | p = find_pinctrl(dev); | |
657 | if (p != NULL) | |
658 | return ERR_PTR(-EBUSY); | |
7ecdb16f | 659 | |
6e5e959d SW |
660 | p = create_pinctrl(dev); |
661 | if (IS_ERR(p)) | |
662 | return p; | |
663 | ||
664 | return p; | |
befe5bdf | 665 | } |
b2b3e66e SW |
666 | |
667 | /** | |
6e5e959d SW |
668 | * pinctrl_get() - retrieves the pinctrl handle for a device |
669 | * @dev: the device to obtain the handle for | |
b2b3e66e | 670 | */ |
6e5e959d | 671 | struct pinctrl *pinctrl_get(struct device *dev) |
b2b3e66e SW |
672 | { |
673 | struct pinctrl *p; | |
674 | ||
57b676f9 | 675 | mutex_lock(&pinctrl_mutex); |
6e5e959d | 676 | p = pinctrl_get_locked(dev); |
57b676f9 | 677 | mutex_unlock(&pinctrl_mutex); |
b2b3e66e SW |
678 | |
679 | return p; | |
680 | } | |
befe5bdf LW |
681 | EXPORT_SYMBOL_GPL(pinctrl_get); |
682 | ||
6e5e959d | 683 | static void pinctrl_put_locked(struct pinctrl *p, bool inlist) |
befe5bdf | 684 | { |
6e5e959d SW |
685 | struct pinctrl_state *state, *n1; |
686 | struct pinctrl_setting *setting, *n2; | |
687 | ||
688 | list_for_each_entry_safe(state, n1, &p->states, node) { | |
689 | list_for_each_entry_safe(setting, n2, &state->settings, node) { | |
1e2082b5 SW |
690 | switch (setting->type) { |
691 | case PIN_MAP_TYPE_MUX_GROUP: | |
692 | if (state == p->state) | |
693 | pinmux_disable_setting(setting); | |
694 | pinmux_free_setting(setting); | |
695 | break; | |
696 | case PIN_MAP_TYPE_CONFIGS_PIN: | |
697 | case PIN_MAP_TYPE_CONFIGS_GROUP: | |
698 | pinconf_free_setting(setting); | |
699 | break; | |
700 | default: | |
701 | break; | |
702 | } | |
6e5e959d SW |
703 | list_del(&setting->node); |
704 | kfree(setting); | |
705 | } | |
706 | list_del(&state->node); | |
707 | kfree(state); | |
7ecdb16f | 708 | } |
befe5bdf | 709 | |
57291ce2 SW |
710 | pinctrl_dt_free_maps(p); |
711 | ||
6e5e959d SW |
712 | if (inlist) |
713 | list_del(&p->node); | |
befe5bdf LW |
714 | kfree(p); |
715 | } | |
befe5bdf LW |
716 | |
717 | /** | |
6e5e959d SW |
718 | * pinctrl_put() - release a previously claimed pinctrl handle |
719 | * @p: the pinctrl handle to release | |
befe5bdf | 720 | */ |
57b676f9 SW |
721 | void pinctrl_put(struct pinctrl *p) |
722 | { | |
723 | mutex_lock(&pinctrl_mutex); | |
6e5e959d | 724 | pinctrl_put_locked(p, true); |
57b676f9 SW |
725 | mutex_unlock(&pinctrl_mutex); |
726 | } | |
727 | EXPORT_SYMBOL_GPL(pinctrl_put); | |
728 | ||
6e5e959d SW |
729 | static struct pinctrl_state *pinctrl_lookup_state_locked(struct pinctrl *p, |
730 | const char *name) | |
befe5bdf | 731 | { |
6e5e959d | 732 | struct pinctrl_state *state; |
befe5bdf | 733 | |
6e5e959d | 734 | state = find_state(p, name); |
5b3aa5f7 DA |
735 | if (!state) { |
736 | if (pinctrl_dummy_state) { | |
737 | /* create dummy state */ | |
738 | dev_dbg(p->dev, "using pinctrl dummy state (%s)\n", | |
739 | name); | |
740 | state = create_state(p, name); | |
741 | if (IS_ERR(state)) | |
742 | return state; | |
743 | } else { | |
744 | return ERR_PTR(-ENODEV); | |
745 | } | |
746 | } | |
57b676f9 | 747 | |
6e5e959d | 748 | return state; |
befe5bdf | 749 | } |
befe5bdf LW |
750 | |
751 | /** | |
6e5e959d SW |
752 | * pinctrl_lookup_state() - retrieves a state handle from a pinctrl handle |
753 | * @p: the pinctrl handle to retrieve the state from | |
754 | * @name: the state name to retrieve | |
befe5bdf | 755 | */ |
6e5e959d | 756 | struct pinctrl_state *pinctrl_lookup_state(struct pinctrl *p, const char *name) |
57b676f9 | 757 | { |
6e5e959d SW |
758 | struct pinctrl_state *s; |
759 | ||
57b676f9 | 760 | mutex_lock(&pinctrl_mutex); |
6e5e959d | 761 | s = pinctrl_lookup_state_locked(p, name); |
57b676f9 | 762 | mutex_unlock(&pinctrl_mutex); |
6e5e959d SW |
763 | |
764 | return s; | |
57b676f9 | 765 | } |
6e5e959d | 766 | EXPORT_SYMBOL_GPL(pinctrl_lookup_state); |
57b676f9 | 767 | |
6e5e959d SW |
768 | static int pinctrl_select_state_locked(struct pinctrl *p, |
769 | struct pinctrl_state *state) | |
befe5bdf | 770 | { |
6e5e959d SW |
771 | struct pinctrl_setting *setting, *setting2; |
772 | int ret; | |
7ecdb16f | 773 | |
6e5e959d SW |
774 | if (p->state == state) |
775 | return 0; | |
befe5bdf | 776 | |
6e5e959d SW |
777 | if (p->state) { |
778 | /* | |
779 | * The set of groups with a mux configuration in the old state | |
780 | * may not be identical to the set of groups with a mux setting | |
781 | * in the new state. While this might be unusual, it's entirely | |
782 | * possible for the "user"-supplied mapping table to be written | |
783 | * that way. For each group that was configured in the old state | |
784 | * but not in the new state, this code puts that group into a | |
785 | * safe/disabled state. | |
786 | */ | |
787 | list_for_each_entry(setting, &p->state->settings, node) { | |
788 | bool found = false; | |
1e2082b5 SW |
789 | if (setting->type != PIN_MAP_TYPE_MUX_GROUP) |
790 | continue; | |
6e5e959d | 791 | list_for_each_entry(setting2, &state->settings, node) { |
1e2082b5 SW |
792 | if (setting2->type != PIN_MAP_TYPE_MUX_GROUP) |
793 | continue; | |
794 | if (setting2->data.mux.group == | |
795 | setting->data.mux.group) { | |
6e5e959d SW |
796 | found = true; |
797 | break; | |
798 | } | |
799 | } | |
800 | if (!found) | |
801 | pinmux_disable_setting(setting); | |
802 | } | |
803 | } | |
804 | ||
805 | p->state = state; | |
806 | ||
807 | /* Apply all the settings for the new state */ | |
808 | list_for_each_entry(setting, &state->settings, node) { | |
1e2082b5 SW |
809 | switch (setting->type) { |
810 | case PIN_MAP_TYPE_MUX_GROUP: | |
811 | ret = pinmux_enable_setting(setting); | |
812 | break; | |
813 | case PIN_MAP_TYPE_CONFIGS_PIN: | |
814 | case PIN_MAP_TYPE_CONFIGS_GROUP: | |
815 | ret = pinconf_apply_setting(setting); | |
816 | break; | |
817 | default: | |
818 | ret = -EINVAL; | |
819 | break; | |
820 | } | |
6e5e959d SW |
821 | if (ret < 0) { |
822 | /* FIXME: Difficult to return to prev state */ | |
823 | return ret; | |
824 | } | |
befe5bdf | 825 | } |
6e5e959d SW |
826 | |
827 | return 0; | |
57b676f9 SW |
828 | } |
829 | ||
830 | /** | |
6e5e959d SW |
831 | * pinctrl_select() - select/activate/program a pinctrl state to HW |
832 | * @p: the pinctrl handle for the device that requests configuratio | |
833 | * @state: the state handle to select/activate/program | |
57b676f9 | 834 | */ |
6e5e959d | 835 | int pinctrl_select_state(struct pinctrl *p, struct pinctrl_state *state) |
57b676f9 | 836 | { |
6e5e959d SW |
837 | int ret; |
838 | ||
57b676f9 | 839 | mutex_lock(&pinctrl_mutex); |
6e5e959d | 840 | ret = pinctrl_select_state_locked(p, state); |
57b676f9 | 841 | mutex_unlock(&pinctrl_mutex); |
6e5e959d SW |
842 | |
843 | return ret; | |
befe5bdf | 844 | } |
6e5e959d | 845 | EXPORT_SYMBOL_GPL(pinctrl_select_state); |
befe5bdf | 846 | |
6d4ca1fb SW |
847 | static void devm_pinctrl_release(struct device *dev, void *res) |
848 | { | |
849 | pinctrl_put(*(struct pinctrl **)res); | |
850 | } | |
851 | ||
852 | /** | |
853 | * struct devm_pinctrl_get() - Resource managed pinctrl_get() | |
854 | * @dev: the device to obtain the handle for | |
855 | * | |
856 | * If there is a need to explicitly destroy the returned struct pinctrl, | |
857 | * devm_pinctrl_put() should be used, rather than plain pinctrl_put(). | |
858 | */ | |
859 | struct pinctrl *devm_pinctrl_get(struct device *dev) | |
860 | { | |
861 | struct pinctrl **ptr, *p; | |
862 | ||
863 | ptr = devres_alloc(devm_pinctrl_release, sizeof(*ptr), GFP_KERNEL); | |
864 | if (!ptr) | |
865 | return ERR_PTR(-ENOMEM); | |
866 | ||
867 | p = pinctrl_get(dev); | |
868 | if (!IS_ERR(p)) { | |
869 | *ptr = p; | |
870 | devres_add(dev, ptr); | |
871 | } else { | |
872 | devres_free(ptr); | |
873 | } | |
874 | ||
875 | return p; | |
876 | } | |
877 | EXPORT_SYMBOL_GPL(devm_pinctrl_get); | |
878 | ||
879 | static int devm_pinctrl_match(struct device *dev, void *res, void *data) | |
880 | { | |
881 | struct pinctrl **p = res; | |
882 | ||
883 | return *p == data; | |
884 | } | |
885 | ||
886 | /** | |
887 | * devm_pinctrl_put() - Resource managed pinctrl_put() | |
888 | * @p: the pinctrl handle to release | |
889 | * | |
890 | * Deallocate a struct pinctrl obtained via devm_pinctrl_get(). Normally | |
891 | * this function will not need to be called and the resource management | |
892 | * code will ensure that the resource is freed. | |
893 | */ | |
894 | void devm_pinctrl_put(struct pinctrl *p) | |
895 | { | |
896 | WARN_ON(devres_destroy(p->dev, devm_pinctrl_release, | |
897 | devm_pinctrl_match, p)); | |
898 | pinctrl_put(p); | |
899 | } | |
900 | EXPORT_SYMBOL_GPL(devm_pinctrl_put); | |
901 | ||
57291ce2 SW |
902 | int pinctrl_register_map(struct pinctrl_map const *maps, unsigned num_maps, |
903 | bool dup, bool locked) | |
befe5bdf | 904 | { |
1e2082b5 | 905 | int i, ret; |
b2b3e66e | 906 | struct pinctrl_maps *maps_node; |
befe5bdf LW |
907 | |
908 | pr_debug("add %d pinmux maps\n", num_maps); | |
909 | ||
910 | /* First sanity check the new mapping */ | |
911 | for (i = 0; i < num_maps; i++) { | |
1e2082b5 SW |
912 | if (!maps[i].dev_name) { |
913 | pr_err("failed to register map %s (%d): no device given\n", | |
914 | maps[i].name, i); | |
915 | return -EINVAL; | |
916 | } | |
917 | ||
befe5bdf LW |
918 | if (!maps[i].name) { |
919 | pr_err("failed to register map %d: no map name given\n", | |
95dcd4ae | 920 | i); |
befe5bdf LW |
921 | return -EINVAL; |
922 | } | |
923 | ||
1e2082b5 SW |
924 | if (maps[i].type != PIN_MAP_TYPE_DUMMY_STATE && |
925 | !maps[i].ctrl_dev_name) { | |
befe5bdf LW |
926 | pr_err("failed to register map %s (%d): no pin control device given\n", |
927 | maps[i].name, i); | |
928 | return -EINVAL; | |
929 | } | |
930 | ||
1e2082b5 SW |
931 | switch (maps[i].type) { |
932 | case PIN_MAP_TYPE_DUMMY_STATE: | |
933 | break; | |
934 | case PIN_MAP_TYPE_MUX_GROUP: | |
935 | ret = pinmux_validate_map(&maps[i], i); | |
936 | if (ret < 0) | |
fde04f41 | 937 | return ret; |
1e2082b5 SW |
938 | break; |
939 | case PIN_MAP_TYPE_CONFIGS_PIN: | |
940 | case PIN_MAP_TYPE_CONFIGS_GROUP: | |
941 | ret = pinconf_validate_map(&maps[i], i); | |
942 | if (ret < 0) | |
fde04f41 | 943 | return ret; |
1e2082b5 SW |
944 | break; |
945 | default: | |
946 | pr_err("failed to register map %s (%d): invalid type given\n", | |
95dcd4ae | 947 | maps[i].name, i); |
1681f5ae SW |
948 | return -EINVAL; |
949 | } | |
befe5bdf LW |
950 | } |
951 | ||
b2b3e66e SW |
952 | maps_node = kzalloc(sizeof(*maps_node), GFP_KERNEL); |
953 | if (!maps_node) { | |
954 | pr_err("failed to alloc struct pinctrl_maps\n"); | |
955 | return -ENOMEM; | |
956 | } | |
befe5bdf | 957 | |
b2b3e66e | 958 | maps_node->num_maps = num_maps; |
57291ce2 SW |
959 | if (dup) { |
960 | maps_node->maps = kmemdup(maps, sizeof(*maps) * num_maps, | |
961 | GFP_KERNEL); | |
962 | if (!maps_node->maps) { | |
963 | pr_err("failed to duplicate mapping table\n"); | |
964 | kfree(maps_node); | |
965 | return -ENOMEM; | |
966 | } | |
967 | } else { | |
968 | maps_node->maps = maps; | |
befe5bdf LW |
969 | } |
970 | ||
57291ce2 SW |
971 | if (!locked) |
972 | mutex_lock(&pinctrl_mutex); | |
b2b3e66e | 973 | list_add_tail(&maps_node->node, &pinctrl_maps); |
57291ce2 SW |
974 | if (!locked) |
975 | mutex_unlock(&pinctrl_mutex); | |
b2b3e66e | 976 | |
befe5bdf LW |
977 | return 0; |
978 | } | |
979 | ||
57291ce2 SW |
980 | /** |
981 | * pinctrl_register_mappings() - register a set of pin controller mappings | |
982 | * @maps: the pincontrol mappings table to register. This should probably be | |
983 | * marked with __initdata so it can be discarded after boot. This | |
984 | * function will perform a shallow copy for the mapping entries. | |
985 | * @num_maps: the number of maps in the mapping table | |
986 | */ | |
987 | int pinctrl_register_mappings(struct pinctrl_map const *maps, | |
988 | unsigned num_maps) | |
989 | { | |
990 | return pinctrl_register_map(maps, num_maps, true, false); | |
991 | } | |
992 | ||
993 | void pinctrl_unregister_map(struct pinctrl_map const *map) | |
994 | { | |
995 | struct pinctrl_maps *maps_node; | |
996 | ||
997 | list_for_each_entry(maps_node, &pinctrl_maps, node) { | |
998 | if (maps_node->maps == map) { | |
999 | list_del(&maps_node->node); | |
1000 | return; | |
1001 | } | |
1002 | } | |
1003 | } | |
1004 | ||
2744e8af LW |
1005 | #ifdef CONFIG_DEBUG_FS |
1006 | ||
1007 | static int pinctrl_pins_show(struct seq_file *s, void *what) | |
1008 | { | |
1009 | struct pinctrl_dev *pctldev = s->private; | |
1010 | const struct pinctrl_ops *ops = pctldev->desc->pctlops; | |
706e8520 | 1011 | unsigned i, pin; |
2744e8af LW |
1012 | |
1013 | seq_printf(s, "registered pins: %d\n", pctldev->desc->npins); | |
2744e8af | 1014 | |
57b676f9 SW |
1015 | mutex_lock(&pinctrl_mutex); |
1016 | ||
706e8520 CP |
1017 | /* The pin number can be retrived from the pin controller descriptor */ |
1018 | for (i = 0; i < pctldev->desc->npins; i++) { | |
2744e8af LW |
1019 | struct pin_desc *desc; |
1020 | ||
706e8520 | 1021 | pin = pctldev->desc->pins[i].number; |
2744e8af LW |
1022 | desc = pin_desc_get(pctldev, pin); |
1023 | /* Pin space may be sparse */ | |
1024 | if (desc == NULL) | |
1025 | continue; | |
1026 | ||
1027 | seq_printf(s, "pin %d (%s) ", pin, | |
1028 | desc->name ? desc->name : "unnamed"); | |
1029 | ||
1030 | /* Driver-specific info per pin */ | |
1031 | if (ops->pin_dbg_show) | |
1032 | ops->pin_dbg_show(pctldev, s, pin); | |
1033 | ||
1034 | seq_puts(s, "\n"); | |
1035 | } | |
1036 | ||
57b676f9 SW |
1037 | mutex_unlock(&pinctrl_mutex); |
1038 | ||
2744e8af LW |
1039 | return 0; |
1040 | } | |
1041 | ||
1042 | static int pinctrl_groups_show(struct seq_file *s, void *what) | |
1043 | { | |
1044 | struct pinctrl_dev *pctldev = s->private; | |
1045 | const struct pinctrl_ops *ops = pctldev->desc->pctlops; | |
d1e90e9e | 1046 | unsigned ngroups, selector = 0; |
2744e8af | 1047 | |
d1e90e9e | 1048 | ngroups = ops->get_groups_count(pctldev); |
57b676f9 SW |
1049 | mutex_lock(&pinctrl_mutex); |
1050 | ||
2744e8af | 1051 | seq_puts(s, "registered pin groups:\n"); |
d1e90e9e | 1052 | while (selector < ngroups) { |
a5818a8b | 1053 | const unsigned *pins; |
2744e8af LW |
1054 | unsigned num_pins; |
1055 | const char *gname = ops->get_group_name(pctldev, selector); | |
dcb5dbc3 | 1056 | const char *pname; |
2744e8af LW |
1057 | int ret; |
1058 | int i; | |
1059 | ||
1060 | ret = ops->get_group_pins(pctldev, selector, | |
1061 | &pins, &num_pins); | |
1062 | if (ret) | |
1063 | seq_printf(s, "%s [ERROR GETTING PINS]\n", | |
1064 | gname); | |
1065 | else { | |
dcb5dbc3 DA |
1066 | seq_printf(s, "group: %s\n", gname); |
1067 | for (i = 0; i < num_pins; i++) { | |
1068 | pname = pin_get_name(pctldev, pins[i]); | |
1069 | if (WARN_ON(!pname)) | |
1070 | return -EINVAL; | |
1071 | seq_printf(s, "pin %d (%s)\n", pins[i], pname); | |
1072 | } | |
1073 | seq_puts(s, "\n"); | |
2744e8af LW |
1074 | } |
1075 | selector++; | |
1076 | } | |
1077 | ||
57b676f9 | 1078 | mutex_unlock(&pinctrl_mutex); |
2744e8af LW |
1079 | |
1080 | return 0; | |
1081 | } | |
1082 | ||
1083 | static int pinctrl_gpioranges_show(struct seq_file *s, void *what) | |
1084 | { | |
1085 | struct pinctrl_dev *pctldev = s->private; | |
1086 | struct pinctrl_gpio_range *range = NULL; | |
1087 | ||
1088 | seq_puts(s, "GPIO ranges handled:\n"); | |
1089 | ||
57b676f9 SW |
1090 | mutex_lock(&pinctrl_mutex); |
1091 | ||
2744e8af | 1092 | /* Loop over the ranges */ |
2744e8af | 1093 | list_for_each_entry(range, &pctldev->gpio_ranges, node) { |
75d6642a LW |
1094 | seq_printf(s, "%u: %s GPIOS [%u - %u] PINS [%u - %u]\n", |
1095 | range->id, range->name, | |
1096 | range->base, (range->base + range->npins - 1), | |
1097 | range->pin_base, | |
1098 | (range->pin_base + range->npins - 1)); | |
2744e8af | 1099 | } |
57b676f9 SW |
1100 | |
1101 | mutex_unlock(&pinctrl_mutex); | |
2744e8af LW |
1102 | |
1103 | return 0; | |
1104 | } | |
1105 | ||
1106 | static int pinctrl_devices_show(struct seq_file *s, void *what) | |
1107 | { | |
1108 | struct pinctrl_dev *pctldev; | |
1109 | ||
ae6b4d85 | 1110 | seq_puts(s, "name [pinmux] [pinconf]\n"); |
57b676f9 SW |
1111 | |
1112 | mutex_lock(&pinctrl_mutex); | |
1113 | ||
2744e8af LW |
1114 | list_for_each_entry(pctldev, &pinctrldev_list, node) { |
1115 | seq_printf(s, "%s ", pctldev->desc->name); | |
1116 | if (pctldev->desc->pmxops) | |
ae6b4d85 LW |
1117 | seq_puts(s, "yes "); |
1118 | else | |
1119 | seq_puts(s, "no "); | |
1120 | if (pctldev->desc->confops) | |
2744e8af LW |
1121 | seq_puts(s, "yes"); |
1122 | else | |
1123 | seq_puts(s, "no"); | |
1124 | seq_puts(s, "\n"); | |
1125 | } | |
57b676f9 SW |
1126 | |
1127 | mutex_unlock(&pinctrl_mutex); | |
2744e8af LW |
1128 | |
1129 | return 0; | |
1130 | } | |
1131 | ||
1e2082b5 SW |
1132 | static inline const char *map_type(enum pinctrl_map_type type) |
1133 | { | |
1134 | static const char * const names[] = { | |
1135 | "INVALID", | |
1136 | "DUMMY_STATE", | |
1137 | "MUX_GROUP", | |
1138 | "CONFIGS_PIN", | |
1139 | "CONFIGS_GROUP", | |
1140 | }; | |
1141 | ||
1142 | if (type >= ARRAY_SIZE(names)) | |
1143 | return "UNKNOWN"; | |
1144 | ||
1145 | return names[type]; | |
1146 | } | |
1147 | ||
3eedb437 SW |
1148 | static int pinctrl_maps_show(struct seq_file *s, void *what) |
1149 | { | |
1150 | struct pinctrl_maps *maps_node; | |
1151 | int i; | |
1152 | struct pinctrl_map const *map; | |
1153 | ||
1154 | seq_puts(s, "Pinctrl maps:\n"); | |
1155 | ||
57b676f9 SW |
1156 | mutex_lock(&pinctrl_mutex); |
1157 | ||
3eedb437 | 1158 | for_each_maps(maps_node, i, map) { |
1e2082b5 SW |
1159 | seq_printf(s, "device %s\nstate %s\ntype %s (%d)\n", |
1160 | map->dev_name, map->name, map_type(map->type), | |
1161 | map->type); | |
1162 | ||
1163 | if (map->type != PIN_MAP_TYPE_DUMMY_STATE) | |
1164 | seq_printf(s, "controlling device %s\n", | |
1165 | map->ctrl_dev_name); | |
1166 | ||
1167 | switch (map->type) { | |
1168 | case PIN_MAP_TYPE_MUX_GROUP: | |
1169 | pinmux_show_map(s, map); | |
1170 | break; | |
1171 | case PIN_MAP_TYPE_CONFIGS_PIN: | |
1172 | case PIN_MAP_TYPE_CONFIGS_GROUP: | |
1173 | pinconf_show_map(s, map); | |
1174 | break; | |
1175 | default: | |
1176 | break; | |
1177 | } | |
1178 | ||
1179 | seq_printf(s, "\n"); | |
3eedb437 | 1180 | } |
57b676f9 SW |
1181 | |
1182 | mutex_unlock(&pinctrl_mutex); | |
3eedb437 SW |
1183 | |
1184 | return 0; | |
1185 | } | |
1186 | ||
befe5bdf LW |
1187 | static int pinctrl_show(struct seq_file *s, void *what) |
1188 | { | |
1189 | struct pinctrl *p; | |
6e5e959d | 1190 | struct pinctrl_state *state; |
7ecdb16f | 1191 | struct pinctrl_setting *setting; |
befe5bdf LW |
1192 | |
1193 | seq_puts(s, "Requested pin control handlers their pinmux maps:\n"); | |
57b676f9 SW |
1194 | |
1195 | mutex_lock(&pinctrl_mutex); | |
1196 | ||
befe5bdf | 1197 | list_for_each_entry(p, &pinctrl_list, node) { |
6e5e959d SW |
1198 | seq_printf(s, "device: %s current state: %s\n", |
1199 | dev_name(p->dev), | |
1200 | p->state ? p->state->name : "none"); | |
1201 | ||
1202 | list_for_each_entry(state, &p->states, node) { | |
1203 | seq_printf(s, " state: %s\n", state->name); | |
befe5bdf | 1204 | |
6e5e959d | 1205 | list_for_each_entry(setting, &state->settings, node) { |
1e2082b5 SW |
1206 | struct pinctrl_dev *pctldev = setting->pctldev; |
1207 | ||
1208 | seq_printf(s, " type: %s controller %s ", | |
1209 | map_type(setting->type), | |
1210 | pinctrl_dev_get_name(pctldev)); | |
1211 | ||
1212 | switch (setting->type) { | |
1213 | case PIN_MAP_TYPE_MUX_GROUP: | |
1214 | pinmux_show_setting(s, setting); | |
1215 | break; | |
1216 | case PIN_MAP_TYPE_CONFIGS_PIN: | |
1217 | case PIN_MAP_TYPE_CONFIGS_GROUP: | |
1218 | pinconf_show_setting(s, setting); | |
1219 | break; | |
1220 | default: | |
1221 | break; | |
1222 | } | |
6e5e959d | 1223 | } |
befe5bdf | 1224 | } |
befe5bdf LW |
1225 | } |
1226 | ||
57b676f9 SW |
1227 | mutex_unlock(&pinctrl_mutex); |
1228 | ||
befe5bdf LW |
1229 | return 0; |
1230 | } | |
1231 | ||
2744e8af LW |
1232 | static int pinctrl_pins_open(struct inode *inode, struct file *file) |
1233 | { | |
1234 | return single_open(file, pinctrl_pins_show, inode->i_private); | |
1235 | } | |
1236 | ||
1237 | static int pinctrl_groups_open(struct inode *inode, struct file *file) | |
1238 | { | |
1239 | return single_open(file, pinctrl_groups_show, inode->i_private); | |
1240 | } | |
1241 | ||
1242 | static int pinctrl_gpioranges_open(struct inode *inode, struct file *file) | |
1243 | { | |
1244 | return single_open(file, pinctrl_gpioranges_show, inode->i_private); | |
1245 | } | |
1246 | ||
1247 | static int pinctrl_devices_open(struct inode *inode, struct file *file) | |
1248 | { | |
1249 | return single_open(file, pinctrl_devices_show, NULL); | |
1250 | } | |
1251 | ||
3eedb437 SW |
1252 | static int pinctrl_maps_open(struct inode *inode, struct file *file) |
1253 | { | |
1254 | return single_open(file, pinctrl_maps_show, NULL); | |
1255 | } | |
1256 | ||
befe5bdf LW |
1257 | static int pinctrl_open(struct inode *inode, struct file *file) |
1258 | { | |
1259 | return single_open(file, pinctrl_show, NULL); | |
1260 | } | |
1261 | ||
2744e8af LW |
1262 | static const struct file_operations pinctrl_pins_ops = { |
1263 | .open = pinctrl_pins_open, | |
1264 | .read = seq_read, | |
1265 | .llseek = seq_lseek, | |
1266 | .release = single_release, | |
1267 | }; | |
1268 | ||
1269 | static const struct file_operations pinctrl_groups_ops = { | |
1270 | .open = pinctrl_groups_open, | |
1271 | .read = seq_read, | |
1272 | .llseek = seq_lseek, | |
1273 | .release = single_release, | |
1274 | }; | |
1275 | ||
1276 | static const struct file_operations pinctrl_gpioranges_ops = { | |
1277 | .open = pinctrl_gpioranges_open, | |
1278 | .read = seq_read, | |
1279 | .llseek = seq_lseek, | |
1280 | .release = single_release, | |
1281 | }; | |
1282 | ||
3eedb437 SW |
1283 | static const struct file_operations pinctrl_devices_ops = { |
1284 | .open = pinctrl_devices_open, | |
befe5bdf LW |
1285 | .read = seq_read, |
1286 | .llseek = seq_lseek, | |
1287 | .release = single_release, | |
1288 | }; | |
1289 | ||
3eedb437 SW |
1290 | static const struct file_operations pinctrl_maps_ops = { |
1291 | .open = pinctrl_maps_open, | |
2744e8af LW |
1292 | .read = seq_read, |
1293 | .llseek = seq_lseek, | |
1294 | .release = single_release, | |
1295 | }; | |
1296 | ||
befe5bdf LW |
1297 | static const struct file_operations pinctrl_ops = { |
1298 | .open = pinctrl_open, | |
1299 | .read = seq_read, | |
1300 | .llseek = seq_lseek, | |
1301 | .release = single_release, | |
1302 | }; | |
1303 | ||
2744e8af LW |
1304 | static struct dentry *debugfs_root; |
1305 | ||
1306 | static void pinctrl_init_device_debugfs(struct pinctrl_dev *pctldev) | |
1307 | { | |
02157160 | 1308 | struct dentry *device_root; |
2744e8af | 1309 | |
51cd24ee | 1310 | device_root = debugfs_create_dir(dev_name(pctldev->dev), |
2744e8af | 1311 | debugfs_root); |
02157160 TL |
1312 | pctldev->device_root = device_root; |
1313 | ||
2744e8af LW |
1314 | if (IS_ERR(device_root) || !device_root) { |
1315 | pr_warn("failed to create debugfs directory for %s\n", | |
51cd24ee | 1316 | dev_name(pctldev->dev)); |
2744e8af LW |
1317 | return; |
1318 | } | |
1319 | debugfs_create_file("pins", S_IFREG | S_IRUGO, | |
1320 | device_root, pctldev, &pinctrl_pins_ops); | |
1321 | debugfs_create_file("pingroups", S_IFREG | S_IRUGO, | |
1322 | device_root, pctldev, &pinctrl_groups_ops); | |
1323 | debugfs_create_file("gpio-ranges", S_IFREG | S_IRUGO, | |
1324 | device_root, pctldev, &pinctrl_gpioranges_ops); | |
1325 | pinmux_init_device_debugfs(device_root, pctldev); | |
ae6b4d85 | 1326 | pinconf_init_device_debugfs(device_root, pctldev); |
2744e8af LW |
1327 | } |
1328 | ||
02157160 TL |
1329 | static void pinctrl_remove_device_debugfs(struct pinctrl_dev *pctldev) |
1330 | { | |
1331 | debugfs_remove_recursive(pctldev->device_root); | |
1332 | } | |
1333 | ||
2744e8af LW |
1334 | static void pinctrl_init_debugfs(void) |
1335 | { | |
1336 | debugfs_root = debugfs_create_dir("pinctrl", NULL); | |
1337 | if (IS_ERR(debugfs_root) || !debugfs_root) { | |
1338 | pr_warn("failed to create debugfs directory\n"); | |
1339 | debugfs_root = NULL; | |
1340 | return; | |
1341 | } | |
1342 | ||
1343 | debugfs_create_file("pinctrl-devices", S_IFREG | S_IRUGO, | |
1344 | debugfs_root, NULL, &pinctrl_devices_ops); | |
3eedb437 SW |
1345 | debugfs_create_file("pinctrl-maps", S_IFREG | S_IRUGO, |
1346 | debugfs_root, NULL, &pinctrl_maps_ops); | |
befe5bdf LW |
1347 | debugfs_create_file("pinctrl-handles", S_IFREG | S_IRUGO, |
1348 | debugfs_root, NULL, &pinctrl_ops); | |
2744e8af LW |
1349 | } |
1350 | ||
1351 | #else /* CONFIG_DEBUG_FS */ | |
1352 | ||
1353 | static void pinctrl_init_device_debugfs(struct pinctrl_dev *pctldev) | |
1354 | { | |
1355 | } | |
1356 | ||
1357 | static void pinctrl_init_debugfs(void) | |
1358 | { | |
1359 | } | |
1360 | ||
02157160 TL |
1361 | static void pinctrl_remove_device_debugfs(struct pinctrl_dev *pctldev) |
1362 | { | |
1363 | } | |
1364 | ||
2744e8af LW |
1365 | #endif |
1366 | ||
d26bc49f SW |
1367 | static int pinctrl_check_ops(struct pinctrl_dev *pctldev) |
1368 | { | |
1369 | const struct pinctrl_ops *ops = pctldev->desc->pctlops; | |
1370 | ||
1371 | if (!ops || | |
d1e90e9e | 1372 | !ops->get_groups_count || |
d26bc49f SW |
1373 | !ops->get_group_name || |
1374 | !ops->get_group_pins) | |
1375 | return -EINVAL; | |
1376 | ||
57291ce2 SW |
1377 | if (ops->dt_node_to_map && !ops->dt_free_map) |
1378 | return -EINVAL; | |
1379 | ||
d26bc49f SW |
1380 | return 0; |
1381 | } | |
1382 | ||
2744e8af LW |
1383 | /** |
1384 | * pinctrl_register() - register a pin controller device | |
1385 | * @pctldesc: descriptor for this pin controller | |
1386 | * @dev: parent device for this pin controller | |
1387 | * @driver_data: private pin controller data for this pin controller | |
1388 | */ | |
1389 | struct pinctrl_dev *pinctrl_register(struct pinctrl_desc *pctldesc, | |
1390 | struct device *dev, void *driver_data) | |
1391 | { | |
2744e8af LW |
1392 | struct pinctrl_dev *pctldev; |
1393 | int ret; | |
1394 | ||
da9aecb0 | 1395 | if (!pctldesc) |
2744e8af | 1396 | return NULL; |
da9aecb0 | 1397 | if (!pctldesc->name) |
2744e8af LW |
1398 | return NULL; |
1399 | ||
02f5b989 | 1400 | pctldev = kzalloc(sizeof(*pctldev), GFP_KERNEL); |
95dcd4ae SW |
1401 | if (pctldev == NULL) { |
1402 | dev_err(dev, "failed to alloc struct pinctrl_dev\n"); | |
b9130b77 | 1403 | return NULL; |
95dcd4ae | 1404 | } |
b9130b77 TL |
1405 | |
1406 | /* Initialize pin control device struct */ | |
1407 | pctldev->owner = pctldesc->owner; | |
1408 | pctldev->desc = pctldesc; | |
1409 | pctldev->driver_data = driver_data; | |
1410 | INIT_RADIX_TREE(&pctldev->pin_desc_tree, GFP_KERNEL); | |
b9130b77 | 1411 | INIT_LIST_HEAD(&pctldev->gpio_ranges); |
b9130b77 TL |
1412 | pctldev->dev = dev; |
1413 | ||
d26bc49f | 1414 | /* check core ops for sanity */ |
da9aecb0 | 1415 | if (pinctrl_check_ops(pctldev)) { |
ad6e1107 | 1416 | dev_err(dev, "pinctrl ops lacks necessary functions\n"); |
d26bc49f SW |
1417 | goto out_err; |
1418 | } | |
1419 | ||
2744e8af LW |
1420 | /* If we're implementing pinmuxing, check the ops for sanity */ |
1421 | if (pctldesc->pmxops) { | |
da9aecb0 | 1422 | if (pinmux_check_ops(pctldev)) |
b9130b77 | 1423 | goto out_err; |
2744e8af LW |
1424 | } |
1425 | ||
ae6b4d85 LW |
1426 | /* If we're implementing pinconfig, check the ops for sanity */ |
1427 | if (pctldesc->confops) { | |
da9aecb0 | 1428 | if (pinconf_check_ops(pctldev)) |
b9130b77 | 1429 | goto out_err; |
ae6b4d85 LW |
1430 | } |
1431 | ||
2744e8af | 1432 | /* Register all the pins */ |
ad6e1107 | 1433 | dev_dbg(dev, "try to register %d pins ...\n", pctldesc->npins); |
2744e8af LW |
1434 | ret = pinctrl_register_pins(pctldev, pctldesc->pins, pctldesc->npins); |
1435 | if (ret) { | |
ad6e1107 | 1436 | dev_err(dev, "error during pin registration\n"); |
2744e8af LW |
1437 | pinctrl_free_pindescs(pctldev, pctldesc->pins, |
1438 | pctldesc->npins); | |
51cd24ee | 1439 | goto out_err; |
2744e8af LW |
1440 | } |
1441 | ||
57b676f9 SW |
1442 | mutex_lock(&pinctrl_mutex); |
1443 | ||
8b9c139f | 1444 | list_add_tail(&pctldev->node, &pinctrldev_list); |
57b676f9 | 1445 | |
6e5e959d SW |
1446 | pctldev->p = pinctrl_get_locked(pctldev->dev); |
1447 | if (!IS_ERR(pctldev->p)) { | |
1448 | struct pinctrl_state *s = | |
1449 | pinctrl_lookup_state_locked(pctldev->p, | |
1450 | PINCTRL_STATE_DEFAULT); | |
ad6e1107 JC |
1451 | if (IS_ERR(s)) { |
1452 | dev_dbg(dev, "failed to lookup the default state\n"); | |
1453 | } else { | |
da9aecb0 | 1454 | if (pinctrl_select_state_locked(pctldev->p, s)) |
ad6e1107 JC |
1455 | dev_err(dev, |
1456 | "failed to select default state\n"); | |
ad6e1107 | 1457 | } |
6e5e959d | 1458 | } |
57b676f9 SW |
1459 | |
1460 | mutex_unlock(&pinctrl_mutex); | |
1461 | ||
2304b473 SW |
1462 | pinctrl_init_device_debugfs(pctldev); |
1463 | ||
2744e8af LW |
1464 | return pctldev; |
1465 | ||
51cd24ee SW |
1466 | out_err: |
1467 | kfree(pctldev); | |
2744e8af LW |
1468 | return NULL; |
1469 | } | |
1470 | EXPORT_SYMBOL_GPL(pinctrl_register); | |
1471 | ||
1472 | /** | |
1473 | * pinctrl_unregister() - unregister pinmux | |
1474 | * @pctldev: pin controller to unregister | |
1475 | * | |
1476 | * Called by pinmux drivers to unregister a pinmux. | |
1477 | */ | |
1478 | void pinctrl_unregister(struct pinctrl_dev *pctldev) | |
1479 | { | |
5d589b09 | 1480 | struct pinctrl_gpio_range *range, *n; |
2744e8af LW |
1481 | if (pctldev == NULL) |
1482 | return; | |
1483 | ||
02157160 | 1484 | pinctrl_remove_device_debugfs(pctldev); |
57b676f9 SW |
1485 | |
1486 | mutex_lock(&pinctrl_mutex); | |
1487 | ||
6e5e959d SW |
1488 | if (!IS_ERR(pctldev->p)) |
1489 | pinctrl_put_locked(pctldev->p, true); | |
57b676f9 | 1490 | |
2744e8af | 1491 | /* TODO: check that no pinmuxes are still active? */ |
2744e8af | 1492 | list_del(&pctldev->node); |
2744e8af LW |
1493 | /* Destroy descriptor tree */ |
1494 | pinctrl_free_pindescs(pctldev, pctldev->desc->pins, | |
1495 | pctldev->desc->npins); | |
5d589b09 DA |
1496 | /* remove gpio ranges map */ |
1497 | list_for_each_entry_safe(range, n, &pctldev->gpio_ranges, node) | |
1498 | list_del(&range->node); | |
1499 | ||
51cd24ee | 1500 | kfree(pctldev); |
57b676f9 SW |
1501 | |
1502 | mutex_unlock(&pinctrl_mutex); | |
2744e8af LW |
1503 | } |
1504 | EXPORT_SYMBOL_GPL(pinctrl_unregister); | |
1505 | ||
1506 | static int __init pinctrl_init(void) | |
1507 | { | |
1508 | pr_info("initialized pinctrl subsystem\n"); | |
1509 | pinctrl_init_debugfs(); | |
1510 | return 0; | |
1511 | } | |
1512 | ||
1513 | /* init early since many drivers really need to initialized pinmux early */ | |
1514 | core_initcall(pinctrl_init); |