Commit | Line | Data |
---|---|---|
2744e8af LW |
1 | /* |
2 | * Core driver for the pin control subsystem | |
3 | * | |
befe5bdf | 4 | * Copyright (C) 2011-2012 ST-Ericsson SA |
2744e8af LW |
5 | * Written on behalf of Linaro for ST-Ericsson |
6 | * Based on bits of regulator core, gpio core and clk core | |
7 | * | |
8 | * Author: Linus Walleij <linus.walleij@linaro.org> | |
9 | * | |
b2b3e66e SW |
10 | * Copyright (C) 2012 NVIDIA CORPORATION. All rights reserved. |
11 | * | |
2744e8af LW |
12 | * License terms: GNU General Public License (GPL) version 2 |
13 | */ | |
14 | #define pr_fmt(fmt) "pinctrl core: " fmt | |
15 | ||
16 | #include <linux/kernel.h> | |
ab78029e | 17 | #include <linux/kref.h> |
a5a697cd | 18 | #include <linux/export.h> |
2744e8af LW |
19 | #include <linux/init.h> |
20 | #include <linux/device.h> | |
21 | #include <linux/slab.h> | |
2744e8af LW |
22 | #include <linux/err.h> |
23 | #include <linux/list.h> | |
2744e8af LW |
24 | #include <linux/sysfs.h> |
25 | #include <linux/debugfs.h> | |
26 | #include <linux/seq_file.h> | |
6d4ca1fb | 27 | #include <linux/pinctrl/consumer.h> |
2744e8af LW |
28 | #include <linux/pinctrl/pinctrl.h> |
29 | #include <linux/pinctrl/machine.h> | |
30 | #include "core.h" | |
57291ce2 | 31 | #include "devicetree.h" |
2744e8af | 32 | #include "pinmux.h" |
ae6b4d85 | 33 | #include "pinconf.h" |
2744e8af | 34 | |
b2b3e66e SW |
35 | /** |
36 | * struct pinctrl_maps - a list item containing part of the mapping table | |
37 | * @node: mapping table list node | |
38 | * @maps: array of mapping table entries | |
39 | * @num_maps: the number of entries in @maps | |
40 | */ | |
41 | struct pinctrl_maps { | |
42 | struct list_head node; | |
43 | struct pinctrl_map const *maps; | |
44 | unsigned num_maps; | |
45 | }; | |
46 | ||
5b3aa5f7 DA |
47 | static bool pinctrl_dummy_state; |
48 | ||
57b676f9 SW |
49 | /* Mutex taken by all entry points */ |
50 | DEFINE_MUTEX(pinctrl_mutex); | |
51 | ||
52 | /* Global list of pin control devices (struct pinctrl_dev) */ | |
57291ce2 | 53 | LIST_HEAD(pinctrldev_list); |
2744e8af | 54 | |
57b676f9 | 55 | /* List of pin controller handles (struct pinctrl) */ |
befe5bdf LW |
56 | static LIST_HEAD(pinctrl_list); |
57 | ||
57b676f9 | 58 | /* List of pinctrl maps (struct pinctrl_maps) */ |
b2b3e66e SW |
59 | static LIST_HEAD(pinctrl_maps); |
60 | ||
61 | #define for_each_maps(_maps_node_, _i_, _map_) \ | |
62 | list_for_each_entry(_maps_node_, &pinctrl_maps, node) \ | |
63 | for (_i_ = 0, _map_ = &_maps_node_->maps[_i_]; \ | |
64 | _i_ < _maps_node_->num_maps; \ | |
bc66468c | 65 | _i_++, _map_ = &_maps_node_->maps[_i_]) |
befe5bdf | 66 | |
5b3aa5f7 DA |
67 | /** |
68 | * pinctrl_provide_dummies() - indicate if pinctrl provides dummy state support | |
69 | * | |
70 | * Usually this function is called by platforms without pinctrl driver support | |
71 | * but run with some shared drivers using pinctrl APIs. | |
72 | * After calling this function, the pinctrl core will return successfully | |
73 | * with creating a dummy state for the driver to keep going smoothly. | |
74 | */ | |
75 | void pinctrl_provide_dummies(void) | |
76 | { | |
77 | pinctrl_dummy_state = true; | |
78 | } | |
79 | ||
2744e8af LW |
80 | const char *pinctrl_dev_get_name(struct pinctrl_dev *pctldev) |
81 | { | |
82 | /* We're not allowed to register devices without name */ | |
83 | return pctldev->desc->name; | |
84 | } | |
85 | EXPORT_SYMBOL_GPL(pinctrl_dev_get_name); | |
86 | ||
d6e99abb HZ |
87 | const char *pinctrl_dev_get_devname(struct pinctrl_dev *pctldev) |
88 | { | |
89 | return dev_name(pctldev->dev); | |
90 | } | |
91 | EXPORT_SYMBOL_GPL(pinctrl_dev_get_devname); | |
92 | ||
2744e8af LW |
93 | void *pinctrl_dev_get_drvdata(struct pinctrl_dev *pctldev) |
94 | { | |
95 | return pctldev->driver_data; | |
96 | } | |
97 | EXPORT_SYMBOL_GPL(pinctrl_dev_get_drvdata); | |
98 | ||
99 | /** | |
9dfac4fd LW |
100 | * get_pinctrl_dev_from_devname() - look up pin controller device |
101 | * @devname: the name of a device instance, as returned by dev_name() | |
2744e8af LW |
102 | * |
103 | * Looks up a pin control device matching a certain device name or pure device | |
104 | * pointer, the pure device pointer will take precedence. | |
105 | */ | |
9dfac4fd | 106 | struct pinctrl_dev *get_pinctrl_dev_from_devname(const char *devname) |
2744e8af LW |
107 | { |
108 | struct pinctrl_dev *pctldev = NULL; | |
109 | bool found = false; | |
110 | ||
9dfac4fd LW |
111 | if (!devname) |
112 | return NULL; | |
113 | ||
2744e8af | 114 | list_for_each_entry(pctldev, &pinctrldev_list, node) { |
9dfac4fd | 115 | if (!strcmp(dev_name(pctldev->dev), devname)) { |
2744e8af LW |
116 | /* Matched on device name */ |
117 | found = true; | |
118 | break; | |
119 | } | |
120 | } | |
2744e8af LW |
121 | |
122 | return found ? pctldev : NULL; | |
123 | } | |
124 | ||
ae6b4d85 LW |
125 | /** |
126 | * pin_get_from_name() - look up a pin number from a name | |
127 | * @pctldev: the pin control device to lookup the pin on | |
128 | * @name: the name of the pin to look up | |
129 | */ | |
130 | int pin_get_from_name(struct pinctrl_dev *pctldev, const char *name) | |
131 | { | |
706e8520 | 132 | unsigned i, pin; |
ae6b4d85 | 133 | |
706e8520 CP |
134 | /* The pin number can be retrived from the pin controller descriptor */ |
135 | for (i = 0; i < pctldev->desc->npins; i++) { | |
ae6b4d85 LW |
136 | struct pin_desc *desc; |
137 | ||
706e8520 | 138 | pin = pctldev->desc->pins[i].number; |
ae6b4d85 LW |
139 | desc = pin_desc_get(pctldev, pin); |
140 | /* Pin space may be sparse */ | |
141 | if (desc == NULL) | |
142 | continue; | |
143 | if (desc->name && !strcmp(name, desc->name)) | |
144 | return pin; | |
145 | } | |
146 | ||
147 | return -EINVAL; | |
148 | } | |
149 | ||
dcb5dbc3 DA |
150 | /** |
151 | * pin_get_name_from_id() - look up a pin name from a pin id | |
152 | * @pctldev: the pin control device to lookup the pin on | |
153 | * @name: the name of the pin to look up | |
154 | */ | |
155 | const char *pin_get_name(struct pinctrl_dev *pctldev, const unsigned pin) | |
156 | { | |
157 | const struct pin_desc *desc; | |
158 | ||
159 | desc = pin_desc_get(pctldev, pin); | |
160 | if (desc == NULL) { | |
161 | dev_err(pctldev->dev, "failed to get pin(%d) name\n", | |
162 | pin); | |
163 | return NULL; | |
164 | } | |
165 | ||
166 | return desc->name; | |
167 | } | |
168 | ||
2744e8af LW |
169 | /** |
170 | * pin_is_valid() - check if pin exists on controller | |
171 | * @pctldev: the pin control device to check the pin on | |
172 | * @pin: pin to check, use the local pin controller index number | |
173 | * | |
174 | * This tells us whether a certain pin exist on a certain pin controller or | |
175 | * not. Pin lists may be sparse, so some pins may not exist. | |
176 | */ | |
177 | bool pin_is_valid(struct pinctrl_dev *pctldev, int pin) | |
178 | { | |
179 | struct pin_desc *pindesc; | |
180 | ||
181 | if (pin < 0) | |
182 | return false; | |
183 | ||
57b676f9 | 184 | mutex_lock(&pinctrl_mutex); |
2744e8af | 185 | pindesc = pin_desc_get(pctldev, pin); |
57b676f9 | 186 | mutex_unlock(&pinctrl_mutex); |
2744e8af | 187 | |
57b676f9 | 188 | return pindesc != NULL; |
2744e8af LW |
189 | } |
190 | EXPORT_SYMBOL_GPL(pin_is_valid); | |
191 | ||
192 | /* Deletes a range of pin descriptors */ | |
193 | static void pinctrl_free_pindescs(struct pinctrl_dev *pctldev, | |
194 | const struct pinctrl_pin_desc *pins, | |
195 | unsigned num_pins) | |
196 | { | |
197 | int i; | |
198 | ||
2744e8af LW |
199 | for (i = 0; i < num_pins; i++) { |
200 | struct pin_desc *pindesc; | |
201 | ||
202 | pindesc = radix_tree_lookup(&pctldev->pin_desc_tree, | |
203 | pins[i].number); | |
204 | if (pindesc != NULL) { | |
205 | radix_tree_delete(&pctldev->pin_desc_tree, | |
206 | pins[i].number); | |
ca53c5f1 LW |
207 | if (pindesc->dynamic_name) |
208 | kfree(pindesc->name); | |
2744e8af LW |
209 | } |
210 | kfree(pindesc); | |
211 | } | |
2744e8af LW |
212 | } |
213 | ||
214 | static int pinctrl_register_one_pin(struct pinctrl_dev *pctldev, | |
215 | unsigned number, const char *name) | |
216 | { | |
217 | struct pin_desc *pindesc; | |
218 | ||
219 | pindesc = pin_desc_get(pctldev, number); | |
220 | if (pindesc != NULL) { | |
221 | pr_err("pin %d already registered on %s\n", number, | |
222 | pctldev->desc->name); | |
223 | return -EINVAL; | |
224 | } | |
225 | ||
226 | pindesc = kzalloc(sizeof(*pindesc), GFP_KERNEL); | |
95dcd4ae SW |
227 | if (pindesc == NULL) { |
228 | dev_err(pctldev->dev, "failed to alloc struct pin_desc\n"); | |
2744e8af | 229 | return -ENOMEM; |
95dcd4ae | 230 | } |
ae6b4d85 | 231 | |
2744e8af LW |
232 | /* Set owner */ |
233 | pindesc->pctldev = pctldev; | |
234 | ||
9af1e44f | 235 | /* Copy basic pin info */ |
8dc6ae4d | 236 | if (name) { |
ca53c5f1 LW |
237 | pindesc->name = name; |
238 | } else { | |
239 | pindesc->name = kasprintf(GFP_KERNEL, "PIN%u", number); | |
eb26cc9c SK |
240 | if (pindesc->name == NULL) { |
241 | kfree(pindesc); | |
ca53c5f1 | 242 | return -ENOMEM; |
eb26cc9c | 243 | } |
ca53c5f1 LW |
244 | pindesc->dynamic_name = true; |
245 | } | |
2744e8af | 246 | |
2744e8af | 247 | radix_tree_insert(&pctldev->pin_desc_tree, number, pindesc); |
2744e8af | 248 | pr_debug("registered pin %d (%s) on %s\n", |
ca53c5f1 | 249 | number, pindesc->name, pctldev->desc->name); |
2744e8af LW |
250 | return 0; |
251 | } | |
252 | ||
253 | static int pinctrl_register_pins(struct pinctrl_dev *pctldev, | |
254 | struct pinctrl_pin_desc const *pins, | |
255 | unsigned num_descs) | |
256 | { | |
257 | unsigned i; | |
258 | int ret = 0; | |
259 | ||
260 | for (i = 0; i < num_descs; i++) { | |
261 | ret = pinctrl_register_one_pin(pctldev, | |
262 | pins[i].number, pins[i].name); | |
263 | if (ret) | |
264 | return ret; | |
265 | } | |
266 | ||
267 | return 0; | |
268 | } | |
269 | ||
270 | /** | |
271 | * pinctrl_match_gpio_range() - check if a certain GPIO pin is in range | |
272 | * @pctldev: pin controller device to check | |
273 | * @gpio: gpio pin to check taken from the global GPIO pin space | |
274 | * | |
275 | * Tries to match a GPIO pin number to the ranges handled by a certain pin | |
276 | * controller, return the range or NULL | |
277 | */ | |
278 | static struct pinctrl_gpio_range * | |
279 | pinctrl_match_gpio_range(struct pinctrl_dev *pctldev, unsigned gpio) | |
280 | { | |
281 | struct pinctrl_gpio_range *range = NULL; | |
282 | ||
283 | /* Loop over the ranges */ | |
2744e8af LW |
284 | list_for_each_entry(range, &pctldev->gpio_ranges, node) { |
285 | /* Check if we're in the valid range */ | |
286 | if (gpio >= range->base && | |
287 | gpio < range->base + range->npins) { | |
2744e8af LW |
288 | return range; |
289 | } | |
290 | } | |
2744e8af LW |
291 | |
292 | return NULL; | |
293 | } | |
294 | ||
295 | /** | |
296 | * pinctrl_get_device_gpio_range() - find device for GPIO range | |
297 | * @gpio: the pin to locate the pin controller for | |
298 | * @outdev: the pin control device if found | |
299 | * @outrange: the GPIO range if found | |
300 | * | |
301 | * Find the pin controller handling a certain GPIO pin from the pinspace of | |
302 | * the GPIO subsystem, return the device and the matching GPIO range. Returns | |
4650b7cb DA |
303 | * -EPROBE_DEFER if the GPIO range could not be found in any device since it |
304 | * may still have not been registered. | |
2744e8af | 305 | */ |
4ecce45d SW |
306 | static int pinctrl_get_device_gpio_range(unsigned gpio, |
307 | struct pinctrl_dev **outdev, | |
308 | struct pinctrl_gpio_range **outrange) | |
2744e8af LW |
309 | { |
310 | struct pinctrl_dev *pctldev = NULL; | |
311 | ||
312 | /* Loop over the pin controllers */ | |
2744e8af LW |
313 | list_for_each_entry(pctldev, &pinctrldev_list, node) { |
314 | struct pinctrl_gpio_range *range; | |
315 | ||
316 | range = pinctrl_match_gpio_range(pctldev, gpio); | |
317 | if (range != NULL) { | |
318 | *outdev = pctldev; | |
319 | *outrange = range; | |
2744e8af LW |
320 | return 0; |
321 | } | |
322 | } | |
2744e8af | 323 | |
4650b7cb | 324 | return -EPROBE_DEFER; |
2744e8af LW |
325 | } |
326 | ||
327 | /** | |
328 | * pinctrl_add_gpio_range() - register a GPIO range for a controller | |
329 | * @pctldev: pin controller device to add the range to | |
330 | * @range: the GPIO range to add | |
331 | * | |
332 | * This adds a range of GPIOs to be handled by a certain pin controller. Call | |
333 | * this to register handled ranges after registering your pin controller. | |
334 | */ | |
335 | void pinctrl_add_gpio_range(struct pinctrl_dev *pctldev, | |
336 | struct pinctrl_gpio_range *range) | |
337 | { | |
57b676f9 | 338 | mutex_lock(&pinctrl_mutex); |
8b9c139f | 339 | list_add_tail(&range->node, &pctldev->gpio_ranges); |
57b676f9 | 340 | mutex_unlock(&pinctrl_mutex); |
2744e8af | 341 | } |
4ecce45d | 342 | EXPORT_SYMBOL_GPL(pinctrl_add_gpio_range); |
2744e8af | 343 | |
3e5e00b6 DA |
344 | void pinctrl_add_gpio_ranges(struct pinctrl_dev *pctldev, |
345 | struct pinctrl_gpio_range *ranges, | |
346 | unsigned nranges) | |
347 | { | |
348 | int i; | |
349 | ||
350 | for (i = 0; i < nranges; i++) | |
351 | pinctrl_add_gpio_range(pctldev, &ranges[i]); | |
352 | } | |
353 | EXPORT_SYMBOL_GPL(pinctrl_add_gpio_ranges); | |
354 | ||
192c369c | 355 | struct pinctrl_dev *pinctrl_find_and_add_gpio_range(const char *devname, |
f23f1516 SH |
356 | struct pinctrl_gpio_range *range) |
357 | { | |
358 | struct pinctrl_dev *pctldev = get_pinctrl_dev_from_devname(devname); | |
359 | ||
dfa97515 LW |
360 | /* |
361 | * If we can't find this device, let's assume that is because | |
362 | * it has not probed yet, so the driver trying to register this | |
363 | * range need to defer probing. | |
364 | */ | |
f23f1516 | 365 | if (!pctldev) |
dfa97515 | 366 | return ERR_PTR(-EPROBE_DEFER); |
f23f1516 SH |
367 | |
368 | pinctrl_add_gpio_range(pctldev, range); | |
369 | return pctldev; | |
370 | } | |
192c369c | 371 | EXPORT_SYMBOL_GPL(pinctrl_find_and_add_gpio_range); |
f23f1516 | 372 | |
9afbefb2 LW |
373 | /** |
374 | * pinctrl_find_gpio_range_from_pin() - locate the GPIO range for a pin | |
375 | * @pctldev: the pin controller device to look in | |
376 | * @pin: a controller-local number to find the range for | |
377 | */ | |
378 | struct pinctrl_gpio_range * | |
379 | pinctrl_find_gpio_range_from_pin(struct pinctrl_dev *pctldev, | |
380 | unsigned int pin) | |
381 | { | |
382 | struct pinctrl_gpio_range *range = NULL; | |
383 | ||
384 | /* Loop over the ranges */ | |
385 | list_for_each_entry(range, &pctldev->gpio_ranges, node) { | |
386 | /* Check if we're in the valid range */ | |
387 | if (pin >= range->pin_base && | |
388 | pin < range->pin_base + range->npins) { | |
389 | return range; | |
390 | } | |
391 | } | |
392 | ||
393 | return NULL; | |
394 | } | |
395 | EXPORT_SYMBOL_GPL(pinctrl_find_gpio_range_from_pin); | |
396 | ||
7e10ee68 VK |
397 | /** |
398 | * pinctrl_remove_gpio_range() - remove a range of GPIOs fro a pin controller | |
399 | * @pctldev: pin controller device to remove the range from | |
400 | * @range: the GPIO range to remove | |
401 | */ | |
402 | void pinctrl_remove_gpio_range(struct pinctrl_dev *pctldev, | |
403 | struct pinctrl_gpio_range *range) | |
404 | { | |
405 | mutex_lock(&pinctrl_mutex); | |
406 | list_del(&range->node); | |
407 | mutex_unlock(&pinctrl_mutex); | |
408 | } | |
409 | EXPORT_SYMBOL_GPL(pinctrl_remove_gpio_range); | |
410 | ||
7afde8ba LW |
411 | /** |
412 | * pinctrl_get_group_selector() - returns the group selector for a group | |
413 | * @pctldev: the pin controller handling the group | |
414 | * @pin_group: the pin group to look up | |
415 | */ | |
416 | int pinctrl_get_group_selector(struct pinctrl_dev *pctldev, | |
417 | const char *pin_group) | |
418 | { | |
419 | const struct pinctrl_ops *pctlops = pctldev->desc->pctlops; | |
d1e90e9e | 420 | unsigned ngroups = pctlops->get_groups_count(pctldev); |
7afde8ba LW |
421 | unsigned group_selector = 0; |
422 | ||
d1e90e9e | 423 | while (group_selector < ngroups) { |
7afde8ba LW |
424 | const char *gname = pctlops->get_group_name(pctldev, |
425 | group_selector); | |
426 | if (!strcmp(gname, pin_group)) { | |
51cd24ee | 427 | dev_dbg(pctldev->dev, |
7afde8ba LW |
428 | "found group selector %u for %s\n", |
429 | group_selector, | |
430 | pin_group); | |
431 | return group_selector; | |
432 | } | |
433 | ||
434 | group_selector++; | |
435 | } | |
436 | ||
51cd24ee | 437 | dev_err(pctldev->dev, "does not have pin group %s\n", |
7afde8ba LW |
438 | pin_group); |
439 | ||
440 | return -EINVAL; | |
441 | } | |
442 | ||
befe5bdf LW |
443 | /** |
444 | * pinctrl_request_gpio() - request a single pin to be used in as GPIO | |
445 | * @gpio: the GPIO pin number from the GPIO subsystem number space | |
446 | * | |
447 | * This function should *ONLY* be used from gpiolib-based GPIO drivers, | |
448 | * as part of their gpio_request() semantics, platforms and individual drivers | |
449 | * shall *NOT* request GPIO pins to be muxed in. | |
450 | */ | |
451 | int pinctrl_request_gpio(unsigned gpio) | |
452 | { | |
453 | struct pinctrl_dev *pctldev; | |
454 | struct pinctrl_gpio_range *range; | |
455 | int ret; | |
456 | int pin; | |
457 | ||
57b676f9 SW |
458 | mutex_lock(&pinctrl_mutex); |
459 | ||
befe5bdf | 460 | ret = pinctrl_get_device_gpio_range(gpio, &pctldev, &range); |
57b676f9 SW |
461 | if (ret) { |
462 | mutex_unlock(&pinctrl_mutex); | |
4650b7cb | 463 | return ret; |
57b676f9 | 464 | } |
befe5bdf LW |
465 | |
466 | /* Convert to the pin controllers number space */ | |
467 | pin = gpio - range->base + range->pin_base; | |
468 | ||
57b676f9 SW |
469 | ret = pinmux_request_gpio(pctldev, range, pin, gpio); |
470 | ||
471 | mutex_unlock(&pinctrl_mutex); | |
472 | return ret; | |
befe5bdf LW |
473 | } |
474 | EXPORT_SYMBOL_GPL(pinctrl_request_gpio); | |
475 | ||
476 | /** | |
477 | * pinctrl_free_gpio() - free control on a single pin, currently used as GPIO | |
478 | * @gpio: the GPIO pin number from the GPIO subsystem number space | |
479 | * | |
480 | * This function should *ONLY* be used from gpiolib-based GPIO drivers, | |
481 | * as part of their gpio_free() semantics, platforms and individual drivers | |
482 | * shall *NOT* request GPIO pins to be muxed out. | |
483 | */ | |
484 | void pinctrl_free_gpio(unsigned gpio) | |
485 | { | |
486 | struct pinctrl_dev *pctldev; | |
487 | struct pinctrl_gpio_range *range; | |
488 | int ret; | |
489 | int pin; | |
490 | ||
57b676f9 SW |
491 | mutex_lock(&pinctrl_mutex); |
492 | ||
befe5bdf | 493 | ret = pinctrl_get_device_gpio_range(gpio, &pctldev, &range); |
57b676f9 SW |
494 | if (ret) { |
495 | mutex_unlock(&pinctrl_mutex); | |
befe5bdf | 496 | return; |
57b676f9 | 497 | } |
befe5bdf LW |
498 | |
499 | /* Convert to the pin controllers number space */ | |
500 | pin = gpio - range->base + range->pin_base; | |
501 | ||
57b676f9 SW |
502 | pinmux_free_gpio(pctldev, pin, range); |
503 | ||
504 | mutex_unlock(&pinctrl_mutex); | |
befe5bdf LW |
505 | } |
506 | EXPORT_SYMBOL_GPL(pinctrl_free_gpio); | |
507 | ||
508 | static int pinctrl_gpio_direction(unsigned gpio, bool input) | |
509 | { | |
510 | struct pinctrl_dev *pctldev; | |
511 | struct pinctrl_gpio_range *range; | |
512 | int ret; | |
513 | int pin; | |
514 | ||
515 | ret = pinctrl_get_device_gpio_range(gpio, &pctldev, &range); | |
516 | if (ret) | |
517 | return ret; | |
518 | ||
519 | /* Convert to the pin controllers number space */ | |
520 | pin = gpio - range->base + range->pin_base; | |
521 | ||
522 | return pinmux_gpio_direction(pctldev, range, pin, input); | |
523 | } | |
524 | ||
525 | /** | |
526 | * pinctrl_gpio_direction_input() - request a GPIO pin to go into input mode | |
527 | * @gpio: the GPIO pin number from the GPIO subsystem number space | |
528 | * | |
529 | * This function should *ONLY* be used from gpiolib-based GPIO drivers, | |
530 | * as part of their gpio_direction_input() semantics, platforms and individual | |
531 | * drivers shall *NOT* touch pin control GPIO calls. | |
532 | */ | |
533 | int pinctrl_gpio_direction_input(unsigned gpio) | |
534 | { | |
57b676f9 SW |
535 | int ret; |
536 | mutex_lock(&pinctrl_mutex); | |
537 | ret = pinctrl_gpio_direction(gpio, true); | |
538 | mutex_unlock(&pinctrl_mutex); | |
539 | return ret; | |
befe5bdf LW |
540 | } |
541 | EXPORT_SYMBOL_GPL(pinctrl_gpio_direction_input); | |
542 | ||
543 | /** | |
544 | * pinctrl_gpio_direction_output() - request a GPIO pin to go into output mode | |
545 | * @gpio: the GPIO pin number from the GPIO subsystem number space | |
546 | * | |
547 | * This function should *ONLY* be used from gpiolib-based GPIO drivers, | |
548 | * as part of their gpio_direction_output() semantics, platforms and individual | |
549 | * drivers shall *NOT* touch pin control GPIO calls. | |
550 | */ | |
551 | int pinctrl_gpio_direction_output(unsigned gpio) | |
552 | { | |
57b676f9 SW |
553 | int ret; |
554 | mutex_lock(&pinctrl_mutex); | |
555 | ret = pinctrl_gpio_direction(gpio, false); | |
556 | mutex_unlock(&pinctrl_mutex); | |
557 | return ret; | |
befe5bdf LW |
558 | } |
559 | EXPORT_SYMBOL_GPL(pinctrl_gpio_direction_output); | |
560 | ||
6e5e959d SW |
561 | static struct pinctrl_state *find_state(struct pinctrl *p, |
562 | const char *name) | |
befe5bdf | 563 | { |
6e5e959d SW |
564 | struct pinctrl_state *state; |
565 | ||
566 | list_for_each_entry(state, &p->states, node) | |
567 | if (!strcmp(state->name, name)) | |
568 | return state; | |
569 | ||
570 | return NULL; | |
571 | } | |
572 | ||
573 | static struct pinctrl_state *create_state(struct pinctrl *p, | |
574 | const char *name) | |
575 | { | |
576 | struct pinctrl_state *state; | |
577 | ||
578 | state = kzalloc(sizeof(*state), GFP_KERNEL); | |
579 | if (state == NULL) { | |
580 | dev_err(p->dev, | |
581 | "failed to alloc struct pinctrl_state\n"); | |
582 | return ERR_PTR(-ENOMEM); | |
583 | } | |
584 | ||
585 | state->name = name; | |
586 | INIT_LIST_HEAD(&state->settings); | |
587 | ||
588 | list_add_tail(&state->node, &p->states); | |
589 | ||
590 | return state; | |
591 | } | |
592 | ||
593 | static int add_setting(struct pinctrl *p, struct pinctrl_map const *map) | |
594 | { | |
595 | struct pinctrl_state *state; | |
7ecdb16f | 596 | struct pinctrl_setting *setting; |
6e5e959d | 597 | int ret; |
befe5bdf | 598 | |
6e5e959d SW |
599 | state = find_state(p, map->name); |
600 | if (!state) | |
601 | state = create_state(p, map->name); | |
602 | if (IS_ERR(state)) | |
603 | return PTR_ERR(state); | |
befe5bdf | 604 | |
1e2082b5 SW |
605 | if (map->type == PIN_MAP_TYPE_DUMMY_STATE) |
606 | return 0; | |
607 | ||
6e5e959d SW |
608 | setting = kzalloc(sizeof(*setting), GFP_KERNEL); |
609 | if (setting == NULL) { | |
610 | dev_err(p->dev, | |
611 | "failed to alloc struct pinctrl_setting\n"); | |
612 | return -ENOMEM; | |
613 | } | |
befe5bdf | 614 | |
1e2082b5 SW |
615 | setting->type = map->type; |
616 | ||
6e5e959d SW |
617 | setting->pctldev = get_pinctrl_dev_from_devname(map->ctrl_dev_name); |
618 | if (setting->pctldev == NULL) { | |
6e5e959d | 619 | kfree(setting); |
89216494 LW |
620 | /* Do not defer probing of hogs (circular loop) */ |
621 | if (!strcmp(map->ctrl_dev_name, map->dev_name)) | |
622 | return -ENODEV; | |
c05127c4 LW |
623 | /* |
624 | * OK let us guess that the driver is not there yet, and | |
625 | * let's defer obtaining this pinctrl handle to later... | |
626 | */ | |
89216494 LW |
627 | dev_info(p->dev, "unknown pinctrl device %s in map entry, deferring probe", |
628 | map->ctrl_dev_name); | |
c05127c4 | 629 | return -EPROBE_DEFER; |
6e5e959d SW |
630 | } |
631 | ||
1a78958d LW |
632 | setting->dev_name = map->dev_name; |
633 | ||
1e2082b5 SW |
634 | switch (map->type) { |
635 | case PIN_MAP_TYPE_MUX_GROUP: | |
636 | ret = pinmux_map_to_setting(map, setting); | |
637 | break; | |
638 | case PIN_MAP_TYPE_CONFIGS_PIN: | |
639 | case PIN_MAP_TYPE_CONFIGS_GROUP: | |
640 | ret = pinconf_map_to_setting(map, setting); | |
641 | break; | |
642 | default: | |
643 | ret = -EINVAL; | |
644 | break; | |
645 | } | |
6e5e959d SW |
646 | if (ret < 0) { |
647 | kfree(setting); | |
648 | return ret; | |
649 | } | |
650 | ||
651 | list_add_tail(&setting->node, &state->settings); | |
652 | ||
653 | return 0; | |
654 | } | |
655 | ||
656 | static struct pinctrl *find_pinctrl(struct device *dev) | |
657 | { | |
658 | struct pinctrl *p; | |
659 | ||
1e2082b5 | 660 | list_for_each_entry(p, &pinctrl_list, node) |
6e5e959d SW |
661 | if (p->dev == dev) |
662 | return p; | |
663 | ||
664 | return NULL; | |
665 | } | |
666 | ||
667 | static void pinctrl_put_locked(struct pinctrl *p, bool inlist); | |
668 | ||
669 | static struct pinctrl *create_pinctrl(struct device *dev) | |
670 | { | |
671 | struct pinctrl *p; | |
672 | const char *devname; | |
673 | struct pinctrl_maps *maps_node; | |
674 | int i; | |
675 | struct pinctrl_map const *map; | |
676 | int ret; | |
befe5bdf LW |
677 | |
678 | /* | |
679 | * create the state cookie holder struct pinctrl for each | |
680 | * mapping, this is what consumers will get when requesting | |
681 | * a pin control handle with pinctrl_get() | |
682 | */ | |
02f5b989 | 683 | p = kzalloc(sizeof(*p), GFP_KERNEL); |
95dcd4ae SW |
684 | if (p == NULL) { |
685 | dev_err(dev, "failed to alloc struct pinctrl\n"); | |
befe5bdf | 686 | return ERR_PTR(-ENOMEM); |
95dcd4ae | 687 | } |
7ecdb16f | 688 | p->dev = dev; |
6e5e959d | 689 | INIT_LIST_HEAD(&p->states); |
57291ce2 SW |
690 | INIT_LIST_HEAD(&p->dt_maps); |
691 | ||
692 | ret = pinctrl_dt_to_map(p); | |
693 | if (ret < 0) { | |
694 | kfree(p); | |
695 | return ERR_PTR(ret); | |
696 | } | |
6e5e959d SW |
697 | |
698 | devname = dev_name(dev); | |
befe5bdf LW |
699 | |
700 | /* Iterate over the pin control maps to locate the right ones */ | |
b2b3e66e | 701 | for_each_maps(maps_node, i, map) { |
7ecdb16f SW |
702 | /* Map must be for this device */ |
703 | if (strcmp(map->dev_name, devname)) | |
704 | continue; | |
705 | ||
6e5e959d | 706 | ret = add_setting(p, map); |
89216494 LW |
707 | /* |
708 | * At this point the adding of a setting may: | |
709 | * | |
710 | * - Defer, if the pinctrl device is not yet available | |
711 | * - Fail, if the pinctrl device is not yet available, | |
712 | * AND the setting is a hog. We cannot defer that, since | |
713 | * the hog will kick in immediately after the device | |
714 | * is registered. | |
715 | * | |
716 | * If the error returned was not -EPROBE_DEFER then we | |
717 | * accumulate the errors to see if we end up with | |
718 | * an -EPROBE_DEFER later, as that is the worst case. | |
719 | */ | |
720 | if (ret == -EPROBE_DEFER) { | |
6e5e959d SW |
721 | pinctrl_put_locked(p, false); |
722 | return ERR_PTR(ret); | |
7ecdb16f | 723 | } |
befe5bdf | 724 | } |
89216494 LW |
725 | if (ret < 0) { |
726 | /* If some other error than deferral occured, return here */ | |
727 | pinctrl_put_locked(p, false); | |
728 | return ERR_PTR(ret); | |
729 | } | |
befe5bdf | 730 | |
ab78029e LW |
731 | kref_init(&p->users); |
732 | ||
b0666ba4 | 733 | /* Add the pinctrl handle to the global list */ |
8b9c139f | 734 | list_add_tail(&p->node, &pinctrl_list); |
befe5bdf LW |
735 | |
736 | return p; | |
6e5e959d | 737 | } |
7ecdb16f | 738 | |
6e5e959d SW |
739 | static struct pinctrl *pinctrl_get_locked(struct device *dev) |
740 | { | |
741 | struct pinctrl *p; | |
7ecdb16f | 742 | |
6e5e959d SW |
743 | if (WARN_ON(!dev)) |
744 | return ERR_PTR(-EINVAL); | |
745 | ||
ab78029e LW |
746 | /* |
747 | * See if somebody else (such as the device core) has already | |
748 | * obtained a handle to the pinctrl for this device. In that case, | |
749 | * return another pointer to it. | |
750 | */ | |
6e5e959d | 751 | p = find_pinctrl(dev); |
ab78029e LW |
752 | if (p != NULL) { |
753 | dev_dbg(dev, "obtain a copy of previously claimed pinctrl\n"); | |
754 | kref_get(&p->users); | |
755 | return p; | |
756 | } | |
7ecdb16f | 757 | |
d599bfb3 | 758 | return create_pinctrl(dev); |
befe5bdf | 759 | } |
b2b3e66e SW |
760 | |
761 | /** | |
6e5e959d SW |
762 | * pinctrl_get() - retrieves the pinctrl handle for a device |
763 | * @dev: the device to obtain the handle for | |
b2b3e66e | 764 | */ |
6e5e959d | 765 | struct pinctrl *pinctrl_get(struct device *dev) |
b2b3e66e SW |
766 | { |
767 | struct pinctrl *p; | |
768 | ||
57b676f9 | 769 | mutex_lock(&pinctrl_mutex); |
6e5e959d | 770 | p = pinctrl_get_locked(dev); |
57b676f9 | 771 | mutex_unlock(&pinctrl_mutex); |
b2b3e66e SW |
772 | |
773 | return p; | |
774 | } | |
befe5bdf LW |
775 | EXPORT_SYMBOL_GPL(pinctrl_get); |
776 | ||
6e5e959d | 777 | static void pinctrl_put_locked(struct pinctrl *p, bool inlist) |
befe5bdf | 778 | { |
6e5e959d SW |
779 | struct pinctrl_state *state, *n1; |
780 | struct pinctrl_setting *setting, *n2; | |
781 | ||
782 | list_for_each_entry_safe(state, n1, &p->states, node) { | |
783 | list_for_each_entry_safe(setting, n2, &state->settings, node) { | |
1e2082b5 SW |
784 | switch (setting->type) { |
785 | case PIN_MAP_TYPE_MUX_GROUP: | |
786 | if (state == p->state) | |
787 | pinmux_disable_setting(setting); | |
788 | pinmux_free_setting(setting); | |
789 | break; | |
790 | case PIN_MAP_TYPE_CONFIGS_PIN: | |
791 | case PIN_MAP_TYPE_CONFIGS_GROUP: | |
792 | pinconf_free_setting(setting); | |
793 | break; | |
794 | default: | |
795 | break; | |
796 | } | |
6e5e959d SW |
797 | list_del(&setting->node); |
798 | kfree(setting); | |
799 | } | |
800 | list_del(&state->node); | |
801 | kfree(state); | |
7ecdb16f | 802 | } |
befe5bdf | 803 | |
57291ce2 SW |
804 | pinctrl_dt_free_maps(p); |
805 | ||
6e5e959d SW |
806 | if (inlist) |
807 | list_del(&p->node); | |
befe5bdf LW |
808 | kfree(p); |
809 | } | |
befe5bdf LW |
810 | |
811 | /** | |
ab78029e LW |
812 | * pinctrl_release() - release the pinctrl handle |
813 | * @kref: the kref in the pinctrl being released | |
814 | */ | |
2917e833 | 815 | static void pinctrl_release(struct kref *kref) |
ab78029e LW |
816 | { |
817 | struct pinctrl *p = container_of(kref, struct pinctrl, users); | |
818 | ||
819 | pinctrl_put_locked(p, true); | |
820 | } | |
821 | ||
822 | /** | |
823 | * pinctrl_put() - decrease use count on a previously claimed pinctrl handle | |
6e5e959d | 824 | * @p: the pinctrl handle to release |
befe5bdf | 825 | */ |
57b676f9 SW |
826 | void pinctrl_put(struct pinctrl *p) |
827 | { | |
828 | mutex_lock(&pinctrl_mutex); | |
ab78029e | 829 | kref_put(&p->users, pinctrl_release); |
57b676f9 SW |
830 | mutex_unlock(&pinctrl_mutex); |
831 | } | |
832 | EXPORT_SYMBOL_GPL(pinctrl_put); | |
833 | ||
6e5e959d SW |
834 | static struct pinctrl_state *pinctrl_lookup_state_locked(struct pinctrl *p, |
835 | const char *name) | |
befe5bdf | 836 | { |
6e5e959d | 837 | struct pinctrl_state *state; |
befe5bdf | 838 | |
6e5e959d | 839 | state = find_state(p, name); |
5b3aa5f7 DA |
840 | if (!state) { |
841 | if (pinctrl_dummy_state) { | |
842 | /* create dummy state */ | |
843 | dev_dbg(p->dev, "using pinctrl dummy state (%s)\n", | |
844 | name); | |
845 | state = create_state(p, name); | |
d599bfb3 RG |
846 | } else |
847 | state = ERR_PTR(-ENODEV); | |
5b3aa5f7 | 848 | } |
57b676f9 | 849 | |
6e5e959d | 850 | return state; |
befe5bdf | 851 | } |
befe5bdf LW |
852 | |
853 | /** | |
6e5e959d SW |
854 | * pinctrl_lookup_state() - retrieves a state handle from a pinctrl handle |
855 | * @p: the pinctrl handle to retrieve the state from | |
856 | * @name: the state name to retrieve | |
befe5bdf | 857 | */ |
6e5e959d | 858 | struct pinctrl_state *pinctrl_lookup_state(struct pinctrl *p, const char *name) |
57b676f9 | 859 | { |
6e5e959d SW |
860 | struct pinctrl_state *s; |
861 | ||
57b676f9 | 862 | mutex_lock(&pinctrl_mutex); |
6e5e959d | 863 | s = pinctrl_lookup_state_locked(p, name); |
57b676f9 | 864 | mutex_unlock(&pinctrl_mutex); |
6e5e959d SW |
865 | |
866 | return s; | |
57b676f9 | 867 | } |
6e5e959d | 868 | EXPORT_SYMBOL_GPL(pinctrl_lookup_state); |
57b676f9 | 869 | |
6e5e959d SW |
870 | static int pinctrl_select_state_locked(struct pinctrl *p, |
871 | struct pinctrl_state *state) | |
befe5bdf | 872 | { |
6e5e959d SW |
873 | struct pinctrl_setting *setting, *setting2; |
874 | int ret; | |
7ecdb16f | 875 | |
6e5e959d SW |
876 | if (p->state == state) |
877 | return 0; | |
befe5bdf | 878 | |
6e5e959d SW |
879 | if (p->state) { |
880 | /* | |
881 | * The set of groups with a mux configuration in the old state | |
882 | * may not be identical to the set of groups with a mux setting | |
883 | * in the new state. While this might be unusual, it's entirely | |
884 | * possible for the "user"-supplied mapping table to be written | |
885 | * that way. For each group that was configured in the old state | |
886 | * but not in the new state, this code puts that group into a | |
887 | * safe/disabled state. | |
888 | */ | |
889 | list_for_each_entry(setting, &p->state->settings, node) { | |
890 | bool found = false; | |
1e2082b5 SW |
891 | if (setting->type != PIN_MAP_TYPE_MUX_GROUP) |
892 | continue; | |
6e5e959d | 893 | list_for_each_entry(setting2, &state->settings, node) { |
1e2082b5 SW |
894 | if (setting2->type != PIN_MAP_TYPE_MUX_GROUP) |
895 | continue; | |
896 | if (setting2->data.mux.group == | |
897 | setting->data.mux.group) { | |
6e5e959d SW |
898 | found = true; |
899 | break; | |
900 | } | |
901 | } | |
902 | if (!found) | |
903 | pinmux_disable_setting(setting); | |
904 | } | |
905 | } | |
906 | ||
907 | p->state = state; | |
908 | ||
909 | /* Apply all the settings for the new state */ | |
910 | list_for_each_entry(setting, &state->settings, node) { | |
1e2082b5 SW |
911 | switch (setting->type) { |
912 | case PIN_MAP_TYPE_MUX_GROUP: | |
913 | ret = pinmux_enable_setting(setting); | |
914 | break; | |
915 | case PIN_MAP_TYPE_CONFIGS_PIN: | |
916 | case PIN_MAP_TYPE_CONFIGS_GROUP: | |
917 | ret = pinconf_apply_setting(setting); | |
918 | break; | |
919 | default: | |
920 | ret = -EINVAL; | |
921 | break; | |
922 | } | |
6e5e959d SW |
923 | if (ret < 0) { |
924 | /* FIXME: Difficult to return to prev state */ | |
925 | return ret; | |
926 | } | |
befe5bdf | 927 | } |
6e5e959d SW |
928 | |
929 | return 0; | |
57b676f9 SW |
930 | } |
931 | ||
932 | /** | |
6e5e959d SW |
933 | * pinctrl_select() - select/activate/program a pinctrl state to HW |
934 | * @p: the pinctrl handle for the device that requests configuratio | |
935 | * @state: the state handle to select/activate/program | |
57b676f9 | 936 | */ |
6e5e959d | 937 | int pinctrl_select_state(struct pinctrl *p, struct pinctrl_state *state) |
57b676f9 | 938 | { |
6e5e959d SW |
939 | int ret; |
940 | ||
57b676f9 | 941 | mutex_lock(&pinctrl_mutex); |
6e5e959d | 942 | ret = pinctrl_select_state_locked(p, state); |
57b676f9 | 943 | mutex_unlock(&pinctrl_mutex); |
6e5e959d SW |
944 | |
945 | return ret; | |
befe5bdf | 946 | } |
6e5e959d | 947 | EXPORT_SYMBOL_GPL(pinctrl_select_state); |
befe5bdf | 948 | |
6d4ca1fb SW |
949 | static void devm_pinctrl_release(struct device *dev, void *res) |
950 | { | |
951 | pinctrl_put(*(struct pinctrl **)res); | |
952 | } | |
953 | ||
954 | /** | |
955 | * struct devm_pinctrl_get() - Resource managed pinctrl_get() | |
956 | * @dev: the device to obtain the handle for | |
957 | * | |
958 | * If there is a need to explicitly destroy the returned struct pinctrl, | |
959 | * devm_pinctrl_put() should be used, rather than plain pinctrl_put(). | |
960 | */ | |
961 | struct pinctrl *devm_pinctrl_get(struct device *dev) | |
962 | { | |
963 | struct pinctrl **ptr, *p; | |
964 | ||
965 | ptr = devres_alloc(devm_pinctrl_release, sizeof(*ptr), GFP_KERNEL); | |
966 | if (!ptr) | |
967 | return ERR_PTR(-ENOMEM); | |
968 | ||
969 | p = pinctrl_get(dev); | |
970 | if (!IS_ERR(p)) { | |
971 | *ptr = p; | |
972 | devres_add(dev, ptr); | |
973 | } else { | |
974 | devres_free(ptr); | |
975 | } | |
976 | ||
977 | return p; | |
978 | } | |
979 | EXPORT_SYMBOL_GPL(devm_pinctrl_get); | |
980 | ||
981 | static int devm_pinctrl_match(struct device *dev, void *res, void *data) | |
982 | { | |
983 | struct pinctrl **p = res; | |
984 | ||
985 | return *p == data; | |
986 | } | |
987 | ||
988 | /** | |
989 | * devm_pinctrl_put() - Resource managed pinctrl_put() | |
990 | * @p: the pinctrl handle to release | |
991 | * | |
992 | * Deallocate a struct pinctrl obtained via devm_pinctrl_get(). Normally | |
993 | * this function will not need to be called and the resource management | |
994 | * code will ensure that the resource is freed. | |
995 | */ | |
996 | void devm_pinctrl_put(struct pinctrl *p) | |
997 | { | |
998 | WARN_ON(devres_destroy(p->dev, devm_pinctrl_release, | |
999 | devm_pinctrl_match, p)); | |
1000 | pinctrl_put(p); | |
1001 | } | |
1002 | EXPORT_SYMBOL_GPL(devm_pinctrl_put); | |
1003 | ||
57291ce2 SW |
1004 | int pinctrl_register_map(struct pinctrl_map const *maps, unsigned num_maps, |
1005 | bool dup, bool locked) | |
befe5bdf | 1006 | { |
1e2082b5 | 1007 | int i, ret; |
b2b3e66e | 1008 | struct pinctrl_maps *maps_node; |
befe5bdf LW |
1009 | |
1010 | pr_debug("add %d pinmux maps\n", num_maps); | |
1011 | ||
1012 | /* First sanity check the new mapping */ | |
1013 | for (i = 0; i < num_maps; i++) { | |
1e2082b5 SW |
1014 | if (!maps[i].dev_name) { |
1015 | pr_err("failed to register map %s (%d): no device given\n", | |
1016 | maps[i].name, i); | |
1017 | return -EINVAL; | |
1018 | } | |
1019 | ||
befe5bdf LW |
1020 | if (!maps[i].name) { |
1021 | pr_err("failed to register map %d: no map name given\n", | |
95dcd4ae | 1022 | i); |
befe5bdf LW |
1023 | return -EINVAL; |
1024 | } | |
1025 | ||
1e2082b5 SW |
1026 | if (maps[i].type != PIN_MAP_TYPE_DUMMY_STATE && |
1027 | !maps[i].ctrl_dev_name) { | |
befe5bdf LW |
1028 | pr_err("failed to register map %s (%d): no pin control device given\n", |
1029 | maps[i].name, i); | |
1030 | return -EINVAL; | |
1031 | } | |
1032 | ||
1e2082b5 SW |
1033 | switch (maps[i].type) { |
1034 | case PIN_MAP_TYPE_DUMMY_STATE: | |
1035 | break; | |
1036 | case PIN_MAP_TYPE_MUX_GROUP: | |
1037 | ret = pinmux_validate_map(&maps[i], i); | |
1038 | if (ret < 0) | |
fde04f41 | 1039 | return ret; |
1e2082b5 SW |
1040 | break; |
1041 | case PIN_MAP_TYPE_CONFIGS_PIN: | |
1042 | case PIN_MAP_TYPE_CONFIGS_GROUP: | |
1043 | ret = pinconf_validate_map(&maps[i], i); | |
1044 | if (ret < 0) | |
fde04f41 | 1045 | return ret; |
1e2082b5 SW |
1046 | break; |
1047 | default: | |
1048 | pr_err("failed to register map %s (%d): invalid type given\n", | |
95dcd4ae | 1049 | maps[i].name, i); |
1681f5ae SW |
1050 | return -EINVAL; |
1051 | } | |
befe5bdf LW |
1052 | } |
1053 | ||
b2b3e66e SW |
1054 | maps_node = kzalloc(sizeof(*maps_node), GFP_KERNEL); |
1055 | if (!maps_node) { | |
1056 | pr_err("failed to alloc struct pinctrl_maps\n"); | |
1057 | return -ENOMEM; | |
1058 | } | |
befe5bdf | 1059 | |
b2b3e66e | 1060 | maps_node->num_maps = num_maps; |
57291ce2 SW |
1061 | if (dup) { |
1062 | maps_node->maps = kmemdup(maps, sizeof(*maps) * num_maps, | |
1063 | GFP_KERNEL); | |
1064 | if (!maps_node->maps) { | |
1065 | pr_err("failed to duplicate mapping table\n"); | |
1066 | kfree(maps_node); | |
1067 | return -ENOMEM; | |
1068 | } | |
1069 | } else { | |
1070 | maps_node->maps = maps; | |
befe5bdf LW |
1071 | } |
1072 | ||
57291ce2 SW |
1073 | if (!locked) |
1074 | mutex_lock(&pinctrl_mutex); | |
b2b3e66e | 1075 | list_add_tail(&maps_node->node, &pinctrl_maps); |
57291ce2 SW |
1076 | if (!locked) |
1077 | mutex_unlock(&pinctrl_mutex); | |
b2b3e66e | 1078 | |
befe5bdf LW |
1079 | return 0; |
1080 | } | |
1081 | ||
57291ce2 SW |
1082 | /** |
1083 | * pinctrl_register_mappings() - register a set of pin controller mappings | |
1084 | * @maps: the pincontrol mappings table to register. This should probably be | |
1085 | * marked with __initdata so it can be discarded after boot. This | |
1086 | * function will perform a shallow copy for the mapping entries. | |
1087 | * @num_maps: the number of maps in the mapping table | |
1088 | */ | |
1089 | int pinctrl_register_mappings(struct pinctrl_map const *maps, | |
1090 | unsigned num_maps) | |
1091 | { | |
1092 | return pinctrl_register_map(maps, num_maps, true, false); | |
1093 | } | |
1094 | ||
1095 | void pinctrl_unregister_map(struct pinctrl_map const *map) | |
1096 | { | |
1097 | struct pinctrl_maps *maps_node; | |
1098 | ||
1099 | list_for_each_entry(maps_node, &pinctrl_maps, node) { | |
1100 | if (maps_node->maps == map) { | |
1101 | list_del(&maps_node->node); | |
1102 | return; | |
1103 | } | |
1104 | } | |
1105 | } | |
1106 | ||
840a47ba JD |
1107 | /** |
1108 | * pinctrl_force_sleep() - turn a given controller device into sleep state | |
1109 | * @pctldev: pin controller device | |
1110 | */ | |
1111 | int pinctrl_force_sleep(struct pinctrl_dev *pctldev) | |
1112 | { | |
1113 | if (!IS_ERR(pctldev->p) && !IS_ERR(pctldev->hog_sleep)) | |
1114 | return pinctrl_select_state(pctldev->p, pctldev->hog_sleep); | |
1115 | return 0; | |
1116 | } | |
1117 | EXPORT_SYMBOL_GPL(pinctrl_force_sleep); | |
1118 | ||
1119 | /** | |
1120 | * pinctrl_force_default() - turn a given controller device into default state | |
1121 | * @pctldev: pin controller device | |
1122 | */ | |
1123 | int pinctrl_force_default(struct pinctrl_dev *pctldev) | |
1124 | { | |
1125 | if (!IS_ERR(pctldev->p) && !IS_ERR(pctldev->hog_default)) | |
1126 | return pinctrl_select_state(pctldev->p, pctldev->hog_default); | |
1127 | return 0; | |
1128 | } | |
1129 | EXPORT_SYMBOL_GPL(pinctrl_force_default); | |
1130 | ||
2744e8af LW |
1131 | #ifdef CONFIG_DEBUG_FS |
1132 | ||
1133 | static int pinctrl_pins_show(struct seq_file *s, void *what) | |
1134 | { | |
1135 | struct pinctrl_dev *pctldev = s->private; | |
1136 | const struct pinctrl_ops *ops = pctldev->desc->pctlops; | |
706e8520 | 1137 | unsigned i, pin; |
2744e8af LW |
1138 | |
1139 | seq_printf(s, "registered pins: %d\n", pctldev->desc->npins); | |
2744e8af | 1140 | |
57b676f9 SW |
1141 | mutex_lock(&pinctrl_mutex); |
1142 | ||
706e8520 CP |
1143 | /* The pin number can be retrived from the pin controller descriptor */ |
1144 | for (i = 0; i < pctldev->desc->npins; i++) { | |
2744e8af LW |
1145 | struct pin_desc *desc; |
1146 | ||
706e8520 | 1147 | pin = pctldev->desc->pins[i].number; |
2744e8af LW |
1148 | desc = pin_desc_get(pctldev, pin); |
1149 | /* Pin space may be sparse */ | |
1150 | if (desc == NULL) | |
1151 | continue; | |
1152 | ||
1153 | seq_printf(s, "pin %d (%s) ", pin, | |
1154 | desc->name ? desc->name : "unnamed"); | |
1155 | ||
1156 | /* Driver-specific info per pin */ | |
1157 | if (ops->pin_dbg_show) | |
1158 | ops->pin_dbg_show(pctldev, s, pin); | |
1159 | ||
1160 | seq_puts(s, "\n"); | |
1161 | } | |
1162 | ||
57b676f9 SW |
1163 | mutex_unlock(&pinctrl_mutex); |
1164 | ||
2744e8af LW |
1165 | return 0; |
1166 | } | |
1167 | ||
1168 | static int pinctrl_groups_show(struct seq_file *s, void *what) | |
1169 | { | |
1170 | struct pinctrl_dev *pctldev = s->private; | |
1171 | const struct pinctrl_ops *ops = pctldev->desc->pctlops; | |
d1e90e9e | 1172 | unsigned ngroups, selector = 0; |
2744e8af | 1173 | |
d1e90e9e | 1174 | ngroups = ops->get_groups_count(pctldev); |
57b676f9 SW |
1175 | mutex_lock(&pinctrl_mutex); |
1176 | ||
2744e8af | 1177 | seq_puts(s, "registered pin groups:\n"); |
d1e90e9e | 1178 | while (selector < ngroups) { |
a5818a8b | 1179 | const unsigned *pins; |
2744e8af LW |
1180 | unsigned num_pins; |
1181 | const char *gname = ops->get_group_name(pctldev, selector); | |
dcb5dbc3 | 1182 | const char *pname; |
2744e8af LW |
1183 | int ret; |
1184 | int i; | |
1185 | ||
1186 | ret = ops->get_group_pins(pctldev, selector, | |
1187 | &pins, &num_pins); | |
1188 | if (ret) | |
1189 | seq_printf(s, "%s [ERROR GETTING PINS]\n", | |
1190 | gname); | |
1191 | else { | |
dcb5dbc3 DA |
1192 | seq_printf(s, "group: %s\n", gname); |
1193 | for (i = 0; i < num_pins; i++) { | |
1194 | pname = pin_get_name(pctldev, pins[i]); | |
b4dd784b WY |
1195 | if (WARN_ON(!pname)) { |
1196 | mutex_unlock(&pinctrl_mutex); | |
dcb5dbc3 | 1197 | return -EINVAL; |
b4dd784b | 1198 | } |
dcb5dbc3 DA |
1199 | seq_printf(s, "pin %d (%s)\n", pins[i], pname); |
1200 | } | |
1201 | seq_puts(s, "\n"); | |
2744e8af LW |
1202 | } |
1203 | selector++; | |
1204 | } | |
1205 | ||
57b676f9 | 1206 | mutex_unlock(&pinctrl_mutex); |
2744e8af LW |
1207 | |
1208 | return 0; | |
1209 | } | |
1210 | ||
1211 | static int pinctrl_gpioranges_show(struct seq_file *s, void *what) | |
1212 | { | |
1213 | struct pinctrl_dev *pctldev = s->private; | |
1214 | struct pinctrl_gpio_range *range = NULL; | |
1215 | ||
1216 | seq_puts(s, "GPIO ranges handled:\n"); | |
1217 | ||
57b676f9 SW |
1218 | mutex_lock(&pinctrl_mutex); |
1219 | ||
2744e8af | 1220 | /* Loop over the ranges */ |
2744e8af | 1221 | list_for_each_entry(range, &pctldev->gpio_ranges, node) { |
75d6642a LW |
1222 | seq_printf(s, "%u: %s GPIOS [%u - %u] PINS [%u - %u]\n", |
1223 | range->id, range->name, | |
1224 | range->base, (range->base + range->npins - 1), | |
1225 | range->pin_base, | |
1226 | (range->pin_base + range->npins - 1)); | |
2744e8af | 1227 | } |
57b676f9 SW |
1228 | |
1229 | mutex_unlock(&pinctrl_mutex); | |
2744e8af LW |
1230 | |
1231 | return 0; | |
1232 | } | |
1233 | ||
1234 | static int pinctrl_devices_show(struct seq_file *s, void *what) | |
1235 | { | |
1236 | struct pinctrl_dev *pctldev; | |
1237 | ||
ae6b4d85 | 1238 | seq_puts(s, "name [pinmux] [pinconf]\n"); |
57b676f9 SW |
1239 | |
1240 | mutex_lock(&pinctrl_mutex); | |
1241 | ||
2744e8af LW |
1242 | list_for_each_entry(pctldev, &pinctrldev_list, node) { |
1243 | seq_printf(s, "%s ", pctldev->desc->name); | |
1244 | if (pctldev->desc->pmxops) | |
ae6b4d85 LW |
1245 | seq_puts(s, "yes "); |
1246 | else | |
1247 | seq_puts(s, "no "); | |
1248 | if (pctldev->desc->confops) | |
2744e8af LW |
1249 | seq_puts(s, "yes"); |
1250 | else | |
1251 | seq_puts(s, "no"); | |
1252 | seq_puts(s, "\n"); | |
1253 | } | |
57b676f9 SW |
1254 | |
1255 | mutex_unlock(&pinctrl_mutex); | |
2744e8af LW |
1256 | |
1257 | return 0; | |
1258 | } | |
1259 | ||
1e2082b5 SW |
1260 | static inline const char *map_type(enum pinctrl_map_type type) |
1261 | { | |
1262 | static const char * const names[] = { | |
1263 | "INVALID", | |
1264 | "DUMMY_STATE", | |
1265 | "MUX_GROUP", | |
1266 | "CONFIGS_PIN", | |
1267 | "CONFIGS_GROUP", | |
1268 | }; | |
1269 | ||
1270 | if (type >= ARRAY_SIZE(names)) | |
1271 | return "UNKNOWN"; | |
1272 | ||
1273 | return names[type]; | |
1274 | } | |
1275 | ||
3eedb437 SW |
1276 | static int pinctrl_maps_show(struct seq_file *s, void *what) |
1277 | { | |
1278 | struct pinctrl_maps *maps_node; | |
1279 | int i; | |
1280 | struct pinctrl_map const *map; | |
1281 | ||
1282 | seq_puts(s, "Pinctrl maps:\n"); | |
1283 | ||
57b676f9 SW |
1284 | mutex_lock(&pinctrl_mutex); |
1285 | ||
3eedb437 | 1286 | for_each_maps(maps_node, i, map) { |
1e2082b5 SW |
1287 | seq_printf(s, "device %s\nstate %s\ntype %s (%d)\n", |
1288 | map->dev_name, map->name, map_type(map->type), | |
1289 | map->type); | |
1290 | ||
1291 | if (map->type != PIN_MAP_TYPE_DUMMY_STATE) | |
1292 | seq_printf(s, "controlling device %s\n", | |
1293 | map->ctrl_dev_name); | |
1294 | ||
1295 | switch (map->type) { | |
1296 | case PIN_MAP_TYPE_MUX_GROUP: | |
1297 | pinmux_show_map(s, map); | |
1298 | break; | |
1299 | case PIN_MAP_TYPE_CONFIGS_PIN: | |
1300 | case PIN_MAP_TYPE_CONFIGS_GROUP: | |
1301 | pinconf_show_map(s, map); | |
1302 | break; | |
1303 | default: | |
1304 | break; | |
1305 | } | |
1306 | ||
1307 | seq_printf(s, "\n"); | |
3eedb437 | 1308 | } |
57b676f9 SW |
1309 | |
1310 | mutex_unlock(&pinctrl_mutex); | |
3eedb437 SW |
1311 | |
1312 | return 0; | |
1313 | } | |
1314 | ||
befe5bdf LW |
1315 | static int pinctrl_show(struct seq_file *s, void *what) |
1316 | { | |
1317 | struct pinctrl *p; | |
6e5e959d | 1318 | struct pinctrl_state *state; |
7ecdb16f | 1319 | struct pinctrl_setting *setting; |
befe5bdf LW |
1320 | |
1321 | seq_puts(s, "Requested pin control handlers their pinmux maps:\n"); | |
57b676f9 SW |
1322 | |
1323 | mutex_lock(&pinctrl_mutex); | |
1324 | ||
befe5bdf | 1325 | list_for_each_entry(p, &pinctrl_list, node) { |
6e5e959d SW |
1326 | seq_printf(s, "device: %s current state: %s\n", |
1327 | dev_name(p->dev), | |
1328 | p->state ? p->state->name : "none"); | |
1329 | ||
1330 | list_for_each_entry(state, &p->states, node) { | |
1331 | seq_printf(s, " state: %s\n", state->name); | |
befe5bdf | 1332 | |
6e5e959d | 1333 | list_for_each_entry(setting, &state->settings, node) { |
1e2082b5 SW |
1334 | struct pinctrl_dev *pctldev = setting->pctldev; |
1335 | ||
1336 | seq_printf(s, " type: %s controller %s ", | |
1337 | map_type(setting->type), | |
1338 | pinctrl_dev_get_name(pctldev)); | |
1339 | ||
1340 | switch (setting->type) { | |
1341 | case PIN_MAP_TYPE_MUX_GROUP: | |
1342 | pinmux_show_setting(s, setting); | |
1343 | break; | |
1344 | case PIN_MAP_TYPE_CONFIGS_PIN: | |
1345 | case PIN_MAP_TYPE_CONFIGS_GROUP: | |
1346 | pinconf_show_setting(s, setting); | |
1347 | break; | |
1348 | default: | |
1349 | break; | |
1350 | } | |
6e5e959d | 1351 | } |
befe5bdf | 1352 | } |
befe5bdf LW |
1353 | } |
1354 | ||
57b676f9 SW |
1355 | mutex_unlock(&pinctrl_mutex); |
1356 | ||
befe5bdf LW |
1357 | return 0; |
1358 | } | |
1359 | ||
2744e8af LW |
1360 | static int pinctrl_pins_open(struct inode *inode, struct file *file) |
1361 | { | |
1362 | return single_open(file, pinctrl_pins_show, inode->i_private); | |
1363 | } | |
1364 | ||
1365 | static int pinctrl_groups_open(struct inode *inode, struct file *file) | |
1366 | { | |
1367 | return single_open(file, pinctrl_groups_show, inode->i_private); | |
1368 | } | |
1369 | ||
1370 | static int pinctrl_gpioranges_open(struct inode *inode, struct file *file) | |
1371 | { | |
1372 | return single_open(file, pinctrl_gpioranges_show, inode->i_private); | |
1373 | } | |
1374 | ||
1375 | static int pinctrl_devices_open(struct inode *inode, struct file *file) | |
1376 | { | |
1377 | return single_open(file, pinctrl_devices_show, NULL); | |
1378 | } | |
1379 | ||
3eedb437 SW |
1380 | static int pinctrl_maps_open(struct inode *inode, struct file *file) |
1381 | { | |
1382 | return single_open(file, pinctrl_maps_show, NULL); | |
1383 | } | |
1384 | ||
befe5bdf LW |
1385 | static int pinctrl_open(struct inode *inode, struct file *file) |
1386 | { | |
1387 | return single_open(file, pinctrl_show, NULL); | |
1388 | } | |
1389 | ||
2744e8af LW |
1390 | static const struct file_operations pinctrl_pins_ops = { |
1391 | .open = pinctrl_pins_open, | |
1392 | .read = seq_read, | |
1393 | .llseek = seq_lseek, | |
1394 | .release = single_release, | |
1395 | }; | |
1396 | ||
1397 | static const struct file_operations pinctrl_groups_ops = { | |
1398 | .open = pinctrl_groups_open, | |
1399 | .read = seq_read, | |
1400 | .llseek = seq_lseek, | |
1401 | .release = single_release, | |
1402 | }; | |
1403 | ||
1404 | static const struct file_operations pinctrl_gpioranges_ops = { | |
1405 | .open = pinctrl_gpioranges_open, | |
1406 | .read = seq_read, | |
1407 | .llseek = seq_lseek, | |
1408 | .release = single_release, | |
1409 | }; | |
1410 | ||
3eedb437 SW |
1411 | static const struct file_operations pinctrl_devices_ops = { |
1412 | .open = pinctrl_devices_open, | |
befe5bdf LW |
1413 | .read = seq_read, |
1414 | .llseek = seq_lseek, | |
1415 | .release = single_release, | |
1416 | }; | |
1417 | ||
3eedb437 SW |
1418 | static const struct file_operations pinctrl_maps_ops = { |
1419 | .open = pinctrl_maps_open, | |
2744e8af LW |
1420 | .read = seq_read, |
1421 | .llseek = seq_lseek, | |
1422 | .release = single_release, | |
1423 | }; | |
1424 | ||
befe5bdf LW |
1425 | static const struct file_operations pinctrl_ops = { |
1426 | .open = pinctrl_open, | |
1427 | .read = seq_read, | |
1428 | .llseek = seq_lseek, | |
1429 | .release = single_release, | |
1430 | }; | |
1431 | ||
2744e8af LW |
1432 | static struct dentry *debugfs_root; |
1433 | ||
1434 | static void pinctrl_init_device_debugfs(struct pinctrl_dev *pctldev) | |
1435 | { | |
02157160 | 1436 | struct dentry *device_root; |
2744e8af | 1437 | |
51cd24ee | 1438 | device_root = debugfs_create_dir(dev_name(pctldev->dev), |
2744e8af | 1439 | debugfs_root); |
02157160 TL |
1440 | pctldev->device_root = device_root; |
1441 | ||
2744e8af LW |
1442 | if (IS_ERR(device_root) || !device_root) { |
1443 | pr_warn("failed to create debugfs directory for %s\n", | |
51cd24ee | 1444 | dev_name(pctldev->dev)); |
2744e8af LW |
1445 | return; |
1446 | } | |
1447 | debugfs_create_file("pins", S_IFREG | S_IRUGO, | |
1448 | device_root, pctldev, &pinctrl_pins_ops); | |
1449 | debugfs_create_file("pingroups", S_IFREG | S_IRUGO, | |
1450 | device_root, pctldev, &pinctrl_groups_ops); | |
1451 | debugfs_create_file("gpio-ranges", S_IFREG | S_IRUGO, | |
1452 | device_root, pctldev, &pinctrl_gpioranges_ops); | |
1453 | pinmux_init_device_debugfs(device_root, pctldev); | |
ae6b4d85 | 1454 | pinconf_init_device_debugfs(device_root, pctldev); |
2744e8af LW |
1455 | } |
1456 | ||
02157160 TL |
1457 | static void pinctrl_remove_device_debugfs(struct pinctrl_dev *pctldev) |
1458 | { | |
1459 | debugfs_remove_recursive(pctldev->device_root); | |
1460 | } | |
1461 | ||
2744e8af LW |
1462 | static void pinctrl_init_debugfs(void) |
1463 | { | |
1464 | debugfs_root = debugfs_create_dir("pinctrl", NULL); | |
1465 | if (IS_ERR(debugfs_root) || !debugfs_root) { | |
1466 | pr_warn("failed to create debugfs directory\n"); | |
1467 | debugfs_root = NULL; | |
1468 | return; | |
1469 | } | |
1470 | ||
1471 | debugfs_create_file("pinctrl-devices", S_IFREG | S_IRUGO, | |
1472 | debugfs_root, NULL, &pinctrl_devices_ops); | |
3eedb437 SW |
1473 | debugfs_create_file("pinctrl-maps", S_IFREG | S_IRUGO, |
1474 | debugfs_root, NULL, &pinctrl_maps_ops); | |
befe5bdf LW |
1475 | debugfs_create_file("pinctrl-handles", S_IFREG | S_IRUGO, |
1476 | debugfs_root, NULL, &pinctrl_ops); | |
2744e8af LW |
1477 | } |
1478 | ||
1479 | #else /* CONFIG_DEBUG_FS */ | |
1480 | ||
1481 | static void pinctrl_init_device_debugfs(struct pinctrl_dev *pctldev) | |
1482 | { | |
1483 | } | |
1484 | ||
1485 | static void pinctrl_init_debugfs(void) | |
1486 | { | |
1487 | } | |
1488 | ||
02157160 TL |
1489 | static void pinctrl_remove_device_debugfs(struct pinctrl_dev *pctldev) |
1490 | { | |
1491 | } | |
1492 | ||
2744e8af LW |
1493 | #endif |
1494 | ||
d26bc49f SW |
1495 | static int pinctrl_check_ops(struct pinctrl_dev *pctldev) |
1496 | { | |
1497 | const struct pinctrl_ops *ops = pctldev->desc->pctlops; | |
1498 | ||
1499 | if (!ops || | |
d1e90e9e | 1500 | !ops->get_groups_count || |
d26bc49f SW |
1501 | !ops->get_group_name || |
1502 | !ops->get_group_pins) | |
1503 | return -EINVAL; | |
1504 | ||
57291ce2 SW |
1505 | if (ops->dt_node_to_map && !ops->dt_free_map) |
1506 | return -EINVAL; | |
1507 | ||
d26bc49f SW |
1508 | return 0; |
1509 | } | |
1510 | ||
2744e8af LW |
1511 | /** |
1512 | * pinctrl_register() - register a pin controller device | |
1513 | * @pctldesc: descriptor for this pin controller | |
1514 | * @dev: parent device for this pin controller | |
1515 | * @driver_data: private pin controller data for this pin controller | |
1516 | */ | |
1517 | struct pinctrl_dev *pinctrl_register(struct pinctrl_desc *pctldesc, | |
1518 | struct device *dev, void *driver_data) | |
1519 | { | |
2744e8af LW |
1520 | struct pinctrl_dev *pctldev; |
1521 | int ret; | |
1522 | ||
da9aecb0 | 1523 | if (!pctldesc) |
2744e8af | 1524 | return NULL; |
da9aecb0 | 1525 | if (!pctldesc->name) |
2744e8af LW |
1526 | return NULL; |
1527 | ||
02f5b989 | 1528 | pctldev = kzalloc(sizeof(*pctldev), GFP_KERNEL); |
95dcd4ae SW |
1529 | if (pctldev == NULL) { |
1530 | dev_err(dev, "failed to alloc struct pinctrl_dev\n"); | |
b9130b77 | 1531 | return NULL; |
95dcd4ae | 1532 | } |
b9130b77 TL |
1533 | |
1534 | /* Initialize pin control device struct */ | |
1535 | pctldev->owner = pctldesc->owner; | |
1536 | pctldev->desc = pctldesc; | |
1537 | pctldev->driver_data = driver_data; | |
1538 | INIT_RADIX_TREE(&pctldev->pin_desc_tree, GFP_KERNEL); | |
b9130b77 | 1539 | INIT_LIST_HEAD(&pctldev->gpio_ranges); |
b9130b77 TL |
1540 | pctldev->dev = dev; |
1541 | ||
d26bc49f | 1542 | /* check core ops for sanity */ |
da9aecb0 | 1543 | if (pinctrl_check_ops(pctldev)) { |
ad6e1107 | 1544 | dev_err(dev, "pinctrl ops lacks necessary functions\n"); |
d26bc49f SW |
1545 | goto out_err; |
1546 | } | |
1547 | ||
2744e8af LW |
1548 | /* If we're implementing pinmuxing, check the ops for sanity */ |
1549 | if (pctldesc->pmxops) { | |
da9aecb0 | 1550 | if (pinmux_check_ops(pctldev)) |
b9130b77 | 1551 | goto out_err; |
2744e8af LW |
1552 | } |
1553 | ||
ae6b4d85 LW |
1554 | /* If we're implementing pinconfig, check the ops for sanity */ |
1555 | if (pctldesc->confops) { | |
da9aecb0 | 1556 | if (pinconf_check_ops(pctldev)) |
b9130b77 | 1557 | goto out_err; |
ae6b4d85 LW |
1558 | } |
1559 | ||
2744e8af | 1560 | /* Register all the pins */ |
ad6e1107 | 1561 | dev_dbg(dev, "try to register %d pins ...\n", pctldesc->npins); |
2744e8af LW |
1562 | ret = pinctrl_register_pins(pctldev, pctldesc->pins, pctldesc->npins); |
1563 | if (ret) { | |
ad6e1107 | 1564 | dev_err(dev, "error during pin registration\n"); |
2744e8af LW |
1565 | pinctrl_free_pindescs(pctldev, pctldesc->pins, |
1566 | pctldesc->npins); | |
51cd24ee | 1567 | goto out_err; |
2744e8af LW |
1568 | } |
1569 | ||
57b676f9 SW |
1570 | mutex_lock(&pinctrl_mutex); |
1571 | ||
8b9c139f | 1572 | list_add_tail(&pctldev->node, &pinctrldev_list); |
57b676f9 | 1573 | |
6e5e959d SW |
1574 | pctldev->p = pinctrl_get_locked(pctldev->dev); |
1575 | if (!IS_ERR(pctldev->p)) { | |
840a47ba | 1576 | pctldev->hog_default = |
6e5e959d SW |
1577 | pinctrl_lookup_state_locked(pctldev->p, |
1578 | PINCTRL_STATE_DEFAULT); | |
840a47ba | 1579 | if (IS_ERR(pctldev->hog_default)) { |
ad6e1107 JC |
1580 | dev_dbg(dev, "failed to lookup the default state\n"); |
1581 | } else { | |
840a47ba JD |
1582 | if (pinctrl_select_state_locked(pctldev->p, |
1583 | pctldev->hog_default)) | |
ad6e1107 JC |
1584 | dev_err(dev, |
1585 | "failed to select default state\n"); | |
ad6e1107 | 1586 | } |
840a47ba JD |
1587 | |
1588 | pctldev->hog_sleep = | |
1589 | pinctrl_lookup_state_locked(pctldev->p, | |
1590 | PINCTRL_STATE_SLEEP); | |
1591 | if (IS_ERR(pctldev->hog_sleep)) | |
1592 | dev_dbg(dev, "failed to lookup the sleep state\n"); | |
6e5e959d | 1593 | } |
57b676f9 SW |
1594 | |
1595 | mutex_unlock(&pinctrl_mutex); | |
1596 | ||
2304b473 SW |
1597 | pinctrl_init_device_debugfs(pctldev); |
1598 | ||
2744e8af LW |
1599 | return pctldev; |
1600 | ||
51cd24ee SW |
1601 | out_err: |
1602 | kfree(pctldev); | |
2744e8af LW |
1603 | return NULL; |
1604 | } | |
1605 | EXPORT_SYMBOL_GPL(pinctrl_register); | |
1606 | ||
1607 | /** | |
1608 | * pinctrl_unregister() - unregister pinmux | |
1609 | * @pctldev: pin controller to unregister | |
1610 | * | |
1611 | * Called by pinmux drivers to unregister a pinmux. | |
1612 | */ | |
1613 | void pinctrl_unregister(struct pinctrl_dev *pctldev) | |
1614 | { | |
5d589b09 | 1615 | struct pinctrl_gpio_range *range, *n; |
2744e8af LW |
1616 | if (pctldev == NULL) |
1617 | return; | |
1618 | ||
02157160 | 1619 | pinctrl_remove_device_debugfs(pctldev); |
57b676f9 SW |
1620 | |
1621 | mutex_lock(&pinctrl_mutex); | |
1622 | ||
6e5e959d SW |
1623 | if (!IS_ERR(pctldev->p)) |
1624 | pinctrl_put_locked(pctldev->p, true); | |
57b676f9 | 1625 | |
2744e8af | 1626 | /* TODO: check that no pinmuxes are still active? */ |
2744e8af | 1627 | list_del(&pctldev->node); |
2744e8af LW |
1628 | /* Destroy descriptor tree */ |
1629 | pinctrl_free_pindescs(pctldev, pctldev->desc->pins, | |
1630 | pctldev->desc->npins); | |
5d589b09 DA |
1631 | /* remove gpio ranges map */ |
1632 | list_for_each_entry_safe(range, n, &pctldev->gpio_ranges, node) | |
1633 | list_del(&range->node); | |
1634 | ||
51cd24ee | 1635 | kfree(pctldev); |
57b676f9 SW |
1636 | |
1637 | mutex_unlock(&pinctrl_mutex); | |
2744e8af LW |
1638 | } |
1639 | EXPORT_SYMBOL_GPL(pinctrl_unregister); | |
1640 | ||
1641 | static int __init pinctrl_init(void) | |
1642 | { | |
1643 | pr_info("initialized pinctrl subsystem\n"); | |
1644 | pinctrl_init_debugfs(); | |
1645 | return 0; | |
1646 | } | |
1647 | ||
1648 | /* init early since many drivers really need to initialized pinmux early */ | |
1649 | core_initcall(pinctrl_init); |