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6ac73095 BG |
1 | /* |
2 | * Pin controller and GPIO driver for Amlogic Meson8. | |
3 | * | |
4 | * Copyright (C) 2014 Beniamino Galvani <b.galvani@gmail.com> | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or | |
7 | * modify it under the terms of the GNU General Public License | |
8 | * version 2 as published by the Free Software Foundation. | |
9 | * | |
10 | * You should have received a copy of the GNU General Public License | |
11 | * along with this program. If not, see <http://www.gnu.org/licenses/>. | |
12 | */ | |
13 | ||
14 | #include <dt-bindings/gpio/meson8-gpio.h> | |
15 | #include "pinctrl-meson.h" | |
16 | ||
0cf6f3c2 | 17 | #define AO_OFF 120 |
6ac73095 | 18 | |
9dab1868 | 19 | static const struct pinctrl_pin_desc meson8_cbus_pins[] = { |
0cf6f3c2 CC |
20 | MESON_PIN(GPIOX_0, 0), |
21 | MESON_PIN(GPIOX_1, 0), | |
22 | MESON_PIN(GPIOX_2, 0), | |
23 | MESON_PIN(GPIOX_3, 0), | |
24 | MESON_PIN(GPIOX_4, 0), | |
25 | MESON_PIN(GPIOX_5, 0), | |
26 | MESON_PIN(GPIOX_6, 0), | |
27 | MESON_PIN(GPIOX_7, 0), | |
28 | MESON_PIN(GPIOX_8, 0), | |
29 | MESON_PIN(GPIOX_9, 0), | |
30 | MESON_PIN(GPIOX_10, 0), | |
31 | MESON_PIN(GPIOX_11, 0), | |
32 | MESON_PIN(GPIOX_12, 0), | |
33 | MESON_PIN(GPIOX_13, 0), | |
34 | MESON_PIN(GPIOX_14, 0), | |
35 | MESON_PIN(GPIOX_15, 0), | |
36 | MESON_PIN(GPIOX_16, 0), | |
37 | MESON_PIN(GPIOX_17, 0), | |
38 | MESON_PIN(GPIOX_18, 0), | |
39 | MESON_PIN(GPIOX_19, 0), | |
40 | MESON_PIN(GPIOX_20, 0), | |
41 | MESON_PIN(GPIOX_21, 0), | |
42 | MESON_PIN(GPIOY_0, 0), | |
43 | MESON_PIN(GPIOY_1, 0), | |
44 | MESON_PIN(GPIOY_2, 0), | |
45 | MESON_PIN(GPIOY_3, 0), | |
46 | MESON_PIN(GPIOY_4, 0), | |
47 | MESON_PIN(GPIOY_5, 0), | |
48 | MESON_PIN(GPIOY_6, 0), | |
49 | MESON_PIN(GPIOY_7, 0), | |
50 | MESON_PIN(GPIOY_8, 0), | |
51 | MESON_PIN(GPIOY_9, 0), | |
52 | MESON_PIN(GPIOY_10, 0), | |
53 | MESON_PIN(GPIOY_11, 0), | |
54 | MESON_PIN(GPIOY_12, 0), | |
55 | MESON_PIN(GPIOY_13, 0), | |
56 | MESON_PIN(GPIOY_14, 0), | |
57 | MESON_PIN(GPIOY_15, 0), | |
58 | MESON_PIN(GPIOY_16, 0), | |
59 | MESON_PIN(GPIODV_0, 0), | |
60 | MESON_PIN(GPIODV_1, 0), | |
61 | MESON_PIN(GPIODV_2, 0), | |
62 | MESON_PIN(GPIODV_3, 0), | |
63 | MESON_PIN(GPIODV_4, 0), | |
64 | MESON_PIN(GPIODV_5, 0), | |
65 | MESON_PIN(GPIODV_6, 0), | |
66 | MESON_PIN(GPIODV_7, 0), | |
67 | MESON_PIN(GPIODV_8, 0), | |
68 | MESON_PIN(GPIODV_9, 0), | |
69 | MESON_PIN(GPIODV_10, 0), | |
70 | MESON_PIN(GPIODV_11, 0), | |
71 | MESON_PIN(GPIODV_12, 0), | |
72 | MESON_PIN(GPIODV_13, 0), | |
73 | MESON_PIN(GPIODV_14, 0), | |
74 | MESON_PIN(GPIODV_15, 0), | |
75 | MESON_PIN(GPIODV_16, 0), | |
76 | MESON_PIN(GPIODV_17, 0), | |
77 | MESON_PIN(GPIODV_18, 0), | |
78 | MESON_PIN(GPIODV_19, 0), | |
79 | MESON_PIN(GPIODV_20, 0), | |
80 | MESON_PIN(GPIODV_21, 0), | |
81 | MESON_PIN(GPIODV_22, 0), | |
82 | MESON_PIN(GPIODV_23, 0), | |
83 | MESON_PIN(GPIODV_24, 0), | |
84 | MESON_PIN(GPIODV_25, 0), | |
85 | MESON_PIN(GPIODV_26, 0), | |
86 | MESON_PIN(GPIODV_27, 0), | |
87 | MESON_PIN(GPIODV_28, 0), | |
88 | MESON_PIN(GPIODV_29, 0), | |
89 | MESON_PIN(GPIOH_0, 0), | |
90 | MESON_PIN(GPIOH_1, 0), | |
91 | MESON_PIN(GPIOH_2, 0), | |
92 | MESON_PIN(GPIOH_3, 0), | |
93 | MESON_PIN(GPIOH_4, 0), | |
94 | MESON_PIN(GPIOH_5, 0), | |
95 | MESON_PIN(GPIOH_6, 0), | |
96 | MESON_PIN(GPIOH_7, 0), | |
97 | MESON_PIN(GPIOH_8, 0), | |
98 | MESON_PIN(GPIOH_9, 0), | |
99 | MESON_PIN(GPIOZ_0, 0), | |
100 | MESON_PIN(GPIOZ_1, 0), | |
101 | MESON_PIN(GPIOZ_2, 0), | |
102 | MESON_PIN(GPIOZ_3, 0), | |
103 | MESON_PIN(GPIOZ_4, 0), | |
104 | MESON_PIN(GPIOZ_5, 0), | |
105 | MESON_PIN(GPIOZ_6, 0), | |
106 | MESON_PIN(GPIOZ_7, 0), | |
107 | MESON_PIN(GPIOZ_8, 0), | |
108 | MESON_PIN(GPIOZ_9, 0), | |
109 | MESON_PIN(GPIOZ_10, 0), | |
110 | MESON_PIN(GPIOZ_11, 0), | |
111 | MESON_PIN(GPIOZ_12, 0), | |
112 | MESON_PIN(GPIOZ_13, 0), | |
113 | MESON_PIN(GPIOZ_14, 0), | |
114 | MESON_PIN(CARD_0, 0), | |
115 | MESON_PIN(CARD_1, 0), | |
116 | MESON_PIN(CARD_2, 0), | |
117 | MESON_PIN(CARD_3, 0), | |
118 | MESON_PIN(CARD_4, 0), | |
119 | MESON_PIN(CARD_5, 0), | |
120 | MESON_PIN(CARD_6, 0), | |
121 | MESON_PIN(BOOT_0, 0), | |
122 | MESON_PIN(BOOT_1, 0), | |
123 | MESON_PIN(BOOT_2, 0), | |
124 | MESON_PIN(BOOT_3, 0), | |
125 | MESON_PIN(BOOT_4, 0), | |
126 | MESON_PIN(BOOT_5, 0), | |
127 | MESON_PIN(BOOT_6, 0), | |
128 | MESON_PIN(BOOT_7, 0), | |
129 | MESON_PIN(BOOT_8, 0), | |
130 | MESON_PIN(BOOT_9, 0), | |
131 | MESON_PIN(BOOT_10, 0), | |
132 | MESON_PIN(BOOT_11, 0), | |
133 | MESON_PIN(BOOT_12, 0), | |
134 | MESON_PIN(BOOT_13, 0), | |
135 | MESON_PIN(BOOT_14, 0), | |
136 | MESON_PIN(BOOT_15, 0), | |
137 | MESON_PIN(BOOT_16, 0), | |
138 | MESON_PIN(BOOT_17, 0), | |
139 | MESON_PIN(BOOT_18, 0), | |
9dab1868 CC |
140 | }; |
141 | ||
142 | static const struct pinctrl_pin_desc meson8_aobus_pins[] = { | |
0cf6f3c2 CC |
143 | MESON_PIN(GPIOAO_0, AO_OFF), |
144 | MESON_PIN(GPIOAO_1, AO_OFF), | |
145 | MESON_PIN(GPIOAO_2, AO_OFF), | |
146 | MESON_PIN(GPIOAO_3, AO_OFF), | |
147 | MESON_PIN(GPIOAO_4, AO_OFF), | |
148 | MESON_PIN(GPIOAO_5, AO_OFF), | |
149 | MESON_PIN(GPIOAO_6, AO_OFF), | |
150 | MESON_PIN(GPIOAO_7, AO_OFF), | |
151 | MESON_PIN(GPIOAO_8, AO_OFF), | |
152 | MESON_PIN(GPIOAO_9, AO_OFF), | |
153 | MESON_PIN(GPIOAO_10, AO_OFF), | |
154 | MESON_PIN(GPIOAO_11, AO_OFF), | |
155 | MESON_PIN(GPIOAO_12, AO_OFF), | |
156 | MESON_PIN(GPIOAO_13, AO_OFF), | |
157 | MESON_PIN(GPIO_BSD_EN, AO_OFF), | |
158 | MESON_PIN(GPIO_TEST_N, AO_OFF), | |
6ac73095 BG |
159 | }; |
160 | ||
161 | /* bank X */ | |
0cf6f3c2 CC |
162 | static const unsigned int sd_d0_a_pins[] = { PIN(GPIOX_0, 0) }; |
163 | static const unsigned int sd_d1_a_pins[] = { PIN(GPIOX_1, 0) }; | |
164 | static const unsigned int sd_d2_a_pins[] = { PIN(GPIOX_2, 0) }; | |
165 | static const unsigned int sd_d3_a_pins[] = { PIN(GPIOX_3, 0) }; | |
166 | static const unsigned int sd_clk_a_pins[] = { PIN(GPIOX_8, 0) }; | |
167 | static const unsigned int sd_cmd_a_pins[] = { PIN(GPIOX_9, 0) }; | |
168 | ||
169 | static const unsigned int sdxc_d0_a_pins[] = { PIN(GPIOX_0, 0) }; | |
170 | static const unsigned int sdxc_d13_a_pins[] = { PIN(GPIOX_1, 0), PIN(GPIOX_2, 0), | |
171 | PIN(GPIOX_3, 0) }; | |
172 | static const unsigned int sdxc_d47_a_pins[] = { PIN(GPIOX_4, 0), PIN(GPIOX_5, 0), | |
173 | PIN(GPIOX_6, 0), PIN(GPIOX_7, 0) }; | |
174 | static const unsigned int sdxc_clk_a_pins[] = { PIN(GPIOX_8, 0) }; | |
175 | static const unsigned int sdxc_cmd_a_pins[] = { PIN(GPIOX_9, 0) }; | |
176 | ||
177 | static const unsigned int pcm_out_a_pins[] = { PIN(GPIOX_4, 0) }; | |
178 | static const unsigned int pcm_in_a_pins[] = { PIN(GPIOX_5, 0) }; | |
179 | static const unsigned int pcm_fs_a_pins[] = { PIN(GPIOX_6, 0) }; | |
180 | static const unsigned int pcm_clk_a_pins[] = { PIN(GPIOX_7, 0) }; | |
181 | ||
182 | static const unsigned int uart_tx_a0_pins[] = { PIN(GPIOX_4, 0) }; | |
183 | static const unsigned int uart_rx_a0_pins[] = { PIN(GPIOX_5, 0) }; | |
184 | static const unsigned int uart_cts_a0_pins[] = { PIN(GPIOX_6, 0) }; | |
185 | static const unsigned int uart_rts_a0_pins[] = { PIN(GPIOX_7, 0) }; | |
186 | ||
187 | static const unsigned int uart_tx_a1_pins[] = { PIN(GPIOX_12, 0) }; | |
188 | static const unsigned int uart_rx_a1_pins[] = { PIN(GPIOX_13, 0) }; | |
189 | static const unsigned int uart_cts_a1_pins[] = { PIN(GPIOX_14, 0) }; | |
190 | static const unsigned int uart_rts_a1_pins[] = { PIN(GPIOX_15, 0) }; | |
191 | ||
192 | static const unsigned int uart_tx_b0_pins[] = { PIN(GPIOX_16, 0) }; | |
193 | static const unsigned int uart_rx_b0_pins[] = { PIN(GPIOX_17, 0) }; | |
194 | static const unsigned int uart_cts_b0_pins[] = { PIN(GPIOX_18, 0) }; | |
195 | static const unsigned int uart_rts_b0_pins[] = { PIN(GPIOX_19, 0) }; | |
196 | ||
197 | static const unsigned int iso7816_det_pins[] = { PIN(GPIOX_16, 0) }; | |
198 | static const unsigned int iso7816_reset_pins[] = { PIN(GPIOX_17, 0) }; | |
199 | static const unsigned int iso7816_clk_pins[] = { PIN(GPIOX_18, 0) }; | |
200 | static const unsigned int iso7816_data_pins[] = { PIN(GPIOX_19, 0) }; | |
201 | ||
202 | static const unsigned int i2c_sda_d0_pins[] = { PIN(GPIOX_16, 0) }; | |
203 | static const unsigned int i2c_sck_d0_pins[] = { PIN(GPIOX_17, 0) }; | |
204 | ||
205 | static const unsigned int xtal_32k_out_pins[] = { PIN(GPIOX_10, 0) }; | |
206 | static const unsigned int xtal_24m_out_pins[] = { PIN(GPIOX_11, 0) }; | |
6ac73095 BG |
207 | |
208 | /* bank Y */ | |
0cf6f3c2 CC |
209 | static const unsigned int uart_tx_c_pins[] = { PIN(GPIOY_0, 0) }; |
210 | static const unsigned int uart_rx_c_pins[] = { PIN(GPIOY_1, 0) }; | |
211 | static const unsigned int uart_cts_c_pins[] = { PIN(GPIOY_2, 0) }; | |
212 | static const unsigned int uart_rts_c_pins[] = { PIN(GPIOY_3, 0) }; | |
6ac73095 | 213 | |
0cf6f3c2 CC |
214 | static const unsigned int pcm_out_b_pins[] = { PIN(GPIOY_4, 0) }; |
215 | static const unsigned int pcm_in_b_pins[] = { PIN(GPIOY_5, 0) }; | |
216 | static const unsigned int pcm_fs_b_pins[] = { PIN(GPIOY_6, 0) }; | |
217 | static const unsigned int pcm_clk_b_pins[] = { PIN(GPIOY_7, 0) }; | |
6ac73095 | 218 | |
0cf6f3c2 CC |
219 | static const unsigned int i2c_sda_c0_pins[] = { PIN(GPIOY_0, 0) }; |
220 | static const unsigned int i2c_sck_c0_pins[] = { PIN(GPIOY_1, 0) }; | |
6ac73095 BG |
221 | |
222 | /* bank DV */ | |
0cf6f3c2 CC |
223 | static const unsigned int dvin_rgb_pins[] = { PIN(GPIODV_0, 0), PIN(GPIODV_1, 0), |
224 | PIN(GPIODV_2, 0), PIN(GPIODV_3, 0), | |
225 | PIN(GPIODV_4, 0), PIN(GPIODV_5, 0), | |
226 | PIN(GPIODV_6, 0), PIN(GPIODV_7, 0), | |
227 | PIN(GPIODV_8, 0), PIN(GPIODV_9, 0), | |
228 | PIN(GPIODV_10, 0), PIN(GPIODV_11, 0), | |
229 | PIN(GPIODV_12, 0), PIN(GPIODV_13, 0), | |
230 | PIN(GPIODV_14, 0), PIN(GPIODV_15, 0), | |
231 | PIN(GPIODV_16, 0), PIN(GPIODV_17, 0), | |
232 | PIN(GPIODV_18, 0), PIN(GPIODV_19, 0), | |
233 | PIN(GPIODV_20, 0), PIN(GPIODV_21, 0), | |
234 | PIN(GPIODV_22, 0), PIN(GPIODV_23, 0) }; | |
235 | static const unsigned int dvin_vs_pins[] = { PIN(GPIODV_24, 0) }; | |
236 | static const unsigned int dvin_hs_pins[] = { PIN(GPIODV_25, 0) }; | |
237 | static const unsigned int dvin_clk_pins[] = { PIN(GPIODV_26, 0) }; | |
238 | static const unsigned int dvin_de_pins[] = { PIN(GPIODV_27, 0) }; | |
239 | ||
240 | static const unsigned int enc_0_pins[] = { PIN(GPIODV_0, 0) }; | |
241 | static const unsigned int enc_1_pins[] = { PIN(GPIODV_1, 0) }; | |
242 | static const unsigned int enc_2_pins[] = { PIN(GPIODV_2, 0) }; | |
243 | static const unsigned int enc_3_pins[] = { PIN(GPIODV_3, 0) }; | |
244 | static const unsigned int enc_4_pins[] = { PIN(GPIODV_4, 0) }; | |
245 | static const unsigned int enc_5_pins[] = { PIN(GPIODV_5, 0) }; | |
246 | static const unsigned int enc_6_pins[] = { PIN(GPIODV_6, 0) }; | |
247 | static const unsigned int enc_7_pins[] = { PIN(GPIODV_7, 0) }; | |
248 | static const unsigned int enc_8_pins[] = { PIN(GPIODV_8, 0) }; | |
249 | static const unsigned int enc_9_pins[] = { PIN(GPIODV_9, 0) }; | |
250 | static const unsigned int enc_10_pins[] = { PIN(GPIODV_10, 0) }; | |
251 | static const unsigned int enc_11_pins[] = { PIN(GPIODV_11, 0) }; | |
252 | static const unsigned int enc_12_pins[] = { PIN(GPIODV_12, 0) }; | |
253 | static const unsigned int enc_13_pins[] = { PIN(GPIODV_13, 0) }; | |
254 | static const unsigned int enc_14_pins[] = { PIN(GPIODV_14, 0) }; | |
255 | static const unsigned int enc_15_pins[] = { PIN(GPIODV_15, 0) }; | |
256 | static const unsigned int enc_16_pins[] = { PIN(GPIODV_16, 0) }; | |
257 | static const unsigned int enc_17_pins[] = { PIN(GPIODV_17, 0) }; | |
258 | ||
259 | static const unsigned int uart_tx_b1_pins[] = { PIN(GPIODV_24, 0) }; | |
260 | static const unsigned int uart_rx_b1_pins[] = { PIN(GPIODV_25, 0) }; | |
261 | static const unsigned int uart_cts_b1_pins[] = { PIN(GPIODV_26, 0) }; | |
262 | static const unsigned int uart_rts_b1_pins[] = { PIN(GPIODV_27, 0) }; | |
263 | ||
264 | static const unsigned int vga_vs_pins[] = { PIN(GPIODV_24, 0) }; | |
265 | static const unsigned int vga_hs_pins[] = { PIN(GPIODV_25, 0) }; | |
6ac73095 BG |
266 | |
267 | /* bank H */ | |
0cf6f3c2 CC |
268 | static const unsigned int hdmi_hpd_pins[] = { PIN(GPIOH_0, 0) }; |
269 | static const unsigned int hdmi_sda_pins[] = { PIN(GPIOH_1, 0) }; | |
270 | static const unsigned int hdmi_scl_pins[] = { PIN(GPIOH_2, 0) }; | |
271 | static const unsigned int hdmi_cec_pins[] = { PIN(GPIOH_3, 0) }; | |
6ac73095 | 272 | |
0cf6f3c2 CC |
273 | static const unsigned int spi_ss0_0_pins[] = { PIN(GPIOH_3, 0) }; |
274 | static const unsigned int spi_miso_0_pins[] = { PIN(GPIOH_4, 0) }; | |
275 | static const unsigned int spi_mosi_0_pins[] = { PIN(GPIOH_5, 0) }; | |
276 | static const unsigned int spi_sclk_0_pins[] = { PIN(GPIOH_6, 0) }; | |
6ac73095 | 277 | |
0cf6f3c2 CC |
278 | static const unsigned int i2c_sda_d1_pins[] = { PIN(GPIOH_7, 0) }; |
279 | static const unsigned int i2c_sck_d1_pins[] = { PIN(GPIOH_8, 0) }; | |
6ac73095 BG |
280 | |
281 | /* bank Z */ | |
0cf6f3c2 CC |
282 | static const unsigned int spi_ss0_1_pins[] = { PIN(GPIOZ_9, 0) }; |
283 | static const unsigned int spi_ss1_1_pins[] = { PIN(GPIOZ_10, 0) }; | |
284 | static const unsigned int spi_sclk_1_pins[] = { PIN(GPIOZ_11, 0) }; | |
285 | static const unsigned int spi_mosi_1_pins[] = { PIN(GPIOZ_12, 0) }; | |
286 | static const unsigned int spi_miso_1_pins[] = { PIN(GPIOZ_13, 0) }; | |
287 | static const unsigned int spi_ss2_1_pins[] = { PIN(GPIOZ_14, 0) }; | |
288 | ||
289 | static const unsigned int eth_tx_clk_50m_pins[] = { PIN(GPIOZ_4, 0) }; | |
290 | static const unsigned int eth_tx_en_pins[] = { PIN(GPIOZ_5, 0) }; | |
291 | static const unsigned int eth_txd1_pins[] = { PIN(GPIOZ_6, 0) }; | |
292 | static const unsigned int eth_txd0_pins[] = { PIN(GPIOZ_7, 0) }; | |
293 | static const unsigned int eth_rx_clk_in_pins[] = { PIN(GPIOZ_8, 0) }; | |
294 | static const unsigned int eth_rx_dv_pins[] = { PIN(GPIOZ_9, 0) }; | |
295 | static const unsigned int eth_rxd1_pins[] = { PIN(GPIOZ_10, 0) }; | |
296 | static const unsigned int eth_rxd0_pins[] = { PIN(GPIOZ_11, 0) }; | |
297 | static const unsigned int eth_mdio_pins[] = { PIN(GPIOZ_12, 0) }; | |
298 | static const unsigned int eth_mdc_pins[] = { PIN(GPIOZ_13, 0) }; | |
299 | ||
300 | static const unsigned int i2c_sda_a0_pins[] = { PIN(GPIOZ_0, 0) }; | |
301 | static const unsigned int i2c_sck_a0_pins[] = { PIN(GPIOZ_1, 0) }; | |
302 | ||
303 | static const unsigned int i2c_sda_b_pins[] = { PIN(GPIOZ_2, 0) }; | |
304 | static const unsigned int i2c_sck_b_pins[] = { PIN(GPIOZ_3, 0) }; | |
305 | ||
306 | static const unsigned int i2c_sda_c1_pins[] = { PIN(GPIOZ_4, 0) }; | |
307 | static const unsigned int i2c_sck_c1_pins[] = { PIN(GPIOZ_5, 0) }; | |
308 | ||
309 | static const unsigned int i2c_sda_a1_pins[] = { PIN(GPIOZ_0, 0) }; | |
310 | static const unsigned int i2c_sck_a1_pins[] = { PIN(GPIOZ_1, 0) }; | |
311 | ||
312 | static const unsigned int i2c_sda_a2_pins[] = { PIN(GPIOZ_0, 0) }; | |
313 | static const unsigned int i2c_sck_a2_pins[] = { PIN(GPIOZ_1, 0) }; | |
6ac73095 BG |
314 | |
315 | /* bank BOOT */ | |
0cf6f3c2 CC |
316 | static const unsigned int sd_d0_c_pins[] = { PIN(BOOT_0, 0) }; |
317 | static const unsigned int sd_d1_c_pins[] = { PIN(BOOT_1, 0) }; | |
318 | static const unsigned int sd_d2_c_pins[] = { PIN(BOOT_2, 0) }; | |
319 | static const unsigned int sd_d3_c_pins[] = { PIN(BOOT_3, 0) }; | |
320 | static const unsigned int sd_cmd_c_pins[] = { PIN(BOOT_16, 0) }; | |
321 | static const unsigned int sd_clk_c_pins[] = { PIN(BOOT_17, 0) }; | |
322 | ||
323 | static const unsigned int sdxc_d0_c_pins[] = { PIN(BOOT_0, 0)}; | |
324 | static const unsigned int sdxc_d13_c_pins[] = { PIN(BOOT_1, 0), PIN(BOOT_2, 0), | |
325 | PIN(BOOT_3, 0) }; | |
326 | static const unsigned int sdxc_d47_c_pins[] = { PIN(BOOT_4, 0), PIN(BOOT_5, 0), | |
327 | PIN(BOOT_6, 0), PIN(BOOT_7, 0) }; | |
328 | static const unsigned int sdxc_cmd_c_pins[] = { PIN(BOOT_16, 0) }; | |
329 | static const unsigned int sdxc_clk_c_pins[] = { PIN(BOOT_17, 0) }; | |
330 | ||
331 | static const unsigned int nand_io_pins[] = { PIN(BOOT_0, 0), PIN(BOOT_1, 0), | |
332 | PIN(BOOT_2, 0), PIN(BOOT_3, 0), | |
333 | PIN(BOOT_4, 0), PIN(BOOT_5, 0), | |
334 | PIN(BOOT_6, 0), PIN(BOOT_7, 0) }; | |
335 | static const unsigned int nand_io_ce0_pins[] = { PIN(BOOT_8, 0) }; | |
336 | static const unsigned int nand_io_ce1_pins[] = { PIN(BOOT_9, 0) }; | |
337 | static const unsigned int nand_io_rb0_pins[] = { PIN(BOOT_10, 0) }; | |
338 | static const unsigned int nand_ale_pins[] = { PIN(BOOT_11, 0) }; | |
339 | static const unsigned int nand_cle_pins[] = { PIN(BOOT_12, 0) }; | |
340 | static const unsigned int nand_wen_clk_pins[] = { PIN(BOOT_13, 0) }; | |
341 | static const unsigned int nand_ren_clk_pins[] = { PIN(BOOT_14, 0) }; | |
342 | static const unsigned int nand_dqs_pins[] = { PIN(BOOT_15, 0) }; | |
343 | static const unsigned int nand_ce2_pins[] = { PIN(BOOT_16, 0) }; | |
344 | static const unsigned int nand_ce3_pins[] = { PIN(BOOT_17, 0) }; | |
345 | ||
346 | static const unsigned int nor_d_pins[] = { PIN(BOOT_11, 0) }; | |
347 | static const unsigned int nor_q_pins[] = { PIN(BOOT_12, 0) }; | |
348 | static const unsigned int nor_c_pins[] = { PIN(BOOT_13, 0) }; | |
349 | static const unsigned int nor_cs_pins[] = { PIN(BOOT_18, 0) }; | |
6ac73095 BG |
350 | |
351 | /* bank CARD */ | |
0cf6f3c2 CC |
352 | static const unsigned int sd_d1_b_pins[] = { PIN(CARD_0, 0) }; |
353 | static const unsigned int sd_d0_b_pins[] = { PIN(CARD_1, 0) }; | |
354 | static const unsigned int sd_clk_b_pins[] = { PIN(CARD_2, 0) }; | |
355 | static const unsigned int sd_cmd_b_pins[] = { PIN(CARD_3, 0) }; | |
356 | static const unsigned int sd_d3_b_pins[] = { PIN(CARD_4, 0) }; | |
357 | static const unsigned int sd_d2_b_pins[] = { PIN(CARD_5, 0) }; | |
358 | ||
359 | static const unsigned int sdxc_d13_b_pins[] = { PIN(CARD_0, 0), PIN(CARD_4, 0), | |
360 | PIN(CARD_5, 0) }; | |
361 | static const unsigned int sdxc_d0_b_pins[] = { PIN(CARD_1, 0) }; | |
362 | static const unsigned int sdxc_clk_b_pins[] = { PIN(CARD_2, 0) }; | |
363 | static const unsigned int sdxc_cmd_b_pins[] = { PIN(CARD_3, 0) }; | |
6ac73095 BG |
364 | |
365 | /* bank AO */ | |
0cf6f3c2 CC |
366 | static const unsigned int uart_tx_ao_a_pins[] = { PIN(GPIOAO_0, AO_OFF) }; |
367 | static const unsigned int uart_rx_ao_a_pins[] = { PIN(GPIOAO_1, AO_OFF) }; | |
368 | static const unsigned int uart_cts_ao_a_pins[] = { PIN(GPIOAO_2, AO_OFF) }; | |
369 | static const unsigned int uart_rts_ao_a_pins[] = { PIN(GPIOAO_3, AO_OFF) }; | |
6ac73095 | 370 | |
0cf6f3c2 | 371 | static const unsigned int remote_input_pins[] = { PIN(GPIOAO_7, AO_OFF) }; |
6ac73095 | 372 | |
0cf6f3c2 CC |
373 | static const unsigned int i2c_slave_sck_ao_pins[] = { PIN(GPIOAO_4, AO_OFF) }; |
374 | static const unsigned int i2c_slave_sda_ao_pins[] = { PIN(GPIOAO_5, AO_OFF) }; | |
6ac73095 | 375 | |
0cf6f3c2 CC |
376 | static const unsigned int uart_tx_ao_b0_pins[] = { PIN(GPIOAO_0, AO_OFF) }; |
377 | static const unsigned int uart_rx_ao_b0_pins[] = { PIN(GPIOAO_1, AO_OFF) }; | |
6ac73095 | 378 | |
0cf6f3c2 CC |
379 | static const unsigned int uart_tx_ao_b1_pins[] = { PIN(GPIOAO_4, AO_OFF) }; |
380 | static const unsigned int uart_rx_ao_b1_pins[] = { PIN(GPIOAO_5, AO_OFF) }; | |
6ac73095 | 381 | |
0cf6f3c2 CC |
382 | static const unsigned int i2c_mst_sck_ao_pins[] = { PIN(GPIOAO_4, AO_OFF) }; |
383 | static const unsigned int i2c_mst_sda_ao_pins[] = { PIN(GPIOAO_5, AO_OFF) }; | |
6ac73095 | 384 | |
9dab1868 | 385 | static struct meson_pmx_group meson8_cbus_groups[] = { |
0cf6f3c2 CC |
386 | GPIO_GROUP(GPIOX_0, 0), |
387 | GPIO_GROUP(GPIOX_1, 0), | |
388 | GPIO_GROUP(GPIOX_2, 0), | |
389 | GPIO_GROUP(GPIOX_3, 0), | |
390 | GPIO_GROUP(GPIOX_4, 0), | |
391 | GPIO_GROUP(GPIOX_5, 0), | |
392 | GPIO_GROUP(GPIOX_6, 0), | |
393 | GPIO_GROUP(GPIOX_7, 0), | |
394 | GPIO_GROUP(GPIOX_8, 0), | |
395 | GPIO_GROUP(GPIOX_9, 0), | |
396 | GPIO_GROUP(GPIOX_10, 0), | |
397 | GPIO_GROUP(GPIOX_11, 0), | |
398 | GPIO_GROUP(GPIOX_12, 0), | |
399 | GPIO_GROUP(GPIOX_13, 0), | |
400 | GPIO_GROUP(GPIOX_14, 0), | |
401 | GPIO_GROUP(GPIOX_15, 0), | |
402 | GPIO_GROUP(GPIOX_16, 0), | |
403 | GPIO_GROUP(GPIOX_17, 0), | |
404 | GPIO_GROUP(GPIOX_18, 0), | |
405 | GPIO_GROUP(GPIOX_19, 0), | |
406 | GPIO_GROUP(GPIOX_20, 0), | |
407 | GPIO_GROUP(GPIOX_21, 0), | |
408 | GPIO_GROUP(GPIOY_0, 0), | |
409 | GPIO_GROUP(GPIOY_1, 0), | |
410 | GPIO_GROUP(GPIOY_2, 0), | |
411 | GPIO_GROUP(GPIOY_3, 0), | |
412 | GPIO_GROUP(GPIOY_4, 0), | |
413 | GPIO_GROUP(GPIOY_5, 0), | |
414 | GPIO_GROUP(GPIOY_6, 0), | |
415 | GPIO_GROUP(GPIOY_7, 0), | |
416 | GPIO_GROUP(GPIOY_8, 0), | |
417 | GPIO_GROUP(GPIOY_9, 0), | |
418 | GPIO_GROUP(GPIOY_10, 0), | |
419 | GPIO_GROUP(GPIOY_11, 0), | |
420 | GPIO_GROUP(GPIOY_12, 0), | |
421 | GPIO_GROUP(GPIOY_13, 0), | |
422 | GPIO_GROUP(GPIOY_14, 0), | |
423 | GPIO_GROUP(GPIOY_15, 0), | |
424 | GPIO_GROUP(GPIOY_16, 0), | |
425 | GPIO_GROUP(GPIODV_0, 0), | |
426 | GPIO_GROUP(GPIODV_1, 0), | |
427 | GPIO_GROUP(GPIODV_2, 0), | |
428 | GPIO_GROUP(GPIODV_3, 0), | |
429 | GPIO_GROUP(GPIODV_4, 0), | |
430 | GPIO_GROUP(GPIODV_5, 0), | |
431 | GPIO_GROUP(GPIODV_6, 0), | |
432 | GPIO_GROUP(GPIODV_7, 0), | |
433 | GPIO_GROUP(GPIODV_8, 0), | |
434 | GPIO_GROUP(GPIODV_9, 0), | |
435 | GPIO_GROUP(GPIODV_10, 0), | |
436 | GPIO_GROUP(GPIODV_11, 0), | |
437 | GPIO_GROUP(GPIODV_12, 0), | |
438 | GPIO_GROUP(GPIODV_13, 0), | |
439 | GPIO_GROUP(GPIODV_14, 0), | |
440 | GPIO_GROUP(GPIODV_15, 0), | |
441 | GPIO_GROUP(GPIODV_16, 0), | |
442 | GPIO_GROUP(GPIODV_17, 0), | |
443 | GPIO_GROUP(GPIODV_18, 0), | |
444 | GPIO_GROUP(GPIODV_19, 0), | |
445 | GPIO_GROUP(GPIODV_20, 0), | |
446 | GPIO_GROUP(GPIODV_21, 0), | |
447 | GPIO_GROUP(GPIODV_22, 0), | |
448 | GPIO_GROUP(GPIODV_23, 0), | |
449 | GPIO_GROUP(GPIODV_24, 0), | |
450 | GPIO_GROUP(GPIODV_25, 0), | |
451 | GPIO_GROUP(GPIODV_26, 0), | |
452 | GPIO_GROUP(GPIODV_27, 0), | |
453 | GPIO_GROUP(GPIODV_28, 0), | |
454 | GPIO_GROUP(GPIODV_29, 0), | |
455 | GPIO_GROUP(GPIOH_0, 0), | |
456 | GPIO_GROUP(GPIOH_1, 0), | |
457 | GPIO_GROUP(GPIOH_2, 0), | |
458 | GPIO_GROUP(GPIOH_3, 0), | |
459 | GPIO_GROUP(GPIOH_4, 0), | |
460 | GPIO_GROUP(GPIOH_5, 0), | |
461 | GPIO_GROUP(GPIOH_6, 0), | |
462 | GPIO_GROUP(GPIOH_7, 0), | |
463 | GPIO_GROUP(GPIOH_8, 0), | |
464 | GPIO_GROUP(GPIOH_9, 0), | |
465 | GPIO_GROUP(GPIOZ_0, 0), | |
466 | GPIO_GROUP(GPIOZ_1, 0), | |
467 | GPIO_GROUP(GPIOZ_2, 0), | |
468 | GPIO_GROUP(GPIOZ_3, 0), | |
469 | GPIO_GROUP(GPIOZ_4, 0), | |
470 | GPIO_GROUP(GPIOZ_5, 0), | |
471 | GPIO_GROUP(GPIOZ_6, 0), | |
472 | GPIO_GROUP(GPIOZ_7, 0), | |
473 | GPIO_GROUP(GPIOZ_8, 0), | |
474 | GPIO_GROUP(GPIOZ_9, 0), | |
475 | GPIO_GROUP(GPIOZ_10, 0), | |
476 | GPIO_GROUP(GPIOZ_11, 0), | |
477 | GPIO_GROUP(GPIOZ_12, 0), | |
478 | GPIO_GROUP(GPIOZ_13, 0), | |
479 | GPIO_GROUP(GPIOZ_14, 0), | |
6ac73095 BG |
480 | |
481 | /* bank X */ | |
482 | GROUP(sd_d0_a, 8, 5), | |
483 | GROUP(sd_d1_a, 8, 4), | |
484 | GROUP(sd_d2_a, 8, 3), | |
485 | GROUP(sd_d3_a, 8, 2), | |
486 | GROUP(sd_clk_a, 8, 1), | |
487 | GROUP(sd_cmd_a, 8, 0), | |
488 | ||
489 | GROUP(sdxc_d0_a, 5, 14), | |
490 | GROUP(sdxc_d13_a, 5, 13), | |
491 | GROUP(sdxc_d47_a, 5, 12), | |
492 | GROUP(sdxc_clk_a, 5, 11), | |
493 | GROUP(sdxc_cmd_a, 5, 10), | |
494 | ||
495 | GROUP(pcm_out_a, 3, 30), | |
496 | GROUP(pcm_in_a, 3, 29), | |
497 | GROUP(pcm_fs_a, 3, 28), | |
498 | GROUP(pcm_clk_a, 3, 27), | |
499 | ||
500 | GROUP(uart_tx_a0, 4, 17), | |
501 | GROUP(uart_rx_a0, 4, 16), | |
502 | GROUP(uart_cts_a0, 4, 15), | |
503 | GROUP(uart_rts_a0, 4, 14), | |
504 | ||
505 | GROUP(uart_tx_a1, 4, 13), | |
506 | GROUP(uart_rx_a1, 4, 12), | |
507 | GROUP(uart_cts_a1, 4, 11), | |
508 | GROUP(uart_rts_a1, 4, 10), | |
509 | ||
510 | GROUP(uart_tx_b0, 4, 9), | |
511 | GROUP(uart_rx_b0, 4, 8), | |
512 | GROUP(uart_cts_b0, 4, 7), | |
513 | GROUP(uart_rts_b0, 4, 6), | |
514 | ||
515 | GROUP(iso7816_det, 4, 21), | |
516 | GROUP(iso7816_reset, 4, 20), | |
517 | GROUP(iso7816_clk, 4, 19), | |
518 | GROUP(iso7816_data, 4, 18), | |
519 | ||
520 | GROUP(i2c_sda_d0, 4, 5), | |
521 | GROUP(i2c_sck_d0, 4, 4), | |
522 | ||
523 | GROUP(xtal_32k_out, 3, 22), | |
524 | GROUP(xtal_24m_out, 3, 23), | |
525 | ||
526 | /* bank Y */ | |
527 | GROUP(uart_tx_c, 1, 19), | |
528 | GROUP(uart_rx_c, 1, 18), | |
529 | GROUP(uart_cts_c, 1, 17), | |
530 | GROUP(uart_rts_c, 1, 16), | |
531 | ||
532 | GROUP(pcm_out_b, 4, 25), | |
533 | GROUP(pcm_in_b, 4, 24), | |
534 | GROUP(pcm_fs_b, 4, 23), | |
535 | GROUP(pcm_clk_b, 4, 22), | |
536 | ||
537 | GROUP(i2c_sda_c0, 1, 15), | |
538 | GROUP(i2c_sck_c0, 1, 14), | |
539 | ||
540 | /* bank DV */ | |
541 | GROUP(dvin_rgb, 0, 6), | |
542 | GROUP(dvin_vs, 0, 9), | |
543 | GROUP(dvin_hs, 0, 8), | |
544 | GROUP(dvin_clk, 0, 7), | |
545 | GROUP(dvin_de, 0, 10), | |
546 | ||
547 | GROUP(enc_0, 7, 0), | |
548 | GROUP(enc_1, 7, 1), | |
549 | GROUP(enc_2, 7, 2), | |
550 | GROUP(enc_3, 7, 3), | |
551 | GROUP(enc_4, 7, 4), | |
552 | GROUP(enc_5, 7, 5), | |
553 | GROUP(enc_6, 7, 6), | |
554 | GROUP(enc_7, 7, 7), | |
555 | GROUP(enc_8, 7, 8), | |
556 | GROUP(enc_9, 7, 9), | |
557 | GROUP(enc_10, 7, 10), | |
558 | GROUP(enc_11, 7, 11), | |
559 | GROUP(enc_12, 7, 12), | |
560 | GROUP(enc_13, 7, 13), | |
561 | GROUP(enc_14, 7, 14), | |
562 | GROUP(enc_15, 7, 15), | |
563 | GROUP(enc_16, 7, 16), | |
564 | GROUP(enc_17, 7, 17), | |
565 | ||
566 | GROUP(uart_tx_b1, 6, 23), | |
567 | GROUP(uart_rx_b1, 6, 22), | |
568 | GROUP(uart_cts_b1, 6, 21), | |
569 | GROUP(uart_rts_b1, 6, 20), | |
570 | ||
571 | GROUP(vga_vs, 0, 21), | |
572 | GROUP(vga_hs, 0, 20), | |
573 | ||
574 | /* bank H */ | |
575 | GROUP(hdmi_hpd, 1, 26), | |
576 | GROUP(hdmi_sda, 1, 25), | |
577 | GROUP(hdmi_scl, 1, 24), | |
578 | GROUP(hdmi_cec, 1, 23), | |
579 | ||
580 | GROUP(spi_ss0_0, 9, 13), | |
581 | GROUP(spi_miso_0, 9, 12), | |
582 | GROUP(spi_mosi_0, 9, 11), | |
583 | GROUP(spi_sclk_0, 9, 10), | |
584 | ||
585 | GROUP(i2c_sda_d1, 4, 3), | |
586 | GROUP(i2c_sck_d1, 4, 2), | |
587 | ||
588 | /* bank Z */ | |
589 | GROUP(spi_ss0_1, 8, 16), | |
590 | GROUP(spi_ss1_1, 8, 12), | |
591 | GROUP(spi_sclk_1, 8, 15), | |
592 | GROUP(spi_mosi_1, 8, 14), | |
593 | GROUP(spi_miso_1, 8, 13), | |
594 | GROUP(spi_ss2_1, 8, 17), | |
595 | ||
596 | GROUP(eth_tx_clk_50m, 6, 15), | |
597 | GROUP(eth_tx_en, 6, 14), | |
598 | GROUP(eth_txd1, 6, 13), | |
599 | GROUP(eth_txd0, 6, 12), | |
600 | GROUP(eth_rx_clk_in, 6, 10), | |
601 | GROUP(eth_rx_dv, 6, 11), | |
602 | GROUP(eth_rxd1, 6, 8), | |
603 | GROUP(eth_rxd0, 6, 7), | |
604 | GROUP(eth_mdio, 6, 6), | |
605 | GROUP(eth_mdc, 6, 5), | |
606 | ||
607 | GROUP(i2c_sda_a0, 5, 31), | |
608 | GROUP(i2c_sck_a0, 5, 30), | |
609 | ||
610 | GROUP(i2c_sda_b, 5, 27), | |
611 | GROUP(i2c_sck_b, 5, 26), | |
612 | ||
613 | GROUP(i2c_sda_c1, 5, 25), | |
614 | GROUP(i2c_sck_c1, 5, 24), | |
615 | ||
616 | GROUP(i2c_sda_a1, 5, 9), | |
617 | GROUP(i2c_sck_a1, 5, 8), | |
618 | ||
619 | GROUP(i2c_sda_a2, 5, 7), | |
620 | GROUP(i2c_sck_a2, 5, 6), | |
621 | ||
622 | /* bank BOOT */ | |
623 | GROUP(sd_d0_c, 6, 29), | |
624 | GROUP(sd_d1_c, 6, 28), | |
625 | GROUP(sd_d2_c, 6, 27), | |
626 | GROUP(sd_d3_c, 6, 26), | |
627 | GROUP(sd_cmd_c, 6, 25), | |
628 | GROUP(sd_clk_c, 6, 24), | |
629 | ||
630 | GROUP(sdxc_d0_c, 4, 30), | |
631 | GROUP(sdxc_d13_c, 4, 29), | |
632 | GROUP(sdxc_d47_c, 4, 28), | |
633 | GROUP(sdxc_cmd_c, 4, 27), | |
634 | GROUP(sdxc_clk_c, 4, 26), | |
635 | ||
636 | GROUP(nand_io, 2, 26), | |
637 | GROUP(nand_io_ce0, 2, 25), | |
638 | GROUP(nand_io_ce1, 2, 24), | |
639 | GROUP(nand_io_rb0, 2, 17), | |
640 | GROUP(nand_ale, 2, 21), | |
641 | GROUP(nand_cle, 2, 20), | |
642 | GROUP(nand_wen_clk, 2, 19), | |
643 | GROUP(nand_ren_clk, 2, 18), | |
644 | GROUP(nand_dqs, 2, 27), | |
645 | GROUP(nand_ce2, 2, 23), | |
646 | GROUP(nand_ce3, 2, 22), | |
647 | ||
648 | GROUP(nor_d, 5, 1), | |
649 | GROUP(nor_q, 5, 3), | |
650 | GROUP(nor_c, 5, 2), | |
651 | GROUP(nor_cs, 5, 0), | |
652 | ||
653 | /* bank CARD */ | |
654 | GROUP(sd_d1_b, 2, 14), | |
655 | GROUP(sd_d0_b, 2, 15), | |
656 | GROUP(sd_clk_b, 2, 11), | |
657 | GROUP(sd_cmd_b, 2, 10), | |
658 | GROUP(sd_d3_b, 2, 12), | |
659 | GROUP(sd_d2_b, 2, 13), | |
660 | ||
661 | GROUP(sdxc_d13_b, 2, 6), | |
662 | GROUP(sdxc_d0_b, 2, 7), | |
663 | GROUP(sdxc_clk_b, 2, 5), | |
664 | GROUP(sdxc_cmd_b, 2, 4), | |
9dab1868 CC |
665 | }; |
666 | ||
667 | static struct meson_pmx_group meson8_aobus_groups[] = { | |
668 | GPIO_GROUP(GPIOAO_0, AO_OFF), | |
669 | GPIO_GROUP(GPIOAO_1, AO_OFF), | |
670 | GPIO_GROUP(GPIOAO_2, AO_OFF), | |
671 | GPIO_GROUP(GPIOAO_3, AO_OFF), | |
672 | GPIO_GROUP(GPIOAO_4, AO_OFF), | |
673 | GPIO_GROUP(GPIOAO_5, AO_OFF), | |
674 | GPIO_GROUP(GPIOAO_6, AO_OFF), | |
675 | GPIO_GROUP(GPIOAO_7, AO_OFF), | |
676 | GPIO_GROUP(GPIOAO_8, AO_OFF), | |
677 | GPIO_GROUP(GPIOAO_9, AO_OFF), | |
678 | GPIO_GROUP(GPIOAO_10, AO_OFF), | |
679 | GPIO_GROUP(GPIOAO_11, AO_OFF), | |
680 | GPIO_GROUP(GPIOAO_12, AO_OFF), | |
681 | GPIO_GROUP(GPIOAO_13, AO_OFF), | |
682 | GPIO_GROUP(GPIO_BSD_EN, AO_OFF), | |
683 | GPIO_GROUP(GPIO_TEST_N, AO_OFF), | |
6ac73095 BG |
684 | |
685 | /* bank AO */ | |
9dab1868 CC |
686 | GROUP(uart_tx_ao_a, 0, 12), |
687 | GROUP(uart_rx_ao_a, 0, 11), | |
688 | GROUP(uart_cts_ao_a, 0, 10), | |
689 | GROUP(uart_rts_ao_a, 0, 9), | |
6ac73095 | 690 | |
9dab1868 | 691 | GROUP(remote_input, 0, 0), |
6ac73095 | 692 | |
9dab1868 CC |
693 | GROUP(i2c_slave_sck_ao, 0, 2), |
694 | GROUP(i2c_slave_sda_ao, 0, 1), | |
6ac73095 | 695 | |
9dab1868 CC |
696 | GROUP(uart_tx_ao_b0, 0, 26), |
697 | GROUP(uart_rx_ao_b0, 0, 25), | |
6ac73095 | 698 | |
9dab1868 CC |
699 | GROUP(uart_tx_ao_b1, 0, 24), |
700 | GROUP(uart_rx_ao_b1, 0, 23), | |
6ac73095 | 701 | |
9dab1868 CC |
702 | GROUP(i2c_mst_sck_ao, 0, 6), |
703 | GROUP(i2c_mst_sda_ao, 0, 5), | |
6ac73095 BG |
704 | }; |
705 | ||
706 | static const char * const gpio_groups[] = { | |
707 | "GPIOX_0", "GPIOX_1", "GPIOX_2", "GPIOX_3", "GPIOX_4", | |
708 | "GPIOX_5", "GPIOX_6", "GPIOX_7", "GPIOX_8", "GPIOX_9", | |
709 | "GPIOX_10", "GPIOX_11", "GPIOX_12", "GPIOX_13", "GPIOX_14", | |
710 | "GPIOX_15", "GPIOX_16", "GPIOX_17", "GPIOX_18", "GPIOX_19", | |
711 | "GPIOX_20", "GPIOX_21", | |
712 | ||
713 | "GPIOY_0", "GPIOY_1", "GPIOY_2", "GPIOY_3", "GPIOY_4", | |
714 | "GPIOY_5", "GPIOY_6", "GPIOY_7", "GPIOY_8", "GPIOY_9", | |
715 | "GPIOY_10", "GPIOY_11", "GPIOY_12", "GPIOY_13", "GPIOY_14", | |
716 | "GPIOY_15", "GPIOY_16", | |
717 | ||
718 | "GPIODV_0", "GPIODV_1", "GPIODV_2", "GPIODV_3", "GPIODV_4", | |
719 | "GPIODV_5", "GPIODV_6", "GPIODV_7", "GPIODV_8", "GPIODV_9", | |
720 | "GPIODV_10", "GPIODV_11", "GPIODV_12", "GPIODV_13", "GPIODV_14", | |
721 | "GPIODV_15", "GPIODV_16", "GPIODV_17", "GPIODV_18", "GPIODV_19", | |
722 | "GPIODV_20", "GPIODV_21", "GPIODV_22", "GPIODV_23", "GPIODV_24", | |
723 | "GPIODV_25", "GPIODV_26", "GPIODV_27", "GPIODV_28", "GPIODV_29", | |
724 | ||
725 | "GPIOH_0", "GPIOH_1", "GPIOH_2", "GPIOH_3", "GPIOH_4", | |
726 | "GPIOH_5", "GPIOH_6", "GPIOH_7", "GPIOH_8", "GPIOH_9", | |
727 | ||
728 | "GPIOZ_0", "GPIOZ_1", "GPIOZ_2", "GPIOZ_3", "GPIOZ_4", | |
729 | "GPIOZ_5", "GPIOZ_6", "GPIOZ_7", "GPIOZ_8", "GPIOZ_9", | |
730 | "GPIOZ_10", "GPIOZ_11", "GPIOZ_12", "GPIOZ_13", "GPIOZ_14", | |
731 | ||
732 | "CARD_0", "CARD_1", "CARD_2", "CARD_3", "CARD_4", | |
733 | "CARD_5", "CARD_6", | |
734 | ||
735 | "BOOT_0", "BOOT_1", "BOOT_2", "BOOT_3", "BOOT_4", | |
736 | "BOOT_5", "BOOT_6", "BOOT_7", "BOOT_8", "BOOT_9", | |
737 | "BOOT_10", "BOOT_11", "BOOT_12", "BOOT_13", "BOOT_14", | |
738 | "BOOT_15", "BOOT_16", "BOOT_17", "BOOT_18", | |
739 | ||
740 | "GPIOAO_0", "GPIOAO_1", "GPIOAO_2", "GPIOAO_3", | |
741 | "GPIOAO_4", "GPIOAO_5", "GPIOAO_6", "GPIOAO_7", | |
742 | "GPIOAO_8", "GPIOAO_9", "GPIOAO_10", "GPIOAO_11", | |
743 | "GPIOAO_12", "GPIOAO_13", "GPIO_BSD_EN", "GPIO_TEST_N" | |
744 | }; | |
745 | ||
746 | static const char * const sd_a_groups[] = { | |
747 | "sd_d0_a", "sd_d1_a", "sd_d2_a", "sd_d3_a", "sd_clk_a", "sd_cmd_a" | |
748 | }; | |
749 | ||
750 | static const char * const sdxc_a_groups[] = { | |
751 | "sdxc_d0_a", "sdxc_d13_a", "sdxc_d47_a", "sdxc_clk_a", "sdxc_cmd_a" | |
752 | }; | |
753 | ||
754 | static const char * const pcm_a_groups[] = { | |
755 | "pcm_out_a", "pcm_in_a", "pcm_fs_a", "pcm_clk_a" | |
756 | }; | |
757 | ||
758 | static const char * const uart_a_groups[] = { | |
759 | "uart_tx_a0", "uart_rx_a0", "uart_cts_a0", "uart_rts_a0", | |
760 | "uart_tx_a1", "uart_rx_a1", "uart_cts_a1", "uart_rts_a1" | |
761 | }; | |
762 | ||
763 | static const char * const uart_b_groups[] = { | |
764 | "uart_tx_b0", "uart_rx_b0", "uart_cts_b0", "uart_rts_b0", | |
765 | "uart_tx_b1", "uart_rx_b1", "uart_cts_b1", "uart_rts_b1" | |
766 | }; | |
767 | ||
768 | static const char * const iso7816_groups[] = { | |
769 | "iso7816_det", "iso7816_reset", "iso7816_clk", "iso7816_data" | |
770 | }; | |
771 | ||
772 | static const char * const i2c_d_groups[] = { | |
773 | "i2c_sda_d0", "i2c_sck_d0", "i2c_sda_d1", "i2c_sck_d1" | |
774 | }; | |
775 | ||
776 | static const char * const xtal_groups[] = { | |
777 | "xtal_32k_out", "xtal_24m_out" | |
778 | }; | |
779 | ||
780 | static const char * const uart_c_groups[] = { | |
781 | "uart_tx_c", "uart_rx_c", "uart_cts_c", "uart_rts_c" | |
782 | }; | |
783 | ||
784 | static const char * const pcm_b_groups[] = { | |
785 | "pcm_out_b", "pcm_in_b", "pcm_fs_b", "pcm_clk_b" | |
786 | }; | |
787 | ||
788 | static const char * const i2c_c_groups[] = { | |
789 | "i2c_sda_c0", "i2c_sck_c0", "i2c_sda_c1", "i2c_sck_c1" | |
790 | }; | |
791 | ||
792 | static const char * const dvin_groups[] = { | |
793 | "dvin_rgb", "dvin_vs", "dvin_hs", "dvin_clk", "dvin_de" | |
794 | }; | |
795 | ||
796 | static const char * const enc_groups[] = { | |
797 | "enc_0", "enc_1", "enc_2", "enc_3", "enc_4", "enc_5", | |
798 | "enc_6", "enc_7", "enc_8", "enc_9", "enc_10", "enc_11", | |
799 | "enc_12", "enc_13", "enc_14", "enc_15", "enc_16", "enc_17" | |
800 | }; | |
801 | ||
802 | static const char * const vga_groups[] = { | |
803 | "vga_vs", "vga_hs" | |
804 | }; | |
805 | ||
806 | static const char * const hdmi_groups[] = { | |
807 | "hdmi_hpd", "hdmi_sda", "hdmi_scl", "hdmi_cec" | |
808 | }; | |
809 | ||
810 | static const char * const spi_groups[] = { | |
811 | "spi_ss0_0", "spi_miso_0", "spi_mosi_0", "spi_sclk_0", | |
812 | "spi_ss0_1", "spi_ss1_1", "spi_sclk_1", "spi_mosi_1", | |
813 | "spi_miso_1", "spi_ss2_1" | |
814 | }; | |
815 | ||
816 | static const char * const ethernet_groups[] = { | |
817 | "eth_tx_clk_50m", "eth_tx_en", "eth_txd1", | |
818 | "eth_txd0", "eth_rx_clk_in", "eth_rx_dv", | |
819 | "eth_rxd1", "eth_rxd0", "eth_mdio", "eth_mdc" | |
820 | }; | |
821 | ||
822 | static const char * const i2c_a_groups[] = { | |
823 | "i2c_sda_a0", "i2c_sck_a0", "i2c_sda_a1", "i2c_sck_a1", | |
824 | "i2c_sda_a2", "i2c_sck_a2" | |
825 | }; | |
826 | ||
827 | static const char * const i2c_b_groups[] = { | |
828 | "i2c_sda_b", "i2c_sck_b" | |
829 | }; | |
830 | ||
831 | static const char * const sd_c_groups[] = { | |
832 | "sd_d0_c", "sd_d1_c", "sd_d2_c", "sd_d3_c", | |
833 | "sd_cmd_c", "sd_clk_c" | |
834 | }; | |
835 | ||
836 | static const char * const sdxc_c_groups[] = { | |
837 | "sdxc_d0_c", "sdxc_d13_c", "sdxc_d47_c", "sdxc_cmd_c", | |
838 | "sdxc_clk_c" | |
839 | }; | |
840 | ||
841 | static const char * const nand_groups[] = { | |
842 | "nand_io", "nand_io_ce0", "nand_io_ce1", | |
843 | "nand_io_rb0", "nand_ale", "nand_cle", | |
844 | "nand_wen_clk", "nand_ren_clk", "nand_dqs", | |
845 | "nand_ce2", "nand_ce3" | |
846 | }; | |
847 | ||
848 | static const char * const nor_groups[] = { | |
849 | "nor_d", "nor_q", "nor_c", "nor_cs" | |
850 | }; | |
851 | ||
852 | static const char * const sd_b_groups[] = { | |
853 | "sd_d1_b", "sd_d0_b", "sd_clk_b", "sd_cmd_b", | |
854 | "sd_d3_b", "sd_d2_b" | |
855 | }; | |
856 | ||
857 | static const char * const sdxc_b_groups[] = { | |
858 | "sdxc_d13_b", "sdxc_d0_b", "sdxc_clk_b", "sdxc_cmd_b" | |
859 | }; | |
860 | ||
861 | static const char * const uart_ao_groups[] = { | |
862 | "uart_tx_ao_a", "uart_rx_ao_a", "uart_cts_ao_a", "uart_rts_ao_a" | |
863 | }; | |
864 | ||
865 | static const char * const remote_groups[] = { | |
866 | "remote_input" | |
867 | }; | |
868 | ||
869 | static const char * const i2c_slave_ao_groups[] = { | |
870 | "i2c_slave_sck_ao", "i2c_slave_sda_ao" | |
871 | }; | |
872 | ||
873 | static const char * const uart_ao_b_groups[] = { | |
874 | "uart_tx_ao_b0", "uart_rx_ao_b0", "uart_tx_ao_b1", "uart_rx_ao_b1" | |
875 | }; | |
876 | ||
877 | static const char * const i2c_mst_ao_groups[] = { | |
878 | "i2c_mst_sck_ao", "i2c_mst_sda_ao" | |
879 | }; | |
880 | ||
9dab1868 | 881 | static struct meson_pmx_func meson8_cbus_functions[] = { |
6ac73095 BG |
882 | FUNCTION(gpio), |
883 | FUNCTION(sd_a), | |
884 | FUNCTION(sdxc_a), | |
885 | FUNCTION(pcm_a), | |
886 | FUNCTION(uart_a), | |
887 | FUNCTION(uart_b), | |
888 | FUNCTION(iso7816), | |
889 | FUNCTION(i2c_d), | |
890 | FUNCTION(xtal), | |
891 | FUNCTION(uart_c), | |
892 | FUNCTION(pcm_b), | |
893 | FUNCTION(i2c_c), | |
894 | FUNCTION(dvin), | |
895 | FUNCTION(enc), | |
896 | FUNCTION(vga), | |
897 | FUNCTION(hdmi), | |
898 | FUNCTION(spi), | |
899 | FUNCTION(ethernet), | |
900 | FUNCTION(i2c_a), | |
901 | FUNCTION(i2c_b), | |
902 | FUNCTION(sd_c), | |
903 | FUNCTION(sdxc_c), | |
904 | FUNCTION(nand), | |
905 | FUNCTION(nor), | |
906 | FUNCTION(sd_b), | |
907 | FUNCTION(sdxc_b), | |
9dab1868 CC |
908 | }; |
909 | ||
910 | static struct meson_pmx_func meson8_aobus_functions[] = { | |
6ac73095 BG |
911 | FUNCTION(uart_ao), |
912 | FUNCTION(remote), | |
913 | FUNCTION(i2c_slave_ao), | |
914 | FUNCTION(uart_ao_b), | |
915 | FUNCTION(i2c_mst_ao), | |
916 | }; | |
917 | ||
9dab1868 | 918 | static struct meson_bank meson8_cbus_banks[] = { |
0cf6f3c2 CC |
919 | /* name first last pullen pull dir out in */ |
920 | BANK("X", PIN(GPIOX_0, 0), PIN(GPIOX_21, 0), 4, 0, 4, 0, 0, 0, 1, 0, 2, 0), | |
921 | BANK("Y", PIN(GPIOY_0, 0), PIN(GPIOY_16, 0), 3, 0, 3, 0, 3, 0, 4, 0, 5, 0), | |
922 | BANK("DV", PIN(GPIODV_0, 0), PIN(GPIODV_29, 0), 0, 0, 0, 0, 7, 0, 8, 0, 9, 0), | |
923 | BANK("H", PIN(GPIOH_0, 0), PIN(GPIOH_9, 0), 1, 16, 1, 16, 9, 19, 10, 19, 11, 19), | |
924 | BANK("Z", PIN(GPIOZ_0, 0), PIN(GPIOZ_14, 0), 1, 0, 1, 0, 3, 17, 4, 17, 5, 17), | |
925 | BANK("CARD", PIN(CARD_0, 0), PIN(CARD_6, 0), 2, 20, 2, 20, 0, 22, 1, 22, 2, 22), | |
926 | BANK("BOOT", PIN(BOOT_0, 0), PIN(BOOT_18, 0), 2, 0, 2, 0, 9, 0, 10, 0, 11, 0), | |
6ac73095 BG |
927 | }; |
928 | ||
9dab1868 | 929 | static struct meson_bank meson8_aobus_banks[] = { |
0cf6f3c2 CC |
930 | /* name first last pullen pull dir out in */ |
931 | BANK("AO", PIN(GPIOAO_0, AO_OFF), PIN(GPIO_TEST_N, AO_OFF), 0, 0, 0, 16, 0, 0, 0, 16, 1, 0), | |
6ac73095 BG |
932 | }; |
933 | ||
9dab1868 CC |
934 | static struct meson_domain_data meson8_cbus_domain_data = { |
935 | .name = "cbus-banks", | |
936 | .banks = meson8_cbus_banks, | |
937 | .num_banks = ARRAY_SIZE(meson8_cbus_banks), | |
938 | .pin_base = 0, | |
939 | .num_pins = 120, | |
940 | }; | |
941 | ||
942 | static struct meson_domain_data meson8_aobus_domain_data = { | |
943 | .name = "ao-bank", | |
944 | .banks = meson8_aobus_banks, | |
945 | .num_banks = ARRAY_SIZE(meson8_aobus_banks), | |
946 | .pin_base = 120, | |
947 | .num_pins = 16, | |
948 | }; | |
949 | ||
950 | struct meson_pinctrl_data meson8_cbus_pinctrl_data = { | |
951 | .pins = meson8_cbus_pins, | |
952 | .groups = meson8_cbus_groups, | |
953 | .funcs = meson8_cbus_functions, | |
954 | .domain_data = &meson8_cbus_domain_data, | |
955 | .num_pins = ARRAY_SIZE(meson8_cbus_pins), | |
956 | .num_groups = ARRAY_SIZE(meson8_cbus_groups), | |
957 | .num_funcs = ARRAY_SIZE(meson8_cbus_functions), | |
958 | }; | |
959 | ||
960 | struct meson_pinctrl_data meson8_aobus_pinctrl_data = { | |
961 | .pins = meson8_aobus_pins, | |
962 | .groups = meson8_aobus_groups, | |
963 | .funcs = meson8_aobus_functions, | |
964 | .domain_data = &meson8_aobus_domain_data, | |
965 | .num_pins = ARRAY_SIZE(meson8_aobus_pins), | |
966 | .num_groups = ARRAY_SIZE(meson8_aobus_groups), | |
967 | .num_funcs = ARRAY_SIZE(meson8_aobus_functions), | |
6ac73095 | 968 | }; |