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1 | /* |
2 | * IMX pinmux core definitions | |
3 | * | |
4 | * Copyright (C) 2012 Freescale Semiconductor, Inc. | |
5 | * Copyright (C) 2012 Linaro Ltd. | |
6 | * | |
7 | * Author: Dong Aisheng <dong.aisheng@linaro.org> | |
8 | * | |
9 | * This program is free software; you can redistribute it and/or modify | |
10 | * it under the terms of the GNU General Public License as published by | |
11 | * the Free Software Foundation; either version 2 of the License, or | |
12 | * (at your option) any later version. | |
13 | */ | |
14 | ||
15 | #ifndef __DRIVERS_PINCTRL_IMX_H | |
16 | #define __DRIVERS_PINCTRL_IMX_H | |
17 | ||
18 | struct platform_device; | |
19 | ||
20 | /** | |
21 | * struct imx_pin_group - describes an IMX pin group | |
22 | * @name: the name of this specific pin group | |
23 | * @pins: an array of discrete physical pins used in this group, taken | |
24 | * from the driver-local pin enumeration space | |
25 | * @npins: the number of pins in this group array, i.e. the number of | |
26 | * elements in .pins so we can iterate over that array | |
27 | * @mux_mode: the mux mode for each pin in this group. The size of this | |
28 | * array is the same as pins. | |
29 | * @configs: the config for each pin in this group. The size of this | |
30 | * array is the same as pins. | |
31 | */ | |
32 | struct imx_pin_group { | |
33 | const char *name; | |
34 | unsigned int *pins; | |
35 | unsigned npins; | |
36 | unsigned int *mux_mode; | |
37 | unsigned long *configs; | |
38 | }; | |
39 | ||
40 | /** | |
41 | * struct imx_pmx_func - describes IMX pinmux functions | |
42 | * @name: the name of this specific function | |
43 | * @groups: corresponding pin groups | |
44 | * @num_groups: the number of groups | |
45 | */ | |
46 | struct imx_pmx_func { | |
47 | const char *name; | |
48 | const char **groups; | |
49 | unsigned num_groups; | |
50 | }; | |
51 | ||
52 | /** | |
53 | * struct imx_pin_reg - describe a pin reg map | |
54 | * The last 3 members are used for select input setting | |
55 | * @pid: pin id | |
56 | * @mux_reg: mux register offset | |
57 | * @conf_reg: config register offset | |
58 | * @mux_mode: mux mode | |
59 | * @input_reg: select input register offset for this mux if any | |
60 | * 0 if no select input setting needed. | |
61 | * @input_val: the value set to select input register | |
62 | */ | |
63 | struct imx_pin_reg { | |
64 | u16 pid; | |
65 | u16 mux_reg; | |
66 | u16 conf_reg; | |
67 | u8 mux_mode; | |
68 | u16 input_reg; | |
69 | u8 input_val; | |
70 | }; | |
71 | ||
72 | struct imx_pinctrl_soc_info { | |
73 | struct device *dev; | |
74 | const struct pinctrl_pin_desc *pins; | |
75 | unsigned int npins; | |
76 | const struct imx_pin_reg *pin_regs; | |
77 | unsigned int npin_regs; | |
78 | struct imx_pin_group *groups; | |
79 | unsigned int ngroups; | |
80 | struct imx_pmx_func *functions; | |
81 | unsigned int nfunctions; | |
82 | }; | |
83 | ||
84 | #define NO_MUX 0x0 | |
85 | #define NO_PAD 0x0 | |
86 | ||
87 | #define IMX_PIN_REG(id, conf, mux, mode, input, val) \ | |
88 | { \ | |
89 | .pid = id, \ | |
90 | .conf_reg = conf, \ | |
91 | .mux_reg = mux, \ | |
92 | .mux_mode = mode, \ | |
93 | .input_reg = input, \ | |
94 | .input_val = val, \ | |
95 | } | |
96 | ||
97 | #define IMX_PINCTRL_PIN(pin) PINCTRL_PIN(pin, #pin) | |
98 | ||
99 | #define PAD_CTL_MASK(len) ((1 << len) - 1) | |
100 | #define IMX_MUX_MASK 0x7 | |
101 | #define IOMUXC_CONFIG_SION (0x1 << 4) | |
102 | ||
103 | int imx_pinctrl_probe(struct platform_device *pdev, | |
104 | struct imx_pinctrl_soc_info *info); | |
105 | int imx_pinctrl_remove(struct platform_device *pdev); | |
106 | #endif /* __DRIVERS_PINCTRL_IMX_H */ |