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3f551d6a SG |
1 | /* |
2 | * Copyright (C) 2013 Freescale Semiconductor, Inc. | |
3 | * | |
4 | * This program is free software; you can redistribute it and/or modify | |
5 | * it under the terms of the GNU General Public License version 2 as | |
6 | * published by the Free Software Foundation. | |
7 | */ | |
8 | ||
9 | #include <linux/err.h> | |
10 | #include <linux/init.h> | |
11 | #include <linux/io.h> | |
12 | #include <linux/module.h> | |
13 | #include <linux/of.h> | |
14 | #include <linux/of_device.h> | |
15 | #include <linux/pinctrl/pinctrl.h> | |
16 | ||
17 | #include "pinctrl-imx.h" | |
18 | ||
19 | enum imx6dl_pads { | |
20 | MX6DL_PAD_RESERVE0 = 0, | |
21 | MX6DL_PAD_RESERVE1 = 1, | |
22 | MX6DL_PAD_RESERVE2 = 2, | |
23 | MX6DL_PAD_RESERVE3 = 3, | |
24 | MX6DL_PAD_RESERVE4 = 4, | |
25 | MX6DL_PAD_RESERVE5 = 5, | |
26 | MX6DL_PAD_RESERVE6 = 6, | |
27 | MX6DL_PAD_RESERVE7 = 7, | |
28 | MX6DL_PAD_RESERVE8 = 8, | |
29 | MX6DL_PAD_RESERVE9 = 9, | |
30 | MX6DL_PAD_RESERVE10 = 10, | |
31 | MX6DL_PAD_RESERVE11 = 11, | |
32 | MX6DL_PAD_RESERVE12 = 12, | |
33 | MX6DL_PAD_RESERVE13 = 13, | |
34 | MX6DL_PAD_RESERVE14 = 14, | |
35 | MX6DL_PAD_RESERVE15 = 15, | |
36 | MX6DL_PAD_RESERVE16 = 16, | |
37 | MX6DL_PAD_RESERVE17 = 17, | |
38 | MX6DL_PAD_RESERVE18 = 18, | |
39 | MX6DL_PAD_CSI0_DAT10 = 19, | |
40 | MX6DL_PAD_CSI0_DAT11 = 20, | |
41 | MX6DL_PAD_CSI0_DAT12 = 21, | |
42 | MX6DL_PAD_CSI0_DAT13 = 22, | |
43 | MX6DL_PAD_CSI0_DAT14 = 23, | |
44 | MX6DL_PAD_CSI0_DAT15 = 24, | |
45 | MX6DL_PAD_CSI0_DAT16 = 25, | |
46 | MX6DL_PAD_CSI0_DAT17 = 26, | |
47 | MX6DL_PAD_CSI0_DAT18 = 27, | |
48 | MX6DL_PAD_CSI0_DAT19 = 28, | |
49 | MX6DL_PAD_CSI0_DAT4 = 29, | |
50 | MX6DL_PAD_CSI0_DAT5 = 30, | |
51 | MX6DL_PAD_CSI0_DAT6 = 31, | |
52 | MX6DL_PAD_CSI0_DAT7 = 32, | |
53 | MX6DL_PAD_CSI0_DAT8 = 33, | |
54 | MX6DL_PAD_CSI0_DAT9 = 34, | |
55 | MX6DL_PAD_CSI0_DATA_EN = 35, | |
56 | MX6DL_PAD_CSI0_MCLK = 36, | |
57 | MX6DL_PAD_CSI0_PIXCLK = 37, | |
58 | MX6DL_PAD_CSI0_VSYNC = 38, | |
59 | MX6DL_PAD_DI0_DISP_CLK = 39, | |
60 | MX6DL_PAD_DI0_PIN15 = 40, | |
61 | MX6DL_PAD_DI0_PIN2 = 41, | |
62 | MX6DL_PAD_DI0_PIN3 = 42, | |
63 | MX6DL_PAD_DI0_PIN4 = 43, | |
64 | MX6DL_PAD_DISP0_DAT0 = 44, | |
65 | MX6DL_PAD_DISP0_DAT1 = 45, | |
66 | MX6DL_PAD_DISP0_DAT10 = 46, | |
67 | MX6DL_PAD_DISP0_DAT11 = 47, | |
68 | MX6DL_PAD_DISP0_DAT12 = 48, | |
69 | MX6DL_PAD_DISP0_DAT13 = 49, | |
70 | MX6DL_PAD_DISP0_DAT14 = 50, | |
71 | MX6DL_PAD_DISP0_DAT15 = 51, | |
72 | MX6DL_PAD_DISP0_DAT16 = 52, | |
73 | MX6DL_PAD_DISP0_DAT17 = 53, | |
74 | MX6DL_PAD_DISP0_DAT18 = 54, | |
75 | MX6DL_PAD_DISP0_DAT19 = 55, | |
76 | MX6DL_PAD_DISP0_DAT2 = 56, | |
77 | MX6DL_PAD_DISP0_DAT20 = 57, | |
78 | MX6DL_PAD_DISP0_DAT21 = 58, | |
79 | MX6DL_PAD_DISP0_DAT22 = 59, | |
80 | MX6DL_PAD_DISP0_DAT23 = 60, | |
81 | MX6DL_PAD_DISP0_DAT3 = 61, | |
82 | MX6DL_PAD_DISP0_DAT4 = 62, | |
83 | MX6DL_PAD_DISP0_DAT5 = 63, | |
84 | MX6DL_PAD_DISP0_DAT6 = 64, | |
85 | MX6DL_PAD_DISP0_DAT7 = 65, | |
86 | MX6DL_PAD_DISP0_DAT8 = 66, | |
87 | MX6DL_PAD_DISP0_DAT9 = 67, | |
88 | MX6DL_PAD_EIM_A16 = 68, | |
89 | MX6DL_PAD_EIM_A17 = 69, | |
90 | MX6DL_PAD_EIM_A18 = 70, | |
91 | MX6DL_PAD_EIM_A19 = 71, | |
92 | MX6DL_PAD_EIM_A20 = 72, | |
93 | MX6DL_PAD_EIM_A21 = 73, | |
94 | MX6DL_PAD_EIM_A22 = 74, | |
95 | MX6DL_PAD_EIM_A23 = 75, | |
96 | MX6DL_PAD_EIM_A24 = 76, | |
97 | MX6DL_PAD_EIM_A25 = 77, | |
98 | MX6DL_PAD_EIM_BCLK = 78, | |
99 | MX6DL_PAD_EIM_CS0 = 79, | |
100 | MX6DL_PAD_EIM_CS1 = 80, | |
101 | MX6DL_PAD_EIM_D16 = 81, | |
102 | MX6DL_PAD_EIM_D17 = 82, | |
103 | MX6DL_PAD_EIM_D18 = 83, | |
104 | MX6DL_PAD_EIM_D19 = 84, | |
105 | MX6DL_PAD_EIM_D20 = 85, | |
106 | MX6DL_PAD_EIM_D21 = 86, | |
107 | MX6DL_PAD_EIM_D22 = 87, | |
108 | MX6DL_PAD_EIM_D23 = 88, | |
109 | MX6DL_PAD_EIM_D24 = 89, | |
110 | MX6DL_PAD_EIM_D25 = 90, | |
111 | MX6DL_PAD_EIM_D26 = 91, | |
112 | MX6DL_PAD_EIM_D27 = 92, | |
113 | MX6DL_PAD_EIM_D28 = 93, | |
114 | MX6DL_PAD_EIM_D29 = 94, | |
115 | MX6DL_PAD_EIM_D30 = 95, | |
116 | MX6DL_PAD_EIM_D31 = 96, | |
117 | MX6DL_PAD_EIM_DA0 = 97, | |
118 | MX6DL_PAD_EIM_DA1 = 98, | |
119 | MX6DL_PAD_EIM_DA10 = 99, | |
120 | MX6DL_PAD_EIM_DA11 = 100, | |
121 | MX6DL_PAD_EIM_DA12 = 101, | |
122 | MX6DL_PAD_EIM_DA13 = 102, | |
123 | MX6DL_PAD_EIM_DA14 = 103, | |
124 | MX6DL_PAD_EIM_DA15 = 104, | |
125 | MX6DL_PAD_EIM_DA2 = 105, | |
126 | MX6DL_PAD_EIM_DA3 = 106, | |
127 | MX6DL_PAD_EIM_DA4 = 107, | |
128 | MX6DL_PAD_EIM_DA5 = 108, | |
129 | MX6DL_PAD_EIM_DA6 = 109, | |
130 | MX6DL_PAD_EIM_DA7 = 110, | |
131 | MX6DL_PAD_EIM_DA8 = 111, | |
132 | MX6DL_PAD_EIM_DA9 = 112, | |
133 | MX6DL_PAD_EIM_EB0 = 113, | |
134 | MX6DL_PAD_EIM_EB1 = 114, | |
135 | MX6DL_PAD_EIM_EB2 = 115, | |
136 | MX6DL_PAD_EIM_EB3 = 116, | |
137 | MX6DL_PAD_EIM_LBA = 117, | |
138 | MX6DL_PAD_EIM_OE = 118, | |
139 | MX6DL_PAD_EIM_RW = 119, | |
140 | MX6DL_PAD_EIM_WAIT = 120, | |
141 | MX6DL_PAD_ENET_CRS_DV = 121, | |
142 | MX6DL_PAD_ENET_MDC = 122, | |
143 | MX6DL_PAD_ENET_MDIO = 123, | |
144 | MX6DL_PAD_ENET_REF_CLK = 124, | |
145 | MX6DL_PAD_ENET_RX_ER = 125, | |
146 | MX6DL_PAD_ENET_RXD0 = 126, | |
147 | MX6DL_PAD_ENET_RXD1 = 127, | |
148 | MX6DL_PAD_ENET_TX_EN = 128, | |
149 | MX6DL_PAD_ENET_TXD0 = 129, | |
150 | MX6DL_PAD_ENET_TXD1 = 130, | |
151 | MX6DL_PAD_GPIO_0 = 131, | |
152 | MX6DL_PAD_GPIO_1 = 132, | |
153 | MX6DL_PAD_GPIO_16 = 133, | |
154 | MX6DL_PAD_GPIO_17 = 134, | |
155 | MX6DL_PAD_GPIO_18 = 135, | |
156 | MX6DL_PAD_GPIO_19 = 136, | |
157 | MX6DL_PAD_GPIO_2 = 137, | |
158 | MX6DL_PAD_GPIO_3 = 138, | |
159 | MX6DL_PAD_GPIO_4 = 139, | |
160 | MX6DL_PAD_GPIO_5 = 140, | |
161 | MX6DL_PAD_GPIO_6 = 141, | |
162 | MX6DL_PAD_GPIO_7 = 142, | |
163 | MX6DL_PAD_GPIO_8 = 143, | |
164 | MX6DL_PAD_GPIO_9 = 144, | |
165 | MX6DL_PAD_KEY_COL0 = 145, | |
166 | MX6DL_PAD_KEY_COL1 = 146, | |
167 | MX6DL_PAD_KEY_COL2 = 147, | |
168 | MX6DL_PAD_KEY_COL3 = 148, | |
169 | MX6DL_PAD_KEY_COL4 = 149, | |
170 | MX6DL_PAD_KEY_ROW0 = 150, | |
171 | MX6DL_PAD_KEY_ROW1 = 151, | |
172 | MX6DL_PAD_KEY_ROW2 = 152, | |
173 | MX6DL_PAD_KEY_ROW3 = 153, | |
174 | MX6DL_PAD_KEY_ROW4 = 154, | |
175 | MX6DL_PAD_NANDF_ALE = 155, | |
176 | MX6DL_PAD_NANDF_CLE = 156, | |
177 | MX6DL_PAD_NANDF_CS0 = 157, | |
178 | MX6DL_PAD_NANDF_CS1 = 158, | |
179 | MX6DL_PAD_NANDF_CS2 = 159, | |
180 | MX6DL_PAD_NANDF_CS3 = 160, | |
181 | MX6DL_PAD_NANDF_D0 = 161, | |
182 | MX6DL_PAD_NANDF_D1 = 162, | |
183 | MX6DL_PAD_NANDF_D2 = 163, | |
184 | MX6DL_PAD_NANDF_D3 = 164, | |
185 | MX6DL_PAD_NANDF_D4 = 165, | |
186 | MX6DL_PAD_NANDF_D5 = 166, | |
187 | MX6DL_PAD_NANDF_D6 = 167, | |
188 | MX6DL_PAD_NANDF_D7 = 168, | |
189 | MX6DL_PAD_NANDF_RB0 = 169, | |
190 | MX6DL_PAD_NANDF_WP_B = 170, | |
191 | MX6DL_PAD_RGMII_RD0 = 171, | |
192 | MX6DL_PAD_RGMII_RD1 = 172, | |
193 | MX6DL_PAD_RGMII_RD2 = 173, | |
194 | MX6DL_PAD_RGMII_RD3 = 174, | |
195 | MX6DL_PAD_RGMII_RX_CTL = 175, | |
196 | MX6DL_PAD_RGMII_RXC = 176, | |
197 | MX6DL_PAD_RGMII_TD0 = 177, | |
198 | MX6DL_PAD_RGMII_TD1 = 178, | |
199 | MX6DL_PAD_RGMII_TD2 = 179, | |
200 | MX6DL_PAD_RGMII_TD3 = 180, | |
201 | MX6DL_PAD_RGMII_TX_CTL = 181, | |
202 | MX6DL_PAD_RGMII_TXC = 182, | |
203 | MX6DL_PAD_SD1_CLK = 183, | |
204 | MX6DL_PAD_SD1_CMD = 184, | |
205 | MX6DL_PAD_SD1_DAT0 = 185, | |
206 | MX6DL_PAD_SD1_DAT1 = 186, | |
207 | MX6DL_PAD_SD1_DAT2 = 187, | |
208 | MX6DL_PAD_SD1_DAT3 = 188, | |
209 | MX6DL_PAD_SD2_CLK = 189, | |
210 | MX6DL_PAD_SD2_CMD = 190, | |
211 | MX6DL_PAD_SD2_DAT0 = 191, | |
212 | MX6DL_PAD_SD2_DAT1 = 192, | |
213 | MX6DL_PAD_SD2_DAT2 = 193, | |
214 | MX6DL_PAD_SD2_DAT3 = 194, | |
215 | MX6DL_PAD_SD3_CLK = 195, | |
216 | MX6DL_PAD_SD3_CMD = 196, | |
217 | MX6DL_PAD_SD3_DAT0 = 197, | |
218 | MX6DL_PAD_SD3_DAT1 = 198, | |
219 | MX6DL_PAD_SD3_DAT2 = 199, | |
220 | MX6DL_PAD_SD3_DAT3 = 200, | |
221 | MX6DL_PAD_SD3_DAT4 = 201, | |
222 | MX6DL_PAD_SD3_DAT5 = 202, | |
223 | MX6DL_PAD_SD3_DAT6 = 203, | |
224 | MX6DL_PAD_SD3_DAT7 = 204, | |
225 | MX6DL_PAD_SD3_RST = 205, | |
226 | MX6DL_PAD_SD4_CLK = 206, | |
227 | MX6DL_PAD_SD4_CMD = 207, | |
228 | MX6DL_PAD_SD4_DAT0 = 208, | |
229 | MX6DL_PAD_SD4_DAT1 = 209, | |
230 | MX6DL_PAD_SD4_DAT2 = 210, | |
231 | MX6DL_PAD_SD4_DAT3 = 211, | |
232 | MX6DL_PAD_SD4_DAT4 = 212, | |
233 | MX6DL_PAD_SD4_DAT5 = 213, | |
234 | MX6DL_PAD_SD4_DAT6 = 214, | |
235 | MX6DL_PAD_SD4_DAT7 = 215, | |
236 | }; | |
237 | ||
238 | /* Pad names for the pinmux subsystem */ | |
239 | static const struct pinctrl_pin_desc imx6dl_pinctrl_pads[] = { | |
240 | IMX_PINCTRL_PIN(MX6DL_PAD_RESERVE0), | |
241 | IMX_PINCTRL_PIN(MX6DL_PAD_RESERVE1), | |
242 | IMX_PINCTRL_PIN(MX6DL_PAD_RESERVE2), | |
243 | IMX_PINCTRL_PIN(MX6DL_PAD_RESERVE3), | |
244 | IMX_PINCTRL_PIN(MX6DL_PAD_RESERVE4), | |
245 | IMX_PINCTRL_PIN(MX6DL_PAD_RESERVE5), | |
246 | IMX_PINCTRL_PIN(MX6DL_PAD_RESERVE6), | |
247 | IMX_PINCTRL_PIN(MX6DL_PAD_RESERVE7), | |
248 | IMX_PINCTRL_PIN(MX6DL_PAD_RESERVE8), | |
249 | IMX_PINCTRL_PIN(MX6DL_PAD_RESERVE9), | |
250 | IMX_PINCTRL_PIN(MX6DL_PAD_RESERVE10), | |
251 | IMX_PINCTRL_PIN(MX6DL_PAD_RESERVE11), | |
252 | IMX_PINCTRL_PIN(MX6DL_PAD_RESERVE12), | |
253 | IMX_PINCTRL_PIN(MX6DL_PAD_RESERVE13), | |
254 | IMX_PINCTRL_PIN(MX6DL_PAD_RESERVE14), | |
255 | IMX_PINCTRL_PIN(MX6DL_PAD_RESERVE15), | |
256 | IMX_PINCTRL_PIN(MX6DL_PAD_RESERVE16), | |
257 | IMX_PINCTRL_PIN(MX6DL_PAD_RESERVE17), | |
258 | IMX_PINCTRL_PIN(MX6DL_PAD_RESERVE18), | |
259 | IMX_PINCTRL_PIN(MX6DL_PAD_CSI0_DAT10), | |
260 | IMX_PINCTRL_PIN(MX6DL_PAD_CSI0_DAT11), | |
261 | IMX_PINCTRL_PIN(MX6DL_PAD_CSI0_DAT12), | |
262 | IMX_PINCTRL_PIN(MX6DL_PAD_CSI0_DAT13), | |
263 | IMX_PINCTRL_PIN(MX6DL_PAD_CSI0_DAT14), | |
264 | IMX_PINCTRL_PIN(MX6DL_PAD_CSI0_DAT15), | |
265 | IMX_PINCTRL_PIN(MX6DL_PAD_CSI0_DAT16), | |
266 | IMX_PINCTRL_PIN(MX6DL_PAD_CSI0_DAT17), | |
267 | IMX_PINCTRL_PIN(MX6DL_PAD_CSI0_DAT18), | |
268 | IMX_PINCTRL_PIN(MX6DL_PAD_CSI0_DAT19), | |
269 | IMX_PINCTRL_PIN(MX6DL_PAD_CSI0_DAT4), | |
270 | IMX_PINCTRL_PIN(MX6DL_PAD_CSI0_DAT5), | |
271 | IMX_PINCTRL_PIN(MX6DL_PAD_CSI0_DAT6), | |
272 | IMX_PINCTRL_PIN(MX6DL_PAD_CSI0_DAT7), | |
273 | IMX_PINCTRL_PIN(MX6DL_PAD_CSI0_DAT8), | |
274 | IMX_PINCTRL_PIN(MX6DL_PAD_CSI0_DAT9), | |
275 | IMX_PINCTRL_PIN(MX6DL_PAD_CSI0_DATA_EN), | |
276 | IMX_PINCTRL_PIN(MX6DL_PAD_CSI0_MCLK), | |
277 | IMX_PINCTRL_PIN(MX6DL_PAD_CSI0_PIXCLK), | |
278 | IMX_PINCTRL_PIN(MX6DL_PAD_CSI0_VSYNC), | |
279 | IMX_PINCTRL_PIN(MX6DL_PAD_DI0_DISP_CLK), | |
280 | IMX_PINCTRL_PIN(MX6DL_PAD_DI0_PIN15), | |
281 | IMX_PINCTRL_PIN(MX6DL_PAD_DI0_PIN2), | |
282 | IMX_PINCTRL_PIN(MX6DL_PAD_DI0_PIN3), | |
283 | IMX_PINCTRL_PIN(MX6DL_PAD_DI0_PIN4), | |
284 | IMX_PINCTRL_PIN(MX6DL_PAD_DISP0_DAT0), | |
285 | IMX_PINCTRL_PIN(MX6DL_PAD_DISP0_DAT1), | |
286 | IMX_PINCTRL_PIN(MX6DL_PAD_DISP0_DAT10), | |
287 | IMX_PINCTRL_PIN(MX6DL_PAD_DISP0_DAT11), | |
288 | IMX_PINCTRL_PIN(MX6DL_PAD_DISP0_DAT12), | |
289 | IMX_PINCTRL_PIN(MX6DL_PAD_DISP0_DAT13), | |
290 | IMX_PINCTRL_PIN(MX6DL_PAD_DISP0_DAT14), | |
291 | IMX_PINCTRL_PIN(MX6DL_PAD_DISP0_DAT15), | |
292 | IMX_PINCTRL_PIN(MX6DL_PAD_DISP0_DAT16), | |
293 | IMX_PINCTRL_PIN(MX6DL_PAD_DISP0_DAT17), | |
294 | IMX_PINCTRL_PIN(MX6DL_PAD_DISP0_DAT18), | |
295 | IMX_PINCTRL_PIN(MX6DL_PAD_DISP0_DAT19), | |
296 | IMX_PINCTRL_PIN(MX6DL_PAD_DISP0_DAT2), | |
297 | IMX_PINCTRL_PIN(MX6DL_PAD_DISP0_DAT20), | |
298 | IMX_PINCTRL_PIN(MX6DL_PAD_DISP0_DAT21), | |
299 | IMX_PINCTRL_PIN(MX6DL_PAD_DISP0_DAT22), | |
300 | IMX_PINCTRL_PIN(MX6DL_PAD_DISP0_DAT23), | |
301 | IMX_PINCTRL_PIN(MX6DL_PAD_DISP0_DAT3), | |
302 | IMX_PINCTRL_PIN(MX6DL_PAD_DISP0_DAT4), | |
303 | IMX_PINCTRL_PIN(MX6DL_PAD_DISP0_DAT5), | |
304 | IMX_PINCTRL_PIN(MX6DL_PAD_DISP0_DAT6), | |
305 | IMX_PINCTRL_PIN(MX6DL_PAD_DISP0_DAT7), | |
306 | IMX_PINCTRL_PIN(MX6DL_PAD_DISP0_DAT8), | |
307 | IMX_PINCTRL_PIN(MX6DL_PAD_DISP0_DAT9), | |
308 | IMX_PINCTRL_PIN(MX6DL_PAD_EIM_A16), | |
309 | IMX_PINCTRL_PIN(MX6DL_PAD_EIM_A17), | |
310 | IMX_PINCTRL_PIN(MX6DL_PAD_EIM_A18), | |
311 | IMX_PINCTRL_PIN(MX6DL_PAD_EIM_A19), | |
312 | IMX_PINCTRL_PIN(MX6DL_PAD_EIM_A20), | |
313 | IMX_PINCTRL_PIN(MX6DL_PAD_EIM_A21), | |
314 | IMX_PINCTRL_PIN(MX6DL_PAD_EIM_A22), | |
315 | IMX_PINCTRL_PIN(MX6DL_PAD_EIM_A23), | |
316 | IMX_PINCTRL_PIN(MX6DL_PAD_EIM_A24), | |
317 | IMX_PINCTRL_PIN(MX6DL_PAD_EIM_A25), | |
318 | IMX_PINCTRL_PIN(MX6DL_PAD_EIM_BCLK), | |
319 | IMX_PINCTRL_PIN(MX6DL_PAD_EIM_CS0), | |
320 | IMX_PINCTRL_PIN(MX6DL_PAD_EIM_CS1), | |
321 | IMX_PINCTRL_PIN(MX6DL_PAD_EIM_D16), | |
322 | IMX_PINCTRL_PIN(MX6DL_PAD_EIM_D17), | |
323 | IMX_PINCTRL_PIN(MX6DL_PAD_EIM_D18), | |
324 | IMX_PINCTRL_PIN(MX6DL_PAD_EIM_D19), | |
325 | IMX_PINCTRL_PIN(MX6DL_PAD_EIM_D20), | |
326 | IMX_PINCTRL_PIN(MX6DL_PAD_EIM_D21), | |
327 | IMX_PINCTRL_PIN(MX6DL_PAD_EIM_D22), | |
328 | IMX_PINCTRL_PIN(MX6DL_PAD_EIM_D23), | |
329 | IMX_PINCTRL_PIN(MX6DL_PAD_EIM_D24), | |
330 | IMX_PINCTRL_PIN(MX6DL_PAD_EIM_D25), | |
331 | IMX_PINCTRL_PIN(MX6DL_PAD_EIM_D26), | |
332 | IMX_PINCTRL_PIN(MX6DL_PAD_EIM_D27), | |
333 | IMX_PINCTRL_PIN(MX6DL_PAD_EIM_D28), | |
334 | IMX_PINCTRL_PIN(MX6DL_PAD_EIM_D29), | |
335 | IMX_PINCTRL_PIN(MX6DL_PAD_EIM_D30), | |
336 | IMX_PINCTRL_PIN(MX6DL_PAD_EIM_D31), | |
337 | IMX_PINCTRL_PIN(MX6DL_PAD_EIM_DA0), | |
338 | IMX_PINCTRL_PIN(MX6DL_PAD_EIM_DA1), | |
339 | IMX_PINCTRL_PIN(MX6DL_PAD_EIM_DA10), | |
340 | IMX_PINCTRL_PIN(MX6DL_PAD_EIM_DA11), | |
341 | IMX_PINCTRL_PIN(MX6DL_PAD_EIM_DA12), | |
342 | IMX_PINCTRL_PIN(MX6DL_PAD_EIM_DA13), | |
343 | IMX_PINCTRL_PIN(MX6DL_PAD_EIM_DA14), | |
344 | IMX_PINCTRL_PIN(MX6DL_PAD_EIM_DA15), | |
345 | IMX_PINCTRL_PIN(MX6DL_PAD_EIM_DA2), | |
346 | IMX_PINCTRL_PIN(MX6DL_PAD_EIM_DA3), | |
347 | IMX_PINCTRL_PIN(MX6DL_PAD_EIM_DA4), | |
348 | IMX_PINCTRL_PIN(MX6DL_PAD_EIM_DA5), | |
349 | IMX_PINCTRL_PIN(MX6DL_PAD_EIM_DA6), | |
350 | IMX_PINCTRL_PIN(MX6DL_PAD_EIM_DA7), | |
351 | IMX_PINCTRL_PIN(MX6DL_PAD_EIM_DA8), | |
352 | IMX_PINCTRL_PIN(MX6DL_PAD_EIM_DA9), | |
353 | IMX_PINCTRL_PIN(MX6DL_PAD_EIM_EB0), | |
354 | IMX_PINCTRL_PIN(MX6DL_PAD_EIM_EB1), | |
355 | IMX_PINCTRL_PIN(MX6DL_PAD_EIM_EB2), | |
356 | IMX_PINCTRL_PIN(MX6DL_PAD_EIM_EB3), | |
357 | IMX_PINCTRL_PIN(MX6DL_PAD_EIM_LBA), | |
358 | IMX_PINCTRL_PIN(MX6DL_PAD_EIM_OE), | |
359 | IMX_PINCTRL_PIN(MX6DL_PAD_EIM_RW), | |
360 | IMX_PINCTRL_PIN(MX6DL_PAD_EIM_WAIT), | |
361 | IMX_PINCTRL_PIN(MX6DL_PAD_ENET_CRS_DV), | |
362 | IMX_PINCTRL_PIN(MX6DL_PAD_ENET_MDC), | |
363 | IMX_PINCTRL_PIN(MX6DL_PAD_ENET_MDIO), | |
364 | IMX_PINCTRL_PIN(MX6DL_PAD_ENET_REF_CLK), | |
365 | IMX_PINCTRL_PIN(MX6DL_PAD_ENET_RX_ER), | |
366 | IMX_PINCTRL_PIN(MX6DL_PAD_ENET_RXD0), | |
367 | IMX_PINCTRL_PIN(MX6DL_PAD_ENET_RXD1), | |
368 | IMX_PINCTRL_PIN(MX6DL_PAD_ENET_TX_EN), | |
369 | IMX_PINCTRL_PIN(MX6DL_PAD_ENET_TXD0), | |
370 | IMX_PINCTRL_PIN(MX6DL_PAD_ENET_TXD1), | |
371 | IMX_PINCTRL_PIN(MX6DL_PAD_GPIO_0), | |
372 | IMX_PINCTRL_PIN(MX6DL_PAD_GPIO_1), | |
373 | IMX_PINCTRL_PIN(MX6DL_PAD_GPIO_16), | |
374 | IMX_PINCTRL_PIN(MX6DL_PAD_GPIO_17), | |
375 | IMX_PINCTRL_PIN(MX6DL_PAD_GPIO_18), | |
376 | IMX_PINCTRL_PIN(MX6DL_PAD_GPIO_19), | |
377 | IMX_PINCTRL_PIN(MX6DL_PAD_GPIO_2), | |
378 | IMX_PINCTRL_PIN(MX6DL_PAD_GPIO_3), | |
379 | IMX_PINCTRL_PIN(MX6DL_PAD_GPIO_4), | |
380 | IMX_PINCTRL_PIN(MX6DL_PAD_GPIO_5), | |
381 | IMX_PINCTRL_PIN(MX6DL_PAD_GPIO_6), | |
382 | IMX_PINCTRL_PIN(MX6DL_PAD_GPIO_7), | |
383 | IMX_PINCTRL_PIN(MX6DL_PAD_GPIO_8), | |
384 | IMX_PINCTRL_PIN(MX6DL_PAD_GPIO_9), | |
385 | IMX_PINCTRL_PIN(MX6DL_PAD_KEY_COL0), | |
386 | IMX_PINCTRL_PIN(MX6DL_PAD_KEY_COL1), | |
387 | IMX_PINCTRL_PIN(MX6DL_PAD_KEY_COL2), | |
388 | IMX_PINCTRL_PIN(MX6DL_PAD_KEY_COL3), | |
389 | IMX_PINCTRL_PIN(MX6DL_PAD_KEY_COL4), | |
390 | IMX_PINCTRL_PIN(MX6DL_PAD_KEY_ROW0), | |
391 | IMX_PINCTRL_PIN(MX6DL_PAD_KEY_ROW1), | |
392 | IMX_PINCTRL_PIN(MX6DL_PAD_KEY_ROW2), | |
393 | IMX_PINCTRL_PIN(MX6DL_PAD_KEY_ROW3), | |
394 | IMX_PINCTRL_PIN(MX6DL_PAD_KEY_ROW4), | |
395 | IMX_PINCTRL_PIN(MX6DL_PAD_NANDF_ALE), | |
396 | IMX_PINCTRL_PIN(MX6DL_PAD_NANDF_CLE), | |
397 | IMX_PINCTRL_PIN(MX6DL_PAD_NANDF_CS0), | |
398 | IMX_PINCTRL_PIN(MX6DL_PAD_NANDF_CS1), | |
399 | IMX_PINCTRL_PIN(MX6DL_PAD_NANDF_CS2), | |
400 | IMX_PINCTRL_PIN(MX6DL_PAD_NANDF_CS3), | |
401 | IMX_PINCTRL_PIN(MX6DL_PAD_NANDF_D0), | |
402 | IMX_PINCTRL_PIN(MX6DL_PAD_NANDF_D1), | |
403 | IMX_PINCTRL_PIN(MX6DL_PAD_NANDF_D2), | |
404 | IMX_PINCTRL_PIN(MX6DL_PAD_NANDF_D3), | |
405 | IMX_PINCTRL_PIN(MX6DL_PAD_NANDF_D4), | |
406 | IMX_PINCTRL_PIN(MX6DL_PAD_NANDF_D5), | |
407 | IMX_PINCTRL_PIN(MX6DL_PAD_NANDF_D6), | |
408 | IMX_PINCTRL_PIN(MX6DL_PAD_NANDF_D7), | |
409 | IMX_PINCTRL_PIN(MX6DL_PAD_NANDF_RB0), | |
410 | IMX_PINCTRL_PIN(MX6DL_PAD_NANDF_WP_B), | |
411 | IMX_PINCTRL_PIN(MX6DL_PAD_RGMII_RD0), | |
412 | IMX_PINCTRL_PIN(MX6DL_PAD_RGMII_RD1), | |
413 | IMX_PINCTRL_PIN(MX6DL_PAD_RGMII_RD2), | |
414 | IMX_PINCTRL_PIN(MX6DL_PAD_RGMII_RD3), | |
415 | IMX_PINCTRL_PIN(MX6DL_PAD_RGMII_RX_CTL), | |
416 | IMX_PINCTRL_PIN(MX6DL_PAD_RGMII_RXC), | |
417 | IMX_PINCTRL_PIN(MX6DL_PAD_RGMII_TD0), | |
418 | IMX_PINCTRL_PIN(MX6DL_PAD_RGMII_TD1), | |
419 | IMX_PINCTRL_PIN(MX6DL_PAD_RGMII_TD2), | |
420 | IMX_PINCTRL_PIN(MX6DL_PAD_RGMII_TD3), | |
421 | IMX_PINCTRL_PIN(MX6DL_PAD_RGMII_TX_CTL), | |
422 | IMX_PINCTRL_PIN(MX6DL_PAD_RGMII_TXC), | |
423 | IMX_PINCTRL_PIN(MX6DL_PAD_SD1_CLK), | |
424 | IMX_PINCTRL_PIN(MX6DL_PAD_SD1_CMD), | |
425 | IMX_PINCTRL_PIN(MX6DL_PAD_SD1_DAT0), | |
426 | IMX_PINCTRL_PIN(MX6DL_PAD_SD1_DAT1), | |
427 | IMX_PINCTRL_PIN(MX6DL_PAD_SD1_DAT2), | |
428 | IMX_PINCTRL_PIN(MX6DL_PAD_SD1_DAT3), | |
429 | IMX_PINCTRL_PIN(MX6DL_PAD_SD2_CLK), | |
430 | IMX_PINCTRL_PIN(MX6DL_PAD_SD2_CMD), | |
431 | IMX_PINCTRL_PIN(MX6DL_PAD_SD2_DAT0), | |
432 | IMX_PINCTRL_PIN(MX6DL_PAD_SD2_DAT1), | |
433 | IMX_PINCTRL_PIN(MX6DL_PAD_SD2_DAT2), | |
434 | IMX_PINCTRL_PIN(MX6DL_PAD_SD2_DAT3), | |
435 | IMX_PINCTRL_PIN(MX6DL_PAD_SD3_CLK), | |
436 | IMX_PINCTRL_PIN(MX6DL_PAD_SD3_CMD), | |
437 | IMX_PINCTRL_PIN(MX6DL_PAD_SD3_DAT0), | |
438 | IMX_PINCTRL_PIN(MX6DL_PAD_SD3_DAT1), | |
439 | IMX_PINCTRL_PIN(MX6DL_PAD_SD3_DAT2), | |
440 | IMX_PINCTRL_PIN(MX6DL_PAD_SD3_DAT3), | |
441 | IMX_PINCTRL_PIN(MX6DL_PAD_SD3_DAT4), | |
442 | IMX_PINCTRL_PIN(MX6DL_PAD_SD3_DAT5), | |
443 | IMX_PINCTRL_PIN(MX6DL_PAD_SD3_DAT6), | |
444 | IMX_PINCTRL_PIN(MX6DL_PAD_SD3_DAT7), | |
445 | IMX_PINCTRL_PIN(MX6DL_PAD_SD3_RST), | |
446 | IMX_PINCTRL_PIN(MX6DL_PAD_SD4_CLK), | |
447 | IMX_PINCTRL_PIN(MX6DL_PAD_SD4_CMD), | |
448 | IMX_PINCTRL_PIN(MX6DL_PAD_SD4_DAT0), | |
449 | IMX_PINCTRL_PIN(MX6DL_PAD_SD4_DAT1), | |
450 | IMX_PINCTRL_PIN(MX6DL_PAD_SD4_DAT2), | |
451 | IMX_PINCTRL_PIN(MX6DL_PAD_SD4_DAT3), | |
452 | IMX_PINCTRL_PIN(MX6DL_PAD_SD4_DAT4), | |
453 | IMX_PINCTRL_PIN(MX6DL_PAD_SD4_DAT5), | |
454 | IMX_PINCTRL_PIN(MX6DL_PAD_SD4_DAT6), | |
455 | IMX_PINCTRL_PIN(MX6DL_PAD_SD4_DAT7), | |
456 | }; | |
457 | ||
458 | static struct imx_pinctrl_soc_info imx6dl_pinctrl_info = { | |
459 | .pins = imx6dl_pinctrl_pads, | |
460 | .npins = ARRAY_SIZE(imx6dl_pinctrl_pads), | |
461 | }; | |
462 | ||
463 | static struct of_device_id imx6dl_pinctrl_of_match[] = { | |
464 | { .compatible = "fsl,imx6dl-iomuxc", }, | |
465 | { /* sentinel */ } | |
466 | }; | |
467 | ||
468 | static int imx6dl_pinctrl_probe(struct platform_device *pdev) | |
469 | { | |
470 | return imx_pinctrl_probe(pdev, &imx6dl_pinctrl_info); | |
471 | } | |
472 | ||
473 | static struct platform_driver imx6dl_pinctrl_driver = { | |
474 | .driver = { | |
475 | .name = "imx6dl-pinctrl", | |
476 | .owner = THIS_MODULE, | |
477 | .of_match_table = of_match_ptr(imx6dl_pinctrl_of_match), | |
478 | }, | |
479 | .probe = imx6dl_pinctrl_probe, | |
480 | .remove = imx_pinctrl_remove, | |
481 | }; | |
482 | ||
483 | static int __init imx6dl_pinctrl_init(void) | |
484 | { | |
485 | return platform_driver_register(&imx6dl_pinctrl_driver); | |
486 | } | |
487 | arch_initcall(imx6dl_pinctrl_init); | |
488 | ||
489 | static void __exit imx6dl_pinctrl_exit(void) | |
490 | { | |
491 | platform_driver_unregister(&imx6dl_pinctrl_driver); | |
492 | } | |
493 | module_exit(imx6dl_pinctrl_exit); | |
494 | ||
495 | MODULE_AUTHOR("Shawn Guo <shawn.guo@linaro.org>"); | |
496 | MODULE_DESCRIPTION("Freescale imx6dl pinctrl driver"); | |
497 | MODULE_LICENSE("GPL v2"); |