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f4e66983 HZ |
1 | /* |
2 | * linux/drivers/pinctrl/pinmux-mmp2.c | |
3 | * | |
4 | * This program is free software; you can redistribute it and/or modify | |
5 | * it under the terms of the GNU General Public License version 2 as | |
6 | * publishhed by the Free Software Foundation. | |
7 | * | |
8 | * Copyright (C) 2011, Marvell Technology Group Ltd. | |
9 | * | |
10 | * Author: Haojian Zhuang <haojian.zhuang@marvell.com> | |
11 | * | |
12 | */ | |
13 | ||
14 | #include <linux/device.h> | |
15 | #include <linux/module.h> | |
16 | #include <linux/io.h> | |
17 | #include <linux/platform_device.h> | |
18 | #include "pinctrl-pxa3xx.h" | |
19 | ||
20 | #define MMP2_DS_MASK 0x1800 | |
21 | #define MMP2_DS_SHIFT 11 | |
22 | #define MMP2_SLEEP_MASK 0x38 | |
23 | #define MMP2_SLEEP_SELECT (1 << 9) | |
24 | #define MMP2_SLEEP_DATA (1 << 8) | |
25 | #define MMP2_SLEEP_DIR (1 << 7) | |
26 | ||
27 | #define MFPR_MMP2(a, r, f0, f1, f2, f3, f4, f5, f6, f7) \ | |
28 | { \ | |
29 | .name = #a, \ | |
30 | .pin = a, \ | |
31 | .mfpr = r, \ | |
32 | .func = { \ | |
33 | MMP2_MUX_##f0, \ | |
34 | MMP2_MUX_##f1, \ | |
35 | MMP2_MUX_##f2, \ | |
36 | MMP2_MUX_##f3, \ | |
37 | MMP2_MUX_##f4, \ | |
38 | MMP2_MUX_##f5, \ | |
39 | MMP2_MUX_##f6, \ | |
40 | MMP2_MUX_##f7, \ | |
41 | }, \ | |
42 | } | |
43 | ||
44 | #define GRP_MMP2(a, m, p) \ | |
45 | { .name = a, .mux = MMP2_MUX_##m, .pins = p, .npins = ARRAY_SIZE(p), } | |
46 | ||
47 | /* 174 pins */ | |
48 | enum mmp2_pin_list { | |
49 | /* 0~168: GPIO0~GPIO168 */ | |
50 | TWSI4_SCL = 169, | |
51 | TWSI4_SDA, /* 170 */ | |
52 | G_CLKREQ, | |
53 | VCXO_REQ, | |
54 | VCXO_OUT, | |
55 | }; | |
56 | ||
57 | enum mmp2_mux { | |
58 | /* PXA3xx_MUX_GPIO = 0 (predefined in pinctrl-pxa3xx.h) */ | |
59 | MMP2_MUX_GPIO = 0, | |
60 | MMP2_MUX_G_CLKREQ, | |
61 | MMP2_MUX_VCXO_REQ, | |
62 | MMP2_MUX_VCXO_OUT, | |
63 | MMP2_MUX_KP_MK, | |
64 | MMP2_MUX_KP_DK, | |
65 | MMP2_MUX_CCIC1, | |
66 | MMP2_MUX_CCIC2, | |
67 | MMP2_MUX_SPI, | |
68 | MMP2_MUX_SSPA2, | |
69 | MMP2_MUX_ROT, | |
70 | MMP2_MUX_I2S, | |
71 | MMP2_MUX_TB, | |
72 | MMP2_MUX_CAM2, | |
73 | MMP2_MUX_HDMI, | |
74 | MMP2_MUX_TWSI2, | |
75 | MMP2_MUX_TWSI3, | |
76 | MMP2_MUX_TWSI4, | |
77 | MMP2_MUX_TWSI5, | |
78 | MMP2_MUX_TWSI6, | |
79 | MMP2_MUX_UART1, | |
80 | MMP2_MUX_UART2, | |
81 | MMP2_MUX_UART3, | |
82 | MMP2_MUX_UART4, | |
83 | MMP2_MUX_SSP1_RX, | |
84 | MMP2_MUX_SSP1_FRM, | |
85 | MMP2_MUX_SSP1_TXRX, | |
86 | MMP2_MUX_SSP2_RX, | |
87 | MMP2_MUX_SSP2_FRM, | |
88 | MMP2_MUX_SSP1, | |
89 | MMP2_MUX_SSP2, | |
90 | MMP2_MUX_SSP3, | |
91 | MMP2_MUX_SSP4, | |
92 | MMP2_MUX_MMC1, | |
93 | MMP2_MUX_MMC2, | |
94 | MMP2_MUX_MMC3, | |
95 | MMP2_MUX_MMC4, | |
96 | MMP2_MUX_ULPI, | |
97 | MMP2_MUX_AC, | |
98 | MMP2_MUX_CA, | |
99 | MMP2_MUX_PWM, | |
100 | MMP2_MUX_USIM, | |
101 | MMP2_MUX_TIPU, | |
102 | MMP2_MUX_PLL, | |
103 | MMP2_MUX_NAND, | |
104 | MMP2_MUX_FSIC, | |
105 | MMP2_MUX_SLEEP_IND, | |
106 | MMP2_MUX_EXT_DMA, | |
107 | MMP2_MUX_ONE_WIRE, | |
108 | MMP2_MUX_LCD, | |
109 | MMP2_MUX_SMC, | |
110 | MMP2_MUX_SMC_INT, | |
111 | MMP2_MUX_MSP, | |
112 | MMP2_MUX_G_CLKOUT, | |
113 | MMP2_MUX_32K_CLKOUT, | |
114 | MMP2_MUX_PRI_JTAG, | |
115 | MMP2_MUX_AAS_JTAG, | |
116 | MMP2_MUX_AAS_GPIO, | |
117 | MMP2_MUX_AAS_SPI, | |
118 | MMP2_MUX_AAS_TWSI, | |
119 | MMP2_MUX_AAS_DEU_EX, | |
120 | MMP2_MUX_NONE = 0xffff, | |
121 | }; | |
122 | ||
123 | static struct pinctrl_pin_desc mmp2_pads[] = { | |
124 | /* | |
125 | * The name indicates function 0 of this pin. | |
126 | * After reset, function 0 is the default function of pin. | |
127 | */ | |
128 | PINCTRL_PIN(GPIO0, "GPIO0"), | |
129 | PINCTRL_PIN(GPIO1, "GPIO1"), | |
130 | PINCTRL_PIN(GPIO2, "GPIO2"), | |
131 | PINCTRL_PIN(GPIO3, "GPIO3"), | |
132 | PINCTRL_PIN(GPIO4, "GPIO4"), | |
133 | PINCTRL_PIN(GPIO5, "GPIO5"), | |
134 | PINCTRL_PIN(GPIO6, "GPIO6"), | |
135 | PINCTRL_PIN(GPIO7, "GPIO7"), | |
136 | PINCTRL_PIN(GPIO8, "GPIO8"), | |
137 | PINCTRL_PIN(GPIO9, "GPIO9"), | |
138 | PINCTRL_PIN(GPIO10, "GPIO10"), | |
139 | PINCTRL_PIN(GPIO11, "GPIO11"), | |
140 | PINCTRL_PIN(GPIO12, "GPIO12"), | |
141 | PINCTRL_PIN(GPIO13, "GPIO13"), | |
142 | PINCTRL_PIN(GPIO14, "GPIO14"), | |
143 | PINCTRL_PIN(GPIO15, "GPIO15"), | |
144 | PINCTRL_PIN(GPIO16, "GPIO16"), | |
145 | PINCTRL_PIN(GPIO17, "GPIO17"), | |
146 | PINCTRL_PIN(GPIO18, "GPIO18"), | |
147 | PINCTRL_PIN(GPIO19, "GPIO19"), | |
148 | PINCTRL_PIN(GPIO20, "GPIO20"), | |
149 | PINCTRL_PIN(GPIO21, "GPIO21"), | |
150 | PINCTRL_PIN(GPIO22, "GPIO22"), | |
151 | PINCTRL_PIN(GPIO23, "GPIO23"), | |
152 | PINCTRL_PIN(GPIO24, "GPIO24"), | |
153 | PINCTRL_PIN(GPIO25, "GPIO25"), | |
154 | PINCTRL_PIN(GPIO26, "GPIO26"), | |
155 | PINCTRL_PIN(GPIO27, "GPIO27"), | |
156 | PINCTRL_PIN(GPIO28, "GPIO28"), | |
157 | PINCTRL_PIN(GPIO29, "GPIO29"), | |
158 | PINCTRL_PIN(GPIO30, "GPIO30"), | |
159 | PINCTRL_PIN(GPIO31, "GPIO31"), | |
160 | PINCTRL_PIN(GPIO32, "GPIO32"), | |
161 | PINCTRL_PIN(GPIO33, "GPIO33"), | |
162 | PINCTRL_PIN(GPIO34, "GPIO34"), | |
163 | PINCTRL_PIN(GPIO35, "GPIO35"), | |
164 | PINCTRL_PIN(GPIO36, "GPIO36"), | |
165 | PINCTRL_PIN(GPIO37, "GPIO37"), | |
166 | PINCTRL_PIN(GPIO38, "GPIO38"), | |
167 | PINCTRL_PIN(GPIO39, "GPIO39"), | |
168 | PINCTRL_PIN(GPIO40, "GPIO40"), | |
169 | PINCTRL_PIN(GPIO41, "GPIO41"), | |
170 | PINCTRL_PIN(GPIO42, "GPIO42"), | |
171 | PINCTRL_PIN(GPIO43, "GPIO43"), | |
172 | PINCTRL_PIN(GPIO44, "GPIO44"), | |
173 | PINCTRL_PIN(GPIO45, "GPIO45"), | |
174 | PINCTRL_PIN(GPIO46, "GPIO46"), | |
175 | PINCTRL_PIN(GPIO47, "GPIO47"), | |
176 | PINCTRL_PIN(GPIO48, "GPIO48"), | |
177 | PINCTRL_PIN(GPIO49, "GPIO49"), | |
178 | PINCTRL_PIN(GPIO50, "GPIO50"), | |
179 | PINCTRL_PIN(GPIO51, "GPIO51"), | |
180 | PINCTRL_PIN(GPIO52, "GPIO52"), | |
181 | PINCTRL_PIN(GPIO53, "GPIO53"), | |
182 | PINCTRL_PIN(GPIO54, "GPIO54"), | |
183 | PINCTRL_PIN(GPIO55, "GPIO55"), | |
184 | PINCTRL_PIN(GPIO56, "GPIO56"), | |
185 | PINCTRL_PIN(GPIO57, "GPIO57"), | |
186 | PINCTRL_PIN(GPIO58, "GPIO58"), | |
187 | PINCTRL_PIN(GPIO59, "GPIO59"), | |
188 | PINCTRL_PIN(GPIO60, "GPIO60"), | |
189 | PINCTRL_PIN(GPIO61, "GPIO61"), | |
190 | PINCTRL_PIN(GPIO62, "GPIO62"), | |
191 | PINCTRL_PIN(GPIO63, "GPIO63"), | |
192 | PINCTRL_PIN(GPIO64, "GPIO64"), | |
193 | PINCTRL_PIN(GPIO65, "GPIO65"), | |
194 | PINCTRL_PIN(GPIO66, "GPIO66"), | |
195 | PINCTRL_PIN(GPIO67, "GPIO67"), | |
196 | PINCTRL_PIN(GPIO68, "GPIO68"), | |
197 | PINCTRL_PIN(GPIO69, "GPIO69"), | |
198 | PINCTRL_PIN(GPIO70, "GPIO70"), | |
199 | PINCTRL_PIN(GPIO71, "GPIO71"), | |
200 | PINCTRL_PIN(GPIO72, "GPIO72"), | |
201 | PINCTRL_PIN(GPIO73, "GPIO73"), | |
202 | PINCTRL_PIN(GPIO74, "GPIO74"), | |
203 | PINCTRL_PIN(GPIO75, "GPIO75"), | |
204 | PINCTRL_PIN(GPIO76, "GPIO76"), | |
205 | PINCTRL_PIN(GPIO77, "GPIO77"), | |
206 | PINCTRL_PIN(GPIO78, "GPIO78"), | |
207 | PINCTRL_PIN(GPIO79, "GPIO79"), | |
208 | PINCTRL_PIN(GPIO80, "GPIO80"), | |
209 | PINCTRL_PIN(GPIO81, "GPIO81"), | |
210 | PINCTRL_PIN(GPIO82, "GPIO82"), | |
211 | PINCTRL_PIN(GPIO83, "GPIO83"), | |
212 | PINCTRL_PIN(GPIO84, "GPIO84"), | |
213 | PINCTRL_PIN(GPIO85, "GPIO85"), | |
214 | PINCTRL_PIN(GPIO86, "GPIO86"), | |
215 | PINCTRL_PIN(GPIO87, "GPIO87"), | |
216 | PINCTRL_PIN(GPIO88, "GPIO88"), | |
217 | PINCTRL_PIN(GPIO89, "GPIO89"), | |
218 | PINCTRL_PIN(GPIO90, "GPIO90"), | |
219 | PINCTRL_PIN(GPIO91, "GPIO91"), | |
220 | PINCTRL_PIN(GPIO92, "GPIO92"), | |
221 | PINCTRL_PIN(GPIO93, "GPIO93"), | |
222 | PINCTRL_PIN(GPIO94, "GPIO94"), | |
223 | PINCTRL_PIN(GPIO95, "GPIO95"), | |
224 | PINCTRL_PIN(GPIO96, "GPIO96"), | |
225 | PINCTRL_PIN(GPIO97, "GPIO97"), | |
226 | PINCTRL_PIN(GPIO98, "GPIO98"), | |
227 | PINCTRL_PIN(GPIO99, "GPIO99"), | |
228 | PINCTRL_PIN(GPIO100, "GPIO100"), | |
229 | PINCTRL_PIN(GPIO101, "GPIO101"), | |
230 | PINCTRL_PIN(GPIO102, "GPIO102"), | |
231 | PINCTRL_PIN(GPIO103, "GPIO103"), | |
232 | PINCTRL_PIN(GPIO104, "GPIO104"), | |
233 | PINCTRL_PIN(GPIO105, "GPIO105"), | |
234 | PINCTRL_PIN(GPIO106, "GPIO106"), | |
235 | PINCTRL_PIN(GPIO107, "GPIO107"), | |
236 | PINCTRL_PIN(GPIO108, "GPIO108"), | |
237 | PINCTRL_PIN(GPIO109, "GPIO109"), | |
238 | PINCTRL_PIN(GPIO110, "GPIO110"), | |
239 | PINCTRL_PIN(GPIO111, "GPIO111"), | |
240 | PINCTRL_PIN(GPIO112, "GPIO112"), | |
241 | PINCTRL_PIN(GPIO113, "GPIO113"), | |
242 | PINCTRL_PIN(GPIO114, "GPIO114"), | |
243 | PINCTRL_PIN(GPIO115, "GPIO115"), | |
244 | PINCTRL_PIN(GPIO116, "GPIO116"), | |
245 | PINCTRL_PIN(GPIO117, "GPIO117"), | |
246 | PINCTRL_PIN(GPIO118, "GPIO118"), | |
247 | PINCTRL_PIN(GPIO119, "GPIO119"), | |
248 | PINCTRL_PIN(GPIO120, "GPIO120"), | |
249 | PINCTRL_PIN(GPIO121, "GPIO121"), | |
250 | PINCTRL_PIN(GPIO122, "GPIO122"), | |
251 | PINCTRL_PIN(GPIO123, "GPIO123"), | |
252 | PINCTRL_PIN(GPIO124, "GPIO124"), | |
253 | PINCTRL_PIN(GPIO125, "GPIO125"), | |
254 | PINCTRL_PIN(GPIO126, "GPIO126"), | |
255 | PINCTRL_PIN(GPIO127, "GPIO127"), | |
256 | PINCTRL_PIN(GPIO128, "GPIO128"), | |
257 | PINCTRL_PIN(GPIO129, "GPIO129"), | |
258 | PINCTRL_PIN(GPIO130, "GPIO130"), | |
259 | PINCTRL_PIN(GPIO131, "GPIO131"), | |
260 | PINCTRL_PIN(GPIO132, "GPIO132"), | |
261 | PINCTRL_PIN(GPIO133, "GPIO133"), | |
262 | PINCTRL_PIN(GPIO134, "GPIO134"), | |
263 | PINCTRL_PIN(GPIO135, "GPIO135"), | |
264 | PINCTRL_PIN(GPIO136, "GPIO136"), | |
265 | PINCTRL_PIN(GPIO137, "GPIO137"), | |
266 | PINCTRL_PIN(GPIO138, "GPIO138"), | |
267 | PINCTRL_PIN(GPIO139, "GPIO139"), | |
268 | PINCTRL_PIN(GPIO140, "GPIO140"), | |
269 | PINCTRL_PIN(GPIO141, "GPIO141"), | |
270 | PINCTRL_PIN(GPIO142, "GPIO142"), | |
271 | PINCTRL_PIN(GPIO143, "GPIO143"), | |
272 | PINCTRL_PIN(GPIO144, "GPIO144"), | |
273 | PINCTRL_PIN(GPIO145, "GPIO145"), | |
274 | PINCTRL_PIN(GPIO146, "GPIO146"), | |
275 | PINCTRL_PIN(GPIO147, "GPIO147"), | |
276 | PINCTRL_PIN(GPIO148, "GPIO148"), | |
277 | PINCTRL_PIN(GPIO149, "GPIO149"), | |
278 | PINCTRL_PIN(GPIO150, "GPIO150"), | |
279 | PINCTRL_PIN(GPIO151, "GPIO151"), | |
280 | PINCTRL_PIN(GPIO152, "GPIO152"), | |
281 | PINCTRL_PIN(GPIO153, "GPIO153"), | |
282 | PINCTRL_PIN(GPIO154, "GPIO154"), | |
283 | PINCTRL_PIN(GPIO155, "GPIO155"), | |
284 | PINCTRL_PIN(GPIO156, "GPIO156"), | |
285 | PINCTRL_PIN(GPIO157, "GPIO157"), | |
286 | PINCTRL_PIN(GPIO158, "GPIO158"), | |
287 | PINCTRL_PIN(GPIO159, "GPIO159"), | |
288 | PINCTRL_PIN(GPIO160, "GPIO160"), | |
289 | PINCTRL_PIN(GPIO161, "GPIO161"), | |
290 | PINCTRL_PIN(GPIO162, "GPIO162"), | |
291 | PINCTRL_PIN(GPIO163, "GPIO163"), | |
292 | PINCTRL_PIN(GPIO164, "GPIO164"), | |
293 | PINCTRL_PIN(GPIO165, "GPIO165"), | |
294 | PINCTRL_PIN(GPIO166, "GPIO166"), | |
295 | PINCTRL_PIN(GPIO167, "GPIO167"), | |
296 | PINCTRL_PIN(GPIO168, "GPIO168"), | |
297 | PINCTRL_PIN(TWSI4_SCL, "TWSI4_SCL"), | |
298 | PINCTRL_PIN(TWSI4_SDA, "TWSI4_SDA"), | |
299 | PINCTRL_PIN(G_CLKREQ, "G_CLKREQ"), | |
300 | PINCTRL_PIN(VCXO_REQ, "VCXO_REQ"), | |
301 | PINCTRL_PIN(VCXO_OUT, "VCXO_OUT"), | |
302 | }; | |
303 | ||
304 | struct pxa3xx_mfp_pin mmp2_mfp[] = { | |
305 | /* pin offs f0 f1 f2 f3 f4 f5 f6 f7 */ | |
306 | MFPR_MMP2(GPIO0, 0x054, GPIO, KP_MK, NONE, SPI, NONE, NONE, NONE, NONE), | |
307 | MFPR_MMP2(GPIO1, 0x058, GPIO, KP_MK, NONE, SPI, NONE, NONE, NONE, NONE), | |
308 | MFPR_MMP2(GPIO2, 0x05C, GPIO, KP_MK, NONE, SPI, NONE, NONE, NONE, NONE), | |
309 | MFPR_MMP2(GPIO3, 0x060, GPIO, KP_MK, NONE, SPI, NONE, NONE, NONE, NONE), | |
310 | MFPR_MMP2(GPIO4, 0x064, GPIO, KP_MK, NONE, NONE, NONE, NONE, NONE, NONE), | |
311 | MFPR_MMP2(GPIO5, 0x068, GPIO, KP_MK, NONE, SPI, NONE, NONE, NONE, NONE), | |
312 | MFPR_MMP2(GPIO6, 0x06C, GPIO, KP_MK, NONE, SPI, NONE, NONE, NONE, NONE), | |
313 | MFPR_MMP2(GPIO7, 0x070, GPIO, KP_MK, NONE, SPI, NONE, NONE, NONE, NONE), | |
314 | MFPR_MMP2(GPIO8, 0x074, GPIO, KP_MK, NONE, NONE, NONE, NONE, NONE, NONE), | |
315 | MFPR_MMP2(GPIO9, 0x078, GPIO, KP_MK, NONE, NONE, NONE, NONE, NONE, NONE), | |
316 | MFPR_MMP2(GPIO10, 0x07C, GPIO, KP_MK, NONE, NONE, NONE, NONE, NONE, NONE), | |
317 | MFPR_MMP2(GPIO11, 0x080, GPIO, KP_MK, NONE, NONE, NONE, NONE, NONE, NONE), | |
318 | MFPR_MMP2(GPIO12, 0x084, GPIO, KP_MK, NONE, CCIC1, NONE, NONE, NONE, NONE), | |
319 | MFPR_MMP2(GPIO13, 0x088, GPIO, KP_MK, NONE, CCIC1, NONE, NONE, NONE, NONE), | |
320 | MFPR_MMP2(GPIO14, 0x08C, GPIO, KP_MK, NONE, CCIC1, NONE, NONE, NONE, NONE), | |
321 | MFPR_MMP2(GPIO15, 0x090, GPIO, KP_MK, KP_DK, CCIC1, NONE, NONE, NONE, NONE), | |
322 | MFPR_MMP2(GPIO16, 0x094, GPIO, KP_DK, ROT, CCIC1, NONE, NONE, NONE, NONE), | |
323 | MFPR_MMP2(GPIO17, 0x098, GPIO, KP_DK, ROT, CCIC1, NONE, NONE, NONE, NONE), | |
324 | MFPR_MMP2(GPIO18, 0x09C, GPIO, KP_DK, ROT, CCIC1, NONE, NONE, NONE, NONE), | |
325 | MFPR_MMP2(GPIO19, 0x0A0, GPIO, KP_DK, ROT, CCIC1, NONE, NONE, NONE, NONE), | |
326 | MFPR_MMP2(GPIO20, 0x0A4, GPIO, KP_DK, TB, CCIC1, NONE, NONE, NONE, NONE), | |
327 | MFPR_MMP2(GPIO21, 0x0A8, GPIO, KP_DK, TB, CCIC1, NONE, NONE, NONE, NONE), | |
328 | MFPR_MMP2(GPIO22, 0x0AC, GPIO, KP_DK, TB, CCIC1, NONE, NONE, NONE, NONE), | |
329 | MFPR_MMP2(GPIO23, 0x0B0, GPIO, KP_DK, TB, CCIC1, NONE, NONE, NONE, NONE), | |
330 | MFPR_MMP2(GPIO24, 0x0B4, GPIO, I2S, VCXO_OUT, NONE, NONE, NONE, NONE, NONE), | |
331 | MFPR_MMP2(GPIO25, 0x0B8, GPIO, I2S, HDMI, SSPA2, NONE, NONE, NONE, NONE), | |
332 | MFPR_MMP2(GPIO26, 0x0BC, GPIO, I2S, HDMI, SSPA2, NONE, NONE, NONE, NONE), | |
333 | MFPR_MMP2(GPIO27, 0x0C0, GPIO, I2S, HDMI, SSPA2, NONE, NONE, NONE, NONE), | |
334 | MFPR_MMP2(GPIO28, 0x0C4, GPIO, I2S, NONE, SSPA2, NONE, NONE, NONE, NONE), | |
335 | MFPR_MMP2(GPIO29, 0x0C8, GPIO, UART1, KP_MK, NONE, NONE, NONE, AAS_SPI, NONE), | |
336 | MFPR_MMP2(GPIO30, 0x0CC, GPIO, UART1, KP_MK, NONE, NONE, NONE, AAS_SPI, NONE), | |
337 | MFPR_MMP2(GPIO31, 0x0D0, GPIO, UART1, KP_MK, NONE, NONE, NONE, AAS_SPI, NONE), | |
338 | MFPR_MMP2(GPIO32, 0x0D4, GPIO, UART1, KP_MK, NONE, NONE, NONE, AAS_SPI, NONE), | |
339 | MFPR_MMP2(GPIO33, 0x0D8, GPIO, SSPA2, I2S, NONE, NONE, NONE, NONE, NONE), | |
340 | MFPR_MMP2(GPIO34, 0x0DC, GPIO, SSPA2, I2S, NONE, NONE, NONE, NONE, NONE), | |
341 | MFPR_MMP2(GPIO35, 0x0E0, GPIO, SSPA2, I2S, NONE, NONE, NONE, NONE, NONE), | |
342 | MFPR_MMP2(GPIO36, 0x0E4, GPIO, SSPA2, I2S, NONE, NONE, NONE, NONE, NONE), | |
343 | MFPR_MMP2(GPIO37, 0x0E8, GPIO, MMC2, SSP1, TWSI2, UART2, UART3, AAS_SPI, AAS_TWSI), | |
344 | MFPR_MMP2(GPIO38, 0x0EC, GPIO, MMC2, SSP1, TWSI2, UART2, UART3, AAS_SPI, AAS_TWSI), | |
345 | MFPR_MMP2(GPIO39, 0x0F0, GPIO, MMC2, SSP1, TWSI2, UART2, UART3, AAS_SPI, AAS_TWSI), | |
346 | MFPR_MMP2(GPIO40, 0x0F4, GPIO, MMC2, SSP1, TWSI2, UART2, UART3, AAS_SPI, AAS_TWSI), | |
347 | MFPR_MMP2(GPIO41, 0x0F8, GPIO, MMC2, TWSI5, NONE, NONE, NONE, NONE, NONE), | |
348 | MFPR_MMP2(GPIO42, 0x0FC, GPIO, MMC2, TWSI5, NONE, NONE, NONE, NONE, NONE), | |
349 | MFPR_MMP2(GPIO43, 0x100, GPIO, TWSI2, UART4, SSP1, UART2, UART3, NONE, AAS_TWSI), | |
350 | MFPR_MMP2(GPIO44, 0x104, GPIO, TWSI2, UART4, SSP1, UART2, UART3, NONE, AAS_TWSI), | |
351 | MFPR_MMP2(GPIO45, 0x108, GPIO, UART1, UART4, SSP1, UART2, UART3, NONE, NONE), | |
352 | MFPR_MMP2(GPIO46, 0x10C, GPIO, UART1, UART4, SSP1, UART2, UART3, NONE, NONE), | |
353 | MFPR_MMP2(GPIO47, 0x110, GPIO, UART2, SSP2, TWSI6, CAM2, AAS_SPI, AAS_GPIO, NONE), | |
354 | MFPR_MMP2(GPIO48, 0x114, GPIO, UART2, SSP2, TWSI6, CAM2, AAS_SPI, AAS_GPIO, NONE), | |
355 | MFPR_MMP2(GPIO49, 0x118, GPIO, UART2, SSP2, PWM, CCIC2, AAS_SPI, NONE, NONE), | |
356 | MFPR_MMP2(GPIO50, 0x11C, GPIO, UART2, SSP2, PWM, CCIC2, AAS_SPI, NONE, NONE), | |
357 | MFPR_MMP2(GPIO51, 0x120, GPIO, UART3, ROT, AAS_GPIO, PWM, NONE, NONE, NONE), | |
358 | MFPR_MMP2(GPIO52, 0x124, GPIO, UART3, ROT, AAS_GPIO, PWM, NONE, NONE, NONE), | |
359 | MFPR_MMP2(GPIO53, 0x128, GPIO, UART3, TWSI2, VCXO_REQ, NONE, PWM, NONE, AAS_TWSI), | |
360 | MFPR_MMP2(GPIO54, 0x12C, GPIO, UART3, TWSI2, VCXO_OUT, HDMI, PWM, NONE, AAS_TWSI), | |
361 | MFPR_MMP2(GPIO55, 0x130, GPIO, SSP2, SSP1, UART2, ROT, TWSI2, SSP3, AAS_TWSI), | |
362 | MFPR_MMP2(GPIO56, 0x134, GPIO, SSP2, SSP1, UART2, ROT, TWSI2, KP_DK, AAS_TWSI), | |
363 | MFPR_MMP2(GPIO57, 0x138, GPIO, SSP2_RX, SSP1_TXRX, SSP2_FRM, SSP1_RX, VCXO_REQ, KP_DK, NONE), | |
364 | MFPR_MMP2(GPIO58, 0x13C, GPIO, SSP2, SSP1_RX, SSP1_FRM, SSP1_TXRX, VCXO_REQ, KP_DK, NONE), | |
365 | MFPR_MMP2(GPIO59, 0x280, GPIO, CCIC1, ULPI, MMC3, CCIC2, UART3, UART4, NONE), | |
366 | MFPR_MMP2(GPIO60, 0x284, GPIO, CCIC1, ULPI, MMC3, CCIC2, UART3, UART4, NONE), | |
367 | MFPR_MMP2(GPIO61, 0x288, GPIO, CCIC1, ULPI, MMC3, CCIC2, UART3, HDMI, NONE), | |
368 | MFPR_MMP2(GPIO62, 0x28C, GPIO, CCIC1, ULPI, MMC3, CCIC2, UART3, NONE, NONE), | |
369 | MFPR_MMP2(GPIO63, 0x290, GPIO, CCIC1, ULPI, MMC3, CCIC2, MSP, UART4, NONE), | |
370 | MFPR_MMP2(GPIO64, 0x294, GPIO, CCIC1, ULPI, MMC3, CCIC2, MSP, UART4, NONE), | |
371 | MFPR_MMP2(GPIO65, 0x298, GPIO, CCIC1, ULPI, MMC3, CCIC2, MSP, UART4, NONE), | |
372 | MFPR_MMP2(GPIO66, 0x29C, GPIO, CCIC1, ULPI, MMC3, CCIC2, MSP, UART4, NONE), | |
373 | MFPR_MMP2(GPIO67, 0x2A0, GPIO, CCIC1, ULPI, MMC3, CCIC2, MSP, NONE, NONE), | |
374 | MFPR_MMP2(GPIO68, 0x2A4, GPIO, CCIC1, ULPI, MMC3, CCIC2, MSP, LCD, NONE), | |
375 | MFPR_MMP2(GPIO69, 0x2A8, GPIO, CCIC1, ULPI, MMC3, CCIC2, NONE, LCD, NONE), | |
376 | MFPR_MMP2(GPIO70, 0x2AC, GPIO, CCIC1, ULPI, MMC3, CCIC2, MSP, LCD, NONE), | |
377 | MFPR_MMP2(GPIO71, 0x2B0, GPIO, TWSI3, NONE, PWM, NONE, NONE, LCD, AAS_TWSI), | |
378 | MFPR_MMP2(GPIO72, 0x2B4, GPIO, TWSI3, HDMI, PWM, NONE, NONE, LCD, AAS_TWSI), | |
379 | MFPR_MMP2(GPIO73, 0x2B8, GPIO, VCXO_REQ, 32K_CLKOUT, PWM, VCXO_OUT, NONE, LCD, NONE), | |
380 | MFPR_MMP2(GPIO74, 0x170, GPIO, LCD, SMC, MMC4, SSP3, UART2, UART4, TIPU), | |
381 | MFPR_MMP2(GPIO75, 0x174, GPIO, LCD, SMC, MMC4, SSP3, UART2, UART4, TIPU), | |
382 | MFPR_MMP2(GPIO76, 0x178, GPIO, LCD, SMC, MMC4, SSP3, UART2, UART4, TIPU), | |
383 | MFPR_MMP2(GPIO77, 0x17C, GPIO, LCD, SMC, MMC4, SSP3, UART2, UART4, TIPU), | |
384 | MFPR_MMP2(GPIO78, 0x180, GPIO, LCD, HDMI, MMC4, NONE, SSP4, AAS_SPI, TIPU), | |
385 | MFPR_MMP2(GPIO79, 0x184, GPIO, LCD, AAS_GPIO, MMC4, NONE, SSP4, AAS_SPI, TIPU), | |
386 | MFPR_MMP2(GPIO80, 0x188, GPIO, LCD, AAS_GPIO, MMC4, NONE, SSP4, AAS_SPI, TIPU), | |
387 | MFPR_MMP2(GPIO81, 0x18C, GPIO, LCD, AAS_GPIO, MMC4, NONE, SSP4, AAS_SPI, TIPU), | |
388 | MFPR_MMP2(GPIO82, 0x190, GPIO, LCD, NONE, MMC4, NONE, NONE, CCIC2, TIPU), | |
389 | MFPR_MMP2(GPIO83, 0x194, GPIO, LCD, NONE, MMC4, NONE, NONE, CCIC2, TIPU), | |
390 | MFPR_MMP2(GPIO84, 0x198, GPIO, LCD, SMC, MMC2, NONE, TWSI5, AAS_TWSI, TIPU), | |
391 | MFPR_MMP2(GPIO85, 0x19C, GPIO, LCD, SMC, MMC2, NONE, TWSI5, AAS_TWSI, TIPU), | |
392 | MFPR_MMP2(GPIO86, 0x1A0, GPIO, LCD, SMC, MMC2, NONE, TWSI6, CCIC2, TIPU), | |
393 | MFPR_MMP2(GPIO87, 0x1A4, GPIO, LCD, SMC, MMC2, NONE, TWSI6, CCIC2, TIPU), | |
394 | MFPR_MMP2(GPIO88, 0x1A8, GPIO, LCD, AAS_GPIO, MMC2, NONE, NONE, CCIC2, TIPU), | |
395 | MFPR_MMP2(GPIO89, 0x1AC, GPIO, LCD, AAS_GPIO, MMC2, NONE, NONE, CCIC2, TIPU), | |
396 | MFPR_MMP2(GPIO90, 0x1B0, GPIO, LCD, AAS_GPIO, MMC2, NONE, NONE, CCIC2, TIPU), | |
397 | MFPR_MMP2(GPIO91, 0x1B4, GPIO, LCD, AAS_GPIO, MMC2, NONE, NONE, CCIC2, TIPU), | |
398 | MFPR_MMP2(GPIO92, 0x1B8, GPIO, LCD, AAS_GPIO, MMC2, NONE, NONE, CCIC2, TIPU), | |
399 | MFPR_MMP2(GPIO93, 0x1BC, GPIO, LCD, AAS_GPIO, MMC2, NONE, NONE, CCIC2, TIPU), | |
400 | MFPR_MMP2(GPIO94, 0x1C0, GPIO, LCD, AAS_GPIO, SPI, NONE, AAS_SPI, CCIC2, TIPU), | |
401 | MFPR_MMP2(GPIO95, 0x1C4, GPIO, LCD, TWSI3, SPI, AAS_DEU_EX, AAS_SPI, CCIC2, TIPU), | |
402 | MFPR_MMP2(GPIO96, 0x1C8, GPIO, LCD, TWSI3, SPI, AAS_DEU_EX, AAS_SPI, NONE, TIPU), | |
403 | MFPR_MMP2(GPIO97, 0x1CC, GPIO, LCD, TWSI6, SPI, AAS_DEU_EX, AAS_SPI, NONE, TIPU), | |
404 | MFPR_MMP2(GPIO98, 0x1D0, GPIO, LCD, TWSI6, SPI, ONE_WIRE, NONE, NONE, TIPU), | |
405 | MFPR_MMP2(GPIO99, 0x1D4, GPIO, LCD, SMC, SPI, TWSI5, NONE, NONE, TIPU), | |
406 | MFPR_MMP2(GPIO100, 0x1D8, GPIO, LCD, SMC, SPI, TWSI5, NONE, NONE, TIPU), | |
407 | MFPR_MMP2(GPIO101, 0x1DC, GPIO, LCD, SMC, SPI, NONE, NONE, NONE, TIPU), | |
408 | MFPR_MMP2(GPIO102, 0x000, USIM, GPIO, FSIC, KP_DK, LCD, NONE, NONE, NONE), | |
409 | MFPR_MMP2(GPIO103, 0x004, USIM, GPIO, FSIC, KP_DK, LCD, NONE, NONE, NONE), | |
410 | MFPR_MMP2(GPIO104, 0x1FC, NAND, GPIO, NONE, NONE, NAND, NONE, NONE, NONE), | |
411 | MFPR_MMP2(GPIO105, 0x1F8, NAND, GPIO, NONE, NONE, NAND, NONE, NONE, NONE), | |
412 | MFPR_MMP2(GPIO106, 0x1F4, NAND, GPIO, NONE, NONE, NAND, NONE, NONE, NONE), | |
413 | MFPR_MMP2(GPIO107, 0x1F0, NAND, GPIO, NONE, NONE, NAND, NONE, NONE, NONE), | |
414 | MFPR_MMP2(GPIO108, 0x21C, NAND, GPIO, NONE, NONE, NAND, NONE, NONE, NONE), | |
415 | MFPR_MMP2(GPIO109, 0x218, NAND, GPIO, NONE, NONE, NAND, NONE, NONE, NONE), | |
416 | MFPR_MMP2(GPIO110, 0x214, NAND, GPIO, NONE, NONE, NAND, NONE, NONE, NONE), | |
417 | MFPR_MMP2(GPIO111, 0x200, NAND, GPIO, MMC3, NONE, NONE, NONE, NONE, NONE), | |
418 | MFPR_MMP2(GPIO112, 0x244, NAND, GPIO, MMC3, SMC, NONE, NONE, NONE, NONE), | |
419 | MFPR_MMP2(GPIO113, 0x25C, SMC, GPIO, EXT_DMA, MMC3, SMC, HDMI, NONE, NONE), | |
420 | MFPR_MMP2(GPIO114, 0x164, G_CLKOUT, 32K_CLKOUT, HDMI, NONE, NONE, NONE, NONE, NONE), | |
421 | MFPR_MMP2(GPIO115, 0x260, GPIO, NONE, AC, UART4, UART3, SSP1, NONE, NONE), | |
422 | MFPR_MMP2(GPIO116, 0x264, GPIO, NONE, AC, UART4, UART3, SSP1, NONE, NONE), | |
423 | MFPR_MMP2(GPIO117, 0x268, GPIO, NONE, AC, UART4, UART3, SSP1, NONE, NONE), | |
424 | MFPR_MMP2(GPIO118, 0x26C, GPIO, NONE, AC, UART4, UART3, SSP1, NONE, NONE), | |
425 | MFPR_MMP2(GPIO119, 0x270, GPIO, NONE, CA, SSP3, NONE, NONE, NONE, NONE), | |
426 | MFPR_MMP2(GPIO120, 0x274, GPIO, NONE, CA, SSP3, NONE, NONE, NONE, NONE), | |
427 | MFPR_MMP2(GPIO121, 0x278, GPIO, NONE, CA, SSP3, NONE, NONE, NONE, NONE), | |
428 | MFPR_MMP2(GPIO122, 0x27C, GPIO, NONE, CA, SSP3, NONE, NONE, NONE, NONE), | |
429 | MFPR_MMP2(GPIO123, 0x148, GPIO, SLEEP_IND, ONE_WIRE, 32K_CLKOUT, NONE, NONE, NONE, NONE), | |
430 | MFPR_MMP2(GPIO124, 0x00C, GPIO, MMC1, LCD, MMC3, NAND, NONE, NONE, NONE), | |
431 | MFPR_MMP2(GPIO125, 0x010, GPIO, MMC1, LCD, MMC3, NAND, NONE, NONE, NONE), | |
432 | MFPR_MMP2(GPIO126, 0x014, GPIO, MMC1, LCD, MMC3, NAND, NONE, NONE, NONE), | |
433 | MFPR_MMP2(GPIO127, 0x018, GPIO, NONE, LCD, MMC3, NAND, NONE, NONE, NONE), | |
434 | MFPR_MMP2(GPIO128, 0x01C, GPIO, NONE, LCD, MMC3, NAND, NONE, NONE, NONE), | |
435 | MFPR_MMP2(GPIO129, 0x020, GPIO, MMC1, LCD, MMC3, NAND, NONE, NONE, NONE), | |
436 | MFPR_MMP2(GPIO130, 0x024, GPIO, MMC1, LCD, MMC3, NAND, NONE, NONE, NONE), | |
437 | MFPR_MMP2(GPIO131, 0x028, GPIO, MMC1, NONE, MSP, NONE, NONE, NONE, NONE), | |
438 | MFPR_MMP2(GPIO132, 0x02C, GPIO, MMC1, PRI_JTAG, MSP, SSP3, AAS_JTAG, NONE, NONE), | |
439 | MFPR_MMP2(GPIO133, 0x030, GPIO, MMC1, PRI_JTAG, MSP, SSP3, AAS_JTAG, NONE, NONE), | |
440 | MFPR_MMP2(GPIO134, 0x034, GPIO, MMC1, PRI_JTAG, MSP, SSP3, AAS_JTAG, NONE, NONE), | |
441 | MFPR_MMP2(GPIO135, 0x038, GPIO, NONE, LCD, MMC3, NAND, NONE, NONE, NONE), | |
442 | MFPR_MMP2(GPIO136, 0x03C, GPIO, MMC1, PRI_JTAG, MSP, SSP3, AAS_JTAG, NONE, NONE), | |
443 | MFPR_MMP2(GPIO137, 0x040, GPIO, HDMI, LCD, MSP, NONE, NONE, NONE, NONE), | |
444 | MFPR_MMP2(GPIO138, 0x044, GPIO, NONE, LCD, MMC3, SMC, NONE, NONE, NONE), | |
445 | MFPR_MMP2(GPIO139, 0x048, GPIO, MMC1, PRI_JTAG, MSP, NONE, AAS_JTAG, NONE, NONE), | |
446 | MFPR_MMP2(GPIO140, 0x04C, GPIO, MMC1, LCD, NONE, NONE, UART2, UART1, NONE), | |
447 | MFPR_MMP2(GPIO141, 0x050, GPIO, MMC1, LCD, NONE, NONE, UART2, UART1, NONE), | |
448 | MFPR_MMP2(GPIO142, 0x008, USIM, GPIO, FSIC, KP_DK, NONE, NONE, NONE, NONE), | |
449 | MFPR_MMP2(GPIO143, 0x220, NAND, GPIO, SMC, NONE, NAND, NONE, NONE, NONE), | |
450 | MFPR_MMP2(GPIO144, 0x224, NAND, GPIO, SMC_INT, SMC, NAND, NONE, NONE, NONE), | |
451 | MFPR_MMP2(GPIO145, 0x228, SMC, GPIO, NONE, NONE, SMC, NONE, NONE, NONE), | |
452 | MFPR_MMP2(GPIO146, 0x22C, SMC, GPIO, NONE, NONE, SMC, NONE, NONE, NONE), | |
453 | MFPR_MMP2(GPIO147, 0x230, NAND, GPIO, NONE, NONE, NAND, NONE, NONE, NONE), | |
454 | MFPR_MMP2(GPIO148, 0x234, NAND, GPIO, NONE, NONE, NAND, NONE, NONE, NONE), | |
455 | MFPR_MMP2(GPIO149, 0x238, NAND, GPIO, NONE, NONE, NONE, NONE, NONE, NONE), | |
456 | MFPR_MMP2(GPIO150, 0x23C, NAND, GPIO, NONE, NONE, NAND, NONE, NONE, NONE), | |
457 | MFPR_MMP2(GPIO151, 0x240, SMC, GPIO, MMC3, NONE, NONE, NONE, NONE, NONE), | |
458 | MFPR_MMP2(GPIO152, 0x248, SMC, GPIO, NONE, NONE, SMC, NONE, NONE, NONE), | |
459 | MFPR_MMP2(GPIO153, 0x24C, SMC, GPIO, NONE, NONE, SMC, NONE, NONE, NONE), | |
460 | MFPR_MMP2(GPIO154, 0x254, SMC_INT, GPIO, SMC, NONE, NAND, NONE, NONE, NONE), | |
461 | MFPR_MMP2(GPIO155, 0x258, EXT_DMA, GPIO, SMC, NONE, EXT_DMA, NONE, NONE, NONE), | |
462 | MFPR_MMP2(GPIO156, 0x14C, PRI_JTAG, GPIO, PWM, NONE, NONE, NONE, NONE, NONE), | |
463 | MFPR_MMP2(GPIO157, 0x150, PRI_JTAG, GPIO, PWM, NONE, NONE, NONE, NONE, NONE), | |
464 | MFPR_MMP2(GPIO158, 0x154, PRI_JTAG, GPIO, PWM, NONE, NONE, NONE, NONE, NONE), | |
465 | MFPR_MMP2(GPIO159, 0x158, PRI_JTAG, GPIO, PWM, NONE, NONE, NONE, NONE, NONE), | |
466 | MFPR_MMP2(GPIO160, 0x250, NAND, GPIO, SMC, NONE, NAND, NONE, NONE, NONE), | |
467 | MFPR_MMP2(GPIO161, 0x210, NAND, GPIO, NONE, NONE, NAND, NONE, NONE, NONE), | |
468 | MFPR_MMP2(GPIO162, 0x20C, NAND, GPIO, MMC3, NONE, NONE, NONE, NONE, NONE), | |
469 | MFPR_MMP2(GPIO163, 0x208, NAND, GPIO, MMC3, NONE, NONE, NONE, NONE, NONE), | |
470 | MFPR_MMP2(GPIO164, 0x204, NAND, GPIO, MMC3, NONE, NONE, NONE, NONE, NONE), | |
471 | MFPR_MMP2(GPIO165, 0x1EC, NAND, GPIO, MMC3, NONE, NONE, NONE, NONE, NONE), | |
472 | MFPR_MMP2(GPIO166, 0x1E8, NAND, GPIO, MMC3, NONE, NONE, NONE, NONE, NONE), | |
473 | MFPR_MMP2(GPIO167, 0x1E4, NAND, GPIO, MMC3, NONE, NONE, NONE, NONE, NONE), | |
474 | MFPR_MMP2(GPIO168, 0x1E0, NAND, GPIO, MMC3, NONE, NONE, NONE, NONE, NONE), | |
475 | MFPR_MMP2(TWSI4_SCL, 0x2BC, TWSI4, LCD, NONE, NONE, NONE, NONE, NONE, NONE), | |
476 | MFPR_MMP2(TWSI4_SDA, 0x2C0, TWSI4, LCD, NONE, NONE, NONE, NONE, NONE, NONE), | |
477 | MFPR_MMP2(G_CLKREQ, 0x160, G_CLKREQ, ONE_WIRE, NONE, NONE, NONE, NONE, NONE, NONE), | |
478 | MFPR_MMP2(VCXO_REQ, 0x168, VCXO_REQ, ONE_WIRE, PLL, NONE, NONE, NONE, NONE, NONE), | |
479 | MFPR_MMP2(VCXO_OUT, 0x16C, VCXO_OUT, 32K_CLKOUT, NONE, NONE, NONE, NONE, NONE, NONE), | |
480 | }; | |
481 | ||
482 | static const unsigned mmp2_uart1_pin1[] = {GPIO29, GPIO30, GPIO31, GPIO32}; | |
483 | static const unsigned mmp2_uart1_pin2[] = {GPIO45, GPIO46}; | |
484 | static const unsigned mmp2_uart1_pin3[] = {GPIO140, GPIO141}; | |
485 | static const unsigned mmp2_uart2_pin1[] = {GPIO37, GPIO38, GPIO39, GPIO40}; | |
486 | static const unsigned mmp2_uart2_pin2[] = {GPIO43, GPIO44, GPIO45, GPIO46}; | |
487 | static const unsigned mmp2_uart2_pin3[] = {GPIO47, GPIO48, GPIO49, GPIO50}; | |
488 | static const unsigned mmp2_uart2_pin4[] = {GPIO74, GPIO75, GPIO76, GPIO77}; | |
489 | static const unsigned mmp2_uart2_pin5[] = {GPIO55, GPIO56}; | |
490 | static const unsigned mmp2_uart2_pin6[] = {GPIO140, GPIO141}; | |
491 | static const unsigned mmp2_uart3_pin1[] = {GPIO37, GPIO38, GPIO39, GPIO40}; | |
492 | static const unsigned mmp2_uart3_pin2[] = {GPIO43, GPIO44, GPIO45, GPIO46}; | |
493 | static const unsigned mmp2_uart3_pin3[] = {GPIO51, GPIO52, GPIO53, GPIO54}; | |
494 | static const unsigned mmp2_uart3_pin4[] = {GPIO59, GPIO60, GPIO61, GPIO62}; | |
495 | static const unsigned mmp2_uart3_pin5[] = {GPIO115, GPIO116, GPIO117, GPIO118}; | |
496 | static const unsigned mmp2_uart3_pin6[] = {GPIO51, GPIO52}; | |
497 | static const unsigned mmp2_uart4_pin1[] = {GPIO43, GPIO44, GPIO45, GPIO46}; | |
498 | static const unsigned mmp2_uart4_pin2[] = {GPIO63, GPIO64, GPIO65, GPIO66}; | |
499 | static const unsigned mmp2_uart4_pin3[] = {GPIO74, GPIO75, GPIO76, GPIO77}; | |
500 | static const unsigned mmp2_uart4_pin4[] = {GPIO115, GPIO116, GPIO117, GPIO118}; | |
501 | static const unsigned mmp2_uart4_pin5[] = {GPIO59, GPIO60}; | |
502 | static const unsigned mmp2_kpdk_pin1[] = {GPIO16, GPIO17, GPIO18, GPIO19}; | |
503 | static const unsigned mmp2_kpdk_pin2[] = {GPIO16, GPIO17}; | |
504 | static const unsigned mmp2_twsi2_pin1[] = {GPIO37, GPIO38}; | |
505 | static const unsigned mmp2_twsi2_pin2[] = {GPIO39, GPIO40}; | |
506 | static const unsigned mmp2_twsi2_pin3[] = {GPIO43, GPIO44}; | |
507 | static const unsigned mmp2_twsi2_pin4[] = {GPIO53, GPIO54}; | |
508 | static const unsigned mmp2_twsi2_pin5[] = {GPIO55, GPIO56}; | |
509 | static const unsigned mmp2_twsi3_pin1[] = {GPIO71, GPIO72}; | |
510 | static const unsigned mmp2_twsi3_pin2[] = {GPIO95, GPIO96}; | |
511 | static const unsigned mmp2_twsi4_pin1[] = {TWSI4_SCL, TWSI4_SDA}; | |
512 | static const unsigned mmp2_twsi5_pin1[] = {GPIO41, GPIO42}; | |
513 | static const unsigned mmp2_twsi5_pin2[] = {GPIO84, GPIO85}; | |
514 | static const unsigned mmp2_twsi5_pin3[] = {GPIO99, GPIO100}; | |
515 | static const unsigned mmp2_twsi6_pin1[] = {GPIO47, GPIO48}; | |
516 | static const unsigned mmp2_twsi6_pin2[] = {GPIO86, GPIO87}; | |
517 | static const unsigned mmp2_twsi6_pin3[] = {GPIO97, GPIO98}; | |
518 | static const unsigned mmp2_ccic1_pin1[] = {GPIO12, GPIO13, GPIO14, GPIO15, | |
519 | GPIO16, GPIO17, GPIO18, GPIO19, GPIO20, GPIO21, GPIO22, GPIO23}; | |
520 | static const unsigned mmp2_ccic1_pin2[] = {GPIO59, GPIO60, GPIO61, GPIO62, | |
521 | GPIO63, GPIO64, GPIO65, GPIO66, GPIO67, GPIO68, GPIO69, GPIO70}; | |
522 | static const unsigned mmp2_ccic2_pin1[] = {GPIO59, GPIO60, GPIO61, GPIO62, | |
523 | GPIO63, GPIO64, GPIO65, GPIO66, GPIO67, GPIO68, GPIO69, GPIO70}; | |
524 | static const unsigned mmp2_ccic2_pin2[] = {GPIO82, GPIO83, GPIO86, GPIO87, | |
525 | GPIO88, GPIO89, GPIO90, GPIO91, GPIO92, GPIO93, GPIO94, GPIO95}; | |
526 | static const unsigned mmp2_ulpi_pin1[] = {GPIO59, GPIO60, GPIO61, GPIO62, | |
527 | GPIO63, GPIO64, GPIO65, GPIO66, GPIO67, GPIO68, GPIO69, GPIO70}; | |
528 | static const unsigned mmp2_ro_pin1[] = {GPIO16, GPIO17}; | |
529 | static const unsigned mmp2_ro_pin2[] = {GPIO18, GPIO19}; | |
530 | static const unsigned mmp2_ro_pin3[] = {GPIO51, GPIO52}; | |
531 | static const unsigned mmp2_ro_pin4[] = {GPIO55, GPIO56}; | |
532 | static const unsigned mmp2_i2s_pin1[] = {GPIO24, GPIO25, GPIO26, GPIO27, | |
533 | GPIO28}; | |
534 | static const unsigned mmp2_i2s_pin2[] = {GPIO33, GPIO34, GPIO35, GPIO36}; | |
535 | static const unsigned mmp2_ssp1_pin1[] = {GPIO37, GPIO38, GPIO39, GPIO40}; | |
536 | static const unsigned mmp2_ssp1_pin2[] = {GPIO43, GPIO44, GPIO45, GPIO46}; | |
537 | static const unsigned mmp2_ssp1_pin3[] = {GPIO115, GPIO116, GPIO117, GPIO118}; | |
538 | static const unsigned mmp2_ssp2_pin1[] = {GPIO47, GPIO48, GPIO49, GPIO50}; | |
539 | static const unsigned mmp2_ssp3_pin1[] = {GPIO119, GPIO120, GPIO121, GPIO122}; | |
540 | static const unsigned mmp2_ssp3_pin2[] = {GPIO132, GPIO133, GPIO133, GPIO136}; | |
541 | static const unsigned mmp2_sspa2_pin1[] = {GPIO25, GPIO26, GPIO27, GPIO28}; | |
542 | static const unsigned mmp2_sspa2_pin2[] = {GPIO33, GPIO34, GPIO35, GPIO36}; | |
543 | static const unsigned mmp2_mmc1_pin1[] = {GPIO131, GPIO132, GPIO133, GPIO134, | |
544 | GPIO136, GPIO139, GPIO140, GPIO141}; | |
545 | static const unsigned mmp2_mmc2_pin1[] = {GPIO37, GPIO38, GPIO39, GPIO40, | |
546 | GPIO41, GPIO42}; | |
547 | static const unsigned mmp2_mmc3_pin1[] = {GPIO111, GPIO112, GPIO151, GPIO162, | |
548 | GPIO163, GPIO164, GPIO165, GPIO166, GPIO167, GPIO168}; | |
549 | ||
550 | static struct pxa3xx_pin_group mmp2_grps[] = { | |
551 | GRP_MMP2("uart1 4p1", UART1, mmp2_uart1_pin1), | |
552 | GRP_MMP2("uart1 2p2", UART1, mmp2_uart1_pin2), | |
553 | GRP_MMP2("uart1 2p3", UART1, mmp2_uart1_pin3), | |
554 | GRP_MMP2("uart2 4p1", UART2, mmp2_uart2_pin1), | |
555 | GRP_MMP2("uart2 4p2", UART2, mmp2_uart2_pin2), | |
556 | GRP_MMP2("uart2 4p3", UART2, mmp2_uart2_pin3), | |
557 | GRP_MMP2("uart2 4p4", UART2, mmp2_uart2_pin4), | |
558 | GRP_MMP2("uart2 2p5", UART2, mmp2_uart2_pin5), | |
559 | GRP_MMP2("uart2 2p6", UART2, mmp2_uart2_pin6), | |
560 | GRP_MMP2("uart3 4p1", UART3, mmp2_uart3_pin1), | |
561 | GRP_MMP2("uart3 4p2", UART3, mmp2_uart3_pin2), | |
562 | GRP_MMP2("uart3 4p3", UART3, mmp2_uart3_pin3), | |
563 | GRP_MMP2("uart3 4p4", UART3, mmp2_uart3_pin4), | |
564 | GRP_MMP2("uart3 4p5", UART3, mmp2_uart3_pin5), | |
565 | GRP_MMP2("uart3 2p6", UART3, mmp2_uart3_pin6), | |
566 | GRP_MMP2("uart4 4p1", UART4, mmp2_uart4_pin1), | |
567 | GRP_MMP2("uart4 4p2", UART4, mmp2_uart4_pin2), | |
568 | GRP_MMP2("uart4 4p3", UART4, mmp2_uart4_pin3), | |
569 | GRP_MMP2("uart4 4p4", UART4, mmp2_uart4_pin4), | |
570 | GRP_MMP2("uart4 2p5", UART4, mmp2_uart4_pin5), | |
571 | GRP_MMP2("kpdk 4p1", KP_DK, mmp2_kpdk_pin1), | |
572 | GRP_MMP2("kpdk 4p2", KP_DK, mmp2_kpdk_pin2), | |
573 | GRP_MMP2("twsi2-1", TWSI2, mmp2_twsi2_pin1), | |
574 | GRP_MMP2("twsi2-2", TWSI2, mmp2_twsi2_pin2), | |
575 | GRP_MMP2("twsi2-3", TWSI2, mmp2_twsi2_pin3), | |
576 | GRP_MMP2("twsi2-4", TWSI2, mmp2_twsi2_pin4), | |
577 | GRP_MMP2("twsi2-5", TWSI2, mmp2_twsi2_pin5), | |
578 | GRP_MMP2("twsi3-1", TWSI3, mmp2_twsi3_pin1), | |
579 | GRP_MMP2("twsi3-2", TWSI3, mmp2_twsi3_pin2), | |
580 | GRP_MMP2("twsi4", TWSI4, mmp2_twsi4_pin1), | |
581 | GRP_MMP2("twsi5-1", TWSI5, mmp2_twsi5_pin1), | |
582 | GRP_MMP2("twsi5-2", TWSI5, mmp2_twsi5_pin2), | |
583 | GRP_MMP2("twsi5-3", TWSI5, mmp2_twsi5_pin3), | |
584 | GRP_MMP2("twsi6-1", TWSI6, mmp2_twsi6_pin1), | |
585 | GRP_MMP2("twsi6-2", TWSI6, mmp2_twsi6_pin2), | |
586 | GRP_MMP2("twsi6-3", TWSI6, mmp2_twsi6_pin3), | |
587 | GRP_MMP2("ccic1-1", CCIC1, mmp2_ccic1_pin1), | |
588 | GRP_MMP2("ccic1-2", CCIC1, mmp2_ccic1_pin2), | |
589 | GRP_MMP2("ccic2-1", CCIC2, mmp2_ccic2_pin1), | |
590 | GRP_MMP2("ccic2-1", CCIC2, mmp2_ccic2_pin2), | |
591 | GRP_MMP2("ulpi", ULPI, mmp2_ulpi_pin1), | |
592 | GRP_MMP2("ro-1", ROT, mmp2_ro_pin1), | |
593 | GRP_MMP2("ro-2", ROT, mmp2_ro_pin2), | |
594 | GRP_MMP2("ro-3", ROT, mmp2_ro_pin3), | |
595 | GRP_MMP2("ro-4", ROT, mmp2_ro_pin4), | |
596 | GRP_MMP2("i2s 5p1", I2S, mmp2_i2s_pin1), | |
597 | GRP_MMP2("i2s 4p2", I2S, mmp2_i2s_pin2), | |
598 | GRP_MMP2("ssp1 4p1", SSP1, mmp2_ssp1_pin1), | |
599 | GRP_MMP2("ssp1 4p2", SSP1, mmp2_ssp1_pin2), | |
600 | GRP_MMP2("ssp1 4p3", SSP1, mmp2_ssp1_pin3), | |
601 | GRP_MMP2("ssp2 4p1", SSP2, mmp2_ssp2_pin1), | |
602 | GRP_MMP2("ssp3 4p1", SSP3, mmp2_ssp3_pin1), | |
603 | GRP_MMP2("ssp3 4p2", SSP3, mmp2_ssp3_pin2), | |
604 | GRP_MMP2("sspa2 4p1", SSPA2, mmp2_sspa2_pin1), | |
605 | GRP_MMP2("sspa2 4p2", SSPA2, mmp2_sspa2_pin2), | |
606 | GRP_MMP2("mmc1 8p1", MMC1, mmp2_mmc1_pin1), | |
607 | GRP_MMP2("mmc2 6p1", MMC2, mmp2_mmc2_pin1), | |
608 | GRP_MMP2("mmc3 10p1", MMC3, mmp2_mmc3_pin1), | |
609 | }; | |
610 | ||
611 | static const char * const mmp2_uart1_grps[] = {"uart1 4p1", "uart1 2p2", | |
612 | "uart1 2p3"}; | |
613 | static const char * const mmp2_uart2_grps[] = {"uart2 4p1", "uart2 4p2", | |
614 | "uart2 4p3", "uart2 4p4", "uart2 4p5", "uart2 4p6"}; | |
615 | static const char * const mmp2_uart3_grps[] = {"uart3 4p1", "uart3 4p2", | |
616 | "uart3 4p3", "uart3 4p4", "uart3 4p5", "uart3 2p6"}; | |
617 | static const char * const mmp2_uart4_grps[] = {"uart4 4p1", "uart4 4p2", | |
618 | "uart4 4p3", "uart4 4p4", "uart4 2p5"}; | |
619 | static const char * const mmp2_kpdk_grps[] = {"kpdk 4p1", "kpdk 4p2"}; | |
620 | static const char * const mmp2_twsi2_grps[] = {"twsi2-1", "twsi2-2", | |
621 | "twsi2-3", "twsi2-4", "twsi2-5"}; | |
622 | static const char * const mmp2_twsi3_grps[] = {"twsi3-1", "twsi3-2"}; | |
623 | static const char * const mmp2_twsi4_grps[] = {"twsi4"}; | |
624 | static const char * const mmp2_twsi5_grps[] = {"twsi5-1", "twsi5-2", | |
625 | "twsi5-3"}; | |
626 | static const char * const mmp2_twsi6_grps[] = {"twsi6-1", "twsi6-2", | |
627 | "twsi6-3"}; | |
628 | static const char * const mmp2_ccic1_grps[] = {"ccic1-1", "ccic1-2"}; | |
629 | static const char * const mmp2_ccic2_grps[] = {"ccic2-1", "ccic2-2"}; | |
630 | static const char * const mmp2_ulpi_grps[] = {"ulpi"}; | |
631 | static const char * const mmp2_ro_grps[] = {"ro-1", "ro-2", "ro-3", "ro-4"}; | |
632 | static const char * const mmp2_i2s_grps[] = {"i2s 5p1", "i2s 4p2"}; | |
633 | static const char * const mmp2_ssp1_grps[] = {"ssp1 4p1", "ssp1 4p2", | |
634 | "ssp1 4p3"}; | |
635 | static const char * const mmp2_ssp2_grps[] = {"ssp2 4p1"}; | |
636 | static const char * const mmp2_ssp3_grps[] = {"ssp3 4p1", "ssp3 4p2"}; | |
637 | static const char * const mmp2_sspa2_grps[] = {"sspa2 4p1", "sspa2 4p2"}; | |
638 | static const char * const mmp2_mmc1_grps[] = {"mmc1 8p1"}; | |
639 | static const char * const mmp2_mmc2_grps[] = {"mmc2 6p1"}; | |
640 | static const char * const mmp2_mmc3_grps[] = {"mmc3 10p1"}; | |
641 | ||
642 | static struct pxa3xx_pmx_func mmp2_funcs[] = { | |
643 | {"uart1", ARRAY_AND_SIZE(mmp2_uart1_grps)}, | |
644 | {"uart2", ARRAY_AND_SIZE(mmp2_uart2_grps)}, | |
645 | {"uart3", ARRAY_AND_SIZE(mmp2_uart3_grps)}, | |
646 | {"uart4", ARRAY_AND_SIZE(mmp2_uart4_grps)}, | |
647 | {"kpdk", ARRAY_AND_SIZE(mmp2_kpdk_grps)}, | |
648 | {"twsi2", ARRAY_AND_SIZE(mmp2_twsi2_grps)}, | |
649 | {"twsi3", ARRAY_AND_SIZE(mmp2_twsi3_grps)}, | |
650 | {"twsi4", ARRAY_AND_SIZE(mmp2_twsi4_grps)}, | |
651 | {"twsi5", ARRAY_AND_SIZE(mmp2_twsi5_grps)}, | |
652 | {"twsi6", ARRAY_AND_SIZE(mmp2_twsi6_grps)}, | |
653 | {"ccic1", ARRAY_AND_SIZE(mmp2_ccic1_grps)}, | |
654 | {"ccic2", ARRAY_AND_SIZE(mmp2_ccic2_grps)}, | |
655 | {"ulpi", ARRAY_AND_SIZE(mmp2_ulpi_grps)}, | |
656 | {"ro", ARRAY_AND_SIZE(mmp2_ro_grps)}, | |
657 | {"i2s", ARRAY_AND_SIZE(mmp2_i2s_grps)}, | |
658 | {"ssp1", ARRAY_AND_SIZE(mmp2_ssp1_grps)}, | |
659 | {"ssp2", ARRAY_AND_SIZE(mmp2_ssp2_grps)}, | |
660 | {"ssp3", ARRAY_AND_SIZE(mmp2_ssp3_grps)}, | |
661 | {"sspa2", ARRAY_AND_SIZE(mmp2_sspa2_grps)}, | |
662 | {"mmc1", ARRAY_AND_SIZE(mmp2_mmc1_grps)}, | |
663 | {"mmc2", ARRAY_AND_SIZE(mmp2_mmc2_grps)}, | |
664 | {"mmc3", ARRAY_AND_SIZE(mmp2_mmc3_grps)}, | |
665 | }; | |
666 | ||
667 | static struct pinctrl_desc mmp2_pctrl_desc = { | |
668 | .name = "mmp2-pinctrl", | |
669 | .owner = THIS_MODULE, | |
670 | }; | |
671 | ||
672 | static struct pxa3xx_pinmux_info mmp2_info = { | |
673 | .mfp = mmp2_mfp, | |
674 | .num_mfp = ARRAY_SIZE(mmp2_mfp), | |
675 | .grps = mmp2_grps, | |
676 | .num_grps = ARRAY_SIZE(mmp2_grps), | |
677 | .funcs = mmp2_funcs, | |
678 | .num_funcs = ARRAY_SIZE(mmp2_funcs), | |
679 | .num_gpio = 169, | |
680 | .desc = &mmp2_pctrl_desc, | |
681 | .pads = mmp2_pads, | |
682 | .num_pads = ARRAY_SIZE(mmp2_pads), | |
683 | ||
684 | .cputype = PINCTRL_MMP2, | |
685 | .ds_mask = MMP2_DS_MASK, | |
686 | .ds_shift = MMP2_DS_SHIFT, | |
687 | }; | |
688 | ||
689 | static int __devinit mmp2_pinmux_probe(struct platform_device *pdev) | |
690 | { | |
691 | return pxa3xx_pinctrl_register(pdev, &mmp2_info); | |
692 | } | |
693 | ||
694 | static int __devexit mmp2_pinmux_remove(struct platform_device *pdev) | |
695 | { | |
696 | return pxa3xx_pinctrl_unregister(pdev); | |
697 | } | |
698 | ||
699 | static struct platform_driver mmp2_pinmux_driver = { | |
700 | .driver = { | |
701 | .name = "mmp2-pinmux", | |
702 | .owner = THIS_MODULE, | |
703 | }, | |
704 | .probe = mmp2_pinmux_probe, | |
705 | .remove = __devexit_p(mmp2_pinmux_remove), | |
706 | }; | |
707 | ||
708 | static int __init mmp2_pinmux_init(void) | |
709 | { | |
710 | return platform_driver_register(&mmp2_pinmux_driver); | |
711 | } | |
712 | core_initcall_sync(mmp2_pinmux_init); | |
713 | ||
714 | static void __exit mmp2_pinmux_exit(void) | |
715 | { | |
716 | platform_driver_unregister(&mmp2_pinmux_driver); | |
717 | } | |
718 | module_exit(mmp2_pinmux_exit); | |
719 | ||
720 | MODULE_AUTHOR("Haojian Zhuang <haojian.zhuang@marvell.com>"); | |
721 | MODULE_DESCRIPTION("PXA3xx pin control driver"); | |
722 | MODULE_LICENSE("GPL v2"); |