Commit | Line | Data |
---|---|---|
2744e8af LW |
1 | /* |
2 | * Core driver for the pin muxing portions of the pin control subsystem | |
3 | * | |
e93bcee0 | 4 | * Copyright (C) 2011-2012 ST-Ericsson SA |
2744e8af LW |
5 | * Written on behalf of Linaro for ST-Ericsson |
6 | * Based on bits of regulator core, gpio core and clk core | |
7 | * | |
8 | * Author: Linus Walleij <linus.walleij@linaro.org> | |
9 | * | |
7ecdb16f SW |
10 | * Copyright (C) 2012 NVIDIA CORPORATION. All rights reserved. |
11 | * | |
2744e8af LW |
12 | * License terms: GNU General Public License (GPL) version 2 |
13 | */ | |
14 | #define pr_fmt(fmt) "pinmux core: " fmt | |
15 | ||
16 | #include <linux/kernel.h> | |
17 | #include <linux/module.h> | |
18 | #include <linux/init.h> | |
19 | #include <linux/device.h> | |
20 | #include <linux/slab.h> | |
21 | #include <linux/radix-tree.h> | |
22 | #include <linux/err.h> | |
23 | #include <linux/list.h> | |
97607d15 | 24 | #include <linux/string.h> |
2744e8af LW |
25 | #include <linux/sysfs.h> |
26 | #include <linux/debugfs.h> | |
27 | #include <linux/seq_file.h> | |
28 | #include <linux/pinctrl/machine.h> | |
29 | #include <linux/pinctrl/pinmux.h> | |
30 | #include "core.h" | |
befe5bdf | 31 | #include "pinmux.h" |
2744e8af | 32 | |
03665e0f SW |
33 | int pinmux_check_ops(struct pinctrl_dev *pctldev) |
34 | { | |
35 | const struct pinmux_ops *ops = pctldev->desc->pmxops; | |
a1d31f71 | 36 | unsigned nfuncs; |
03665e0f SW |
37 | unsigned selector = 0; |
38 | ||
39 | /* Check that we implement required operations */ | |
a1d31f71 DA |
40 | if (!ops || |
41 | !ops->get_functions_count || | |
03665e0f SW |
42 | !ops->get_function_name || |
43 | !ops->get_function_groups || | |
02b50ce4 | 44 | !ops->enable) { |
ad6e1107 | 45 | dev_err(pctldev->dev, "pinmux ops lacks necessary functions\n"); |
03665e0f | 46 | return -EINVAL; |
ad6e1107 | 47 | } |
03665e0f | 48 | /* Check that all functions registered have names */ |
a1d31f71 | 49 | nfuncs = ops->get_functions_count(pctldev); |
d1e90e9e | 50 | while (selector < nfuncs) { |
03665e0f SW |
51 | const char *fname = ops->get_function_name(pctldev, |
52 | selector); | |
53 | if (!fname) { | |
a1d31f71 | 54 | dev_err(pctldev->dev, "pinmux ops has no name for function%u\n", |
03665e0f SW |
55 | selector); |
56 | return -EINVAL; | |
57 | } | |
58 | selector++; | |
59 | } | |
60 | ||
61 | return 0; | |
62 | } | |
63 | ||
1e2082b5 SW |
64 | int pinmux_validate_map(struct pinctrl_map const *map, int i) |
65 | { | |
66 | if (!map->data.mux.function) { | |
67 | pr_err("failed to register map %s (%d): no function given\n", | |
68 | map->name, i); | |
69 | return -EINVAL; | |
70 | } | |
71 | ||
72 | return 0; | |
73 | } | |
74 | ||
2744e8af LW |
75 | /** |
76 | * pin_request() - request a single pin to be muxed in, typically for GPIO | |
77 | * @pin: the pin number in the global pin space | |
3cc70ed3 SW |
78 | * @owner: a representation of the owner of this pin; typically the device |
79 | * name that controls its mux function, or the requested GPIO name | |
2744e8af LW |
80 | * @gpio_range: the range matching the GPIO pin if this is a request for a |
81 | * single GPIO pin | |
82 | */ | |
83 | static int pin_request(struct pinctrl_dev *pctldev, | |
3cc70ed3 | 84 | int pin, const char *owner, |
2744e8af LW |
85 | struct pinctrl_gpio_range *gpio_range) |
86 | { | |
87 | struct pin_desc *desc; | |
88 | const struct pinmux_ops *ops = pctldev->desc->pmxops; | |
89 | int status = -EINVAL; | |
90 | ||
2744e8af LW |
91 | desc = pin_desc_get(pctldev, pin); |
92 | if (desc == NULL) { | |
51cd24ee | 93 | dev_err(pctldev->dev, |
d4705316 SW |
94 | "pin %d is not registered so it cannot be requested\n", |
95 | pin); | |
2744e8af LW |
96 | goto out; |
97 | } | |
98 | ||
d0bd8df5 DA |
99 | dev_dbg(pctldev->dev, "request pin %d (%s) for %s\n", |
100 | pin, desc->name, owner); | |
101 | ||
652162d4 SW |
102 | if (gpio_range) { |
103 | /* There's no need to support multiple GPIO requests */ | |
104 | if (desc->gpio_owner) { | |
105 | dev_err(pctldev->dev, | |
d4705316 SW |
106 | "pin %s already requested by %s; cannot claim for %s\n", |
107 | desc->name, desc->gpio_owner, owner); | |
652162d4 SW |
108 | goto out; |
109 | } | |
0e3db173 | 110 | |
652162d4 SW |
111 | desc->gpio_owner = owner; |
112 | } else { | |
113 | if (desc->mux_usecount && strcmp(desc->mux_owner, owner)) { | |
114 | dev_err(pctldev->dev, | |
d4705316 SW |
115 | "pin %s already requested by %s; cannot claim for %s\n", |
116 | desc->name, desc->mux_owner, owner); | |
652162d4 SW |
117 | goto out; |
118 | } | |
0e3db173 | 119 | |
652162d4 SW |
120 | desc->mux_usecount++; |
121 | if (desc->mux_usecount > 1) | |
122 | return 0; | |
123 | ||
124 | desc->mux_owner = owner; | |
125 | } | |
2744e8af LW |
126 | |
127 | /* Let each pin increase references to this module */ | |
128 | if (!try_module_get(pctldev->owner)) { | |
51cd24ee | 129 | dev_err(pctldev->dev, |
2744e8af LW |
130 | "could not increase module refcount for pin %d\n", |
131 | pin); | |
132 | status = -EINVAL; | |
133 | goto out_free_pin; | |
134 | } | |
135 | ||
136 | /* | |
137 | * If there is no kind of request function for the pin we just assume | |
138 | * we got it by default and proceed. | |
139 | */ | |
3712a3c4 | 140 | if (gpio_range && ops->gpio_request_enable) |
2744e8af LW |
141 | /* This requests and enables a single GPIO pin */ |
142 | status = ops->gpio_request_enable(pctldev, gpio_range, pin); | |
143 | else if (ops->request) | |
144 | status = ops->request(pctldev, pin); | |
145 | else | |
146 | status = 0; | |
147 | ||
0e3db173 | 148 | if (status) { |
d4705316 | 149 | dev_err(pctldev->dev, "request() failed for pin %d\n", pin); |
0e3db173 SW |
150 | module_put(pctldev->owner); |
151 | } | |
152 | ||
2744e8af | 153 | out_free_pin: |
0e3db173 | 154 | if (status) { |
652162d4 SW |
155 | if (gpio_range) { |
156 | desc->gpio_owner = NULL; | |
157 | } else { | |
158 | desc->mux_usecount--; | |
159 | if (!desc->mux_usecount) | |
160 | desc->mux_owner = NULL; | |
161 | } | |
0e3db173 | 162 | } |
2744e8af LW |
163 | out: |
164 | if (status) | |
51cd24ee | 165 | dev_err(pctldev->dev, "pin-%d (%s) status %d\n", |
d4705316 | 166 | pin, owner, status); |
2744e8af LW |
167 | |
168 | return status; | |
169 | } | |
170 | ||
171 | /** | |
172 | * pin_free() - release a single muxed in pin so something else can be muxed | |
173 | * @pctldev: pin controller device handling this pin | |
174 | * @pin: the pin to free | |
3712a3c4 SW |
175 | * @gpio_range: the range matching the GPIO pin if this is a request for a |
176 | * single GPIO pin | |
336cdba0 | 177 | * |
3cc70ed3 SW |
178 | * This function returns a pointer to the previous owner. This is used |
179 | * for callers that dynamically allocate an owner name so it can be freed | |
336cdba0 | 180 | * once the pin is free. This is done for GPIO request functions. |
2744e8af | 181 | */ |
3712a3c4 SW |
182 | static const char *pin_free(struct pinctrl_dev *pctldev, int pin, |
183 | struct pinctrl_gpio_range *gpio_range) | |
2744e8af LW |
184 | { |
185 | const struct pinmux_ops *ops = pctldev->desc->pmxops; | |
186 | struct pin_desc *desc; | |
3cc70ed3 | 187 | const char *owner; |
2744e8af LW |
188 | |
189 | desc = pin_desc_get(pctldev, pin); | |
190 | if (desc == NULL) { | |
51cd24ee | 191 | dev_err(pctldev->dev, |
2744e8af | 192 | "pin is not registered so it cannot be freed\n"); |
3712a3c4 | 193 | return NULL; |
2744e8af LW |
194 | } |
195 | ||
652162d4 SW |
196 | if (!gpio_range) { |
197 | desc->mux_usecount--; | |
198 | if (desc->mux_usecount) | |
199 | return NULL; | |
200 | } | |
0e3db173 | 201 | |
3712a3c4 SW |
202 | /* |
203 | * If there is no kind of request function for the pin we just assume | |
204 | * we got it by default and proceed. | |
205 | */ | |
206 | if (gpio_range && ops->gpio_disable_free) | |
207 | ops->gpio_disable_free(pctldev, gpio_range, pin); | |
208 | else if (ops->free) | |
2744e8af LW |
209 | ops->free(pctldev, pin); |
210 | ||
652162d4 SW |
211 | if (gpio_range) { |
212 | owner = desc->gpio_owner; | |
213 | desc->gpio_owner = NULL; | |
214 | } else { | |
215 | owner = desc->mux_owner; | |
216 | desc->mux_owner = NULL; | |
217 | desc->mux_setting = NULL; | |
218 | } | |
219 | ||
2744e8af | 220 | module_put(pctldev->owner); |
3712a3c4 | 221 | |
3cc70ed3 | 222 | return owner; |
2744e8af LW |
223 | } |
224 | ||
225 | /** | |
befe5bdf LW |
226 | * pinmux_request_gpio() - request pinmuxing for a GPIO pin |
227 | * @pctldev: pin controller device affected | |
228 | * @pin: the pin to mux in for GPIO | |
229 | * @range: the applicable GPIO range | |
2744e8af | 230 | */ |
befe5bdf LW |
231 | int pinmux_request_gpio(struct pinctrl_dev *pctldev, |
232 | struct pinctrl_gpio_range *range, | |
233 | unsigned pin, unsigned gpio) | |
2744e8af LW |
234 | { |
235 | char gpiostr[16]; | |
3cc70ed3 | 236 | const char *owner; |
2744e8af | 237 | int ret; |
2744e8af LW |
238 | |
239 | /* Conjure some name stating what chip and pin this is taken by */ | |
240 | snprintf(gpiostr, 15, "%s:%d", range->name, gpio); | |
241 | ||
3cc70ed3 SW |
242 | owner = kstrdup(gpiostr, GFP_KERNEL); |
243 | if (!owner) | |
5d2eaf80 SW |
244 | return -EINVAL; |
245 | ||
3cc70ed3 | 246 | ret = pin_request(pctldev, pin, owner, range); |
5d2eaf80 | 247 | if (ret < 0) |
3cc70ed3 | 248 | kfree(owner); |
5d2eaf80 SW |
249 | |
250 | return ret; | |
2744e8af | 251 | } |
2744e8af LW |
252 | |
253 | /** | |
befe5bdf LW |
254 | * pinmux_free_gpio() - release a pin from GPIO muxing |
255 | * @pctldev: the pin controller device for the pin | |
256 | * @pin: the affected currently GPIO-muxed in pin | |
257 | * @range: applicable GPIO range | |
2744e8af | 258 | */ |
befe5bdf LW |
259 | void pinmux_free_gpio(struct pinctrl_dev *pctldev, unsigned pin, |
260 | struct pinctrl_gpio_range *range) | |
2744e8af | 261 | { |
3cc70ed3 | 262 | const char *owner; |
2744e8af | 263 | |
3cc70ed3 SW |
264 | owner = pin_free(pctldev, pin, range); |
265 | kfree(owner); | |
2744e8af | 266 | } |
2744e8af | 267 | |
befe5bdf LW |
268 | /** |
269 | * pinmux_gpio_direction() - set the direction of a single muxed-in GPIO pin | |
270 | * @pctldev: the pin controller handling this pin | |
271 | * @range: applicable GPIO range | |
272 | * @pin: the affected GPIO pin in this controller | |
273 | * @input: true if we set the pin as input, false for output | |
274 | */ | |
275 | int pinmux_gpio_direction(struct pinctrl_dev *pctldev, | |
276 | struct pinctrl_gpio_range *range, | |
277 | unsigned pin, bool input) | |
542e704f | 278 | { |
542e704f LW |
279 | const struct pinmux_ops *ops; |
280 | int ret; | |
542e704f LW |
281 | |
282 | ops = pctldev->desc->pmxops; | |
283 | ||
542e704f LW |
284 | if (ops->gpio_set_direction) |
285 | ret = ops->gpio_set_direction(pctldev, range, pin, input); | |
286 | else | |
287 | ret = 0; | |
288 | ||
289 | return ret; | |
290 | } | |
291 | ||
7ecdb16f SW |
292 | static int pinmux_func_name_to_selector(struct pinctrl_dev *pctldev, |
293 | const char *function) | |
2744e8af LW |
294 | { |
295 | const struct pinmux_ops *ops = pctldev->desc->pmxops; | |
d1e90e9e | 296 | unsigned nfuncs = ops->get_functions_count(pctldev); |
2744e8af LW |
297 | unsigned selector = 0; |
298 | ||
299 | /* See if this pctldev has this function */ | |
d1e90e9e | 300 | while (selector < nfuncs) { |
2744e8af LW |
301 | const char *fname = ops->get_function_name(pctldev, |
302 | selector); | |
2744e8af | 303 | |
7ecdb16f SW |
304 | if (!strcmp(function, fname)) |
305 | return selector; | |
2744e8af | 306 | |
2744e8af LW |
307 | selector++; |
308 | } | |
309 | ||
310 | pr_err("%s does not support function %s\n", | |
7ecdb16f | 311 | pinctrl_dev_get_name(pctldev), function); |
2744e8af LW |
312 | return -EINVAL; |
313 | } | |
314 | ||
7ecdb16f SW |
315 | int pinmux_map_to_setting(struct pinctrl_map const *map, |
316 | struct pinctrl_setting *setting) | |
2744e8af | 317 | { |
7ecdb16f SW |
318 | struct pinctrl_dev *pctldev = setting->pctldev; |
319 | const struct pinmux_ops *pmxops = pctldev->desc->pmxops; | |
320 | const struct pinctrl_ops *pctlops = pctldev->desc->pctlops; | |
321 | char const * const *groups; | |
322 | unsigned num_groups; | |
2744e8af | 323 | int ret; |
7ecdb16f SW |
324 | const char *group; |
325 | int i; | |
326 | const unsigned *pins; | |
327 | unsigned num_pins; | |
2744e8af | 328 | |
ad8bb720 DA |
329 | if (!pmxops) { |
330 | dev_err(pctldev->dev, "does not support mux function\n"); | |
331 | return -EINVAL; | |
332 | } | |
333 | ||
15f70e1b | 334 | ret = pinmux_func_name_to_selector(pctldev, map->data.mux.function); |
ad6e1107 JC |
335 | if (ret < 0) { |
336 | dev_err(pctldev->dev, "invalid function %s in map table\n", | |
337 | map->data.mux.function); | |
15f70e1b | 338 | return ret; |
ad6e1107 | 339 | } |
15f70e1b | 340 | setting->data.mux.func = ret; |
2744e8af | 341 | |
1e2082b5 | 342 | ret = pmxops->get_function_groups(pctldev, setting->data.mux.func, |
7ecdb16f | 343 | &groups, &num_groups); |
ad6e1107 JC |
344 | if (ret < 0) { |
345 | dev_err(pctldev->dev, "can't query groups for function %s\n", | |
346 | map->data.mux.function); | |
7ecdb16f | 347 | return ret; |
ad6e1107 JC |
348 | } |
349 | if (!num_groups) { | |
350 | dev_err(pctldev->dev, | |
351 | "function %s can't be selected on any group\n", | |
352 | map->data.mux.function); | |
2744e8af | 353 | return -EINVAL; |
ad6e1107 | 354 | } |
1e2082b5 | 355 | if (map->data.mux.group) { |
7ecdb16f | 356 | bool found = false; |
1e2082b5 | 357 | group = map->data.mux.group; |
7ecdb16f SW |
358 | for (i = 0; i < num_groups; i++) { |
359 | if (!strcmp(group, groups[i])) { | |
360 | found = true; | |
361 | break; | |
362 | } | |
363 | } | |
ad6e1107 JC |
364 | if (!found) { |
365 | dev_err(pctldev->dev, | |
366 | "invalid group \"%s\" for function \"%s\"\n", | |
367 | group, map->data.mux.function); | |
7ecdb16f | 368 | return -EINVAL; |
ad6e1107 | 369 | } |
7ecdb16f SW |
370 | } else { |
371 | group = groups[0]; | |
2744e8af | 372 | } |
2744e8af | 373 | |
15f70e1b | 374 | ret = pinctrl_get_group_selector(pctldev, group); |
ad6e1107 JC |
375 | if (ret < 0) { |
376 | dev_err(pctldev->dev, "invalid group %s in map table\n", | |
377 | map->data.mux.group); | |
15f70e1b | 378 | return ret; |
ad6e1107 | 379 | } |
15f70e1b | 380 | setting->data.mux.group = ret; |
2744e8af | 381 | |
1e2082b5 SW |
382 | ret = pctlops->get_group_pins(pctldev, setting->data.mux.group, &pins, |
383 | &num_pins); | |
2744e8af | 384 | if (ret) { |
7ecdb16f SW |
385 | dev_err(pctldev->dev, |
386 | "could not get pins for device %s group selector %d\n", | |
1e2082b5 | 387 | pinctrl_dev_get_name(pctldev), setting->data.mux.group); |
7ecdb16f SW |
388 | return -ENODEV; |
389 | } | |
390 | ||
391 | /* Try to allocate all pins in this group, one by one */ | |
392 | for (i = 0; i < num_pins; i++) { | |
393 | ret = pin_request(pctldev, pins[i], map->dev_name, NULL); | |
394 | if (ret) { | |
395 | dev_err(pctldev->dev, | |
ad6e1107 | 396 | "could not request pin %d on device %s\n", |
7ecdb16f SW |
397 | pins[i], pinctrl_dev_get_name(pctldev)); |
398 | /* On error release all taken pins */ | |
399 | i--; /* this pin just failed */ | |
400 | for (; i >= 0; i--) | |
401 | pin_free(pctldev, pins[i], NULL); | |
402 | return -ENODEV; | |
403 | } | |
2744e8af | 404 | } |
2744e8af LW |
405 | |
406 | return 0; | |
407 | } | |
408 | ||
7ecdb16f | 409 | void pinmux_free_setting(struct pinctrl_setting const *setting) |
2744e8af | 410 | { |
7ecdb16f SW |
411 | struct pinctrl_dev *pctldev = setting->pctldev; |
412 | const struct pinctrl_ops *pctlops = pctldev->desc->pctlops; | |
413 | const unsigned *pins; | |
414 | unsigned num_pins; | |
befe5bdf | 415 | int ret; |
7ecdb16f | 416 | int i; |
2744e8af | 417 | |
1e2082b5 | 418 | ret = pctlops->get_group_pins(pctldev, setting->data.mux.group, |
7ecdb16f | 419 | &pins, &num_pins); |
befe5bdf | 420 | if (ret) { |
7ecdb16f SW |
421 | dev_err(pctldev->dev, |
422 | "could not get pins for device %s group selector %d\n", | |
1e2082b5 | 423 | pinctrl_dev_get_name(pctldev), setting->data.mux.group); |
7ecdb16f | 424 | return; |
2744e8af LW |
425 | } |
426 | ||
7ecdb16f SW |
427 | for (i = 0; i < num_pins; i++) |
428 | pin_free(pctldev, pins[i], NULL); | |
2744e8af | 429 | } |
2744e8af | 430 | |
7ecdb16f | 431 | int pinmux_enable_setting(struct pinctrl_setting const *setting) |
2744e8af | 432 | { |
7ecdb16f | 433 | struct pinctrl_dev *pctldev = setting->pctldev; |
ba110d90 | 434 | const struct pinctrl_ops *pctlops = pctldev->desc->pctlops; |
befe5bdf | 435 | const struct pinmux_ops *ops = pctldev->desc->pmxops; |
ba110d90 SW |
436 | int ret; |
437 | const unsigned *pins; | |
438 | unsigned num_pins; | |
439 | int i; | |
440 | struct pin_desc *desc; | |
441 | ||
442 | ret = pctlops->get_group_pins(pctldev, setting->data.mux.group, | |
443 | &pins, &num_pins); | |
444 | if (ret) { | |
445 | /* errors only affect debug data, so just warn */ | |
446 | dev_warn(pctldev->dev, | |
447 | "could not get pins for group selector %d\n", | |
448 | setting->data.mux.group); | |
449 | num_pins = 0; | |
450 | } | |
451 | ||
452 | for (i = 0; i < num_pins; i++) { | |
453 | desc = pin_desc_get(pctldev, pins[i]); | |
454 | if (desc == NULL) { | |
455 | dev_warn(pctldev->dev, | |
456 | "could not get pin desc for pin %d\n", | |
457 | pins[i]); | |
458 | continue; | |
459 | } | |
460 | desc->mux_setting = &(setting->data.mux); | |
461 | } | |
2744e8af | 462 | |
1e2082b5 SW |
463 | return ops->enable(pctldev, setting->data.mux.func, |
464 | setting->data.mux.group); | |
2744e8af | 465 | } |
2744e8af | 466 | |
7ecdb16f | 467 | void pinmux_disable_setting(struct pinctrl_setting const *setting) |
2744e8af | 468 | { |
7ecdb16f | 469 | struct pinctrl_dev *pctldev = setting->pctldev; |
ba110d90 | 470 | const struct pinctrl_ops *pctlops = pctldev->desc->pctlops; |
befe5bdf | 471 | const struct pinmux_ops *ops = pctldev->desc->pmxops; |
ba110d90 SW |
472 | int ret; |
473 | const unsigned *pins; | |
474 | unsigned num_pins; | |
475 | int i; | |
476 | struct pin_desc *desc; | |
477 | ||
478 | ret = pctlops->get_group_pins(pctldev, setting->data.mux.group, | |
479 | &pins, &num_pins); | |
480 | if (ret) { | |
481 | /* errors only affect debug data, so just warn */ | |
482 | dev_warn(pctldev->dev, | |
483 | "could not get pins for group selector %d\n", | |
484 | setting->data.mux.group); | |
485 | num_pins = 0; | |
486 | } | |
487 | ||
488 | for (i = 0; i < num_pins; i++) { | |
489 | desc = pin_desc_get(pctldev, pins[i]); | |
490 | if (desc == NULL) { | |
491 | dev_warn(pctldev->dev, | |
492 | "could not get pin desc for pin %d\n", | |
493 | pins[i]); | |
494 | continue; | |
495 | } | |
496 | desc->mux_setting = NULL; | |
497 | } | |
2744e8af | 498 | |
02b50ce4 DA |
499 | if (ops->disable) |
500 | ops->disable(pctldev, setting->data.mux.func, setting->data.mux.group); | |
2744e8af | 501 | } |
2744e8af | 502 | |
2744e8af LW |
503 | #ifdef CONFIG_DEBUG_FS |
504 | ||
505 | /* Called from pincontrol core */ | |
506 | static int pinmux_functions_show(struct seq_file *s, void *what) | |
507 | { | |
508 | struct pinctrl_dev *pctldev = s->private; | |
509 | const struct pinmux_ops *pmxops = pctldev->desc->pmxops; | |
ad8bb720 | 510 | unsigned nfuncs; |
2744e8af LW |
511 | unsigned func_selector = 0; |
512 | ||
ad8bb720 DA |
513 | if (!pmxops) |
514 | return 0; | |
57b676f9 | 515 | |
ad8bb720 DA |
516 | mutex_lock(&pinctrl_mutex); |
517 | nfuncs = pmxops->get_functions_count(pctldev); | |
d1e90e9e | 518 | while (func_selector < nfuncs) { |
2744e8af LW |
519 | const char *func = pmxops->get_function_name(pctldev, |
520 | func_selector); | |
521 | const char * const *groups; | |
522 | unsigned num_groups; | |
523 | int ret; | |
524 | int i; | |
525 | ||
526 | ret = pmxops->get_function_groups(pctldev, func_selector, | |
527 | &groups, &num_groups); | |
528 | if (ret) | |
529 | seq_printf(s, "function %s: COULD NOT GET GROUPS\n", | |
530 | func); | |
531 | ||
532 | seq_printf(s, "function: %s, groups = [ ", func); | |
533 | for (i = 0; i < num_groups; i++) | |
534 | seq_printf(s, "%s ", groups[i]); | |
535 | seq_puts(s, "]\n"); | |
536 | ||
537 | func_selector++; | |
2744e8af LW |
538 | } |
539 | ||
57b676f9 SW |
540 | mutex_unlock(&pinctrl_mutex); |
541 | ||
2744e8af LW |
542 | return 0; |
543 | } | |
544 | ||
545 | static int pinmux_pins_show(struct seq_file *s, void *what) | |
546 | { | |
547 | struct pinctrl_dev *pctldev = s->private; | |
ba110d90 SW |
548 | const struct pinctrl_ops *pctlops = pctldev->desc->pctlops; |
549 | const struct pinmux_ops *pmxops = pctldev->desc->pmxops; | |
706e8520 | 550 | unsigned i, pin; |
2744e8af | 551 | |
ad8bb720 DA |
552 | if (!pmxops) |
553 | return 0; | |
554 | ||
2744e8af | 555 | seq_puts(s, "Pinmux settings per pin\n"); |
652162d4 | 556 | seq_puts(s, "Format: pin (name): mux_owner gpio_owner hog?\n"); |
2744e8af | 557 | |
57b676f9 SW |
558 | mutex_lock(&pinctrl_mutex); |
559 | ||
706e8520 CP |
560 | /* The pin number can be retrived from the pin controller descriptor */ |
561 | for (i = 0; i < pctldev->desc->npins; i++) { | |
2744e8af | 562 | struct pin_desc *desc; |
1cf94c45 | 563 | bool is_hog = false; |
2744e8af | 564 | |
706e8520 | 565 | pin = pctldev->desc->pins[i].number; |
2744e8af | 566 | desc = pin_desc_get(pctldev, pin); |
706e8520 | 567 | /* Skip if we cannot search the pin */ |
2744e8af LW |
568 | if (desc == NULL) |
569 | continue; | |
570 | ||
652162d4 SW |
571 | if (desc->mux_owner && |
572 | !strcmp(desc->mux_owner, pinctrl_dev_get_name(pctldev))) | |
1cf94c45 LW |
573 | is_hog = true; |
574 | ||
652162d4 | 575 | seq_printf(s, "pin %d (%s): %s %s%s", pin, |
2744e8af | 576 | desc->name ? desc->name : "unnamed", |
652162d4 SW |
577 | desc->mux_owner ? desc->mux_owner |
578 | : "(MUX UNCLAIMED)", | |
579 | desc->gpio_owner ? desc->gpio_owner | |
580 | : "(GPIO UNCLAIMED)", | |
1cf94c45 | 581 | is_hog ? " (HOG)" : ""); |
ba110d90 SW |
582 | |
583 | if (desc->mux_setting) | |
584 | seq_printf(s, " function %s group %s\n", | |
585 | pmxops->get_function_name(pctldev, | |
586 | desc->mux_setting->func), | |
587 | pctlops->get_group_name(pctldev, | |
588 | desc->mux_setting->group)); | |
589 | else | |
590 | seq_printf(s, "\n"); | |
2744e8af LW |
591 | } |
592 | ||
57b676f9 SW |
593 | mutex_unlock(&pinctrl_mutex); |
594 | ||
2744e8af LW |
595 | return 0; |
596 | } | |
597 | ||
1e2082b5 SW |
598 | void pinmux_show_map(struct seq_file *s, struct pinctrl_map const *map) |
599 | { | |
600 | seq_printf(s, "group %s\nfunction %s\n", | |
601 | map->data.mux.group ? map->data.mux.group : "(default)", | |
602 | map->data.mux.function); | |
603 | } | |
604 | ||
605 | void pinmux_show_setting(struct seq_file *s, | |
606 | struct pinctrl_setting const *setting) | |
2744e8af | 607 | { |
7ecdb16f SW |
608 | struct pinctrl_dev *pctldev = setting->pctldev; |
609 | const struct pinmux_ops *pmxops = pctldev->desc->pmxops; | |
610 | const struct pinctrl_ops *pctlops = pctldev->desc->pctlops; | |
611 | ||
1e2082b5 SW |
612 | seq_printf(s, "group: %s (%u) function: %s (%u)\n", |
613 | pctlops->get_group_name(pctldev, setting->data.mux.group), | |
614 | setting->data.mux.group, | |
615 | pmxops->get_function_name(pctldev, setting->data.mux.func), | |
616 | setting->data.mux.func); | |
2744e8af LW |
617 | } |
618 | ||
619 | static int pinmux_functions_open(struct inode *inode, struct file *file) | |
620 | { | |
621 | return single_open(file, pinmux_functions_show, inode->i_private); | |
622 | } | |
623 | ||
624 | static int pinmux_pins_open(struct inode *inode, struct file *file) | |
625 | { | |
626 | return single_open(file, pinmux_pins_show, inode->i_private); | |
627 | } | |
628 | ||
2744e8af LW |
629 | static const struct file_operations pinmux_functions_ops = { |
630 | .open = pinmux_functions_open, | |
631 | .read = seq_read, | |
632 | .llseek = seq_lseek, | |
633 | .release = single_release, | |
634 | }; | |
635 | ||
636 | static const struct file_operations pinmux_pins_ops = { | |
637 | .open = pinmux_pins_open, | |
638 | .read = seq_read, | |
639 | .llseek = seq_lseek, | |
640 | .release = single_release, | |
641 | }; | |
642 | ||
2744e8af LW |
643 | void pinmux_init_device_debugfs(struct dentry *devroot, |
644 | struct pinctrl_dev *pctldev) | |
645 | { | |
646 | debugfs_create_file("pinmux-functions", S_IFREG | S_IRUGO, | |
647 | devroot, pctldev, &pinmux_functions_ops); | |
648 | debugfs_create_file("pinmux-pins", S_IFREG | S_IRUGO, | |
649 | devroot, pctldev, &pinmux_pins_ops); | |
2744e8af LW |
650 | } |
651 | ||
652 | #endif /* CONFIG_DEBUG_FS */ |