Commit | Line | Data |
---|---|---|
2744e8af LW |
1 | /* |
2 | * Core driver for the pin muxing portions of the pin control subsystem | |
3 | * | |
e93bcee0 | 4 | * Copyright (C) 2011-2012 ST-Ericsson SA |
2744e8af LW |
5 | * Written on behalf of Linaro for ST-Ericsson |
6 | * Based on bits of regulator core, gpio core and clk core | |
7 | * | |
8 | * Author: Linus Walleij <linus.walleij@linaro.org> | |
9 | * | |
10 | * License terms: GNU General Public License (GPL) version 2 | |
11 | */ | |
12 | #define pr_fmt(fmt) "pinmux core: " fmt | |
13 | ||
14 | #include <linux/kernel.h> | |
15 | #include <linux/module.h> | |
16 | #include <linux/init.h> | |
17 | #include <linux/device.h> | |
18 | #include <linux/slab.h> | |
19 | #include <linux/radix-tree.h> | |
20 | #include <linux/err.h> | |
21 | #include <linux/list.h> | |
97607d15 | 22 | #include <linux/string.h> |
2744e8af LW |
23 | #include <linux/sysfs.h> |
24 | #include <linux/debugfs.h> | |
25 | #include <linux/seq_file.h> | |
26 | #include <linux/pinctrl/machine.h> | |
27 | #include <linux/pinctrl/pinmux.h> | |
28 | #include "core.h" | |
befe5bdf | 29 | #include "pinmux.h" |
2744e8af LW |
30 | |
31 | /** | |
32 | * struct pinmux_group - group list item for pinmux groups | |
33 | * @node: pinmux group list node | |
d4e31987 SW |
34 | * @func_selector: the function selector for the pinmux device handling |
35 | * this pinmux | |
2744e8af LW |
36 | * @group_selector: the group selector for this group |
37 | */ | |
38 | struct pinmux_group { | |
39 | struct list_head node; | |
d4e31987 | 40 | unsigned func_selector; |
2744e8af LW |
41 | unsigned group_selector; |
42 | }; | |
43 | ||
03665e0f SW |
44 | int pinmux_check_ops(struct pinctrl_dev *pctldev) |
45 | { | |
46 | const struct pinmux_ops *ops = pctldev->desc->pmxops; | |
47 | unsigned selector = 0; | |
48 | ||
49 | /* Check that we implement required operations */ | |
50 | if (!ops->list_functions || | |
51 | !ops->get_function_name || | |
52 | !ops->get_function_groups || | |
53 | !ops->enable || | |
54 | !ops->disable) | |
55 | return -EINVAL; | |
56 | ||
57 | /* Check that all functions registered have names */ | |
58 | while (ops->list_functions(pctldev, selector) >= 0) { | |
59 | const char *fname = ops->get_function_name(pctldev, | |
60 | selector); | |
61 | if (!fname) { | |
62 | pr_err("pinmux ops has no name for function%u\n", | |
63 | selector); | |
64 | return -EINVAL; | |
65 | } | |
66 | selector++; | |
67 | } | |
68 | ||
69 | return 0; | |
70 | } | |
71 | ||
2744e8af LW |
72 | /** |
73 | * pin_request() - request a single pin to be muxed in, typically for GPIO | |
74 | * @pin: the pin number in the global pin space | |
3cc70ed3 SW |
75 | * @owner: a representation of the owner of this pin; typically the device |
76 | * name that controls its mux function, or the requested GPIO name | |
2744e8af LW |
77 | * @gpio_range: the range matching the GPIO pin if this is a request for a |
78 | * single GPIO pin | |
79 | */ | |
80 | static int pin_request(struct pinctrl_dev *pctldev, | |
3cc70ed3 | 81 | int pin, const char *owner, |
2744e8af LW |
82 | struct pinctrl_gpio_range *gpio_range) |
83 | { | |
84 | struct pin_desc *desc; | |
85 | const struct pinmux_ops *ops = pctldev->desc->pmxops; | |
86 | int status = -EINVAL; | |
87 | ||
3cc70ed3 | 88 | dev_dbg(pctldev->dev, "request pin %d for %s\n", pin, owner); |
2744e8af | 89 | |
2744e8af LW |
90 | desc = pin_desc_get(pctldev, pin); |
91 | if (desc == NULL) { | |
51cd24ee | 92 | dev_err(pctldev->dev, |
2744e8af LW |
93 | "pin is not registered so it cannot be requested\n"); |
94 | goto out; | |
95 | } | |
96 | ||
3cc70ed3 | 97 | if (desc->owner && strcmp(desc->owner, owner)) { |
51cd24ee | 98 | dev_err(pctldev->dev, |
2744e8af LW |
99 | "pin already requested\n"); |
100 | goto out; | |
101 | } | |
3cc70ed3 | 102 | desc->owner = owner; |
2744e8af LW |
103 | |
104 | /* Let each pin increase references to this module */ | |
105 | if (!try_module_get(pctldev->owner)) { | |
51cd24ee | 106 | dev_err(pctldev->dev, |
2744e8af LW |
107 | "could not increase module refcount for pin %d\n", |
108 | pin); | |
109 | status = -EINVAL; | |
110 | goto out_free_pin; | |
111 | } | |
112 | ||
113 | /* | |
114 | * If there is no kind of request function for the pin we just assume | |
115 | * we got it by default and proceed. | |
116 | */ | |
3712a3c4 | 117 | if (gpio_range && ops->gpio_request_enable) |
2744e8af LW |
118 | /* This requests and enables a single GPIO pin */ |
119 | status = ops->gpio_request_enable(pctldev, gpio_range, pin); | |
120 | else if (ops->request) | |
121 | status = ops->request(pctldev, pin); | |
122 | else | |
123 | status = 0; | |
124 | ||
125 | if (status) | |
f9d41d7c | 126 | dev_err(pctldev->dev, "->request on device %s failed for pin %d\n", |
2744e8af LW |
127 | pctldev->desc->name, pin); |
128 | out_free_pin: | |
57b676f9 | 129 | if (status) |
3cc70ed3 | 130 | desc->owner = NULL; |
2744e8af LW |
131 | out: |
132 | if (status) | |
51cd24ee | 133 | dev_err(pctldev->dev, "pin-%d (%s) status %d\n", |
3cc70ed3 | 134 | pin, owner, status); |
2744e8af LW |
135 | |
136 | return status; | |
137 | } | |
138 | ||
139 | /** | |
140 | * pin_free() - release a single muxed in pin so something else can be muxed | |
141 | * @pctldev: pin controller device handling this pin | |
142 | * @pin: the pin to free | |
3712a3c4 SW |
143 | * @gpio_range: the range matching the GPIO pin if this is a request for a |
144 | * single GPIO pin | |
336cdba0 | 145 | * |
3cc70ed3 SW |
146 | * This function returns a pointer to the previous owner. This is used |
147 | * for callers that dynamically allocate an owner name so it can be freed | |
336cdba0 | 148 | * once the pin is free. This is done for GPIO request functions. |
2744e8af | 149 | */ |
3712a3c4 SW |
150 | static const char *pin_free(struct pinctrl_dev *pctldev, int pin, |
151 | struct pinctrl_gpio_range *gpio_range) | |
2744e8af LW |
152 | { |
153 | const struct pinmux_ops *ops = pctldev->desc->pmxops; | |
154 | struct pin_desc *desc; | |
3cc70ed3 | 155 | const char *owner; |
2744e8af LW |
156 | |
157 | desc = pin_desc_get(pctldev, pin); | |
158 | if (desc == NULL) { | |
51cd24ee | 159 | dev_err(pctldev->dev, |
2744e8af | 160 | "pin is not registered so it cannot be freed\n"); |
3712a3c4 | 161 | return NULL; |
2744e8af LW |
162 | } |
163 | ||
3712a3c4 SW |
164 | /* |
165 | * If there is no kind of request function for the pin we just assume | |
166 | * we got it by default and proceed. | |
167 | */ | |
168 | if (gpio_range && ops->gpio_disable_free) | |
169 | ops->gpio_disable_free(pctldev, gpio_range, pin); | |
170 | else if (ops->free) | |
2744e8af LW |
171 | ops->free(pctldev, pin); |
172 | ||
3cc70ed3 SW |
173 | owner = desc->owner; |
174 | desc->owner = NULL; | |
2744e8af | 175 | module_put(pctldev->owner); |
3712a3c4 | 176 | |
3cc70ed3 | 177 | return owner; |
2744e8af LW |
178 | } |
179 | ||
180 | /** | |
befe5bdf LW |
181 | * pinmux_request_gpio() - request pinmuxing for a GPIO pin |
182 | * @pctldev: pin controller device affected | |
183 | * @pin: the pin to mux in for GPIO | |
184 | * @range: the applicable GPIO range | |
2744e8af | 185 | */ |
befe5bdf LW |
186 | int pinmux_request_gpio(struct pinctrl_dev *pctldev, |
187 | struct pinctrl_gpio_range *range, | |
188 | unsigned pin, unsigned gpio) | |
2744e8af LW |
189 | { |
190 | char gpiostr[16]; | |
3cc70ed3 | 191 | const char *owner; |
2744e8af | 192 | int ret; |
2744e8af LW |
193 | |
194 | /* Conjure some name stating what chip and pin this is taken by */ | |
195 | snprintf(gpiostr, 15, "%s:%d", range->name, gpio); | |
196 | ||
3cc70ed3 SW |
197 | owner = kstrdup(gpiostr, GFP_KERNEL); |
198 | if (!owner) | |
5d2eaf80 SW |
199 | return -EINVAL; |
200 | ||
3cc70ed3 | 201 | ret = pin_request(pctldev, pin, owner, range); |
5d2eaf80 | 202 | if (ret < 0) |
3cc70ed3 | 203 | kfree(owner); |
5d2eaf80 SW |
204 | |
205 | return ret; | |
2744e8af | 206 | } |
2744e8af LW |
207 | |
208 | /** | |
befe5bdf LW |
209 | * pinmux_free_gpio() - release a pin from GPIO muxing |
210 | * @pctldev: the pin controller device for the pin | |
211 | * @pin: the affected currently GPIO-muxed in pin | |
212 | * @range: applicable GPIO range | |
2744e8af | 213 | */ |
befe5bdf LW |
214 | void pinmux_free_gpio(struct pinctrl_dev *pctldev, unsigned pin, |
215 | struct pinctrl_gpio_range *range) | |
2744e8af | 216 | { |
3cc70ed3 | 217 | const char *owner; |
2744e8af | 218 | |
3cc70ed3 SW |
219 | owner = pin_free(pctldev, pin, range); |
220 | kfree(owner); | |
2744e8af | 221 | } |
2744e8af | 222 | |
befe5bdf LW |
223 | /** |
224 | * pinmux_gpio_direction() - set the direction of a single muxed-in GPIO pin | |
225 | * @pctldev: the pin controller handling this pin | |
226 | * @range: applicable GPIO range | |
227 | * @pin: the affected GPIO pin in this controller | |
228 | * @input: true if we set the pin as input, false for output | |
229 | */ | |
230 | int pinmux_gpio_direction(struct pinctrl_dev *pctldev, | |
231 | struct pinctrl_gpio_range *range, | |
232 | unsigned pin, bool input) | |
542e704f | 233 | { |
542e704f LW |
234 | const struct pinmux_ops *ops; |
235 | int ret; | |
542e704f LW |
236 | |
237 | ops = pctldev->desc->pmxops; | |
238 | ||
542e704f LW |
239 | if (ops->gpio_set_direction) |
240 | ret = ops->gpio_set_direction(pctldev, range, pin, input); | |
241 | else | |
242 | ret = 0; | |
243 | ||
244 | return ret; | |
245 | } | |
246 | ||
2744e8af | 247 | /** |
de849eec | 248 | * acquire_pins() - acquire all the pins for a certain function on a pinmux |
2744e8af | 249 | * @pctldev: the device to take the pins on |
3cc70ed3 SW |
250 | * @owner: a representation of the owner of this pin; typically the device |
251 | * name that controls its mux function | |
2744e8af LW |
252 | * @group_selector: the group selector containing the pins to acquire |
253 | */ | |
254 | static int acquire_pins(struct pinctrl_dev *pctldev, | |
3cc70ed3 | 255 | const char *owner, |
2744e8af LW |
256 | unsigned group_selector) |
257 | { | |
258 | const struct pinctrl_ops *pctlops = pctldev->desc->pctlops; | |
a5818a8b | 259 | const unsigned *pins; |
2744e8af LW |
260 | unsigned num_pins; |
261 | int ret; | |
262 | int i; | |
263 | ||
264 | ret = pctlops->get_group_pins(pctldev, group_selector, | |
265 | &pins, &num_pins); | |
266 | if (ret) | |
267 | return ret; | |
268 | ||
51cd24ee | 269 | dev_dbg(pctldev->dev, "requesting the %u pins from group %u\n", |
2744e8af LW |
270 | num_pins, group_selector); |
271 | ||
272 | /* Try to allocate all pins in this group, one by one */ | |
273 | for (i = 0; i < num_pins; i++) { | |
3cc70ed3 | 274 | ret = pin_request(pctldev, pins[i], owner, NULL); |
2744e8af | 275 | if (ret) { |
51cd24ee | 276 | dev_err(pctldev->dev, |
3cc70ed3 SW |
277 | "could not get request pin %d on device %s - conflicting mux mappings?\n", |
278 | pins[i], | |
2744e8af LW |
279 | pinctrl_dev_get_name(pctldev)); |
280 | /* On error release all taken pins */ | |
281 | i--; /* this pin just failed */ | |
282 | for (; i >= 0; i--) | |
3712a3c4 | 283 | pin_free(pctldev, pins[i], NULL); |
2744e8af LW |
284 | return -ENODEV; |
285 | } | |
286 | } | |
287 | return 0; | |
288 | } | |
289 | ||
290 | /** | |
291 | * release_pins() - release pins taken by earlier acquirement | |
de849eec | 292 | * @pctldev: the device to free the pins on |
2744e8af LW |
293 | * @group_selector: the group selector containing the pins to free |
294 | */ | |
295 | static void release_pins(struct pinctrl_dev *pctldev, | |
296 | unsigned group_selector) | |
297 | { | |
298 | const struct pinctrl_ops *pctlops = pctldev->desc->pctlops; | |
a5818a8b | 299 | const unsigned *pins; |
2744e8af LW |
300 | unsigned num_pins; |
301 | int ret; | |
302 | int i; | |
303 | ||
304 | ret = pctlops->get_group_pins(pctldev, group_selector, | |
305 | &pins, &num_pins); | |
306 | if (ret) { | |
f9d41d7c | 307 | dev_err(pctldev->dev, "could not get pins to release for group selector %d\n", |
2744e8af LW |
308 | group_selector); |
309 | return; | |
310 | } | |
311 | for (i = 0; i < num_pins; i++) | |
3712a3c4 | 312 | pin_free(pctldev, pins[i], NULL); |
2744e8af LW |
313 | } |
314 | ||
2744e8af LW |
315 | /** |
316 | * pinmux_check_pin_group() - check function and pin group combo | |
317 | * @pctldev: device to check the pin group vs function for | |
318 | * @func_selector: the function selector to check the pin group for, we have | |
319 | * already looked this up in the calling function | |
320 | * @pin_group: the pin group to match to the function | |
321 | * | |
322 | * This function will check that the pinmux driver can supply the | |
323 | * selected pin group for a certain function, returns the group selector if | |
324 | * the group and function selector will work fine together, else returns | |
325 | * negative | |
326 | */ | |
327 | static int pinmux_check_pin_group(struct pinctrl_dev *pctldev, | |
328 | unsigned func_selector, | |
329 | const char *pin_group) | |
330 | { | |
331 | const struct pinmux_ops *pmxops = pctldev->desc->pmxops; | |
332 | const struct pinctrl_ops *pctlops = pctldev->desc->pctlops; | |
333 | int ret; | |
334 | ||
335 | /* | |
336 | * If the driver does not support different pin groups for the | |
337 | * functions, we only support group 0, and assume this exists. | |
338 | */ | |
339 | if (!pctlops || !pctlops->list_groups) | |
340 | return 0; | |
341 | ||
342 | /* | |
343 | * Passing NULL (no specific group) will select the first and | |
344 | * hopefully only group of pins available for this function. | |
345 | */ | |
346 | if (!pin_group) { | |
347 | char const * const *groups; | |
348 | unsigned num_groups; | |
349 | ||
350 | ret = pmxops->get_function_groups(pctldev, func_selector, | |
351 | &groups, &num_groups); | |
352 | if (ret) | |
353 | return ret; | |
354 | if (num_groups < 1) | |
355 | return -EINVAL; | |
7afde8ba | 356 | ret = pinctrl_get_group_selector(pctldev, groups[0]); |
2744e8af | 357 | if (ret < 0) { |
51cd24ee | 358 | dev_err(pctldev->dev, |
f9d41d7c | 359 | "function %s wants group %s but the pin controller does not seem to have that group\n", |
2744e8af LW |
360 | pmxops->get_function_name(pctldev, func_selector), |
361 | groups[0]); | |
362 | return ret; | |
363 | } | |
364 | ||
365 | if (num_groups > 1) | |
51cd24ee | 366 | dev_dbg(pctldev->dev, |
f9d41d7c | 367 | "function %s support more than one group, default-selecting first group %s (%d)\n", |
2744e8af LW |
368 | pmxops->get_function_name(pctldev, func_selector), |
369 | groups[0], | |
370 | ret); | |
371 | ||
372 | return ret; | |
373 | } | |
374 | ||
51cd24ee | 375 | dev_dbg(pctldev->dev, |
2744e8af LW |
376 | "check if we have pin group %s on controller %s\n", |
377 | pin_group, pinctrl_dev_get_name(pctldev)); | |
378 | ||
7afde8ba | 379 | ret = pinctrl_get_group_selector(pctldev, pin_group); |
2744e8af | 380 | if (ret < 0) { |
51cd24ee | 381 | dev_dbg(pctldev->dev, |
2744e8af LW |
382 | "%s does not support pin group %s with function %s\n", |
383 | pinctrl_dev_get_name(pctldev), | |
384 | pin_group, | |
385 | pmxops->get_function_name(pctldev, func_selector)); | |
386 | } | |
387 | return ret; | |
388 | } | |
389 | ||
390 | /** | |
391 | * pinmux_search_function() - check pin control driver for a certain function | |
392 | * @pctldev: device to check for function and position | |
393 | * @map: function map containing the function and position to look for | |
394 | * @func_selector: returns the applicable function selector if found | |
395 | * @group_selector: returns the applicable group selector if found | |
396 | * | |
397 | * This will search the pinmux driver for an applicable | |
398 | * function with a specific pin group, returns 0 if these can be mapped | |
399 | * negative otherwise | |
400 | */ | |
401 | static int pinmux_search_function(struct pinctrl_dev *pctldev, | |
e93bcee0 | 402 | struct pinctrl_map const *map, |
2744e8af LW |
403 | unsigned *func_selector, |
404 | unsigned *group_selector) | |
405 | { | |
406 | const struct pinmux_ops *ops = pctldev->desc->pmxops; | |
407 | unsigned selector = 0; | |
408 | ||
409 | /* See if this pctldev has this function */ | |
410 | while (ops->list_functions(pctldev, selector) >= 0) { | |
411 | const char *fname = ops->get_function_name(pctldev, | |
412 | selector); | |
413 | int ret; | |
414 | ||
415 | if (!strcmp(map->function, fname)) { | |
416 | /* Found the function, check pin group */ | |
417 | ret = pinmux_check_pin_group(pctldev, selector, | |
418 | map->group); | |
419 | if (ret < 0) | |
420 | return ret; | |
421 | ||
422 | /* This function and group selector can be used */ | |
423 | *func_selector = selector; | |
424 | *group_selector = ret; | |
425 | return 0; | |
426 | ||
427 | } | |
428 | selector++; | |
429 | } | |
430 | ||
431 | pr_err("%s does not support function %s\n", | |
432 | pinctrl_dev_get_name(pctldev), map->function); | |
433 | return -EINVAL; | |
434 | } | |
435 | ||
436 | /** | |
437 | * pinmux_enable_muxmap() - enable a map entry for a certain pinmux | |
438 | */ | |
439 | static int pinmux_enable_muxmap(struct pinctrl_dev *pctldev, | |
e93bcee0 | 440 | struct pinctrl *p, |
2744e8af LW |
441 | struct device *dev, |
442 | const char *devname, | |
e93bcee0 | 443 | struct pinctrl_map const *map) |
2744e8af LW |
444 | { |
445 | unsigned func_selector; | |
446 | unsigned group_selector; | |
447 | struct pinmux_group *grp; | |
448 | int ret; | |
449 | ||
450 | /* | |
451 | * Note that we're not locking the pinmux mutex here, because | |
452 | * this is only called at pinmux initialization time when it | |
453 | * has not been added to any list and thus is not reachable | |
454 | * by anyone else. | |
455 | */ | |
456 | ||
e93bcee0 | 457 | if (p->pctldev && p->pctldev != pctldev) { |
51cd24ee | 458 | dev_err(pctldev->dev, |
f9d41d7c UKK |
459 | "different pin control devices given for device %s, function %s\n", |
460 | devname, map->function); | |
2744e8af LW |
461 | return -EINVAL; |
462 | } | |
e93bcee0 LW |
463 | p->dev = dev; |
464 | p->pctldev = pctldev; | |
2744e8af LW |
465 | |
466 | /* Now go into the driver and try to match a function and group */ | |
467 | ret = pinmux_search_function(pctldev, map, &func_selector, | |
468 | &group_selector); | |
469 | if (ret < 0) | |
470 | return ret; | |
471 | ||
2744e8af | 472 | /* Now add this group selector, we may have many of them */ |
02f5b989 | 473 | grp = kmalloc(sizeof(*grp), GFP_KERNEL); |
2744e8af LW |
474 | if (!grp) |
475 | return -ENOMEM; | |
d4e31987 | 476 | grp->func_selector = func_selector; |
2744e8af | 477 | grp->group_selector = group_selector; |
3cc70ed3 | 478 | ret = acquire_pins(pctldev, devname, group_selector); |
2744e8af LW |
479 | if (ret) { |
480 | kfree(grp); | |
481 | return ret; | |
482 | } | |
8b9c139f | 483 | list_add_tail(&grp->node, &p->groups); |
2744e8af LW |
484 | |
485 | return 0; | |
486 | } | |
487 | ||
2744e8af | 488 | /** |
befe5bdf | 489 | * pinmux_apply_muxmap() - apply a certain mux mapping entry |
2744e8af | 490 | */ |
befe5bdf LW |
491 | int pinmux_apply_muxmap(struct pinctrl_dev *pctldev, |
492 | struct pinctrl *p, | |
493 | struct device *dev, | |
494 | const char *devname, | |
495 | struct pinctrl_map const *map) | |
2744e8af | 496 | { |
befe5bdf | 497 | int ret; |
2744e8af | 498 | |
befe5bdf LW |
499 | ret = pinmux_enable_muxmap(pctldev, p, dev, |
500 | devname, map); | |
501 | if (ret) { | |
502 | pinmux_put(p); | |
503 | return ret; | |
2744e8af LW |
504 | } |
505 | ||
befe5bdf | 506 | return 0; |
2744e8af | 507 | } |
2744e8af LW |
508 | |
509 | /** | |
befe5bdf | 510 | * pinmux_put() - free up the pinmux portions of a pin controller handle |
2744e8af | 511 | */ |
befe5bdf | 512 | void pinmux_put(struct pinctrl *p) |
2744e8af | 513 | { |
befe5bdf | 514 | struct list_head *node, *tmp; |
2744e8af | 515 | |
befe5bdf LW |
516 | list_for_each_safe(node, tmp, &p->groups) { |
517 | struct pinmux_group *grp = | |
518 | list_entry(node, struct pinmux_group, node); | |
519 | /* Release all pins taken by this group */ | |
520 | release_pins(p->pctldev, grp->group_selector); | |
521 | list_del(node); | |
522 | kfree(grp); | |
523 | } | |
2744e8af | 524 | } |
2744e8af LW |
525 | |
526 | /** | |
befe5bdf | 527 | * pinmux_enable() - enable the pinmux portion of a pin control handle |
2744e8af | 528 | */ |
befe5bdf | 529 | int pinmux_enable(struct pinctrl *p) |
2744e8af | 530 | { |
befe5bdf LW |
531 | struct pinctrl_dev *pctldev = p->pctldev; |
532 | const struct pinmux_ops *ops = pctldev->desc->pmxops; | |
533 | struct pinmux_group *grp; | |
534 | int ret; | |
2744e8af | 535 | |
befe5bdf | 536 | list_for_each_entry(grp, &p->groups, node) { |
d4e31987 | 537 | ret = ops->enable(pctldev, grp->func_selector, |
befe5bdf LW |
538 | grp->group_selector); |
539 | if (ret) | |
540 | /* | |
541 | * TODO: call disable() on all groups we called | |
542 | * enable() on to this point? | |
543 | */ | |
544 | return ret; | |
2744e8af | 545 | } |
befe5bdf | 546 | return 0; |
2744e8af | 547 | } |
2744e8af LW |
548 | |
549 | /** | |
befe5bdf | 550 | * pinmux_disable() - disable the pinmux portions of a pin control handle |
2744e8af | 551 | */ |
befe5bdf | 552 | void pinmux_disable(struct pinctrl *p) |
2744e8af | 553 | { |
befe5bdf LW |
554 | struct pinctrl_dev *pctldev = p->pctldev; |
555 | const struct pinmux_ops *ops = pctldev->desc->pmxops; | |
556 | struct pinmux_group *grp; | |
2744e8af | 557 | |
befe5bdf | 558 | list_for_each_entry(grp, &p->groups, node) { |
d4e31987 | 559 | ops->disable(pctldev, grp->func_selector, |
befe5bdf | 560 | grp->group_selector); |
2744e8af | 561 | } |
2744e8af | 562 | } |
2744e8af | 563 | |
2744e8af LW |
564 | #ifdef CONFIG_DEBUG_FS |
565 | ||
566 | /* Called from pincontrol core */ | |
567 | static int pinmux_functions_show(struct seq_file *s, void *what) | |
568 | { | |
569 | struct pinctrl_dev *pctldev = s->private; | |
570 | const struct pinmux_ops *pmxops = pctldev->desc->pmxops; | |
571 | unsigned func_selector = 0; | |
572 | ||
57b676f9 SW |
573 | mutex_lock(&pinctrl_mutex); |
574 | ||
2744e8af LW |
575 | while (pmxops->list_functions(pctldev, func_selector) >= 0) { |
576 | const char *func = pmxops->get_function_name(pctldev, | |
577 | func_selector); | |
578 | const char * const *groups; | |
579 | unsigned num_groups; | |
580 | int ret; | |
581 | int i; | |
582 | ||
583 | ret = pmxops->get_function_groups(pctldev, func_selector, | |
584 | &groups, &num_groups); | |
585 | if (ret) | |
586 | seq_printf(s, "function %s: COULD NOT GET GROUPS\n", | |
587 | func); | |
588 | ||
589 | seq_printf(s, "function: %s, groups = [ ", func); | |
590 | for (i = 0; i < num_groups; i++) | |
591 | seq_printf(s, "%s ", groups[i]); | |
592 | seq_puts(s, "]\n"); | |
593 | ||
594 | func_selector++; | |
2744e8af LW |
595 | } |
596 | ||
57b676f9 SW |
597 | mutex_unlock(&pinctrl_mutex); |
598 | ||
2744e8af LW |
599 | return 0; |
600 | } | |
601 | ||
602 | static int pinmux_pins_show(struct seq_file *s, void *what) | |
603 | { | |
604 | struct pinctrl_dev *pctldev = s->private; | |
706e8520 | 605 | unsigned i, pin; |
2744e8af LW |
606 | |
607 | seq_puts(s, "Pinmux settings per pin\n"); | |
3cc70ed3 | 608 | seq_puts(s, "Format: pin (name): owner\n"); |
2744e8af | 609 | |
57b676f9 SW |
610 | mutex_lock(&pinctrl_mutex); |
611 | ||
706e8520 CP |
612 | /* The pin number can be retrived from the pin controller descriptor */ |
613 | for (i = 0; i < pctldev->desc->npins; i++) { | |
2744e8af | 614 | struct pin_desc *desc; |
1cf94c45 | 615 | bool is_hog = false; |
2744e8af | 616 | |
706e8520 | 617 | pin = pctldev->desc->pins[i].number; |
2744e8af | 618 | desc = pin_desc_get(pctldev, pin); |
706e8520 | 619 | /* Skip if we cannot search the pin */ |
2744e8af LW |
620 | if (desc == NULL) |
621 | continue; | |
622 | ||
1cf94c45 LW |
623 | if (desc->owner && |
624 | !strcmp(desc->owner, pinctrl_dev_get_name(pctldev))) | |
625 | is_hog = true; | |
626 | ||
627 | seq_printf(s, "pin %d (%s): %s%s\n", pin, | |
2744e8af | 628 | desc->name ? desc->name : "unnamed", |
1cf94c45 LW |
629 | desc->owner ? desc->owner : "UNCLAIMED", |
630 | is_hog ? " (HOG)" : ""); | |
2744e8af LW |
631 | } |
632 | ||
57b676f9 SW |
633 | mutex_unlock(&pinctrl_mutex); |
634 | ||
2744e8af LW |
635 | return 0; |
636 | } | |
637 | ||
befe5bdf | 638 | void pinmux_dbg_show(struct seq_file *s, struct pinctrl *p) |
2744e8af | 639 | { |
befe5bdf LW |
640 | struct pinctrl_dev *pctldev = p->pctldev; |
641 | const struct pinmux_ops *pmxops; | |
642 | const struct pinctrl_ops *pctlops; | |
643 | struct pinmux_group *grp; | |
d4e31987 | 644 | const char *sep = ""; |
2744e8af | 645 | |
befe5bdf LW |
646 | pmxops = pctldev->desc->pmxops; |
647 | pctlops = pctldev->desc->pctlops; | |
2744e8af | 648 | |
befe5bdf LW |
649 | seq_printf(s, " groups: ["); |
650 | list_for_each_entry(grp, &p->groups, node) { | |
d4e31987 SW |
651 | seq_printf(s, "%s%s (%u)=%s (%u)", |
652 | sep, | |
befe5bdf LW |
653 | pctlops->get_group_name(pctldev, |
654 | grp->group_selector), | |
d4e31987 SW |
655 | grp->group_selector, |
656 | pmxops->get_function_name(pctldev, | |
657 | grp->func_selector), | |
658 | grp->func_selector); | |
659 | sep = ", "; | |
2744e8af | 660 | } |
befe5bdf | 661 | seq_printf(s, " ]"); |
2744e8af LW |
662 | } |
663 | ||
664 | static int pinmux_functions_open(struct inode *inode, struct file *file) | |
665 | { | |
666 | return single_open(file, pinmux_functions_show, inode->i_private); | |
667 | } | |
668 | ||
669 | static int pinmux_pins_open(struct inode *inode, struct file *file) | |
670 | { | |
671 | return single_open(file, pinmux_pins_show, inode->i_private); | |
672 | } | |
673 | ||
2744e8af LW |
674 | static const struct file_operations pinmux_functions_ops = { |
675 | .open = pinmux_functions_open, | |
676 | .read = seq_read, | |
677 | .llseek = seq_lseek, | |
678 | .release = single_release, | |
679 | }; | |
680 | ||
681 | static const struct file_operations pinmux_pins_ops = { | |
682 | .open = pinmux_pins_open, | |
683 | .read = seq_read, | |
684 | .llseek = seq_lseek, | |
685 | .release = single_release, | |
686 | }; | |
687 | ||
2744e8af LW |
688 | void pinmux_init_device_debugfs(struct dentry *devroot, |
689 | struct pinctrl_dev *pctldev) | |
690 | { | |
691 | debugfs_create_file("pinmux-functions", S_IFREG | S_IRUGO, | |
692 | devroot, pctldev, &pinmux_functions_ops); | |
693 | debugfs_create_file("pinmux-pins", S_IFREG | S_IRUGO, | |
694 | devroot, pctldev, &pinmux_pins_ops); | |
2744e8af LW |
695 | } |
696 | ||
697 | #endif /* CONFIG_DEBUG_FS */ |