Commit | Line | Data |
---|---|---|
2744e8af LW |
1 | /* |
2 | * Core driver for the pin muxing portions of the pin control subsystem | |
3 | * | |
e93bcee0 | 4 | * Copyright (C) 2011-2012 ST-Ericsson SA |
2744e8af LW |
5 | * Written on behalf of Linaro for ST-Ericsson |
6 | * Based on bits of regulator core, gpio core and clk core | |
7 | * | |
8 | * Author: Linus Walleij <linus.walleij@linaro.org> | |
9 | * | |
7ecdb16f SW |
10 | * Copyright (C) 2012 NVIDIA CORPORATION. All rights reserved. |
11 | * | |
2744e8af LW |
12 | * License terms: GNU General Public License (GPL) version 2 |
13 | */ | |
14 | #define pr_fmt(fmt) "pinmux core: " fmt | |
15 | ||
16 | #include <linux/kernel.h> | |
17 | #include <linux/module.h> | |
18 | #include <linux/init.h> | |
19 | #include <linux/device.h> | |
20 | #include <linux/slab.h> | |
21 | #include <linux/radix-tree.h> | |
22 | #include <linux/err.h> | |
23 | #include <linux/list.h> | |
97607d15 | 24 | #include <linux/string.h> |
2744e8af LW |
25 | #include <linux/sysfs.h> |
26 | #include <linux/debugfs.h> | |
27 | #include <linux/seq_file.h> | |
28 | #include <linux/pinctrl/machine.h> | |
29 | #include <linux/pinctrl/pinmux.h> | |
30 | #include "core.h" | |
befe5bdf | 31 | #include "pinmux.h" |
2744e8af | 32 | |
03665e0f SW |
33 | int pinmux_check_ops(struct pinctrl_dev *pctldev) |
34 | { | |
35 | const struct pinmux_ops *ops = pctldev->desc->pmxops; | |
a1d31f71 | 36 | unsigned nfuncs; |
03665e0f SW |
37 | unsigned selector = 0; |
38 | ||
39 | /* Check that we implement required operations */ | |
a1d31f71 DA |
40 | if (!ops || |
41 | !ops->get_functions_count || | |
03665e0f SW |
42 | !ops->get_function_name || |
43 | !ops->get_function_groups || | |
44 | !ops->enable || | |
ad6e1107 JC |
45 | !ops->disable) { |
46 | dev_err(pctldev->dev, "pinmux ops lacks necessary functions\n"); | |
03665e0f | 47 | return -EINVAL; |
ad6e1107 | 48 | } |
03665e0f | 49 | /* Check that all functions registered have names */ |
a1d31f71 | 50 | nfuncs = ops->get_functions_count(pctldev); |
d1e90e9e | 51 | while (selector < nfuncs) { |
03665e0f SW |
52 | const char *fname = ops->get_function_name(pctldev, |
53 | selector); | |
54 | if (!fname) { | |
a1d31f71 | 55 | dev_err(pctldev->dev, "pinmux ops has no name for function%u\n", |
03665e0f SW |
56 | selector); |
57 | return -EINVAL; | |
58 | } | |
59 | selector++; | |
60 | } | |
61 | ||
62 | return 0; | |
63 | } | |
64 | ||
1e2082b5 SW |
65 | int pinmux_validate_map(struct pinctrl_map const *map, int i) |
66 | { | |
67 | if (!map->data.mux.function) { | |
68 | pr_err("failed to register map %s (%d): no function given\n", | |
69 | map->name, i); | |
70 | return -EINVAL; | |
71 | } | |
72 | ||
73 | return 0; | |
74 | } | |
75 | ||
2744e8af LW |
76 | /** |
77 | * pin_request() - request a single pin to be muxed in, typically for GPIO | |
78 | * @pin: the pin number in the global pin space | |
3cc70ed3 SW |
79 | * @owner: a representation of the owner of this pin; typically the device |
80 | * name that controls its mux function, or the requested GPIO name | |
2744e8af LW |
81 | * @gpio_range: the range matching the GPIO pin if this is a request for a |
82 | * single GPIO pin | |
83 | */ | |
84 | static int pin_request(struct pinctrl_dev *pctldev, | |
3cc70ed3 | 85 | int pin, const char *owner, |
2744e8af LW |
86 | struct pinctrl_gpio_range *gpio_range) |
87 | { | |
88 | struct pin_desc *desc; | |
89 | const struct pinmux_ops *ops = pctldev->desc->pmxops; | |
90 | int status = -EINVAL; | |
91 | ||
2744e8af LW |
92 | desc = pin_desc_get(pctldev, pin); |
93 | if (desc == NULL) { | |
51cd24ee | 94 | dev_err(pctldev->dev, |
d4705316 SW |
95 | "pin %d is not registered so it cannot be requested\n", |
96 | pin); | |
2744e8af LW |
97 | goto out; |
98 | } | |
99 | ||
d0bd8df5 DA |
100 | dev_dbg(pctldev->dev, "request pin %d (%s) for %s\n", |
101 | pin, desc->name, owner); | |
102 | ||
652162d4 SW |
103 | if (gpio_range) { |
104 | /* There's no need to support multiple GPIO requests */ | |
105 | if (desc->gpio_owner) { | |
106 | dev_err(pctldev->dev, | |
d4705316 SW |
107 | "pin %s already requested by %s; cannot claim for %s\n", |
108 | desc->name, desc->gpio_owner, owner); | |
652162d4 SW |
109 | goto out; |
110 | } | |
0e3db173 | 111 | |
652162d4 SW |
112 | desc->gpio_owner = owner; |
113 | } else { | |
114 | if (desc->mux_usecount && strcmp(desc->mux_owner, owner)) { | |
115 | dev_err(pctldev->dev, | |
d4705316 SW |
116 | "pin %s already requested by %s; cannot claim for %s\n", |
117 | desc->name, desc->mux_owner, owner); | |
652162d4 SW |
118 | goto out; |
119 | } | |
0e3db173 | 120 | |
652162d4 SW |
121 | desc->mux_usecount++; |
122 | if (desc->mux_usecount > 1) | |
123 | return 0; | |
124 | ||
125 | desc->mux_owner = owner; | |
126 | } | |
2744e8af LW |
127 | |
128 | /* Let each pin increase references to this module */ | |
129 | if (!try_module_get(pctldev->owner)) { | |
51cd24ee | 130 | dev_err(pctldev->dev, |
2744e8af LW |
131 | "could not increase module refcount for pin %d\n", |
132 | pin); | |
133 | status = -EINVAL; | |
134 | goto out_free_pin; | |
135 | } | |
136 | ||
137 | /* | |
138 | * If there is no kind of request function for the pin we just assume | |
139 | * we got it by default and proceed. | |
140 | */ | |
3712a3c4 | 141 | if (gpio_range && ops->gpio_request_enable) |
2744e8af LW |
142 | /* This requests and enables a single GPIO pin */ |
143 | status = ops->gpio_request_enable(pctldev, gpio_range, pin); | |
144 | else if (ops->request) | |
145 | status = ops->request(pctldev, pin); | |
146 | else | |
147 | status = 0; | |
148 | ||
0e3db173 | 149 | if (status) { |
d4705316 | 150 | dev_err(pctldev->dev, "request() failed for pin %d\n", pin); |
0e3db173 SW |
151 | module_put(pctldev->owner); |
152 | } | |
153 | ||
2744e8af | 154 | out_free_pin: |
0e3db173 | 155 | if (status) { |
652162d4 SW |
156 | if (gpio_range) { |
157 | desc->gpio_owner = NULL; | |
158 | } else { | |
159 | desc->mux_usecount--; | |
160 | if (!desc->mux_usecount) | |
161 | desc->mux_owner = NULL; | |
162 | } | |
0e3db173 | 163 | } |
2744e8af LW |
164 | out: |
165 | if (status) | |
51cd24ee | 166 | dev_err(pctldev->dev, "pin-%d (%s) status %d\n", |
d4705316 | 167 | pin, owner, status); |
2744e8af LW |
168 | |
169 | return status; | |
170 | } | |
171 | ||
172 | /** | |
173 | * pin_free() - release a single muxed in pin so something else can be muxed | |
174 | * @pctldev: pin controller device handling this pin | |
175 | * @pin: the pin to free | |
3712a3c4 SW |
176 | * @gpio_range: the range matching the GPIO pin if this is a request for a |
177 | * single GPIO pin | |
336cdba0 | 178 | * |
3cc70ed3 SW |
179 | * This function returns a pointer to the previous owner. This is used |
180 | * for callers that dynamically allocate an owner name so it can be freed | |
336cdba0 | 181 | * once the pin is free. This is done for GPIO request functions. |
2744e8af | 182 | */ |
3712a3c4 SW |
183 | static const char *pin_free(struct pinctrl_dev *pctldev, int pin, |
184 | struct pinctrl_gpio_range *gpio_range) | |
2744e8af LW |
185 | { |
186 | const struct pinmux_ops *ops = pctldev->desc->pmxops; | |
187 | struct pin_desc *desc; | |
3cc70ed3 | 188 | const char *owner; |
2744e8af LW |
189 | |
190 | desc = pin_desc_get(pctldev, pin); | |
191 | if (desc == NULL) { | |
51cd24ee | 192 | dev_err(pctldev->dev, |
2744e8af | 193 | "pin is not registered so it cannot be freed\n"); |
3712a3c4 | 194 | return NULL; |
2744e8af LW |
195 | } |
196 | ||
652162d4 SW |
197 | if (!gpio_range) { |
198 | desc->mux_usecount--; | |
199 | if (desc->mux_usecount) | |
200 | return NULL; | |
201 | } | |
0e3db173 | 202 | |
3712a3c4 SW |
203 | /* |
204 | * If there is no kind of request function for the pin we just assume | |
205 | * we got it by default and proceed. | |
206 | */ | |
207 | if (gpio_range && ops->gpio_disable_free) | |
208 | ops->gpio_disable_free(pctldev, gpio_range, pin); | |
209 | else if (ops->free) | |
2744e8af LW |
210 | ops->free(pctldev, pin); |
211 | ||
652162d4 SW |
212 | if (gpio_range) { |
213 | owner = desc->gpio_owner; | |
214 | desc->gpio_owner = NULL; | |
215 | } else { | |
216 | owner = desc->mux_owner; | |
217 | desc->mux_owner = NULL; | |
218 | desc->mux_setting = NULL; | |
219 | } | |
220 | ||
2744e8af | 221 | module_put(pctldev->owner); |
3712a3c4 | 222 | |
3cc70ed3 | 223 | return owner; |
2744e8af LW |
224 | } |
225 | ||
226 | /** | |
befe5bdf LW |
227 | * pinmux_request_gpio() - request pinmuxing for a GPIO pin |
228 | * @pctldev: pin controller device affected | |
229 | * @pin: the pin to mux in for GPIO | |
230 | * @range: the applicable GPIO range | |
2744e8af | 231 | */ |
befe5bdf LW |
232 | int pinmux_request_gpio(struct pinctrl_dev *pctldev, |
233 | struct pinctrl_gpio_range *range, | |
234 | unsigned pin, unsigned gpio) | |
2744e8af LW |
235 | { |
236 | char gpiostr[16]; | |
3cc70ed3 | 237 | const char *owner; |
2744e8af | 238 | int ret; |
2744e8af LW |
239 | |
240 | /* Conjure some name stating what chip and pin this is taken by */ | |
241 | snprintf(gpiostr, 15, "%s:%d", range->name, gpio); | |
242 | ||
3cc70ed3 SW |
243 | owner = kstrdup(gpiostr, GFP_KERNEL); |
244 | if (!owner) | |
5d2eaf80 SW |
245 | return -EINVAL; |
246 | ||
3cc70ed3 | 247 | ret = pin_request(pctldev, pin, owner, range); |
5d2eaf80 | 248 | if (ret < 0) |
3cc70ed3 | 249 | kfree(owner); |
5d2eaf80 SW |
250 | |
251 | return ret; | |
2744e8af | 252 | } |
2744e8af LW |
253 | |
254 | /** | |
befe5bdf LW |
255 | * pinmux_free_gpio() - release a pin from GPIO muxing |
256 | * @pctldev: the pin controller device for the pin | |
257 | * @pin: the affected currently GPIO-muxed in pin | |
258 | * @range: applicable GPIO range | |
2744e8af | 259 | */ |
befe5bdf LW |
260 | void pinmux_free_gpio(struct pinctrl_dev *pctldev, unsigned pin, |
261 | struct pinctrl_gpio_range *range) | |
2744e8af | 262 | { |
3cc70ed3 | 263 | const char *owner; |
2744e8af | 264 | |
3cc70ed3 SW |
265 | owner = pin_free(pctldev, pin, range); |
266 | kfree(owner); | |
2744e8af | 267 | } |
2744e8af | 268 | |
befe5bdf LW |
269 | /** |
270 | * pinmux_gpio_direction() - set the direction of a single muxed-in GPIO pin | |
271 | * @pctldev: the pin controller handling this pin | |
272 | * @range: applicable GPIO range | |
273 | * @pin: the affected GPIO pin in this controller | |
274 | * @input: true if we set the pin as input, false for output | |
275 | */ | |
276 | int pinmux_gpio_direction(struct pinctrl_dev *pctldev, | |
277 | struct pinctrl_gpio_range *range, | |
278 | unsigned pin, bool input) | |
542e704f | 279 | { |
542e704f LW |
280 | const struct pinmux_ops *ops; |
281 | int ret; | |
542e704f LW |
282 | |
283 | ops = pctldev->desc->pmxops; | |
284 | ||
542e704f LW |
285 | if (ops->gpio_set_direction) |
286 | ret = ops->gpio_set_direction(pctldev, range, pin, input); | |
287 | else | |
288 | ret = 0; | |
289 | ||
290 | return ret; | |
291 | } | |
292 | ||
7ecdb16f SW |
293 | static int pinmux_func_name_to_selector(struct pinctrl_dev *pctldev, |
294 | const char *function) | |
2744e8af LW |
295 | { |
296 | const struct pinmux_ops *ops = pctldev->desc->pmxops; | |
d1e90e9e | 297 | unsigned nfuncs = ops->get_functions_count(pctldev); |
2744e8af LW |
298 | unsigned selector = 0; |
299 | ||
300 | /* See if this pctldev has this function */ | |
d1e90e9e | 301 | while (selector < nfuncs) { |
2744e8af LW |
302 | const char *fname = ops->get_function_name(pctldev, |
303 | selector); | |
2744e8af | 304 | |
7ecdb16f SW |
305 | if (!strcmp(function, fname)) |
306 | return selector; | |
2744e8af | 307 | |
2744e8af LW |
308 | selector++; |
309 | } | |
310 | ||
311 | pr_err("%s does not support function %s\n", | |
7ecdb16f | 312 | pinctrl_dev_get_name(pctldev), function); |
2744e8af LW |
313 | return -EINVAL; |
314 | } | |
315 | ||
7ecdb16f SW |
316 | int pinmux_map_to_setting(struct pinctrl_map const *map, |
317 | struct pinctrl_setting *setting) | |
2744e8af | 318 | { |
7ecdb16f SW |
319 | struct pinctrl_dev *pctldev = setting->pctldev; |
320 | const struct pinmux_ops *pmxops = pctldev->desc->pmxops; | |
321 | const struct pinctrl_ops *pctlops = pctldev->desc->pctlops; | |
322 | char const * const *groups; | |
323 | unsigned num_groups; | |
2744e8af | 324 | int ret; |
7ecdb16f SW |
325 | const char *group; |
326 | int i; | |
327 | const unsigned *pins; | |
328 | unsigned num_pins; | |
2744e8af | 329 | |
ad8bb720 DA |
330 | if (!pmxops) { |
331 | dev_err(pctldev->dev, "does not support mux function\n"); | |
332 | return -EINVAL; | |
333 | } | |
334 | ||
15f70e1b | 335 | ret = pinmux_func_name_to_selector(pctldev, map->data.mux.function); |
ad6e1107 JC |
336 | if (ret < 0) { |
337 | dev_err(pctldev->dev, "invalid function %s in map table\n", | |
338 | map->data.mux.function); | |
15f70e1b | 339 | return ret; |
ad6e1107 | 340 | } |
15f70e1b | 341 | setting->data.mux.func = ret; |
2744e8af | 342 | |
1e2082b5 | 343 | ret = pmxops->get_function_groups(pctldev, setting->data.mux.func, |
7ecdb16f | 344 | &groups, &num_groups); |
ad6e1107 JC |
345 | if (ret < 0) { |
346 | dev_err(pctldev->dev, "can't query groups for function %s\n", | |
347 | map->data.mux.function); | |
7ecdb16f | 348 | return ret; |
ad6e1107 JC |
349 | } |
350 | if (!num_groups) { | |
351 | dev_err(pctldev->dev, | |
352 | "function %s can't be selected on any group\n", | |
353 | map->data.mux.function); | |
2744e8af | 354 | return -EINVAL; |
ad6e1107 | 355 | } |
1e2082b5 | 356 | if (map->data.mux.group) { |
7ecdb16f | 357 | bool found = false; |
1e2082b5 | 358 | group = map->data.mux.group; |
7ecdb16f SW |
359 | for (i = 0; i < num_groups; i++) { |
360 | if (!strcmp(group, groups[i])) { | |
361 | found = true; | |
362 | break; | |
363 | } | |
364 | } | |
ad6e1107 JC |
365 | if (!found) { |
366 | dev_err(pctldev->dev, | |
367 | "invalid group \"%s\" for function \"%s\"\n", | |
368 | group, map->data.mux.function); | |
7ecdb16f | 369 | return -EINVAL; |
ad6e1107 | 370 | } |
7ecdb16f SW |
371 | } else { |
372 | group = groups[0]; | |
2744e8af | 373 | } |
2744e8af | 374 | |
15f70e1b | 375 | ret = pinctrl_get_group_selector(pctldev, group); |
ad6e1107 JC |
376 | if (ret < 0) { |
377 | dev_err(pctldev->dev, "invalid group %s in map table\n", | |
378 | map->data.mux.group); | |
15f70e1b | 379 | return ret; |
ad6e1107 | 380 | } |
15f70e1b | 381 | setting->data.mux.group = ret; |
2744e8af | 382 | |
1e2082b5 SW |
383 | ret = pctlops->get_group_pins(pctldev, setting->data.mux.group, &pins, |
384 | &num_pins); | |
2744e8af | 385 | if (ret) { |
7ecdb16f SW |
386 | dev_err(pctldev->dev, |
387 | "could not get pins for device %s group selector %d\n", | |
1e2082b5 | 388 | pinctrl_dev_get_name(pctldev), setting->data.mux.group); |
7ecdb16f SW |
389 | return -ENODEV; |
390 | } | |
391 | ||
392 | /* Try to allocate all pins in this group, one by one */ | |
393 | for (i = 0; i < num_pins; i++) { | |
394 | ret = pin_request(pctldev, pins[i], map->dev_name, NULL); | |
395 | if (ret) { | |
396 | dev_err(pctldev->dev, | |
ad6e1107 | 397 | "could not request pin %d on device %s\n", |
7ecdb16f SW |
398 | pins[i], pinctrl_dev_get_name(pctldev)); |
399 | /* On error release all taken pins */ | |
400 | i--; /* this pin just failed */ | |
401 | for (; i >= 0; i--) | |
402 | pin_free(pctldev, pins[i], NULL); | |
403 | return -ENODEV; | |
404 | } | |
2744e8af | 405 | } |
2744e8af LW |
406 | |
407 | return 0; | |
408 | } | |
409 | ||
7ecdb16f | 410 | void pinmux_free_setting(struct pinctrl_setting const *setting) |
2744e8af | 411 | { |
7ecdb16f SW |
412 | struct pinctrl_dev *pctldev = setting->pctldev; |
413 | const struct pinctrl_ops *pctlops = pctldev->desc->pctlops; | |
414 | const unsigned *pins; | |
415 | unsigned num_pins; | |
befe5bdf | 416 | int ret; |
7ecdb16f | 417 | int i; |
2744e8af | 418 | |
1e2082b5 | 419 | ret = pctlops->get_group_pins(pctldev, setting->data.mux.group, |
7ecdb16f | 420 | &pins, &num_pins); |
befe5bdf | 421 | if (ret) { |
7ecdb16f SW |
422 | dev_err(pctldev->dev, |
423 | "could not get pins for device %s group selector %d\n", | |
1e2082b5 | 424 | pinctrl_dev_get_name(pctldev), setting->data.mux.group); |
7ecdb16f | 425 | return; |
2744e8af LW |
426 | } |
427 | ||
7ecdb16f SW |
428 | for (i = 0; i < num_pins; i++) |
429 | pin_free(pctldev, pins[i], NULL); | |
2744e8af | 430 | } |
2744e8af | 431 | |
7ecdb16f | 432 | int pinmux_enable_setting(struct pinctrl_setting const *setting) |
2744e8af | 433 | { |
7ecdb16f | 434 | struct pinctrl_dev *pctldev = setting->pctldev; |
ba110d90 | 435 | const struct pinctrl_ops *pctlops = pctldev->desc->pctlops; |
befe5bdf | 436 | const struct pinmux_ops *ops = pctldev->desc->pmxops; |
ba110d90 SW |
437 | int ret; |
438 | const unsigned *pins; | |
439 | unsigned num_pins; | |
440 | int i; | |
441 | struct pin_desc *desc; | |
442 | ||
443 | ret = pctlops->get_group_pins(pctldev, setting->data.mux.group, | |
444 | &pins, &num_pins); | |
445 | if (ret) { | |
446 | /* errors only affect debug data, so just warn */ | |
447 | dev_warn(pctldev->dev, | |
448 | "could not get pins for group selector %d\n", | |
449 | setting->data.mux.group); | |
450 | num_pins = 0; | |
451 | } | |
452 | ||
453 | for (i = 0; i < num_pins; i++) { | |
454 | desc = pin_desc_get(pctldev, pins[i]); | |
455 | if (desc == NULL) { | |
456 | dev_warn(pctldev->dev, | |
457 | "could not get pin desc for pin %d\n", | |
458 | pins[i]); | |
459 | continue; | |
460 | } | |
461 | desc->mux_setting = &(setting->data.mux); | |
462 | } | |
2744e8af | 463 | |
1e2082b5 SW |
464 | return ops->enable(pctldev, setting->data.mux.func, |
465 | setting->data.mux.group); | |
2744e8af | 466 | } |
2744e8af | 467 | |
7ecdb16f | 468 | void pinmux_disable_setting(struct pinctrl_setting const *setting) |
2744e8af | 469 | { |
7ecdb16f | 470 | struct pinctrl_dev *pctldev = setting->pctldev; |
ba110d90 | 471 | const struct pinctrl_ops *pctlops = pctldev->desc->pctlops; |
befe5bdf | 472 | const struct pinmux_ops *ops = pctldev->desc->pmxops; |
ba110d90 SW |
473 | int ret; |
474 | const unsigned *pins; | |
475 | unsigned num_pins; | |
476 | int i; | |
477 | struct pin_desc *desc; | |
478 | ||
479 | ret = pctlops->get_group_pins(pctldev, setting->data.mux.group, | |
480 | &pins, &num_pins); | |
481 | if (ret) { | |
482 | /* errors only affect debug data, so just warn */ | |
483 | dev_warn(pctldev->dev, | |
484 | "could not get pins for group selector %d\n", | |
485 | setting->data.mux.group); | |
486 | num_pins = 0; | |
487 | } | |
488 | ||
489 | for (i = 0; i < num_pins; i++) { | |
490 | desc = pin_desc_get(pctldev, pins[i]); | |
491 | if (desc == NULL) { | |
492 | dev_warn(pctldev->dev, | |
493 | "could not get pin desc for pin %d\n", | |
494 | pins[i]); | |
495 | continue; | |
496 | } | |
497 | desc->mux_setting = NULL; | |
498 | } | |
2744e8af | 499 | |
1e2082b5 | 500 | ops->disable(pctldev, setting->data.mux.func, setting->data.mux.group); |
2744e8af | 501 | } |
2744e8af | 502 | |
2744e8af LW |
503 | #ifdef CONFIG_DEBUG_FS |
504 | ||
505 | /* Called from pincontrol core */ | |
506 | static int pinmux_functions_show(struct seq_file *s, void *what) | |
507 | { | |
508 | struct pinctrl_dev *pctldev = s->private; | |
509 | const struct pinmux_ops *pmxops = pctldev->desc->pmxops; | |
ad8bb720 | 510 | unsigned nfuncs; |
2744e8af LW |
511 | unsigned func_selector = 0; |
512 | ||
ad8bb720 DA |
513 | if (!pmxops) |
514 | return 0; | |
57b676f9 | 515 | |
ad8bb720 DA |
516 | mutex_lock(&pinctrl_mutex); |
517 | nfuncs = pmxops->get_functions_count(pctldev); | |
d1e90e9e | 518 | while (func_selector < nfuncs) { |
2744e8af LW |
519 | const char *func = pmxops->get_function_name(pctldev, |
520 | func_selector); | |
521 | const char * const *groups; | |
522 | unsigned num_groups; | |
523 | int ret; | |
524 | int i; | |
525 | ||
526 | ret = pmxops->get_function_groups(pctldev, func_selector, | |
527 | &groups, &num_groups); | |
528 | if (ret) | |
529 | seq_printf(s, "function %s: COULD NOT GET GROUPS\n", | |
530 | func); | |
531 | ||
532 | seq_printf(s, "function: %s, groups = [ ", func); | |
533 | for (i = 0; i < num_groups; i++) | |
534 | seq_printf(s, "%s ", groups[i]); | |
535 | seq_puts(s, "]\n"); | |
536 | ||
537 | func_selector++; | |
2744e8af LW |
538 | } |
539 | ||
57b676f9 SW |
540 | mutex_unlock(&pinctrl_mutex); |
541 | ||
2744e8af LW |
542 | return 0; |
543 | } | |
544 | ||
545 | static int pinmux_pins_show(struct seq_file *s, void *what) | |
546 | { | |
547 | struct pinctrl_dev *pctldev = s->private; | |
ba110d90 SW |
548 | const struct pinctrl_ops *pctlops = pctldev->desc->pctlops; |
549 | const struct pinmux_ops *pmxops = pctldev->desc->pmxops; | |
706e8520 | 550 | unsigned i, pin; |
2744e8af | 551 | |
ad8bb720 DA |
552 | if (!pmxops) |
553 | return 0; | |
554 | ||
2744e8af | 555 | seq_puts(s, "Pinmux settings per pin\n"); |
652162d4 | 556 | seq_puts(s, "Format: pin (name): mux_owner gpio_owner hog?\n"); |
2744e8af | 557 | |
57b676f9 SW |
558 | mutex_lock(&pinctrl_mutex); |
559 | ||
706e8520 CP |
560 | /* The pin number can be retrived from the pin controller descriptor */ |
561 | for (i = 0; i < pctldev->desc->npins; i++) { | |
2744e8af | 562 | struct pin_desc *desc; |
1cf94c45 | 563 | bool is_hog = false; |
2744e8af | 564 | |
706e8520 | 565 | pin = pctldev->desc->pins[i].number; |
2744e8af | 566 | desc = pin_desc_get(pctldev, pin); |
706e8520 | 567 | /* Skip if we cannot search the pin */ |
2744e8af LW |
568 | if (desc == NULL) |
569 | continue; | |
570 | ||
652162d4 SW |
571 | if (desc->mux_owner && |
572 | !strcmp(desc->mux_owner, pinctrl_dev_get_name(pctldev))) | |
1cf94c45 LW |
573 | is_hog = true; |
574 | ||
652162d4 | 575 | seq_printf(s, "pin %d (%s): %s %s%s", pin, |
2744e8af | 576 | desc->name ? desc->name : "unnamed", |
652162d4 SW |
577 | desc->mux_owner ? desc->mux_owner |
578 | : "(MUX UNCLAIMED)", | |
579 | desc->gpio_owner ? desc->gpio_owner | |
580 | : "(GPIO UNCLAIMED)", | |
1cf94c45 | 581 | is_hog ? " (HOG)" : ""); |
ba110d90 SW |
582 | |
583 | if (desc->mux_setting) | |
584 | seq_printf(s, " function %s group %s\n", | |
585 | pmxops->get_function_name(pctldev, | |
586 | desc->mux_setting->func), | |
587 | pctlops->get_group_name(pctldev, | |
588 | desc->mux_setting->group)); | |
589 | else | |
590 | seq_printf(s, "\n"); | |
2744e8af LW |
591 | } |
592 | ||
57b676f9 SW |
593 | mutex_unlock(&pinctrl_mutex); |
594 | ||
2744e8af LW |
595 | return 0; |
596 | } | |
597 | ||
1e2082b5 SW |
598 | void pinmux_show_map(struct seq_file *s, struct pinctrl_map const *map) |
599 | { | |
600 | seq_printf(s, "group %s\nfunction %s\n", | |
601 | map->data.mux.group ? map->data.mux.group : "(default)", | |
602 | map->data.mux.function); | |
603 | } | |
604 | ||
605 | void pinmux_show_setting(struct seq_file *s, | |
606 | struct pinctrl_setting const *setting) | |
2744e8af | 607 | { |
7ecdb16f SW |
608 | struct pinctrl_dev *pctldev = setting->pctldev; |
609 | const struct pinmux_ops *pmxops = pctldev->desc->pmxops; | |
610 | const struct pinctrl_ops *pctlops = pctldev->desc->pctlops; | |
611 | ||
1e2082b5 SW |
612 | seq_printf(s, "group: %s (%u) function: %s (%u)\n", |
613 | pctlops->get_group_name(pctldev, setting->data.mux.group), | |
614 | setting->data.mux.group, | |
615 | pmxops->get_function_name(pctldev, setting->data.mux.func), | |
616 | setting->data.mux.func); | |
2744e8af LW |
617 | } |
618 | ||
619 | static int pinmux_functions_open(struct inode *inode, struct file *file) | |
620 | { | |
621 | return single_open(file, pinmux_functions_show, inode->i_private); | |
622 | } | |
623 | ||
624 | static int pinmux_pins_open(struct inode *inode, struct file *file) | |
625 | { | |
626 | return single_open(file, pinmux_pins_show, inode->i_private); | |
627 | } | |
628 | ||
2744e8af LW |
629 | static const struct file_operations pinmux_functions_ops = { |
630 | .open = pinmux_functions_open, | |
631 | .read = seq_read, | |
632 | .llseek = seq_lseek, | |
633 | .release = single_release, | |
634 | }; | |
635 | ||
636 | static const struct file_operations pinmux_pins_ops = { | |
637 | .open = pinmux_pins_open, | |
638 | .read = seq_read, | |
639 | .llseek = seq_lseek, | |
640 | .release = single_release, | |
641 | }; | |
642 | ||
2744e8af LW |
643 | void pinmux_init_device_debugfs(struct dentry *devroot, |
644 | struct pinctrl_dev *pctldev) | |
645 | { | |
646 | debugfs_create_file("pinmux-functions", S_IFREG | S_IRUGO, | |
647 | devroot, pctldev, &pinmux_functions_ops); | |
648 | debugfs_create_file("pinmux-pins", S_IFREG | S_IRUGO, | |
649 | devroot, pctldev, &pinmux_pins_ops); | |
2744e8af LW |
650 | } |
651 | ||
652 | #endif /* CONFIG_DEBUG_FS */ |