Commit | Line | Data |
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1951384c RJ |
1 | /* |
2 | * Marvell PXA25x family pin control | |
3 | * | |
4 | * Copyright (C) 2016 Robert Jarzmik | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License as published by | |
8 | * the Free Software Foundation; version 2 of the License. | |
9 | * | |
10 | */ | |
11 | #include <linux/module.h> | |
12 | #include <linux/platform_device.h> | |
13 | #include <linux/of.h> | |
14 | #include <linux/of_device.h> | |
15 | #include <linux/pinctrl/pinctrl.h> | |
16 | ||
17 | #include "pinctrl-pxa2xx.h" | |
18 | ||
19 | static const struct pxa_desc_pin pxa25x_pins[] = { | |
20 | PXA_GPIO_ONLY_PIN(PXA_PINCTRL_PIN(0)), | |
21 | PXA_GPIO_PIN(PXA_PINCTRL_PIN(1), | |
22 | PXA_FUNCTION(0, 1, "GP_RST")), | |
23 | PXA_GPIO_ONLY_PIN(PXA_PINCTRL_PIN(2)), | |
24 | PXA_GPIO_ONLY_PIN(PXA_PINCTRL_PIN(3)), | |
25 | PXA_GPIO_ONLY_PIN(PXA_PINCTRL_PIN(4)), | |
26 | PXA_GPIO_ONLY_PIN(PXA_PINCTRL_PIN(5)), | |
27 | PXA_GPIO_PIN(PXA_PINCTRL_PIN(6), | |
28 | PXA_FUNCTION(1, 1, "MMCCLK")), | |
29 | PXA_GPIO_PIN(PXA_PINCTRL_PIN(7), | |
30 | PXA_FUNCTION(1, 1, "48_MHz")), | |
31 | PXA_GPIO_PIN(PXA_PINCTRL_PIN(8), | |
32 | PXA_FUNCTION(1, 1, "MMCCS0")), | |
33 | PXA_GPIO_PIN(PXA_PINCTRL_PIN(9), | |
34 | PXA_FUNCTION(1, 1, "MMCCS1")), | |
35 | PXA_GPIO_PIN(PXA_PINCTRL_PIN(10), | |
36 | PXA_FUNCTION(1, 1, "RTCCLK")), | |
37 | PXA_GPIO_PIN(PXA_PINCTRL_PIN(11), | |
38 | PXA_FUNCTION(1, 1, "3_6_MHz")), | |
39 | PXA_GPIO_PIN(PXA_PINCTRL_PIN(12), | |
40 | PXA_FUNCTION(1, 1, "32_kHz")), | |
41 | PXA_GPIO_PIN(PXA_PINCTRL_PIN(13), | |
42 | PXA_FUNCTION(1, 2, "MBGNT")), | |
43 | PXA_GPIO_PIN(PXA_PINCTRL_PIN(14), | |
44 | PXA_FUNCTION(0, 1, "MBREQ")), | |
45 | PXA_GPIO_PIN(PXA_PINCTRL_PIN(15), | |
46 | PXA_FUNCTION(1, 2, "nCS_1")), | |
47 | PXA_GPIO_PIN(PXA_PINCTRL_PIN(16), | |
48 | PXA_FUNCTION(1, 2, "PWM0")), | |
49 | PXA_GPIO_PIN(PXA_PINCTRL_PIN(17), | |
50 | PXA_FUNCTION(1, 2, "PWM1")), | |
51 | PXA_GPIO_PIN(PXA_PINCTRL_PIN(18), | |
52 | PXA_FUNCTION(0, 1, "RDY")), | |
53 | PXA_GPIO_PIN(PXA_PINCTRL_PIN(19), | |
54 | PXA_FUNCTION(0, 1, "DREQ[1]")), | |
55 | PXA_GPIO_PIN(PXA_PINCTRL_PIN(20), | |
56 | PXA_FUNCTION(0, 1, "DREQ[0]")), | |
57 | PXA_GPIO_ONLY_PIN(PXA_PINCTRL_PIN(21)), | |
58 | PXA_GPIO_ONLY_PIN(PXA_PINCTRL_PIN(22)), | |
59 | PXA_GPIO_PIN(PXA_PINCTRL_PIN(23), | |
60 | PXA_FUNCTION(1, 2, "SCLK")), | |
61 | PXA_GPIO_PIN(PXA_PINCTRL_PIN(24), | |
62 | PXA_FUNCTION(1, 2, "SFRM")), | |
63 | PXA_GPIO_PIN(PXA_PINCTRL_PIN(25), | |
64 | PXA_FUNCTION(1, 2, "TXD")), | |
65 | PXA_GPIO_PIN(PXA_PINCTRL_PIN(26), | |
66 | PXA_FUNCTION(0, 1, "RXD")), | |
67 | PXA_GPIO_PIN(PXA_PINCTRL_PIN(27), | |
68 | PXA_FUNCTION(0, 1, "EXTCLK")), | |
69 | PXA_GPIO_PIN(PXA_PINCTRL_PIN(28), | |
70 | PXA_FUNCTION(0, 1, "BITCLK"), | |
71 | PXA_FUNCTION(0, 2, "BITCLK"), | |
72 | PXA_FUNCTION(1, 1, "BITCLK")), | |
73 | PXA_GPIO_PIN(PXA_PINCTRL_PIN(29), | |
74 | PXA_FUNCTION(0, 1, "SDATA_IN0"), | |
75 | PXA_FUNCTION(0, 2, "SDATA_IN")), | |
76 | PXA_GPIO_PIN(PXA_PINCTRL_PIN(30), | |
77 | PXA_FUNCTION(1, 1, "SDATA_OUT"), | |
78 | PXA_FUNCTION(1, 2, "SDATA_OUT")), | |
79 | PXA_GPIO_PIN(PXA_PINCTRL_PIN(31), | |
80 | PXA_FUNCTION(1, 1, "SYNC"), | |
81 | PXA_FUNCTION(1, 2, "SYNC")), | |
82 | PXA_GPIO_PIN(PXA_PINCTRL_PIN(32), | |
83 | PXA_FUNCTION(0, 1, "SDATA_IN1"), | |
84 | PXA_FUNCTION(1, 1, "SYSCLK")), | |
85 | PXA_GPIO_PIN(PXA_PINCTRL_PIN(33), | |
86 | PXA_FUNCTION(1, 2, "nCS[5]")), | |
87 | PXA_GPIO_PIN(PXA_PINCTRL_PIN(34), | |
88 | PXA_FUNCTION(0, 1, "FFRXD"), | |
89 | PXA_FUNCTION(1, 2, "MMCCS0")), | |
90 | PXA_GPIO_PIN(PXA_PINCTRL_PIN(35), | |
91 | PXA_FUNCTION(0, 1, "CTS")), | |
92 | PXA_GPIO_PIN(PXA_PINCTRL_PIN(36), | |
93 | PXA_FUNCTION(0, 1, "DCD")), | |
94 | PXA_GPIO_PIN(PXA_PINCTRL_PIN(37), | |
95 | PXA_FUNCTION(0, 1, "DSR")), | |
96 | PXA_GPIO_PIN(PXA_PINCTRL_PIN(38), | |
97 | PXA_FUNCTION(0, 1, "RI")), | |
98 | PXA_GPIO_PIN(PXA_PINCTRL_PIN(39), | |
99 | PXA_FUNCTION(1, 1, "MMCC1"), | |
100 | PXA_FUNCTION(1, 2, "FFTXD")), | |
101 | PXA_GPIO_PIN(PXA_PINCTRL_PIN(40), | |
102 | PXA_FUNCTION(1, 2, "DTR")), | |
103 | PXA_GPIO_PIN(PXA_PINCTRL_PIN(41), | |
104 | PXA_FUNCTION(1, 2, "RTS")), | |
105 | PXA_GPIO_PIN(PXA_PINCTRL_PIN(42), | |
106 | PXA_FUNCTION(0, 1, "BTRXD"), | |
107 | PXA_FUNCTION(0, 3, "HWRXD")), | |
108 | PXA_GPIO_PIN(PXA_PINCTRL_PIN(43), | |
109 | PXA_FUNCTION(1, 2, "BTTXD"), | |
110 | PXA_FUNCTION(1, 3, "HWTXD")), | |
111 | PXA_GPIO_PIN(PXA_PINCTRL_PIN(44), | |
112 | PXA_FUNCTION(0, 1, "BTCTS"), | |
113 | PXA_FUNCTION(0, 3, "HWCTS")), | |
114 | PXA_GPIO_PIN(PXA_PINCTRL_PIN(45), | |
115 | PXA_FUNCTION(1, 2, "BTRTS"), | |
116 | PXA_FUNCTION(1, 3, "HWRTS")), | |
117 | PXA_GPIO_PIN(PXA_PINCTRL_PIN(46), | |
118 | PXA_FUNCTION(0, 1, "ICP_RXD"), | |
119 | PXA_FUNCTION(0, 2, "RXD")), | |
120 | PXA_GPIO_PIN(PXA_PINCTRL_PIN(47), | |
121 | PXA_FUNCTION(1, 1, "TXD"), | |
122 | PXA_FUNCTION(1, 2, "ICP_TXD")), | |
123 | PXA_GPIO_PIN(PXA_PINCTRL_PIN(48), | |
124 | PXA_FUNCTION(1, 1, "HWTXD"), | |
125 | PXA_FUNCTION(1, 2, "nPOE")), | |
126 | PXA_GPIO_PIN(PXA_PINCTRL_PIN(49), | |
127 | PXA_FUNCTION(0, 1, "HWRXD"), | |
128 | PXA_FUNCTION(1, 2, "nPWE")), | |
129 | PXA_GPIO_PIN(PXA_PINCTRL_PIN(50), | |
130 | PXA_FUNCTION(0, 1, "HWCTS"), | |
131 | PXA_FUNCTION(1, 2, "nPIOR")), | |
132 | PXA_GPIO_PIN(PXA_PINCTRL_PIN(51), | |
133 | PXA_FUNCTION(1, 1, "HWRTS"), | |
134 | PXA_FUNCTION(1, 2, "nPIOW")), | |
135 | PXA_GPIO_PIN(PXA_PINCTRL_PIN(52), | |
136 | PXA_FUNCTION(1, 2, "nPCE[1]")), | |
137 | PXA_GPIO_PIN(PXA_PINCTRL_PIN(53), | |
138 | PXA_FUNCTION(1, 1, "MMCCLK"), | |
139 | PXA_FUNCTION(1, 2, "nPCE[2]")), | |
140 | PXA_GPIO_PIN(PXA_PINCTRL_PIN(54), | |
141 | PXA_FUNCTION(1, 1, "MMCCLK"), | |
142 | PXA_FUNCTION(1, 2, "nPSKTSEL")), | |
143 | PXA_GPIO_PIN(PXA_PINCTRL_PIN(55), | |
144 | PXA_FUNCTION(1, 2, "nPREG")), | |
145 | PXA_GPIO_PIN(PXA_PINCTRL_PIN(56), | |
146 | PXA_FUNCTION(0, 1, "nPWAIT")), | |
147 | PXA_GPIO_PIN(PXA_PINCTRL_PIN(57), | |
148 | PXA_FUNCTION(0, 1, "nIOIS16")), | |
149 | PXA_GPIO_PIN(PXA_PINCTRL_PIN(58), | |
150 | PXA_FUNCTION(1, 2, "LDD<0>")), | |
151 | PXA_GPIO_PIN(PXA_PINCTRL_PIN(59), | |
152 | PXA_FUNCTION(1, 2, "LDD<1>")), | |
153 | PXA_GPIO_PIN(PXA_PINCTRL_PIN(60), | |
154 | PXA_FUNCTION(1, 2, "LDD<2>")), | |
155 | PXA_GPIO_PIN(PXA_PINCTRL_PIN(61), | |
156 | PXA_FUNCTION(1, 2, "LDD<3>")), | |
157 | PXA_GPIO_PIN(PXA_PINCTRL_PIN(62), | |
158 | PXA_FUNCTION(1, 2, "LDD<4>")), | |
159 | PXA_GPIO_PIN(PXA_PINCTRL_PIN(63), | |
160 | PXA_FUNCTION(1, 2, "LDD<5>")), | |
161 | PXA_GPIO_PIN(PXA_PINCTRL_PIN(64), | |
162 | PXA_FUNCTION(1, 2, "LDD<6>")), | |
163 | PXA_GPIO_PIN(PXA_PINCTRL_PIN(65), | |
164 | PXA_FUNCTION(1, 2, "LDD<7>")), | |
165 | PXA_GPIO_PIN(PXA_PINCTRL_PIN(66), | |
166 | PXA_FUNCTION(0, 1, "MBREQ"), | |
167 | PXA_FUNCTION(1, 2, "LDD<8>")), | |
168 | PXA_GPIO_PIN(PXA_PINCTRL_PIN(67), | |
169 | PXA_FUNCTION(1, 1, "MMCCS0"), | |
170 | PXA_FUNCTION(1, 2, "LDD<9>")), | |
171 | PXA_GPIO_PIN(PXA_PINCTRL_PIN(68), | |
172 | PXA_FUNCTION(1, 1, "MMCCS1"), | |
173 | PXA_FUNCTION(1, 2, "LDD<10>")), | |
174 | PXA_GPIO_PIN(PXA_PINCTRL_PIN(69), | |
175 | PXA_FUNCTION(1, 1, "MMCCLK"), | |
176 | PXA_FUNCTION(1, 2, "LDD<11>")), | |
177 | PXA_GPIO_PIN(PXA_PINCTRL_PIN(70), | |
178 | PXA_FUNCTION(1, 1, "RTCCLK"), | |
179 | PXA_FUNCTION(1, 2, "LDD<12>")), | |
180 | PXA_GPIO_PIN(PXA_PINCTRL_PIN(71), | |
181 | PXA_FUNCTION(1, 1, "3_6_MHz"), | |
182 | PXA_FUNCTION(1, 2, "LDD<13>")), | |
183 | PXA_GPIO_PIN(PXA_PINCTRL_PIN(72), | |
184 | PXA_FUNCTION(1, 1, "32_kHz"), | |
185 | PXA_FUNCTION(1, 2, "LDD<14>")), | |
186 | PXA_GPIO_PIN(PXA_PINCTRL_PIN(73), | |
187 | PXA_FUNCTION(1, 1, "MBGNT"), | |
188 | PXA_FUNCTION(1, 2, "LDD<15>")), | |
189 | PXA_GPIO_PIN(PXA_PINCTRL_PIN(74), | |
190 | PXA_FUNCTION(1, 2, "LCD_FCLK")), | |
191 | PXA_GPIO_PIN(PXA_PINCTRL_PIN(75), | |
192 | PXA_FUNCTION(1, 2, "LCD_LCLK")), | |
193 | PXA_GPIO_PIN(PXA_PINCTRL_PIN(76), | |
194 | PXA_FUNCTION(1, 2, "LCD_PCLK")), | |
195 | PXA_GPIO_PIN(PXA_PINCTRL_PIN(77), | |
196 | PXA_FUNCTION(1, 2, "LCD_ACBIAS")), | |
197 | PXA_GPIO_PIN(PXA_PINCTRL_PIN(78), | |
198 | PXA_FUNCTION(1, 2, "nCS<2>")), | |
199 | PXA_GPIO_PIN(PXA_PINCTRL_PIN(79), | |
200 | PXA_FUNCTION(1, 2, "nCS<3>")), | |
201 | PXA_GPIO_PIN(PXA_PINCTRL_PIN(80), | |
202 | PXA_FUNCTION(1, 2, "nCS<4>")), | |
203 | PXA_GPIO_PIN(PXA_PINCTRL_PIN(81), | |
204 | PXA_FUNCTION(0, 1, "NSSPSCLK"), | |
205 | PXA_FUNCTION(1, 1, "NSSPSCLK")), | |
206 | PXA_GPIO_PIN(PXA_PINCTRL_PIN(82), | |
207 | PXA_FUNCTION(0, 1, "NSSPSFRM"), | |
208 | PXA_FUNCTION(1, 1, "NSSPSFRM")), | |
209 | PXA_GPIO_PIN(PXA_PINCTRL_PIN(83), | |
210 | PXA_FUNCTION(0, 2, "NSSPRXD"), | |
211 | PXA_FUNCTION(1, 1, "NSSPTXD")), | |
212 | PXA_GPIO_PIN(PXA_PINCTRL_PIN(84), | |
213 | PXA_FUNCTION(0, 2, "NSSPRXD"), | |
214 | PXA_FUNCTION(1, 1, "NSSPTXD")), | |
215 | }; | |
216 | ||
217 | static int pxa25x_pinctrl_probe(struct platform_device *pdev) | |
218 | { | |
219 | int ret, i; | |
220 | void __iomem *base_af[8]; | |
221 | void __iomem *base_dir[4]; | |
222 | void __iomem *base_sleep[4]; | |
223 | struct resource *res; | |
224 | ||
225 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | |
226 | base_af[0] = devm_ioremap_resource(&pdev->dev, res); | |
227 | if (IS_ERR(base_af[0])) | |
228 | return PTR_ERR(base_af[0]); | |
229 | ||
230 | res = platform_get_resource(pdev, IORESOURCE_MEM, 1); | |
231 | base_dir[0] = devm_ioremap_resource(&pdev->dev, res); | |
232 | if (IS_ERR(base_dir[0])) | |
233 | return PTR_ERR(base_dir[0]); | |
234 | ||
235 | res = platform_get_resource(pdev, IORESOURCE_MEM, 2); | |
236 | base_dir[3] = devm_ioremap_resource(&pdev->dev, res); | |
237 | if (IS_ERR(base_dir[3])) | |
238 | return PTR_ERR(base_dir[3]); | |
239 | ||
240 | res = platform_get_resource(pdev, IORESOURCE_MEM, 3); | |
241 | base_sleep[0] = devm_ioremap_resource(&pdev->dev, res); | |
242 | if (IS_ERR(base_sleep[0])) | |
243 | return PTR_ERR(base_sleep[0]); | |
244 | ||
245 | for (i = 0; i < ARRAY_SIZE(base_af); i++) | |
246 | base_af[i] = base_af[0] + sizeof(base_af[0]) * i; | |
247 | for (i = 0; i < 3; i++) | |
248 | base_dir[i] = base_dir[0] + sizeof(base_dir[0]) * i; | |
249 | for (i = 0; i < ARRAY_SIZE(base_sleep); i++) | |
250 | base_sleep[i] = base_sleep[0] + sizeof(base_af[0]) * i; | |
251 | ||
252 | ret = pxa2xx_pinctrl_init(pdev, pxa25x_pins, ARRAY_SIZE(pxa25x_pins), | |
253 | base_af, base_dir, base_sleep); | |
254 | return ret; | |
255 | } | |
256 | ||
257 | static const struct of_device_id pxa25x_pinctrl_match[] = { | |
258 | { .compatible = "marvell,pxa25x-pinctrl", }, | |
259 | {} | |
260 | }; | |
261 | MODULE_DEVICE_TABLE(of, pxa25x_pinctrl_match); | |
262 | ||
263 | static struct platform_driver pxa25x_pinctrl_driver = { | |
264 | .probe = pxa25x_pinctrl_probe, | |
265 | .driver = { | |
266 | .name = "pxa25x-pinctrl", | |
267 | .of_match_table = pxa25x_pinctrl_match, | |
268 | }, | |
269 | }; | |
270 | module_platform_driver(pxa25x_pinctrl_driver); | |
271 | ||
272 | MODULE_AUTHOR("Robert Jarzmik <robert.jarzmik@free.fr>"); | |
273 | MODULE_DESCRIPTION("Marvell PXA25x pinctrl driver"); | |
274 | MODULE_LICENSE("GPL v2"); |