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8f1338cd TT |
1 | /* |
2 | * Copyright (c) 2015, The Linux Foundation. All rights reserved. | |
3 | * | |
4 | * This program is free software; you can redistribute it and/or modify | |
5 | * it under the terms of the GNU General Public License version 2 and | |
6 | * only version 2 as published by the Free Software Foundation. | |
7 | * | |
8 | * This program is distributed in the hope that it will be useful, | |
9 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
10 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
11 | * GNU General Public License for more details. | |
12 | * | |
13 | * GPIO and pin control functions on this SOC are handled by the "TLMM" | |
14 | * device. The driver which controls this device is pinctrl-msm.c. Each | |
15 | * SOC with a TLMM is expected to create a client driver that registers | |
16 | * with pinctrl-msm.c. This means that all TLMM drivers are pin control | |
17 | * drivers. | |
18 | * | |
19 | * This pin control driver is intended to be used only an ACPI-enabled | |
20 | * system. As such, UEFI will handle all pin control configuration, so | |
21 | * this driver does not provide pin control functions. It is effectively | |
22 | * a GPIO-only driver. The alternative is to duplicate the GPIO code of | |
23 | * pinctrl-msm.c into another driver. | |
24 | */ | |
25 | ||
26 | #include <linux/module.h> | |
27 | #include <linux/platform_device.h> | |
28 | #include <linux/pinctrl/pinctrl.h> | |
29 | #include <linux/acpi.h> | |
30 | ||
31 | #include "pinctrl-msm.h" | |
32 | ||
33 | static struct msm_pinctrl_soc_data qdf2xxx_pinctrl; | |
34 | ||
beee3909 TT |
35 | /* A reasonable limit to the number of GPIOS */ |
36 | #define MAX_GPIOS 256 | |
37 | ||
8f1338cd TT |
38 | static int qdf2xxx_pinctrl_probe(struct platform_device *pdev) |
39 | { | |
40 | struct pinctrl_pin_desc *pins; | |
41 | struct msm_pingroup *groups; | |
42 | unsigned int i; | |
43 | u32 num_gpios; | |
44 | int ret; | |
45 | ||
46 | /* Query the number of GPIOs from ACPI */ | |
47 | ret = device_property_read_u32(&pdev->dev, "num-gpios", &num_gpios); | |
beee3909 TT |
48 | if (ret < 0) { |
49 | dev_warn(&pdev->dev, "missing num-gpios property\n"); | |
8f1338cd | 50 | return ret; |
beee3909 | 51 | } |
8f1338cd | 52 | |
beee3909 TT |
53 | if (!num_gpios || num_gpios > MAX_GPIOS) { |
54 | dev_warn(&pdev->dev, "invalid num-gpios property\n"); | |
8f1338cd TT |
55 | return -ENODEV; |
56 | } | |
57 | ||
58 | pins = devm_kcalloc(&pdev->dev, num_gpios, | |
59 | sizeof(struct pinctrl_pin_desc), GFP_KERNEL); | |
60 | groups = devm_kcalloc(&pdev->dev, num_gpios, | |
61 | sizeof(struct msm_pingroup), GFP_KERNEL); | |
62 | ||
beee3909 TT |
63 | if (!pins || !groups) |
64 | return -ENOMEM; | |
65 | ||
8f1338cd TT |
66 | for (i = 0; i < num_gpios; i++) { |
67 | pins[i].number = i; | |
68 | ||
69 | groups[i].npins = 1, | |
70 | groups[i].pins = &pins[i].number; | |
71 | groups[i].ctl_reg = 0x10000 * i; | |
72 | groups[i].io_reg = 0x04 + 0x10000 * i; | |
73 | groups[i].intr_cfg_reg = 0x08 + 0x10000 * i; | |
74 | groups[i].intr_status_reg = 0x0c + 0x10000 * i; | |
75 | groups[i].intr_target_reg = 0x08 + 0x10000 * i; | |
76 | ||
77 | groups[i].mux_bit = 2; | |
78 | groups[i].pull_bit = 0; | |
79 | groups[i].drv_bit = 6; | |
80 | groups[i].oe_bit = 9; | |
81 | groups[i].in_bit = 0; | |
82 | groups[i].out_bit = 1; | |
83 | groups[i].intr_enable_bit = 0; | |
84 | groups[i].intr_status_bit = 0; | |
85 | groups[i].intr_target_bit = 5; | |
86 | groups[i].intr_target_kpss_val = 1; | |
87 | groups[i].intr_raw_status_bit = 4; | |
88 | groups[i].intr_polarity_bit = 1; | |
89 | groups[i].intr_detection_bit = 2; | |
90 | groups[i].intr_detection_width = 2; | |
91 | } | |
92 | ||
93 | qdf2xxx_pinctrl.pins = pins; | |
94 | qdf2xxx_pinctrl.groups = groups; | |
95 | qdf2xxx_pinctrl.npins = num_gpios; | |
96 | qdf2xxx_pinctrl.ngroups = num_gpios; | |
97 | qdf2xxx_pinctrl.ngpios = num_gpios; | |
98 | ||
99 | return msm_pinctrl_probe(pdev, &qdf2xxx_pinctrl); | |
100 | } | |
101 | ||
102 | static const struct acpi_device_id qdf2xxx_acpi_ids[] = { | |
103 | {"QCOM8001"}, | |
104 | {}, | |
105 | }; | |
106 | MODULE_DEVICE_TABLE(acpi, qdf2xxx_acpi_ids); | |
107 | ||
108 | static struct platform_driver qdf2xxx_pinctrl_driver = { | |
109 | .driver = { | |
110 | .name = "qdf2xxx-pinctrl", | |
111 | .acpi_match_table = ACPI_PTR(qdf2xxx_acpi_ids), | |
112 | }, | |
113 | .probe = qdf2xxx_pinctrl_probe, | |
114 | .remove = msm_pinctrl_remove, | |
115 | }; | |
116 | ||
117 | static int __init qdf2xxx_pinctrl_init(void) | |
118 | { | |
119 | return platform_driver_register(&qdf2xxx_pinctrl_driver); | |
120 | } | |
121 | arch_initcall(qdf2xxx_pinctrl_init); | |
122 | ||
123 | static void __exit qdf2xxx_pinctrl_exit(void) | |
124 | { | |
125 | platform_driver_unregister(&qdf2xxx_pinctrl_driver); | |
126 | } | |
127 | module_exit(qdf2xxx_pinctrl_exit); | |
128 | ||
129 | MODULE_DESCRIPTION("Qualcomm Technologies QDF2xxx pin control driver"); | |
130 | MODULE_LICENSE("GPL v2"); |