Commit | Line | Data |
---|---|---|
170c6152 TP |
1 | /* |
2 | * Pinctrl driver for the Wondermedia SoC's | |
3 | * | |
4 | * Copyright (c) 2013 Tony Prisk <linux@prisktech.co.nz> | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or modify it | |
7 | * under the terms and conditions of the GNU General Public License, | |
8 | * version 2, as published by the Free Software Foundation. | |
9 | * | |
10 | * This program is distributed in the hope it will be useful, but WITHOUT | |
11 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
12 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | |
13 | * more details. | |
14 | */ | |
15 | ||
16 | #include <linux/err.h> | |
17 | #include <linux/gpio.h> | |
18 | #include <linux/interrupt.h> | |
19 | #include <linux/io.h> | |
20 | #include <linux/irq.h> | |
21 | #include <linux/module.h> | |
22 | #include <linux/of.h> | |
23 | #include <linux/of_irq.h> | |
24 | #include <linux/pinctrl/consumer.h> | |
25 | #include <linux/pinctrl/machine.h> | |
26 | #include <linux/pinctrl/pinconf.h> | |
27 | #include <linux/pinctrl/pinconf-generic.h> | |
28 | #include <linux/pinctrl/pinctrl.h> | |
29 | #include <linux/pinctrl/pinmux.h> | |
30 | #include <linux/platform_device.h> | |
31 | #include <linux/slab.h> | |
32 | ||
33 | #include "pinctrl-wmt.h" | |
34 | ||
35 | static inline void wmt_setbits(struct wmt_pinctrl_data *data, u32 reg, | |
36 | u32 mask) | |
37 | { | |
38 | u32 val; | |
39 | ||
40 | val = readl_relaxed(data->base + reg); | |
41 | val |= mask; | |
42 | writel_relaxed(val, data->base + reg); | |
43 | } | |
44 | ||
45 | static inline void wmt_clearbits(struct wmt_pinctrl_data *data, u32 reg, | |
46 | u32 mask) | |
47 | { | |
48 | u32 val; | |
49 | ||
50 | val = readl_relaxed(data->base + reg); | |
51 | val &= ~mask; | |
52 | writel_relaxed(val, data->base + reg); | |
53 | } | |
54 | ||
55 | enum wmt_func_sel { | |
56 | WMT_FSEL_GPIO_IN = 0, | |
57 | WMT_FSEL_GPIO_OUT = 1, | |
58 | WMT_FSEL_ALT = 2, | |
59 | WMT_FSEL_COUNT = 3, | |
60 | }; | |
61 | ||
62 | static const char * const wmt_functions[WMT_FSEL_COUNT] = { | |
63 | [WMT_FSEL_GPIO_IN] = "gpio_in", | |
64 | [WMT_FSEL_GPIO_OUT] = "gpio_out", | |
65 | [WMT_FSEL_ALT] = "alt", | |
66 | }; | |
67 | ||
68 | static int wmt_pmx_get_functions_count(struct pinctrl_dev *pctldev) | |
69 | { | |
70 | return WMT_FSEL_COUNT; | |
71 | } | |
72 | ||
73 | static const char *wmt_pmx_get_function_name(struct pinctrl_dev *pctldev, | |
74 | unsigned selector) | |
75 | { | |
76 | return wmt_functions[selector]; | |
77 | } | |
78 | ||
79 | static int wmt_pmx_get_function_groups(struct pinctrl_dev *pctldev, | |
80 | unsigned selector, | |
81 | const char * const **groups, | |
82 | unsigned * const num_groups) | |
83 | { | |
84 | struct wmt_pinctrl_data *data = pinctrl_dev_get_drvdata(pctldev); | |
85 | ||
86 | /* every pin does every function */ | |
87 | *groups = data->groups; | |
88 | *num_groups = data->ngroups; | |
89 | ||
90 | return 0; | |
91 | } | |
92 | ||
93 | static int wmt_set_pinmux(struct wmt_pinctrl_data *data, unsigned func, | |
94 | unsigned pin) | |
95 | { | |
96 | u32 bank = WMT_BANK_FROM_PIN(pin); | |
97 | u32 bit = WMT_BIT_FROM_PIN(pin); | |
98 | u32 reg_en = data->banks[bank].reg_en; | |
99 | u32 reg_dir = data->banks[bank].reg_dir; | |
100 | ||
101 | if (reg_dir == NO_REG) { | |
102 | dev_err(data->dev, "pin:%d no direction register defined\n", | |
103 | pin); | |
104 | return -EINVAL; | |
105 | } | |
106 | ||
107 | /* | |
108 | * If reg_en == NO_REG, we assume it is a dedicated GPIO and cannot be | |
109 | * disabled (as on VT8500) and that no alternate function is available. | |
110 | */ | |
111 | switch (func) { | |
112 | case WMT_FSEL_GPIO_IN: | |
113 | if (reg_en != NO_REG) | |
114 | wmt_setbits(data, reg_en, BIT(bit)); | |
115 | wmt_clearbits(data, reg_dir, BIT(bit)); | |
116 | break; | |
117 | case WMT_FSEL_GPIO_OUT: | |
118 | if (reg_en != NO_REG) | |
119 | wmt_setbits(data, reg_en, BIT(bit)); | |
120 | wmt_setbits(data, reg_dir, BIT(bit)); | |
121 | break; | |
122 | case WMT_FSEL_ALT: | |
123 | if (reg_en == NO_REG) { | |
124 | dev_err(data->dev, "pin:%d no alt function available\n", | |
125 | pin); | |
126 | return -EINVAL; | |
127 | } | |
128 | wmt_clearbits(data, reg_en, BIT(bit)); | |
129 | } | |
130 | ||
131 | return 0; | |
132 | } | |
133 | ||
134 | static int wmt_pmx_enable(struct pinctrl_dev *pctldev, | |
135 | unsigned func_selector, | |
136 | unsigned group_selector) | |
137 | { | |
138 | struct wmt_pinctrl_data *data = pinctrl_dev_get_drvdata(pctldev); | |
139 | u32 pinnum = data->pins[group_selector].number; | |
140 | ||
141 | return wmt_set_pinmux(data, func_selector, pinnum); | |
142 | } | |
143 | ||
144 | static void wmt_pmx_disable(struct pinctrl_dev *pctldev, | |
145 | unsigned func_selector, | |
146 | unsigned group_selector) | |
147 | { | |
148 | struct wmt_pinctrl_data *data = pinctrl_dev_get_drvdata(pctldev); | |
149 | u32 pinnum = data->pins[group_selector].number; | |
150 | ||
151 | /* disable by setting GPIO_IN */ | |
152 | wmt_set_pinmux(data, WMT_FSEL_GPIO_IN, pinnum); | |
153 | } | |
154 | ||
155 | static void wmt_pmx_gpio_disable_free(struct pinctrl_dev *pctldev, | |
156 | struct pinctrl_gpio_range *range, | |
157 | unsigned offset) | |
158 | { | |
159 | struct wmt_pinctrl_data *data = pinctrl_dev_get_drvdata(pctldev); | |
160 | ||
161 | /* disable by setting GPIO_IN */ | |
162 | wmt_set_pinmux(data, WMT_FSEL_GPIO_IN, offset); | |
163 | } | |
164 | ||
165 | static int wmt_pmx_gpio_set_direction(struct pinctrl_dev *pctldev, | |
166 | struct pinctrl_gpio_range *range, | |
167 | unsigned offset, | |
168 | bool input) | |
169 | { | |
170 | struct wmt_pinctrl_data *data = pinctrl_dev_get_drvdata(pctldev); | |
171 | ||
172 | wmt_set_pinmux(data, (input ? WMT_FSEL_GPIO_IN : WMT_FSEL_GPIO_OUT), | |
173 | offset); | |
174 | ||
175 | return 0; | |
176 | } | |
177 | ||
178 | static struct pinmux_ops wmt_pinmux_ops = { | |
179 | .get_functions_count = wmt_pmx_get_functions_count, | |
180 | .get_function_name = wmt_pmx_get_function_name, | |
181 | .get_function_groups = wmt_pmx_get_function_groups, | |
182 | .enable = wmt_pmx_enable, | |
183 | .disable = wmt_pmx_disable, | |
184 | .gpio_disable_free = wmt_pmx_gpio_disable_free, | |
185 | .gpio_set_direction = wmt_pmx_gpio_set_direction, | |
186 | }; | |
187 | ||
188 | static int wmt_get_groups_count(struct pinctrl_dev *pctldev) | |
189 | { | |
190 | struct wmt_pinctrl_data *data = pinctrl_dev_get_drvdata(pctldev); | |
191 | ||
192 | return data->ngroups; | |
193 | } | |
194 | ||
195 | static const char *wmt_get_group_name(struct pinctrl_dev *pctldev, | |
196 | unsigned selector) | |
197 | { | |
198 | struct wmt_pinctrl_data *data = pinctrl_dev_get_drvdata(pctldev); | |
199 | ||
200 | return data->groups[selector]; | |
201 | } | |
202 | ||
203 | static int wmt_get_group_pins(struct pinctrl_dev *pctldev, | |
204 | unsigned selector, | |
205 | const unsigned **pins, | |
206 | unsigned *num_pins) | |
207 | { | |
208 | struct wmt_pinctrl_data *data = pinctrl_dev_get_drvdata(pctldev); | |
209 | ||
210 | *pins = &data->pins[selector].number; | |
211 | *num_pins = 1; | |
212 | ||
213 | return 0; | |
214 | } | |
215 | ||
216 | static int wmt_pctl_find_group_by_pin(struct wmt_pinctrl_data *data, u32 pin) | |
217 | { | |
218 | int i; | |
219 | ||
220 | for (i = 0; i < data->npins; i++) { | |
221 | if (data->pins[i].number == pin) | |
222 | return i; | |
223 | } | |
224 | ||
225 | return -EINVAL; | |
226 | } | |
227 | ||
228 | static int wmt_pctl_dt_node_to_map_func(struct wmt_pinctrl_data *data, | |
229 | struct device_node *np, | |
230 | u32 pin, u32 fnum, | |
231 | struct pinctrl_map **maps) | |
232 | { | |
233 | int group; | |
234 | struct pinctrl_map *map = *maps; | |
235 | ||
236 | if (fnum >= ARRAY_SIZE(wmt_functions)) { | |
237 | dev_err(data->dev, "invalid wm,function %d\n", fnum); | |
238 | return -EINVAL; | |
239 | } | |
240 | ||
241 | group = wmt_pctl_find_group_by_pin(data, pin); | |
242 | if (group < 0) { | |
243 | dev_err(data->dev, "unable to match pin %d to group\n", pin); | |
244 | return group; | |
245 | } | |
246 | ||
247 | map->type = PIN_MAP_TYPE_MUX_GROUP; | |
248 | map->data.mux.group = data->groups[group]; | |
249 | map->data.mux.function = wmt_functions[fnum]; | |
250 | (*maps)++; | |
251 | ||
252 | return 0; | |
253 | } | |
254 | ||
255 | static int wmt_pctl_dt_node_to_map_pull(struct wmt_pinctrl_data *data, | |
256 | struct device_node *np, | |
257 | u32 pin, u32 pull, | |
258 | struct pinctrl_map **maps) | |
259 | { | |
260 | int group; | |
261 | unsigned long *configs; | |
262 | struct pinctrl_map *map = *maps; | |
263 | ||
264 | if (pull > 2) { | |
265 | dev_err(data->dev, "invalid wm,pull %d\n", pull); | |
266 | return -EINVAL; | |
267 | } | |
268 | ||
269 | group = wmt_pctl_find_group_by_pin(data, pin); | |
270 | if (group < 0) { | |
271 | dev_err(data->dev, "unable to match pin %d to group\n", pin); | |
272 | return group; | |
273 | } | |
274 | ||
275 | configs = kzalloc(sizeof(*configs), GFP_KERNEL); | |
276 | if (!configs) | |
277 | return -ENOMEM; | |
278 | ||
279 | configs[0] = pull; | |
280 | ||
281 | map->type = PIN_MAP_TYPE_CONFIGS_PIN; | |
282 | map->data.configs.group_or_pin = data->groups[group]; | |
283 | map->data.configs.configs = configs; | |
284 | map->data.configs.num_configs = 1; | |
285 | (*maps)++; | |
286 | ||
287 | return 0; | |
288 | } | |
289 | ||
290 | static void wmt_pctl_dt_free_map(struct pinctrl_dev *pctldev, | |
291 | struct pinctrl_map *maps, | |
292 | unsigned num_maps) | |
293 | { | |
294 | int i; | |
295 | ||
296 | for (i = 0; i < num_maps; i++) | |
297 | if (maps[i].type == PIN_MAP_TYPE_CONFIGS_PIN) | |
298 | kfree(maps[i].data.configs.configs); | |
299 | ||
300 | kfree(maps); | |
301 | } | |
302 | ||
303 | static int wmt_pctl_dt_node_to_map(struct pinctrl_dev *pctldev, | |
304 | struct device_node *np, | |
305 | struct pinctrl_map **map, | |
306 | unsigned *num_maps) | |
307 | { | |
308 | struct pinctrl_map *maps, *cur_map; | |
309 | struct property *pins, *funcs, *pulls; | |
310 | u32 pin, func, pull; | |
311 | int num_pins, num_funcs, num_pulls, maps_per_pin; | |
312 | int i, err; | |
313 | struct wmt_pinctrl_data *data = pinctrl_dev_get_drvdata(pctldev); | |
314 | ||
315 | pins = of_find_property(np, "wm,pins", NULL); | |
316 | if (!pins) { | |
317 | dev_err(data->dev, "missing wmt,pins property\n"); | |
318 | return -EINVAL; | |
319 | } | |
320 | ||
321 | funcs = of_find_property(np, "wm,function", NULL); | |
322 | pulls = of_find_property(np, "wm,pull", NULL); | |
323 | ||
324 | if (!funcs && !pulls) { | |
325 | dev_err(data->dev, "neither wm,function nor wm,pull specified\n"); | |
326 | return -EINVAL; | |
327 | } | |
328 | ||
329 | /* | |
330 | * The following lines calculate how many values are defined for each | |
331 | * of the properties. | |
332 | */ | |
333 | num_pins = pins->length / sizeof(u32); | |
334 | num_funcs = funcs ? (funcs->length / sizeof(u32)) : 0; | |
335 | num_pulls = pulls ? (pulls->length / sizeof(u32)) : 0; | |
336 | ||
337 | if (num_funcs > 1 && num_funcs != num_pins) { | |
338 | dev_err(data->dev, "wm,function must have 1 or %d entries\n", | |
339 | num_pins); | |
340 | return -EINVAL; | |
341 | } | |
342 | ||
343 | if (num_pulls > 1 && num_pulls != num_pins) { | |
344 | dev_err(data->dev, "wm,pull must have 1 or %d entries\n", | |
345 | num_pins); | |
346 | return -EINVAL; | |
347 | } | |
348 | ||
349 | maps_per_pin = 0; | |
350 | if (num_funcs) | |
351 | maps_per_pin++; | |
352 | if (num_pulls) | |
353 | maps_per_pin++; | |
354 | ||
355 | cur_map = maps = kzalloc(num_pins * maps_per_pin * sizeof(*maps), | |
356 | GFP_KERNEL); | |
357 | if (!maps) | |
358 | return -ENOMEM; | |
359 | ||
360 | for (i = 0; i < num_pins; i++) { | |
361 | err = of_property_read_u32_index(np, "wm,pins", i, &pin); | |
362 | if (err) | |
363 | goto fail; | |
364 | ||
365 | if (pin >= (data->nbanks * 32)) { | |
366 | dev_err(data->dev, "invalid wm,pins value\n"); | |
367 | err = -EINVAL; | |
368 | goto fail; | |
369 | } | |
370 | ||
371 | if (num_funcs) { | |
372 | err = of_property_read_u32_index(np, "wm,function", | |
373 | (num_funcs > 1 ? i : 0), &func); | |
374 | if (err) | |
375 | goto fail; | |
376 | ||
377 | err = wmt_pctl_dt_node_to_map_func(data, np, pin, func, | |
378 | &cur_map); | |
379 | if (err) | |
380 | goto fail; | |
381 | } | |
382 | ||
383 | if (num_pulls) { | |
384 | err = of_property_read_u32_index(np, "wm,pull", | |
385 | (num_pulls > 1 ? i : 0), &pull); | |
386 | if (err) | |
387 | goto fail; | |
388 | ||
389 | err = wmt_pctl_dt_node_to_map_pull(data, np, pin, pull, | |
390 | &cur_map); | |
391 | if (err) | |
392 | goto fail; | |
393 | } | |
394 | } | |
395 | *map = maps; | |
396 | *num_maps = num_pins * maps_per_pin; | |
397 | return 0; | |
398 | ||
399 | /* | |
400 | * The fail path removes any maps that have been allocated. The fail path is | |
401 | * only called from code after maps has been kzalloc'd. It is also safe to | |
402 | * pass 'num_pins * maps_per_pin' as the map count even though we probably | |
403 | * failed before all the mappings were read as all maps are allocated at once, | |
404 | * and configs are only allocated for .type = PIN_MAP_TYPE_CONFIGS_PIN - there | |
405 | * is no failpath where a config can be allocated without .type being set. | |
406 | */ | |
407 | fail: | |
408 | wmt_pctl_dt_free_map(pctldev, maps, num_pins * maps_per_pin); | |
409 | return err; | |
410 | } | |
411 | ||
412 | static struct pinctrl_ops wmt_pctl_ops = { | |
413 | .get_groups_count = wmt_get_groups_count, | |
414 | .get_group_name = wmt_get_group_name, | |
415 | .get_group_pins = wmt_get_group_pins, | |
416 | .dt_node_to_map = wmt_pctl_dt_node_to_map, | |
417 | .dt_free_map = wmt_pctl_dt_free_map, | |
418 | }; | |
419 | ||
420 | static int wmt_pinconf_get(struct pinctrl_dev *pctldev, unsigned pin, | |
421 | unsigned long *config) | |
422 | { | |
423 | return -ENOTSUPP; | |
424 | } | |
425 | ||
426 | static int wmt_pinconf_set(struct pinctrl_dev *pctldev, unsigned pin, | |
03b054e9 | 427 | unsigned long *configs, unsigned num_configs) |
170c6152 TP |
428 | { |
429 | struct wmt_pinctrl_data *data = pinctrl_dev_get_drvdata(pctldev); | |
03b054e9 SY |
430 | enum pin_config_param param; |
431 | u16 arg; | |
170c6152 TP |
432 | u32 bank = WMT_BANK_FROM_PIN(pin); |
433 | u32 bit = WMT_BIT_FROM_PIN(pin); | |
434 | u32 reg_pull_en = data->banks[bank].reg_pull_en; | |
435 | u32 reg_pull_cfg = data->banks[bank].reg_pull_cfg; | |
03b054e9 | 436 | int i; |
170c6152 TP |
437 | |
438 | if ((reg_pull_en == NO_REG) || (reg_pull_cfg == NO_REG)) { | |
439 | dev_err(data->dev, "bias functions not supported on pin %d\n", | |
440 | pin); | |
441 | return -EINVAL; | |
442 | } | |
443 | ||
03b054e9 SY |
444 | for (i = 0; i < num_configs; i++) { |
445 | param = pinconf_to_config_param(configs[i]); | |
446 | arg = pinconf_to_config_argument(configs[i]); | |
170c6152 | 447 | |
03b054e9 SY |
448 | if ((param == PIN_CONFIG_BIAS_PULL_DOWN) || |
449 | (param == PIN_CONFIG_BIAS_PULL_UP)) { | |
450 | if (arg == 0) | |
451 | param = PIN_CONFIG_BIAS_DISABLE; | |
452 | } | |
453 | ||
454 | switch (param) { | |
455 | case PIN_CONFIG_BIAS_DISABLE: | |
456 | wmt_clearbits(data, reg_pull_en, BIT(bit)); | |
457 | break; | |
458 | case PIN_CONFIG_BIAS_PULL_DOWN: | |
459 | wmt_clearbits(data, reg_pull_cfg, BIT(bit)); | |
460 | wmt_setbits(data, reg_pull_en, BIT(bit)); | |
461 | break; | |
462 | case PIN_CONFIG_BIAS_PULL_UP: | |
463 | wmt_setbits(data, reg_pull_cfg, BIT(bit)); | |
464 | wmt_setbits(data, reg_pull_en, BIT(bit)); | |
465 | break; | |
466 | default: | |
467 | dev_err(data->dev, "unknown pinconf param\n"); | |
468 | return -EINVAL; | |
469 | } | |
470 | } /* for each config */ | |
170c6152 TP |
471 | |
472 | return 0; | |
473 | } | |
474 | ||
475 | static struct pinconf_ops wmt_pinconf_ops = { | |
476 | .pin_config_get = wmt_pinconf_get, | |
477 | .pin_config_set = wmt_pinconf_set, | |
478 | }; | |
479 | ||
480 | static struct pinctrl_desc wmt_desc = { | |
481 | .owner = THIS_MODULE, | |
482 | .name = "pinctrl-wmt", | |
483 | .pctlops = &wmt_pctl_ops, | |
484 | .pmxops = &wmt_pinmux_ops, | |
485 | .confops = &wmt_pinconf_ops, | |
486 | }; | |
487 | ||
488 | static int wmt_gpio_request(struct gpio_chip *chip, unsigned offset) | |
489 | { | |
490 | return pinctrl_request_gpio(chip->base + offset); | |
491 | } | |
492 | ||
493 | static void wmt_gpio_free(struct gpio_chip *chip, unsigned offset) | |
494 | { | |
495 | pinctrl_free_gpio(chip->base + offset); | |
496 | } | |
497 | ||
498 | static int wmt_gpio_get_direction(struct gpio_chip *chip, unsigned offset) | |
499 | { | |
500 | struct wmt_pinctrl_data *data = dev_get_drvdata(chip->dev); | |
501 | u32 bank = WMT_BANK_FROM_PIN(offset); | |
502 | u32 bit = WMT_BIT_FROM_PIN(offset); | |
503 | u32 reg_dir = data->banks[bank].reg_dir; | |
504 | u32 val; | |
505 | ||
506 | val = readl_relaxed(data->base + reg_dir); | |
507 | if (val & BIT(bit)) | |
508 | return GPIOF_DIR_OUT; | |
509 | else | |
510 | return GPIOF_DIR_IN; | |
511 | } | |
512 | ||
513 | static int wmt_gpio_direction_input(struct gpio_chip *chip, unsigned offset) | |
514 | { | |
515 | return pinctrl_gpio_direction_input(chip->base + offset); | |
516 | } | |
517 | ||
518 | static int wmt_gpio_direction_output(struct gpio_chip *chip, unsigned offset, | |
519 | int value) | |
520 | { | |
521 | return pinctrl_gpio_direction_output(chip->base + offset); | |
522 | } | |
523 | ||
524 | static int wmt_gpio_get_value(struct gpio_chip *chip, unsigned offset) | |
525 | { | |
526 | struct wmt_pinctrl_data *data = dev_get_drvdata(chip->dev); | |
527 | u32 bank = WMT_BANK_FROM_PIN(offset); | |
528 | u32 bit = WMT_BIT_FROM_PIN(offset); | |
529 | u32 reg_data_in = data->banks[bank].reg_data_in; | |
530 | ||
531 | if (reg_data_in == NO_REG) { | |
532 | dev_err(data->dev, "no data in register defined\n"); | |
533 | return -EINVAL; | |
534 | } | |
535 | ||
536 | return !!(readl_relaxed(data->base + reg_data_in) & BIT(bit)); | |
537 | } | |
538 | ||
539 | static void wmt_gpio_set_value(struct gpio_chip *chip, unsigned offset, | |
540 | int val) | |
541 | { | |
542 | struct wmt_pinctrl_data *data = dev_get_drvdata(chip->dev); | |
543 | u32 bank = WMT_BANK_FROM_PIN(offset); | |
544 | u32 bit = WMT_BIT_FROM_PIN(offset); | |
545 | u32 reg_data_out = data->banks[bank].reg_data_out; | |
546 | ||
547 | if (reg_data_out == NO_REG) { | |
548 | dev_err(data->dev, "no data out register defined\n"); | |
549 | return; | |
550 | } | |
551 | ||
552 | if (val) | |
553 | wmt_setbits(data, reg_data_out, BIT(bit)); | |
554 | else | |
555 | wmt_clearbits(data, reg_data_out, BIT(bit)); | |
556 | } | |
557 | ||
558 | static struct gpio_chip wmt_gpio_chip = { | |
559 | .label = "gpio-wmt", | |
560 | .owner = THIS_MODULE, | |
561 | .request = wmt_gpio_request, | |
562 | .free = wmt_gpio_free, | |
563 | .get_direction = wmt_gpio_get_direction, | |
564 | .direction_input = wmt_gpio_direction_input, | |
565 | .direction_output = wmt_gpio_direction_output, | |
566 | .get = wmt_gpio_get_value, | |
567 | .set = wmt_gpio_set_value, | |
9fb1f39e | 568 | .can_sleep = false, |
170c6152 TP |
569 | }; |
570 | ||
571 | int wmt_pinctrl_probe(struct platform_device *pdev, | |
572 | struct wmt_pinctrl_data *data) | |
573 | { | |
574 | int err; | |
575 | struct resource *res; | |
576 | ||
577 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | |
76cda6ec | 578 | data->base = devm_ioremap_resource(&pdev->dev, res); |
2207a4e1 | 579 | if (IS_ERR(data->base)) |
76cda6ec | 580 | return PTR_ERR(data->base); |
170c6152 TP |
581 | |
582 | wmt_desc.pins = data->pins; | |
583 | wmt_desc.npins = data->npins; | |
584 | ||
585 | data->gpio_chip = wmt_gpio_chip; | |
586 | data->gpio_chip.dev = &pdev->dev; | |
587 | data->gpio_chip.of_node = pdev->dev.of_node; | |
588 | data->gpio_chip.ngpio = data->nbanks * 32; | |
589 | ||
590 | platform_set_drvdata(pdev, data); | |
591 | ||
592 | data->dev = &pdev->dev; | |
593 | ||
594 | data->pctl_dev = pinctrl_register(&wmt_desc, &pdev->dev, data); | |
1f1a7357 | 595 | if (!data->pctl_dev) { |
170c6152 TP |
596 | dev_err(&pdev->dev, "Failed to register pinctrl\n"); |
597 | return -EINVAL; | |
598 | } | |
599 | ||
600 | err = gpiochip_add(&data->gpio_chip); | |
601 | if (err) { | |
602 | dev_err(&pdev->dev, "could not add GPIO chip\n"); | |
603 | goto fail_gpio; | |
604 | } | |
605 | ||
606 | err = gpiochip_add_pin_range(&data->gpio_chip, dev_name(data->dev), | |
607 | 0, 0, data->nbanks * 32); | |
608 | if (err) | |
609 | goto fail_range; | |
610 | ||
611 | dev_info(&pdev->dev, "Pin controller initialized\n"); | |
612 | ||
613 | return 0; | |
614 | ||
615 | fail_range: | |
97fc4637 | 616 | if (gpiochip_remove(&data->gpio_chip)) |
170c6152 TP |
617 | dev_err(&pdev->dev, "failed to remove gpio chip\n"); |
618 | fail_gpio: | |
619 | pinctrl_unregister(data->pctl_dev); | |
620 | return err; | |
621 | } | |
622 | ||
623 | int wmt_pinctrl_remove(struct platform_device *pdev) | |
624 | { | |
625 | struct wmt_pinctrl_data *data = platform_get_drvdata(pdev); | |
626 | int err; | |
627 | ||
628 | err = gpiochip_remove(&data->gpio_chip); | |
629 | if (err) | |
630 | dev_err(&pdev->dev, "failed to remove gpio chip\n"); | |
631 | ||
632 | pinctrl_unregister(data->pctl_dev); | |
633 | ||
634 | return 0; | |
635 | } |