Commit | Line | Data |
---|---|---|
21f47fbc | 1 | /* |
261995dd | 2 | * drivers/pwm/pwm-vt8500.c |
21f47fbc | 3 | * |
63e1ed23 TP |
4 | * Copyright (C) 2012 Tony Prisk <linux@prisktech.co.nz> |
5 | * Copyright (C) 2010 Alexey Charkov <alchark@gmail.com> | |
21f47fbc AC |
6 | * |
7 | * This software is licensed under the terms of the GNU General Public | |
8 | * License version 2, as published by the Free Software Foundation, and | |
9 | * may be copied, distributed, and modified under those terms. | |
10 | * | |
11 | * This program is distributed in the hope that it will be useful, | |
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | * GNU General Public License for more details. | |
15 | */ | |
16 | ||
17 | #include <linux/module.h> | |
18 | #include <linux/kernel.h> | |
19 | #include <linux/platform_device.h> | |
20 | #include <linux/slab.h> | |
21 | #include <linux/err.h> | |
22 | #include <linux/io.h> | |
23 | #include <linux/pwm.h> | |
24 | #include <linux/delay.h> | |
63e1ed23 | 25 | #include <linux/clk.h> |
21f47fbc AC |
26 | |
27 | #include <asm/div64.h> | |
28 | ||
63e1ed23 TP |
29 | #include <linux/of.h> |
30 | #include <linux/of_device.h> | |
31 | #include <linux/of_address.h> | |
32 | ||
33 | /* | |
34 | * SoC architecture allocates register space for 4 PWMs but only | |
35 | * 2 are currently implemented. | |
36 | */ | |
37 | #define VT8500_NR_PWMS 2 | |
21f47fbc | 38 | |
a245cceb SH |
39 | struct vt8500_chip { |
40 | struct pwm_chip chip; | |
41 | void __iomem *base; | |
63e1ed23 | 42 | struct clk *clk; |
21f47fbc AC |
43 | }; |
44 | ||
a245cceb SH |
45 | #define to_vt8500_chip(chip) container_of(chip, struct vt8500_chip, chip) |
46 | ||
21f47fbc AC |
47 | #define msecs_to_loops(t) (loops_per_jiffy / 1000 * HZ * t) |
48 | static inline void pwm_busy_wait(void __iomem *reg, u8 bitmask) | |
49 | { | |
50 | int loops = msecs_to_loops(10); | |
51 | while ((readb(reg) & bitmask) && --loops) | |
52 | cpu_relax(); | |
53 | ||
54 | if (unlikely(!loops)) | |
eba7cbe5 | 55 | pr_warn("Waiting for status bits 0x%x to clear timed out\n", |
21f47fbc AC |
56 | bitmask); |
57 | } | |
58 | ||
a245cceb SH |
59 | static int vt8500_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm, |
60 | int duty_ns, int period_ns) | |
21f47fbc | 61 | { |
a245cceb | 62 | struct vt8500_chip *vt8500 = to_vt8500_chip(chip); |
21f47fbc AC |
63 | unsigned long long c; |
64 | unsigned long period_cycles, prescale, pv, dc; | |
422470a8 TP |
65 | int err; |
66 | ||
67 | err = clk_enable(vt8500->clk); | |
68 | if (err < 0) { | |
69 | dev_err(chip->dev, "failed to enable clock\n"); | |
70 | return err; | |
71 | } | |
21f47fbc | 72 | |
63e1ed23 | 73 | c = clk_get_rate(vt8500->clk); |
21f47fbc AC |
74 | c = c * period_ns; |
75 | do_div(c, 1000000000); | |
76 | period_cycles = c; | |
77 | ||
78 | if (period_cycles < 1) | |
79 | period_cycles = 1; | |
80 | prescale = (period_cycles - 1) / 4096; | |
81 | pv = period_cycles / (prescale + 1) - 1; | |
82 | if (pv > 4095) | |
83 | pv = 4095; | |
84 | ||
422470a8 TP |
85 | if (prescale > 1023) { |
86 | clk_disable(vt8500->clk); | |
21f47fbc | 87 | return -EINVAL; |
422470a8 | 88 | } |
21f47fbc AC |
89 | |
90 | c = (unsigned long long)pv * duty_ns; | |
91 | do_div(c, period_ns); | |
92 | dc = c; | |
93 | ||
a245cceb SH |
94 | pwm_busy_wait(vt8500->base + 0x40 + pwm->hwpwm, (1 << 1)); |
95 | writel(prescale, vt8500->base + 0x4 + (pwm->hwpwm << 4)); | |
21f47fbc | 96 | |
a245cceb SH |
97 | pwm_busy_wait(vt8500->base + 0x40 + pwm->hwpwm, (1 << 2)); |
98 | writel(pv, vt8500->base + 0x8 + (pwm->hwpwm << 4)); | |
21f47fbc | 99 | |
a245cceb SH |
100 | pwm_busy_wait(vt8500->base + 0x40 + pwm->hwpwm, (1 << 3)); |
101 | writel(dc, vt8500->base + 0xc + (pwm->hwpwm << 4)); | |
21f47fbc | 102 | |
422470a8 | 103 | clk_disable(vt8500->clk); |
21f47fbc AC |
104 | return 0; |
105 | } | |
21f47fbc | 106 | |
a245cceb | 107 | static int vt8500_pwm_enable(struct pwm_chip *chip, struct pwm_device *pwm) |
21f47fbc | 108 | { |
63e1ed23 | 109 | int err; |
a245cceb | 110 | struct vt8500_chip *vt8500 = to_vt8500_chip(chip); |
21f47fbc | 111 | |
63e1ed23 | 112 | err = clk_enable(vt8500->clk); |
2f9569f7 | 113 | if (err < 0) { |
63e1ed23 TP |
114 | dev_err(chip->dev, "failed to enable clock\n"); |
115 | return err; | |
422470a8 | 116 | } |
63e1ed23 | 117 | |
a245cceb SH |
118 | pwm_busy_wait(vt8500->base + 0x40 + pwm->hwpwm, (1 << 0)); |
119 | writel(5, vt8500->base + (pwm->hwpwm << 4)); | |
120 | return 0; | |
21f47fbc | 121 | } |
21f47fbc | 122 | |
a245cceb | 123 | static void vt8500_pwm_disable(struct pwm_chip *chip, struct pwm_device *pwm) |
21f47fbc | 124 | { |
a245cceb | 125 | struct vt8500_chip *vt8500 = to_vt8500_chip(chip); |
21f47fbc | 126 | |
a245cceb SH |
127 | pwm_busy_wait(vt8500->base + 0x40 + pwm->hwpwm, (1 << 0)); |
128 | writel(0, vt8500->base + (pwm->hwpwm << 4)); | |
63e1ed23 TP |
129 | |
130 | clk_disable(vt8500->clk); | |
21f47fbc | 131 | } |
21f47fbc | 132 | |
a245cceb SH |
133 | static struct pwm_ops vt8500_pwm_ops = { |
134 | .enable = vt8500_pwm_enable, | |
135 | .disable = vt8500_pwm_disable, | |
136 | .config = vt8500_pwm_config, | |
137 | .owner = THIS_MODULE, | |
138 | }; | |
21f47fbc | 139 | |
63e1ed23 TP |
140 | static const struct of_device_id vt8500_pwm_dt_ids[] = { |
141 | { .compatible = "via,vt8500-pwm", }, | |
142 | { /* Sentinel */ } | |
143 | }; | |
144 | MODULE_DEVICE_TABLE(of, vt8500_pwm_dt_ids); | |
145 | ||
146 | static int vt8500_pwm_probe(struct platform_device *pdev) | |
21f47fbc | 147 | { |
a245cceb | 148 | struct vt8500_chip *chip; |
21f47fbc | 149 | struct resource *r; |
63e1ed23 | 150 | struct device_node *np = pdev->dev.of_node; |
a245cceb | 151 | int ret; |
21f47fbc | 152 | |
63e1ed23 TP |
153 | if (!np) { |
154 | dev_err(&pdev->dev, "invalid devicetree node\n"); | |
155 | return -EINVAL; | |
156 | } | |
157 | ||
261995dd | 158 | chip = devm_kzalloc(&pdev->dev, sizeof(*chip), GFP_KERNEL); |
a245cceb | 159 | if (chip == NULL) { |
21f47fbc AC |
160 | dev_err(&pdev->dev, "failed to allocate memory\n"); |
161 | return -ENOMEM; | |
162 | } | |
163 | ||
a245cceb SH |
164 | chip->chip.dev = &pdev->dev; |
165 | chip->chip.ops = &vt8500_pwm_ops; | |
166 | chip->chip.base = -1; | |
167 | chip->chip.npwm = VT8500_NR_PWMS; | |
21f47fbc | 168 | |
63e1ed23 TP |
169 | chip->clk = devm_clk_get(&pdev->dev, NULL); |
170 | if (IS_ERR(chip->clk)) { | |
171 | dev_err(&pdev->dev, "clock source not specified\n"); | |
172 | return PTR_ERR(chip->clk); | |
173 | } | |
174 | ||
21f47fbc AC |
175 | r = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
176 | if (r == NULL) { | |
177 | dev_err(&pdev->dev, "no memory resource defined\n"); | |
261995dd | 178 | return -ENODEV; |
21f47fbc AC |
179 | } |
180 | ||
261995dd | 181 | chip->base = devm_request_and_ioremap(&pdev->dev, r); |
63e1ed23 | 182 | if (!chip->base) |
261995dd | 183 | return -EADDRNOTAVAIL; |
21f47fbc | 184 | |
63e1ed23 TP |
185 | ret = clk_prepare(chip->clk); |
186 | if (ret < 0) { | |
187 | dev_err(&pdev->dev, "failed to prepare clock\n"); | |
188 | return ret; | |
189 | } | |
190 | ||
a245cceb | 191 | ret = pwmchip_add(&chip->chip); |
63e1ed23 TP |
192 | if (ret < 0) { |
193 | dev_err(&pdev->dev, "failed to add PWM chip\n"); | |
261995dd | 194 | return ret; |
63e1ed23 | 195 | } |
21f47fbc | 196 | |
a245cceb SH |
197 | platform_set_drvdata(pdev, chip); |
198 | return ret; | |
21f47fbc AC |
199 | } |
200 | ||
63e1ed23 | 201 | static int vt8500_pwm_remove(struct platform_device *pdev) |
21f47fbc | 202 | { |
a245cceb | 203 | struct vt8500_chip *chip; |
21f47fbc | 204 | |
a245cceb SH |
205 | chip = platform_get_drvdata(pdev); |
206 | if (chip == NULL) | |
21f47fbc AC |
207 | return -ENODEV; |
208 | ||
63e1ed23 TP |
209 | clk_unprepare(chip->clk); |
210 | ||
261995dd | 211 | return pwmchip_remove(&chip->chip); |
21f47fbc AC |
212 | } |
213 | ||
63e1ed23 TP |
214 | static struct platform_driver vt8500_pwm_driver = { |
215 | .probe = vt8500_pwm_probe, | |
216 | .remove = vt8500_pwm_remove, | |
21f47fbc AC |
217 | .driver = { |
218 | .name = "vt8500-pwm", | |
219 | .owner = THIS_MODULE, | |
63e1ed23 | 220 | .of_match_table = vt8500_pwm_dt_ids, |
21f47fbc | 221 | }, |
21f47fbc | 222 | }; |
63e1ed23 | 223 | module_platform_driver(vt8500_pwm_driver); |
21f47fbc | 224 | |
63e1ed23 TP |
225 | MODULE_DESCRIPTION("VT8500 PWM Driver"); |
226 | MODULE_AUTHOR("Tony Prisk <linux@prisktech.co.nz>"); | |
227 | MODULE_LICENSE("GPL v2"); |