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regulator: ab8500: Use regulator_list_voltage_linear for fixed voltage
[deliverable/linux.git] / drivers / regulator / ab8500.c
CommitLineData
c789ca20
SI		 1/*
2 * Copyright (C) ST-Ericsson SA 2010
3 *
4 * License Terms: GNU General Public License v2
5 *
e1159e6d
BJ		 6 * Authors: Sundar Iyer <sundar.iyer@stericsson.com> for ST-Ericsson
7 * Bengt Jonsson <bengt.g.jonsson@stericsson.com> for ST-Ericsson
c789ca20
SI		 8 *
9 * AB8500 peripheral regulators
10 *
e1159e6d 11 * AB8500 supports the following regulators:
ea05ef31 12 * VAUX1/2/3, VINTCORE, VTVOUT, VUSB, VAUDIO, VAMIC1/2, VDMIC, VANA
c789ca20
SI		 13 */
14#include <linux/init.h>
15#include <linux/kernel.h>
65602c32 16#include <linux/module.h>
c789ca20
SI		 17#include <linux/err.h>
18#include <linux/platform_device.h>
47c16975 19#include <linux/mfd/abx500.h>
ee66e653 20#include <linux/mfd/abx500/ab8500.h>
3a8334b9
LJ		 21#include <linux/of.h>
22#include <linux/regulator/of_regulator.h>
c789ca20
SI		 23#include <linux/regulator/driver.h>
24#include <linux/regulator/machine.h>
25#include <linux/regulator/ab8500.h>
3a8334b9 26#include <linux/slab.h>
c789ca20
SI		 27
28/**
29 * struct ab8500_regulator_info - ab8500 regulator information
e1159e6d 30 * @dev: device pointer
c789ca20 31 * @desc: regulator description
c789ca20 32 * @regulator_dev: regulator device
bd28a157 33 * @is_enabled: status of regulator (on/off)
7ce4669c 34 * @load_lp_uA: maximum load in idle (low power) mode
47c16975 35 * @update_bank: bank to control on/off
c789ca20 36 * @update_reg: register to control on/off
bd28a157
EV		 37 * @update_mask: mask to enable/disable and set mode of regulator
38 * @update_val: bits holding the regulator current mode
39 * @update_val_idle: bits to enable the regulator in idle (low power) mode
40 * @update_val_normal: bits to enable the regulator in normal (high power) mode
47c16975 41 * @voltage_bank: bank to control regulator voltage
c789ca20
SI		 42 * @voltage_reg: register to control regulator voltage
43 * @voltage_mask: mask to control regulator voltage
a0a7014c 44 * @voltage_shift: shift to control regulator voltage
42ab616a 45 * @delay: startup/set voltage delay in us
c789ca20
SI		 46 */
47struct ab8500_regulator_info {
48 struct device *dev;
49 struct regulator_desc desc;
c789ca20 50 struct regulator_dev *regulator;
bd28a157 51 bool is_enabled;
7ce4669c 52 int load_lp_uA;
47c16975
MW		 53 u8 update_bank;
54 u8 update_reg;
e1159e6d 55 u8 update_mask;
bd28a157
EV		 56 u8 update_val;
57 u8 update_val_idle;
58 u8 update_val_normal;
47c16975
MW		 59 u8 voltage_bank;
60 u8 voltage_reg;
61 u8 voltage_mask;
a0a7014c 62 u8 voltage_shift;
42ab616a 63 unsigned int delay;
c789ca20
SI		 64};
65
66/* voltage tables for the vauxn/vintcore supplies */
ec1cc4d9 67static const unsigned int ldo_vauxn_voltages[] = {
c789ca20
SI		 68 1100000,
69 1200000,
70 1300000,
71 1400000,
72 1500000,
73 1800000,
74 1850000,
75 1900000,
76 2500000,
77 2650000,
78 2700000,
79 2750000,
80 2800000,
81 2900000,
82 3000000,
83 3300000,
84};
85
ec1cc4d9 86static const unsigned int ldo_vaux3_voltages[] = {
2b75151a
BJ		 87 1200000,
88 1500000,
89 1800000,
90 2100000,
91 2500000,
92 2750000,
93 2790000,
94 2910000,
95};
96
ec1cc4d9 97static const unsigned int ldo_vintcore_voltages[] = {
c789ca20
SI		 98 1200000,
99 1225000,
100 1250000,
101 1275000,
102 1300000,
103 1325000,
104 1350000,
105};
106
107static int ab8500_regulator_enable(struct regulator_dev *rdev)
108{
fc24b426 109 int ret;
c789ca20
SI		 110 struct ab8500_regulator_info *info = rdev_get_drvdata(rdev);
111
fc24b426
BJ		 112 if (info == NULL) {
113 dev_err(rdev_get_dev(rdev), "regulator info null pointer\n");
c789ca20 114 return -EINVAL;
fc24b426 115 }
c789ca20 116
47c16975 117 ret = abx500_mask_and_set_register_interruptible(info->dev,
e1159e6d 118 info->update_bank, info->update_reg,
bd28a157 119 info->update_mask, info->update_val);
c789ca20
SI		 120 if (ret < 0)
121 dev_err(rdev_get_dev(rdev),
122 "couldn't set enable bits for regulator\n");
09aefa12 123
bd28a157
EV		 124 info->is_enabled = true;
125
09aefa12
BJ		 126 dev_vdbg(rdev_get_dev(rdev),
127 "%s-enable (bank, reg, mask, value): 0x%x, 0x%x, 0x%x, 0x%x\n",
128 info->desc.name, info->update_bank, info->update_reg,
bd28a157 129 info->update_mask, info->update_val);
09aefa12 130
c789ca20
SI		 131 return ret;
132}
133
134static int ab8500_regulator_disable(struct regulator_dev *rdev)
135{
fc24b426 136 int ret;
c789ca20
SI		 137 struct ab8500_regulator_info *info = rdev_get_drvdata(rdev);
138
fc24b426
BJ		 139 if (info == NULL) {
140 dev_err(rdev_get_dev(rdev), "regulator info null pointer\n");
c789ca20 141 return -EINVAL;
fc24b426 142 }
c789ca20 143
47c16975 144 ret = abx500_mask_and_set_register_interruptible(info->dev,
e1159e6d
BJ		 145 info->update_bank, info->update_reg,
146 info->update_mask, 0x0);
c789ca20
SI		 147 if (ret < 0)
148 dev_err(rdev_get_dev(rdev),
149 "couldn't set disable bits for regulator\n");
09aefa12 150
bd28a157
EV		 151 info->is_enabled = false;
152
09aefa12
BJ		 153 dev_vdbg(rdev_get_dev(rdev),
154 "%s-disable (bank, reg, mask, value): 0x%x, 0x%x, 0x%x, 0x%x\n",
155 info->desc.name, info->update_bank, info->update_reg,
156 info->update_mask, 0x0);
157
c789ca20
SI		 158 return ret;
159}
160
7ce4669c
BJ		 161static unsigned int ab8500_regulator_get_optimum_mode(
162 struct regulator_dev *rdev, int input_uV,
163 int output_uV, int load_uA)
164{
165 unsigned int mode;
166
167 struct ab8500_regulator_info *info = rdev_get_drvdata(rdev);
168
169 if (info == NULL) {
170 dev_err(rdev_get_dev(rdev), "regulator info null pointer\n");
171 return -EINVAL;
172 }
173
174 if (load_uA <= info->load_lp_uA)
175 mode = REGULATOR_MODE_IDLE;
176 else
177 mode = REGULATOR_MODE_NORMAL;
178
179 return mode;
180}
181
bd28a157
EV		 182static int ab8500_regulator_set_mode(struct regulator_dev *rdev,
183 unsigned int mode)
184{
185 int ret = 0;
186
187 struct ab8500_regulator_info *info = rdev_get_drvdata(rdev);
188
189 if (info == NULL) {
190 dev_err(rdev_get_dev(rdev), "regulator info null pointer\n");
191 return -EINVAL;
192 }
193
194 switch (mode) {
195 case REGULATOR_MODE_NORMAL:
196 info->update_val = info->update_val_normal;
197 break;
198 case REGULATOR_MODE_IDLE:
199 info->update_val = info->update_val_idle;
200 break;
201 default:
202 return -EINVAL;
203 }
204
205 if (info->is_enabled) {
206 ret = abx500_mask_and_set_register_interruptible(info->dev,
207 info->update_bank, info->update_reg,
208 info->update_mask, info->update_val);
209 if (ret < 0)
210 dev_err(rdev_get_dev(rdev),
211 "couldn't set regulator mode\n");
7ce4669c
BJ		 212
213 dev_vdbg(rdev_get_dev(rdev),
214 "%s-set_mode (bank, reg, mask, value): "
215 "0x%x, 0x%x, 0x%x, 0x%x\n",
216 info->desc.name, info->update_bank, info->update_reg,
217 info->update_mask, info->update_val);
bd28a157
EV		 218 }
219
220 return ret;
221}
222
223static unsigned int ab8500_regulator_get_mode(struct regulator_dev *rdev)
224{
225 struct ab8500_regulator_info *info = rdev_get_drvdata(rdev);
226 int ret;
227
228 if (info == NULL) {
229 dev_err(rdev_get_dev(rdev), "regulator info null pointer\n");
230 return -EINVAL;
231 }
232
233 if (info->update_val == info->update_val_normal)
234 ret = REGULATOR_MODE_NORMAL;
235 else if (info->update_val == info->update_val_idle)
236 ret = REGULATOR_MODE_IDLE;
237 else
238 ret = -EINVAL;
239
240 return ret;
241}
242
c789ca20
SI		 243static int ab8500_regulator_is_enabled(struct regulator_dev *rdev)
244{
fc24b426 245 int ret;
c789ca20 246 struct ab8500_regulator_info *info = rdev_get_drvdata(rdev);
09aefa12 247 u8 regval;
c789ca20 248
fc24b426
BJ		 249 if (info == NULL) {
250 dev_err(rdev_get_dev(rdev), "regulator info null pointer\n");
c789ca20 251 return -EINVAL;
fc24b426 252 }
c789ca20 253
47c16975 254 ret = abx500_get_register_interruptible(info->dev,
09aefa12 255 info->update_bank, info->update_reg, &regval);
c789ca20
SI		 256 if (ret < 0) {
257 dev_err(rdev_get_dev(rdev),
258 "couldn't read 0x%x register\n", info->update_reg);
259 return ret;
260 }
261
09aefa12
BJ		 262 dev_vdbg(rdev_get_dev(rdev),
263 "%s-is_enabled (bank, reg, mask, value): 0x%x, 0x%x, 0x%x,"
264 " 0x%x\n",
265 info->desc.name, info->update_bank, info->update_reg,
266 info->update_mask, regval);
267
268 if (regval & info->update_mask)
bd28a157 269 info->is_enabled = true;
c789ca20 270 else
bd28a157
EV		 271 info->is_enabled = false;
272
273 return info->is_enabled;
c789ca20
SI		 274}
275
3bf6e90e 276static int ab8500_regulator_get_voltage_sel(struct regulator_dev *rdev)
c789ca20 277{
09aefa12 278 int ret, val;
c789ca20 279 struct ab8500_regulator_info *info = rdev_get_drvdata(rdev);
09aefa12 280 u8 regval;
c789ca20 281
fc24b426
BJ		 282 if (info == NULL) {
283 dev_err(rdev_get_dev(rdev), "regulator info null pointer\n");
c789ca20 284 return -EINVAL;
fc24b426 285 }
c789ca20 286
09aefa12
BJ		 287 ret = abx500_get_register_interruptible(info->dev,
288 info->voltage_bank, info->voltage_reg, &regval);
c789ca20
SI		 289 if (ret < 0) {
290 dev_err(rdev_get_dev(rdev),
291 "couldn't read voltage reg for regulator\n");
292 return ret;
293 }
294
09aefa12 295 dev_vdbg(rdev_get_dev(rdev),
a0a7014c
LW		 296 "%s-get_voltage (bank, reg, mask, shift, value): "
297 "0x%x, 0x%x, 0x%x, 0x%x, 0x%x\n",
298 info->desc.name, info->voltage_bank,
299 info->voltage_reg, info->voltage_mask,
300 info->voltage_shift, regval);
09aefa12 301
09aefa12 302 val = regval & info->voltage_mask;
a0a7014c 303 return val >> info->voltage_shift;
c789ca20
SI		 304}
305
ae713d39
AL		 306static int ab8500_regulator_set_voltage_sel(struct regulator_dev *rdev,
307 unsigned selector)
c789ca20 308{
fc24b426 309 int ret;
c789ca20 310 struct ab8500_regulator_info *info = rdev_get_drvdata(rdev);
09aefa12 311 u8 regval;
c789ca20 312
fc24b426
BJ		 313 if (info == NULL) {
314 dev_err(rdev_get_dev(rdev), "regulator info null pointer\n");
c789ca20 315 return -EINVAL;
fc24b426 316 }
c789ca20 317
c789ca20 318 /* set the registers for the request */
a0a7014c 319 regval = (u8)selector << info->voltage_shift;
47c16975 320 ret = abx500_mask_and_set_register_interruptible(info->dev,
09aefa12
BJ		 321 info->voltage_bank, info->voltage_reg,
322 info->voltage_mask, regval);
c789ca20
SI		 323 if (ret < 0)
324 dev_err(rdev_get_dev(rdev),
325 "couldn't set voltage reg for regulator\n");
326
09aefa12
BJ		 327 dev_vdbg(rdev_get_dev(rdev),
328 "%s-set_voltage (bank, reg, mask, value): 0x%x, 0x%x, 0x%x,"
329 " 0x%x\n",
330 info->desc.name, info->voltage_bank, info->voltage_reg,
331 info->voltage_mask, regval);
332
c789ca20
SI		 333 return ret;
334}
335
42ab616a
LW		 336static int ab8500_regulator_set_voltage_time_sel(struct regulator_dev *rdev,
337 unsigned int old_sel,
338 unsigned int new_sel)
339{
340 struct ab8500_regulator_info *info = rdev_get_drvdata(rdev);
42ab616a 341
42ab616a
LW		 342 return info->delay;
343}
344
7ce4669c
BJ		 345static struct regulator_ops ab8500_regulator_volt_mode_ops = {
346 .enable = ab8500_regulator_enable,
347 .disable = ab8500_regulator_disable,
348 .is_enabled = ab8500_regulator_is_enabled,
349 .get_optimum_mode = ab8500_regulator_get_optimum_mode,
350 .set_mode = ab8500_regulator_set_mode,
351 .get_mode = ab8500_regulator_get_mode,
352 .get_voltage_sel = ab8500_regulator_get_voltage_sel,
353 .set_voltage_sel = ab8500_regulator_set_voltage_sel,
354 .list_voltage = regulator_list_voltage_table,
355 .set_voltage_time_sel = ab8500_regulator_set_voltage_time_sel,
c789ca20
SI		 356};
357
7ce4669c
BJ		 358static struct regulator_ops ab8500_regulator_mode_ops = {
359 .enable = ab8500_regulator_enable,
360 .disable = ab8500_regulator_disable,
361 .is_enabled = ab8500_regulator_is_enabled,
362 .get_optimum_mode = ab8500_regulator_get_optimum_mode,
363 .set_mode = ab8500_regulator_set_mode,
364 .get_mode = ab8500_regulator_get_mode,
365 .get_voltage_sel = ab8500_regulator_get_voltage_sel,
5689e830 366 .list_voltage = regulator_list_voltage_linear,
7ce4669c
BJ		 367};
368
369static struct regulator_ops ab8500_regulator_ops = {
370 .enable = ab8500_regulator_enable,
371 .disable = ab8500_regulator_disable,
372 .is_enabled = ab8500_regulator_is_enabled,
373 .get_voltage_sel = ab8500_regulator_get_voltage_sel,
5689e830 374 .list_voltage = regulator_list_voltage_linear,
c789ca20
SI		 375};
376
6909b452
BJ		 377static struct ab8500_regulator_info
378 ab8500_regulator_info[AB8500_NUM_REGULATORS] = {
c789ca20 379 /*
e1159e6d
BJ		 380 * Variable Voltage Regulators
381 * name, min mV, max mV,
382 * update bank, reg, mask, enable val
ec1cc4d9 383 * volt bank, reg, mask
c789ca20 384 */
6909b452
BJ		 385 [AB8500_LDO_AUX1] = {
386 .desc = {
387 .name = "LDO-AUX1",
7ce4669c 388 .ops = &ab8500_regulator_volt_mode_ops,
6909b452
BJ		 389 .type = REGULATOR_VOLTAGE,
390 .id = AB8500_LDO_AUX1,
391 .owner = THIS_MODULE,
392 .n_voltages = ARRAY_SIZE(ldo_vauxn_voltages),
ec1cc4d9 393 .volt_table = ldo_vauxn_voltages,
6909b452 394 },
7ce4669c 395 .load_lp_uA = 5000,
6909b452
BJ		 396 .update_bank = 0x04,
397 .update_reg = 0x09,
398 .update_mask = 0x03,
bd28a157
EV		 399 .update_val = 0x01,
400 .update_val_idle = 0x03,
401 .update_val_normal = 0x01,
6909b452
BJ		 402 .voltage_bank = 0x04,
403 .voltage_reg = 0x1f,
404 .voltage_mask = 0x0f,
6909b452
BJ		 405 },
406 [AB8500_LDO_AUX2] = {
407 .desc = {
408 .name = "LDO-AUX2",
7ce4669c 409 .ops = &ab8500_regulator_volt_mode_ops,
6909b452
BJ		 410 .type = REGULATOR_VOLTAGE,
411 .id = AB8500_LDO_AUX2,
412 .owner = THIS_MODULE,
413 .n_voltages = ARRAY_SIZE(ldo_vauxn_voltages),
ec1cc4d9 414 .volt_table = ldo_vauxn_voltages,
6909b452 415 },
7ce4669c 416 .load_lp_uA = 5000,
6909b452
BJ		 417 .update_bank = 0x04,
418 .update_reg = 0x09,
419 .update_mask = 0x0c,
bd28a157
EV		 420 .update_val = 0x04,
421 .update_val_idle = 0x0c,
422 .update_val_normal = 0x04,
6909b452
BJ		 423 .voltage_bank = 0x04,
424 .voltage_reg = 0x20,
425 .voltage_mask = 0x0f,
6909b452
BJ		 426 },
427 [AB8500_LDO_AUX3] = {
428 .desc = {
429 .name = "LDO-AUX3",
7ce4669c 430 .ops = &ab8500_regulator_volt_mode_ops,
6909b452
BJ		 431 .type = REGULATOR_VOLTAGE,
432 .id = AB8500_LDO_AUX3,
433 .owner = THIS_MODULE,
434 .n_voltages = ARRAY_SIZE(ldo_vaux3_voltages),
ec1cc4d9 435 .volt_table = ldo_vaux3_voltages,
6909b452 436 },
7ce4669c 437 .load_lp_uA = 5000,
6909b452
BJ		 438 .update_bank = 0x04,
439 .update_reg = 0x0a,
440 .update_mask = 0x03,
bd28a157
EV		 441 .update_val = 0x01,
442 .update_val_idle = 0x03,
443 .update_val_normal = 0x01,
6909b452
BJ		 444 .voltage_bank = 0x04,
445 .voltage_reg = 0x21,
446 .voltage_mask = 0x07,
6909b452
BJ		 447 },
448 [AB8500_LDO_INTCORE] = {
449 .desc = {
450 .name = "LDO-INTCORE",
7ce4669c 451 .ops = &ab8500_regulator_volt_mode_ops,
6909b452
BJ		 452 .type = REGULATOR_VOLTAGE,
453 .id = AB8500_LDO_INTCORE,
454 .owner = THIS_MODULE,
455 .n_voltages = ARRAY_SIZE(ldo_vintcore_voltages),
ec1cc4d9 456 .volt_table = ldo_vintcore_voltages,
6909b452 457 },
7ce4669c 458 .load_lp_uA = 5000,
6909b452
BJ		 459 .update_bank = 0x03,
460 .update_reg = 0x80,
461 .update_mask = 0x44,
bd28a157
EV		 462 .update_val = 0x04,
463 .update_val_idle = 0x44,
464 .update_val_normal = 0x04,
6909b452
BJ		 465 .voltage_bank = 0x03,
466 .voltage_reg = 0x80,
467 .voltage_mask = 0x38,
a0a7014c 468 .voltage_shift = 3,
6909b452 469 },
c789ca20
SI		 470
471 /*
e1159e6d
BJ		 472 * Fixed Voltage Regulators
473 * name, fixed mV,
474 * update bank, reg, mask, enable val
c789ca20 475 */
6909b452
BJ		 476 [AB8500_LDO_TVOUT] = {
477 .desc = {
478 .name = "LDO-TVOUT",
7ce4669c 479 .ops = &ab8500_regulator_mode_ops,
6909b452
BJ		 480 .type = REGULATOR_VOLTAGE,
481 .id = AB8500_LDO_TVOUT,
482 .owner = THIS_MODULE,
483 .n_voltages = 1,
7142e213 484 .min_uV = 2000000,
7fee2afb 485 .enable_time = 10000,
6909b452 486 },
42ab616a 487 .delay = 10000,
7ce4669c 488 .load_lp_uA = 1000,
6909b452
BJ		 489 .update_bank = 0x03,
490 .update_reg = 0x80,
491 .update_mask = 0x82,
bd28a157 492 .update_val = 0x02,
7ce4669c
BJ		 493 .update_val_idle = 0x82,
494 .update_val_normal = 0x02,
6909b452 495 },
328a5369
AL		 496
497 /*
498 * Regulators with fixed voltage and normal mode
499 */
ea05ef31
BJ		 500 [AB8500_LDO_USB] = {
501 .desc = {
502 .name = "LDO-USB",
328a5369 503 .ops = &ab8500_regulator_ops,
ea05ef31
BJ		 504 .type = REGULATOR_VOLTAGE,
505 .id = AB8500_LDO_USB,
506 .owner = THIS_MODULE,
507 .n_voltages = 1,
7142e213 508 .min_uV = 3300000,
ea05ef31 509 },
ea05ef31
BJ		 510 .update_bank = 0x03,
511 .update_reg = 0x82,
512 .update_mask = 0x03,
ea05ef31 513 },
6909b452
BJ		 514 [AB8500_LDO_AUDIO] = {
515 .desc = {
516 .name = "LDO-AUDIO",
7ce4669c 517 .ops = &ab8500_regulator_ops,
6909b452
BJ		 518 .type = REGULATOR_VOLTAGE,
519 .id = AB8500_LDO_AUDIO,
520 .owner = THIS_MODULE,
521 .n_voltages = 1,
7142e213 522 .min_uV = 2000000,
6909b452 523 },
6909b452
BJ		 524 .update_bank = 0x03,
525 .update_reg = 0x83,
526 .update_mask = 0x02,
bd28a157 527 .update_val = 0x02,
6909b452
BJ		 528 },
529 [AB8500_LDO_ANAMIC1] = {
530 .desc = {
531 .name = "LDO-ANAMIC1",
7ce4669c 532 .ops = &ab8500_regulator_ops,
6909b452
BJ		 533 .type = REGULATOR_VOLTAGE,
534 .id = AB8500_LDO_ANAMIC1,
535 .owner = THIS_MODULE,
536 .n_voltages = 1,
7142e213 537 .min_uV = 2050000,
6909b452 538 },
6909b452
BJ		 539 .update_bank = 0x03,
540 .update_reg = 0x83,
541 .update_mask = 0x08,
bd28a157 542 .update_val = 0x08,
6909b452
BJ		 543 },
544 [AB8500_LDO_ANAMIC2] = {
545 .desc = {
546 .name = "LDO-ANAMIC2",
7ce4669c 547 .ops = &ab8500_regulator_ops,
6909b452
BJ		 548 .type = REGULATOR_VOLTAGE,
549 .id = AB8500_LDO_ANAMIC2,
550 .owner = THIS_MODULE,
551 .n_voltages = 1,
7142e213 552 .min_uV = 2050000,
6909b452 553 },
6909b452
BJ		 554 .update_bank = 0x03,
555 .update_reg = 0x83,
556 .update_mask = 0x10,
bd28a157 557 .update_val = 0x10,
6909b452
BJ		 558 },
559 [AB8500_LDO_DMIC] = {
560 .desc = {
561 .name = "LDO-DMIC",
7ce4669c 562 .ops = &ab8500_regulator_ops,
6909b452
BJ		 563 .type = REGULATOR_VOLTAGE,
564 .id = AB8500_LDO_DMIC,
565 .owner = THIS_MODULE,
566 .n_voltages = 1,
7142e213 567 .min_uV = 1800000,
6909b452 568 },
6909b452
BJ		 569 .update_bank = 0x03,
570 .update_reg = 0x83,
571 .update_mask = 0x04,
bd28a157 572 .update_val = 0x04,
6909b452 573 },
7ce4669c
BJ		 574
575 /*
576 * Regulators with fixed voltage and normal/idle modes
577 */
6909b452
BJ		 578 [AB8500_LDO_ANA] = {
579 .desc = {
580 .name = "LDO-ANA",
7ce4669c 581 .ops = &ab8500_regulator_mode_ops,
6909b452
BJ		 582 .type = REGULATOR_VOLTAGE,
583 .id = AB8500_LDO_ANA,
584 .owner = THIS_MODULE,
585 .n_voltages = 1,
7142e213 586 .min_uV = 1200000,
6909b452 587 },
7ce4669c 588 .load_lp_uA = 1000,
6909b452
BJ		 589 .update_bank = 0x04,
590 .update_reg = 0x06,
591 .update_mask = 0x0c,
bd28a157 592 .update_val = 0x04,
7ce4669c
BJ		 593 .update_val_idle = 0x0c,
594 .update_val_normal = 0x04,
6909b452
BJ		 595 },
596
597
c789ca20
SI		 598};
599
79568b94
BJ		 600struct ab8500_reg_init {
601 u8 bank;
602 u8 addr;
603 u8 mask;
604};
605
606#define REG_INIT(_id, _bank, _addr, _mask) \
607 [_id] = { \
608 .bank = _bank, \
609 .addr = _addr, \
610 .mask = _mask, \
611 }
612
613static struct ab8500_reg_init ab8500_reg_init[] = {
614 /*
33bc8f46
LJ		 615 * 0x03, VarmRequestCtrl
616 * 0x0c, VapeRequestCtrl
617 * 0x30, Vsmps1RequestCtrl
618 * 0xc0, Vsmps2RequestCtrl
619 */
620 REG_INIT(AB8500_REGUREQUESTCTRL1, 0x03, 0x03, 0xff),
621 /*
622 * 0x03, Vsmps3RequestCtrl
d79df329 623 * 0x0c, VpllRequestCtrl
33bc8f46 624 * 0x30, VanaRequestCtrl
79568b94
BJ		 625 * 0xc0, VextSupply1RequestCtrl
626 */
33bc8f46 627 REG_INIT(AB8500_REGUREQUESTCTRL2, 0x03, 0x04, 0xff),
79568b94
BJ		 628 /*
629 * 0x03, VextSupply2RequestCtrl
630 * 0x0c, VextSupply3RequestCtrl
631 * 0x30, Vaux1RequestCtrl
632 * 0xc0, Vaux2RequestCtrl
633 */
634 REG_INIT(AB8500_REGUREQUESTCTRL3, 0x03, 0x05, 0xff),
635 /*
636 * 0x03, Vaux3RequestCtrl
637 * 0x04, SwHPReq
638 */
639 REG_INIT(AB8500_REGUREQUESTCTRL4, 0x03, 0x06, 0x07),
640 /*
d79df329
LJ		 641 * 0x01, Vsmps1SysClkReq1HPValid
642 * 0x02, Vsmps2SysClkReq1HPValid
643 * 0x04, Vsmps3SysClkReq1HPValid
79568b94 644 * 0x08, VanaSysClkReq1HPValid
d79df329 645 * 0x10, VpllSysClkReq1HPValid
79568b94
BJ		 646 * 0x20, Vaux1SysClkReq1HPValid
647 * 0x40, Vaux2SysClkReq1HPValid
648 * 0x80, Vaux3SysClkReq1HPValid
649 */
d79df329 650 REG_INIT(AB8500_REGUSYSCLKREQ1HPVALID1, 0x03, 0x07, 0xff),
79568b94 651 /*
33bc8f46
LJ		 652 * 0x01, VapeSysClkReq1HPValid
653 * 0x02, VarmSysClkReq1HPValid
654 * 0x04, VbbSysClkReq1HPValid
655 * 0x08, VmodSysClkReq1HPValid
79568b94
BJ		 656 * 0x10, VextSupply1SysClkReq1HPValid
657 * 0x20, VextSupply2SysClkReq1HPValid
658 * 0x40, VextSupply3SysClkReq1HPValid
659 */
33bc8f46 660 REG_INIT(AB8500_REGUSYSCLKREQ1HPVALID2, 0x03, 0x08, 0x7f),
79568b94 661 /*
33bc8f46
LJ		 662 * 0x01, Vsmps1HwHPReq1Valid
663 * 0x02, Vsmps2HwHPReq1Valid
664 * 0x04, Vsmps3HwHPReq1Valid
79568b94 665 * 0x08, VanaHwHPReq1Valid
33bc8f46 666 * 0x10, VpllHwHPReq1Valid
79568b94
BJ		 667 * 0x20, Vaux1HwHPReq1Valid
668 * 0x40, Vaux2HwHPReq1Valid
669 * 0x80, Vaux3HwHPReq1Valid
670 */
33bc8f46 671 REG_INIT(AB8500_REGUHWHPREQ1VALID1, 0x03, 0x09, 0xff),
79568b94
BJ		 672 /*
673 * 0x01, VextSupply1HwHPReq1Valid
674 * 0x02, VextSupply2HwHPReq1Valid
675 * 0x04, VextSupply3HwHPReq1Valid
33bc8f46 676 * 0x08, VmodHwHPReq1Valid
79568b94 677 */
33bc8f46 678 REG_INIT(AB8500_REGUHWHPREQ1VALID2, 0x03, 0x0a, 0x0f),
79568b94 679 /*
33bc8f46
LJ		 680 * 0x01, Vsmps1HwHPReq2Valid
681 * 0x02, Vsmps2HwHPReq2Valid
682 * 0x03, Vsmps3HwHPReq2Valid
79568b94 683 * 0x08, VanaHwHPReq2Valid
33bc8f46 684 * 0x10, VpllHwHPReq2Valid
79568b94
BJ		 685 * 0x20, Vaux1HwHPReq2Valid
686 * 0x40, Vaux2HwHPReq2Valid
687 * 0x80, Vaux3HwHPReq2Valid
688 */
33bc8f46 689 REG_INIT(AB8500_REGUHWHPREQ2VALID1, 0x03, 0x0b, 0xff),
79568b94
BJ		 690 /*
691 * 0x01, VextSupply1HwHPReq2Valid
692 * 0x02, VextSupply2HwHPReq2Valid
693 * 0x04, VextSupply3HwHPReq2Valid
33bc8f46 694 * 0x08, VmodHwHPReq2Valid
79568b94 695 */
33bc8f46 696 REG_INIT(AB8500_REGUHWHPREQ2VALID2, 0x03, 0x0c, 0x0f),
79568b94 697 /*
33bc8f46
LJ		 698 * 0x01, VapeSwHPReqValid
699 * 0x02, VarmSwHPReqValid
700 * 0x04, Vsmps1SwHPReqValid
701 * 0x08, Vsmps2SwHPReqValid
702 * 0x10, Vsmps3SwHPReqValid
79568b94 703 * 0x20, VanaSwHPReqValid
33bc8f46 704 * 0x40, VpllSwHPReqValid
79568b94
BJ		 705 * 0x80, Vaux1SwHPReqValid
706 */
33bc8f46 707 REG_INIT(AB8500_REGUSWHPREQVALID1, 0x03, 0x0d, 0xff),
79568b94
BJ		 708 /*
709 * 0x01, Vaux2SwHPReqValid
710 * 0x02, Vaux3SwHPReqValid
711 * 0x04, VextSupply1SwHPReqValid
712 * 0x08, VextSupply2SwHPReqValid
713 * 0x10, VextSupply3SwHPReqValid
33bc8f46 714 * 0x20, VmodSwHPReqValid
79568b94 715 */
33bc8f46 716 REG_INIT(AB8500_REGUSWHPREQVALID2, 0x03, 0x0e, 0x3f),
79568b94
BJ		 717 /*
718 * 0x02, SysClkReq2Valid1
719 * ...
720 * 0x80, SysClkReq8Valid1
721 */
722 REG_INIT(AB8500_REGUSYSCLKREQVALID1, 0x03, 0x0f, 0xfe),
723 /*
724 * 0x02, SysClkReq2Valid2
725 * ...
726 * 0x80, SysClkReq8Valid2
727 */
728 REG_INIT(AB8500_REGUSYSCLKREQVALID2, 0x03, 0x10, 0xfe),
729 /*
730 * 0x02, VTVoutEna
731 * 0x04, Vintcore12Ena
732 * 0x38, Vintcore12Sel
733 * 0x40, Vintcore12LP
734 * 0x80, VTVoutLP
735 */
736 REG_INIT(AB8500_REGUMISC1, 0x03, 0x80, 0xfe),
737 /*
738 * 0x02, VaudioEna
739 * 0x04, VdmicEna
740 * 0x08, Vamic1Ena
741 * 0x10, Vamic2Ena
742 */
743 REG_INIT(AB8500_VAUDIOSUPPLY, 0x03, 0x83, 0x1e),
744 /*
745 * 0x01, Vamic1_dzout
746 * 0x02, Vamic2_dzout
747 */
748 REG_INIT(AB8500_REGUCTRL1VAMIC, 0x03, 0x84, 0x03),
d79df329
LJ		 749 /*
750 * 0x03, Vsmps1Regu
751 * 0x0c, Vsmps1SelCtrl
33bc8f46
LJ		 752 * 0x10, Vsmps1AutoMode
753 * 0x20, Vsmps1PWMMode
d79df329 754 */
33bc8f46 755 REG_INIT(AB8500_VSMPS1REGU, 0x04, 0x03, 0x3f),
d79df329
LJ		 756 /*
757 * 0x03, Vsmps2Regu
758 * 0x0c, Vsmps2SelCtrl
33bc8f46
LJ		 759 * 0x10, Vsmps2AutoMode
760 * 0x20, Vsmps2PWMMode
d79df329 761 */
33bc8f46 762 REG_INIT(AB8500_VSMPS2REGU, 0x04, 0x04, 0x3f),
79568b94 763 /*
79568b94 764 * 0x03, VpllRegu
33bc8f46 765 * 0x0c, VanaRegu
79568b94
BJ		 766 */
767 REG_INIT(AB8500_VPLLVANAREGU, 0x04, 0x06, 0x0f),
768 /*
769 * 0x01, VrefDDREna
770 * 0x02, VrefDDRSleepMode
771 */
772 REG_INIT(AB8500_VREFDDR, 0x04, 0x07, 0x03),
773 /*
774 * 0x03, VextSupply1Regu
775 * 0x0c, VextSupply2Regu
776 * 0x30, VextSupply3Regu
777 * 0x40, ExtSupply2Bypass
778 * 0x80, ExtSupply3Bypass
779 */
780 REG_INIT(AB8500_EXTSUPPLYREGU, 0x04, 0x08, 0xff),
781 /*
782 * 0x03, Vaux1Regu
783 * 0x0c, Vaux2Regu
784 */
785 REG_INIT(AB8500_VAUX12REGU, 0x04, 0x09, 0x0f),
786 /*
d79df329 787 * 0x0c, Vrf1Regu
79568b94
BJ		 788 * 0x03, Vaux3Regu
789 */
d79df329 790 REG_INIT(AB8500_VRF1VAUX3REGU, 0x04, 0x0a, 0x0f),
79568b94
BJ		 791 /*
792 * 0x3f, Vsmps1Sel1
793 */
794 REG_INIT(AB8500_VSMPS1SEL1, 0x04, 0x13, 0x3f),
795 /*
796 * 0x0f, Vaux1Sel
797 */
798 REG_INIT(AB8500_VAUX1SEL, 0x04, 0x1f, 0x0f),
799 /*
800 * 0x0f, Vaux2Sel
801 */
802 REG_INIT(AB8500_VAUX2SEL, 0x04, 0x20, 0x0f),
803 /*
804 * 0x07, Vaux3Sel
33bc8f46 805 * 0x30, Vrf1Sel
79568b94 806 */
33bc8f46 807 REG_INIT(AB8500_VRF1VAUX3SEL, 0x04, 0x21, 0x37),
79568b94
BJ		 808 /*
809 * 0x01, VextSupply12LP
810 */
811 REG_INIT(AB8500_REGUCTRL2SPARE, 0x04, 0x22, 0x01),
812 /*
33bc8f46
LJ		 813 * 0x01, VpllDisch
814 * 0x02, Vrf1Disch
79568b94
BJ		 815 * 0x04, Vaux1Disch
816 * 0x08, Vaux2Disch
817 * 0x10, Vaux3Disch
818 * 0x20, Vintcore12Disch
819 * 0x40, VTVoutDisch
820 * 0x80, VaudioDisch
821 */
33bc8f46 822 REG_INIT(AB8500_REGUCTRLDISCH, 0x04, 0x43, 0xff),
79568b94 823 /*
33bc8f46 824 * 0x01, VsimDisch
79568b94
BJ		 825 * 0x02, VanaDisch
826 * 0x04, VdmicPullDownEna
33bc8f46 827 * 0x08, VpllPullDownEna
79568b94
BJ		 828 * 0x10, VdmicDisch
829 */
33bc8f46 830 REG_INIT(AB8500_REGUCTRLDISCH2, 0x04, 0x44, 0x1f),
79568b94
BJ		 831};
832
3c1b8438
LJ		 833static int ab8500_regulator_init_registers(struct platform_device *pdev,
834 int id, int mask, int value)
a7ac1d9e
LJ		 835{
836 int err;
837
3c1b8438
LJ		 838 BUG_ON(value & ~mask);
839 BUG_ON(mask & ~ab8500_reg_init[id].mask);
a7ac1d9e 840
3c1b8438 841 /* initialize register */
a7ac1d9e
LJ		 842 err = abx500_mask_and_set_register_interruptible(
843 &pdev->dev,
844 ab8500_reg_init[id].bank,
845 ab8500_reg_init[id].addr,
3c1b8438 846 mask, value);
a7ac1d9e
LJ		 847 if (err < 0) {
848 dev_err(&pdev->dev,
849 "Failed to initialize 0x%02x, 0x%02x.\n",
850 ab8500_reg_init[id].bank,
851 ab8500_reg_init[id].addr);
852 return err;
853 }
a7ac1d9e 854 dev_vdbg(&pdev->dev,
3c1b8438
LJ		 855 " init: 0x%02x, 0x%02x, 0x%02x, 0x%02x\n",
856 ab8500_reg_init[id].bank,
857 ab8500_reg_init[id].addr,
858 mask, value);
a7ac1d9e
LJ		 859
860 return 0;
861}
862
a5023574 863static int ab8500_regulator_register(struct platform_device *pdev,
a7ac1d9e
LJ		 864 struct regulator_init_data *init_data,
865 int id,
866 struct device_node *np)
867{
868 struct ab8500_regulator_info *info = NULL;
869 struct regulator_config config = { };
870 int err;
871
872 /* assign per-regulator data */
873 info = &ab8500_regulator_info[id];
874 info->dev = &pdev->dev;
875
876 config.dev = &pdev->dev;
877 config.init_data = init_data;
878 config.driver_data = info;
879 config.of_node = np;
880
881 /* fix for hardware before ab8500v2.0 */
882 if (abx500_get_chip_id(info->dev) < 0x20) {
883 if (info->desc.id == AB8500_LDO_AUX3) {
884 info->desc.n_voltages =
885 ARRAY_SIZE(ldo_vauxn_voltages);
ec1cc4d9 886 info->desc.volt_table = ldo_vauxn_voltages;
a7ac1d9e
LJ		 887 info->voltage_mask = 0xf;
888 }
889 }
890
891 /* register regulator with framework */
892 info->regulator = regulator_register(&info->desc, &config);
893 if (IS_ERR(info->regulator)) {
894 err = PTR_ERR(info->regulator);
895 dev_err(&pdev->dev, "failed to register regulator %s\n",
896 info->desc.name);
897 /* when we fail, un-register all earlier regulators */
898 while (--id >= 0) {
899 info = &ab8500_regulator_info[id];
900 regulator_unregister(info->regulator);
901 }
902 return err;
903 }
904
905 return 0;
906}
907
3a8334b9 908static struct of_regulator_match ab8500_regulator_matches[] = {
7e715b95
LJ		 909 { .name = "ab8500_ldo_aux1", .driver_data = (void *) AB8500_LDO_AUX1, },
910 { .name = "ab8500_ldo_aux2", .driver_data = (void *) AB8500_LDO_AUX2, },
911 { .name = "ab8500_ldo_aux3", .driver_data = (void *) AB8500_LDO_AUX3, },
912 { .name = "ab8500_ldo_intcore", .driver_data = (void *) AB8500_LDO_INTCORE, },
913 { .name = "ab8500_ldo_tvout", .driver_data = (void *) AB8500_LDO_TVOUT, },
914 { .name = "ab8500_ldo_usb", .driver_data = (void *) AB8500_LDO_USB, },
915 { .name = "ab8500_ldo_audio", .driver_data = (void *) AB8500_LDO_AUDIO, },
916 { .name = "ab8500_ldo_anamic1", .driver_data = (void *) AB8500_LDO_ANAMIC1, },
917 { .name = "ab8500_ldo_amamic2", .driver_data = (void *) AB8500_LDO_ANAMIC2, },
918 { .name = "ab8500_ldo_dmic", .driver_data = (void *) AB8500_LDO_DMIC, },
919 { .name = "ab8500_ldo_ana", .driver_data = (void *) AB8500_LDO_ANA, },
3a8334b9
LJ		 920};
921
a5023574 922static int
3a8334b9
LJ		 923ab8500_regulator_of_probe(struct platform_device *pdev, struct device_node *np)
924{
925 int err, i;
926
927 for (i = 0; i < ARRAY_SIZE(ab8500_regulator_info); i++) {
928 err = ab8500_regulator_register(
929 pdev, ab8500_regulator_matches[i].init_data,
930 i, ab8500_regulator_matches[i].of_node);
931 if (err)
932 return err;
933 }
934
935 return 0;
936}
937
a5023574 938static int ab8500_regulator_probe(struct platform_device *pdev)
c789ca20
SI		 939{
940 struct ab8500 *ab8500 = dev_get_drvdata(pdev->dev.parent);
3a8334b9 941 struct device_node *np = pdev->dev.of_node;
732805a5
BJ		 942 struct ab8500_platform_data *ppdata;
943 struct ab8500_regulator_platform_data *pdata;
c789ca20
SI		 944 int i, err;
945
3a8334b9
LJ		 946 if (np) {
947 err = of_regulator_match(&pdev->dev, np,
948 ab8500_regulator_matches,
949 ARRAY_SIZE(ab8500_regulator_matches));
950 if (err < 0) {
951 dev_err(&pdev->dev,
952 "Error parsing regulator init data: %d\n", err);
953 return err;
954 }
955
956 err = ab8500_regulator_of_probe(pdev, np);
957 return err;
958 }
959
c789ca20
SI		 960 if (!ab8500) {
961 dev_err(&pdev->dev, "null mfd parent\n");
962 return -EINVAL;
963 }
732805a5
BJ		 964
965 ppdata = dev_get_platdata(ab8500->dev);
966 if (!ppdata) {
967 dev_err(&pdev->dev, "null parent pdata\n");
968 return -EINVAL;
969 }
970
971 pdata = ppdata->regulator;
fc24b426
BJ		 972 if (!pdata) {
973 dev_err(&pdev->dev, "null pdata\n");
974 return -EINVAL;
975 }
c789ca20 976
cb189b07
BJ		 977 /* make sure the platform data has the correct size */
978 if (pdata->num_regulator != ARRAY_SIZE(ab8500_regulator_info)) {
79568b94 979 dev_err(&pdev->dev, "Configuration error: size mismatch.\n");
cb189b07
BJ		 980 return -EINVAL;
981 }
982
79568b94 983 /* initialize registers */
732805a5 984 for (i = 0; i < pdata->num_reg_init; i++) {
3c1b8438 985 int id, mask, value;
79568b94 986
732805a5
BJ		 987 id = pdata->reg_init[i].id;
988 mask = pdata->reg_init[i].mask;
989 value = pdata->reg_init[i].value;
79568b94
BJ		 990
991 /* check for configuration errors */
3c1b8438 992 BUG_ON(id >= AB8500_NUM_REGULATOR_REGISTERS);
79568b94 993
3c1b8438 994 err = ab8500_regulator_init_registers(pdev, id, mask, value);
a7ac1d9e 995 if (err < 0)
79568b94 996 return err;
79568b94
BJ		 997 }
998
c789ca20
SI		 999 /* register all regulators */
1000 for (i = 0; i < ARRAY_SIZE(ab8500_regulator_info); i++) {
a7ac1d9e
LJ		 1001 err = ab8500_regulator_register(pdev, &pdata->regulator[i], i, NULL);
1002 if (err < 0)
c789ca20 1003 return err;
c789ca20
SI		 1004 }
1005
1006 return 0;
1007}
1008
8dc995f5 1009static int ab8500_regulator_remove(struct platform_device *pdev)
c789ca20
SI		 1010{
1011 int i;
1012
1013 for (i = 0; i < ARRAY_SIZE(ab8500_regulator_info); i++) {
1014 struct ab8500_regulator_info *info = NULL;
1015 info = &ab8500_regulator_info[i];
09aefa12
BJ		 1016
1017 dev_vdbg(rdev_get_dev(info->regulator),
1018 "%s-remove\n", info->desc.name);
1019
c789ca20
SI		 1020 regulator_unregister(info->regulator);
1021 }
1022
1023 return 0;
1024}
1025
1026static struct platform_driver ab8500_regulator_driver = {
1027 .probe = ab8500_regulator_probe,
5eb9f2b9 1028 .remove = ab8500_regulator_remove,
c789ca20
SI		 1029 .driver = {
1030 .name = "ab8500-regulator",
1031 .owner = THIS_MODULE,
1032 },
1033};
1034
1035static int __init ab8500_regulator_init(void)
1036{
1037 int ret;
1038
1039 ret = platform_driver_register(&ab8500_regulator_driver);
1040 if (ret != 0)
1041 pr_err("Failed to register ab8500 regulator: %d\n", ret);
1042
1043 return ret;
1044}
1045subsys_initcall(ab8500_regulator_init);
1046
1047static void __exit ab8500_regulator_exit(void)
1048{
1049 platform_driver_unregister(&ab8500_regulator_driver);
1050}
1051module_exit(ab8500_regulator_exit);
1052
1053MODULE_LICENSE("GPL v2");
1054MODULE_AUTHOR("Sundar Iyer <sundar.iyer@stericsson.com>");
732805a5 1055MODULE_AUTHOR("Bengt Jonsson <bengt.g.jonsson@stericsson.com>");
c789ca20
SI		 1056MODULE_DESCRIPTION("Regulator Driver for ST-Ericsson AB8500 Mixed-Sig PMIC");
1057MODULE_ALIAS("platform:ab8500-regulator");
Linux kernel - Deliverables
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