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e3e5aff7 YCLP |
1 | /* |
2 | * Copyright (C) 2011 Freescale Semiconductor, Inc. All Rights Reserved. | |
3 | */ | |
4 | ||
5 | /* | |
6 | * This program is free software; you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License as published by | |
8 | * the Free Software Foundation; either version 2 of the License, or | |
9 | * (at your option) any later version. | |
10 | ||
11 | * This program is distributed in the hope that it will be useful, | |
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | * GNU General Public License for more details. | |
15 | ||
16 | * You should have received a copy of the GNU General Public License along | |
17 | * with this program; if not, write to the Free Software Foundation, Inc., | |
18 | * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. | |
19 | */ | |
20 | ||
21 | #include <linux/slab.h> | |
22 | #include <linux/device.h> | |
23 | #include <linux/module.h> | |
baa64151 | 24 | #include <linux/mfd/syscon.h> |
e3e5aff7 YCLP |
25 | #include <linux/err.h> |
26 | #include <linux/io.h> | |
27 | #include <linux/platform_device.h> | |
28 | #include <linux/of.h> | |
29 | #include <linux/of_address.h> | |
baa64151 | 30 | #include <linux/regmap.h> |
e3e5aff7 YCLP |
31 | #include <linux/regulator/driver.h> |
32 | #include <linux/regulator/of_regulator.h> | |
33 | ||
34 | struct anatop_regulator { | |
35 | const char *name; | |
36 | u32 control_reg; | |
baa64151 | 37 | struct regmap *anatop; |
e3e5aff7 YCLP |
38 | int vol_bit_shift; |
39 | int vol_bit_width; | |
40 | int min_bit_val; | |
41 | int min_voltage; | |
42 | int max_voltage; | |
43 | struct regulator_desc rdesc; | |
44 | struct regulator_init_data *initdata; | |
45 | }; | |
46 | ||
baa64151 DA |
47 | static int anatop_regmap_set_voltage_sel(struct regulator_dev *reg, |
48 | unsigned selector) | |
e3e5aff7 YCLP |
49 | { |
50 | struct anatop_regulator *anatop_reg = rdev_get_drvdata(reg); | |
d01c3a1e | 51 | u32 val, mask; |
e3e5aff7 YCLP |
52 | |
53 | if (!anatop_reg->control_reg) | |
54 | return -ENOTSUPP; | |
55 | ||
d01c3a1e | 56 | val = anatop_reg->min_bit_val + selector; |
e3e5aff7 | 57 | dev_dbg(®->dev, "%s: calculated val %d\n", __func__, val); |
b09530ef RZ |
58 | mask = ((1 << anatop_reg->vol_bit_width) - 1) << |
59 | anatop_reg->vol_bit_shift; | |
60 | val <<= anatop_reg->vol_bit_shift; | |
baa64151 DA |
61 | regmap_update_bits(anatop_reg->anatop, anatop_reg->control_reg, |
62 | mask, val); | |
e3e5aff7 YCLP |
63 | |
64 | return 0; | |
65 | } | |
66 | ||
baa64151 | 67 | static int anatop_regmap_get_voltage_sel(struct regulator_dev *reg) |
e3e5aff7 YCLP |
68 | { |
69 | struct anatop_regulator *anatop_reg = rdev_get_drvdata(reg); | |
3e2a9284 | 70 | u32 val, mask; |
e3e5aff7 YCLP |
71 | |
72 | if (!anatop_reg->control_reg) | |
73 | return -ENOTSUPP; | |
74 | ||
baa64151 | 75 | regmap_read(anatop_reg->anatop, anatop_reg->control_reg, &val); |
3e2a9284 | 76 | mask = ((1 << anatop_reg->vol_bit_width) - 1) << |
b09530ef | 77 | anatop_reg->vol_bit_shift; |
3e2a9284 | 78 | val = (val & mask) >> anatop_reg->vol_bit_shift; |
e3e5aff7 YCLP |
79 | |
80 | return val - anatop_reg->min_bit_val; | |
81 | } | |
82 | ||
e3e5aff7 | 83 | static struct regulator_ops anatop_rops = { |
baa64151 DA |
84 | .set_voltage_sel = anatop_regmap_set_voltage_sel, |
85 | .get_voltage_sel = anatop_regmap_get_voltage_sel, | |
d01c3a1e AL |
86 | .list_voltage = regulator_list_voltage_linear, |
87 | .map_voltage = regulator_map_voltage_linear, | |
e3e5aff7 YCLP |
88 | }; |
89 | ||
90 | static int __devinit anatop_regulator_probe(struct platform_device *pdev) | |
91 | { | |
92 | struct device *dev = &pdev->dev; | |
93 | struct device_node *np = dev->of_node; | |
baa64151 | 94 | struct device_node *anatop_np; |
e3e5aff7 YCLP |
95 | struct regulator_desc *rdesc; |
96 | struct regulator_dev *rdev; | |
97 | struct anatop_regulator *sreg; | |
98 | struct regulator_init_data *initdata; | |
d914d81b | 99 | struct regulator_config config = { }; |
e3e5aff7 YCLP |
100 | int ret = 0; |
101 | ||
102 | initdata = of_get_regulator_init_data(dev, np); | |
103 | sreg = devm_kzalloc(dev, sizeof(*sreg), GFP_KERNEL); | |
104 | if (!sreg) | |
105 | return -ENOMEM; | |
106 | sreg->initdata = initdata; | |
107 | sreg->name = kstrdup(of_get_property(np, "regulator-name", NULL), | |
108 | GFP_KERNEL); | |
109 | rdesc = &sreg->rdesc; | |
110 | memset(rdesc, 0, sizeof(*rdesc)); | |
111 | rdesc->name = sreg->name; | |
112 | rdesc->ops = &anatop_rops; | |
113 | rdesc->type = REGULATOR_VOLTAGE; | |
114 | rdesc->owner = THIS_MODULE; | |
baa64151 DA |
115 | |
116 | anatop_np = of_get_parent(np); | |
117 | if (!anatop_np) | |
118 | return -ENODEV; | |
119 | sreg->anatop = syscon_node_to_regmap(anatop_np); | |
120 | of_node_put(anatop_np); | |
121 | if (IS_ERR(sreg->anatop)) | |
122 | return PTR_ERR(sreg->anatop); | |
123 | ||
2f2cc27f YCLP |
124 | ret = of_property_read_u32(np, "anatop-reg-offset", |
125 | &sreg->control_reg); | |
e3e5aff7 | 126 | if (ret) { |
2f2cc27f | 127 | dev_err(dev, "no anatop-reg-offset property set\n"); |
e3e5aff7 YCLP |
128 | goto anatop_probe_end; |
129 | } | |
130 | ret = of_property_read_u32(np, "anatop-vol-bit-width", | |
131 | &sreg->vol_bit_width); | |
132 | if (ret) { | |
133 | dev_err(dev, "no anatop-vol-bit-width property set\n"); | |
134 | goto anatop_probe_end; | |
135 | } | |
136 | ret = of_property_read_u32(np, "anatop-vol-bit-shift", | |
137 | &sreg->vol_bit_shift); | |
138 | if (ret) { | |
139 | dev_err(dev, "no anatop-vol-bit-shift property set\n"); | |
140 | goto anatop_probe_end; | |
141 | } | |
142 | ret = of_property_read_u32(np, "anatop-min-bit-val", | |
143 | &sreg->min_bit_val); | |
144 | if (ret) { | |
145 | dev_err(dev, "no anatop-min-bit-val property set\n"); | |
146 | goto anatop_probe_end; | |
147 | } | |
148 | ret = of_property_read_u32(np, "anatop-min-voltage", | |
149 | &sreg->min_voltage); | |
150 | if (ret) { | |
151 | dev_err(dev, "no anatop-min-voltage property set\n"); | |
152 | goto anatop_probe_end; | |
153 | } | |
154 | ret = of_property_read_u32(np, "anatop-max-voltage", | |
155 | &sreg->max_voltage); | |
156 | if (ret) { | |
157 | dev_err(dev, "no anatop-max-voltage property set\n"); | |
158 | goto anatop_probe_end; | |
159 | } | |
160 | ||
161 | rdesc->n_voltages = (sreg->max_voltage - sreg->min_voltage) | |
162 | / 25000 + 1; | |
0713e6ab AL |
163 | rdesc->min_uV = sreg->min_voltage; |
164 | rdesc->uV_step = 25000; | |
e3e5aff7 | 165 | |
d914d81b AL |
166 | config.dev = &pdev->dev; |
167 | config.init_data = initdata; | |
168 | config.driver_data = sreg; | |
169 | config.of_node = pdev->dev.of_node; | |
170 | ||
e3e5aff7 | 171 | /* register regulator */ |
d914d81b | 172 | rdev = regulator_register(rdesc, &config); |
e3e5aff7 YCLP |
173 | if (IS_ERR(rdev)) { |
174 | dev_err(dev, "failed to register %s\n", | |
175 | rdesc->name); | |
176 | ret = PTR_ERR(rdev); | |
177 | goto anatop_probe_end; | |
178 | } | |
179 | ||
180 | platform_set_drvdata(pdev, rdev); | |
181 | ||
182 | anatop_probe_end: | |
183 | if (ret) | |
184 | kfree(sreg->name); | |
185 | ||
186 | return ret; | |
187 | } | |
188 | ||
189 | static int __devexit anatop_regulator_remove(struct platform_device *pdev) | |
190 | { | |
191 | struct regulator_dev *rdev = platform_get_drvdata(pdev); | |
192 | struct anatop_regulator *sreg = rdev_get_drvdata(rdev); | |
193 | const char *name = sreg->name; | |
194 | ||
195 | regulator_unregister(rdev); | |
196 | kfree(name); | |
197 | ||
198 | return 0; | |
199 | } | |
200 | ||
201 | static struct of_device_id __devinitdata of_anatop_regulator_match_tbl[] = { | |
202 | { .compatible = "fsl,anatop-regulator", }, | |
203 | { /* end */ } | |
204 | }; | |
205 | ||
c0d78c23 | 206 | static struct platform_driver anatop_regulator_driver = { |
e3e5aff7 YCLP |
207 | .driver = { |
208 | .name = "anatop_regulator", | |
209 | .owner = THIS_MODULE, | |
210 | .of_match_table = of_anatop_regulator_match_tbl, | |
211 | }, | |
212 | .probe = anatop_regulator_probe, | |
0c09d315 | 213 | .remove = __devexit_p(anatop_regulator_remove), |
e3e5aff7 YCLP |
214 | }; |
215 | ||
216 | static int __init anatop_regulator_init(void) | |
217 | { | |
c0d78c23 | 218 | return platform_driver_register(&anatop_regulator_driver); |
e3e5aff7 YCLP |
219 | } |
220 | postcore_initcall(anatop_regulator_init); | |
221 | ||
222 | static void __exit anatop_regulator_exit(void) | |
223 | { | |
c0d78c23 | 224 | platform_driver_unregister(&anatop_regulator_driver); |
e3e5aff7 YCLP |
225 | } |
226 | module_exit(anatop_regulator_exit); | |
227 | ||
228 | MODULE_AUTHOR("Nancy Chen <Nancy.Chen@freescale.com>, " | |
229 | "Ying-Chun Liu (PaulLiu) <paul.liu@linaro.org>"); | |
230 | MODULE_DESCRIPTION("ANATOP Regulator driver"); | |
231 | MODULE_LICENSE("GPL v2"); |