[deliverable/linux.git] / drivers / regulator / anatop-regulator.c

/*
 * Copyright (C) 2011 Freescale Semiconductor, Inc. All Rights Reserved.
 */

/*
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.

 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.

 * You should have received a copy of the GNU General Public License along
 * with this program; if not, write to the Free Software Foundation, Inc.,
 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
 */

#include <linux/slab.h>
#include <linux/device.h>
#include <linux/module.h>
#include <linux/err.h>
#include <linux/io.h>
#include <linux/platform_device.h>
#include <linux/of.h>
#include <linux/of_address.h>
#include <linux/mfd/anatop.h>
#include <linux/regulator/driver.h>
#include <linux/regulator/of_regulator.h>

struct anatop_regulator {
	const char *name;
	u32 control_reg;
	struct anatop *mfd;
	int vol_bit_shift;
	int vol_bit_width;
	int min_bit_val;
	int min_voltage;
	int max_voltage;
	struct regulator_desc rdesc;
	struct regulator_init_data *initdata;
};

static int anatop_set_voltage_sel(struct regulator_dev *reg, unsigned selector)
{
	struct anatop_regulator *anatop_reg = rdev_get_drvdata(reg);
	u32 val, mask;

	if (!anatop_reg->control_reg)
		return -ENOTSUPP;

	val = anatop_reg->min_bit_val + selector;
	dev_dbg(&reg->dev, "%s: calculated val %d\n", __func__, val);
	mask = ((1 << anatop_reg->vol_bit_width) - 1) <<
		anatop_reg->vol_bit_shift;
	val <<= anatop_reg->vol_bit_shift;
	anatop_write_reg(anatop_reg->mfd, anatop_reg->control_reg, val, mask);

	return 0;
}

static int anatop_get_voltage_sel(struct regulator_dev *reg)
{
	struct anatop_regulator *anatop_reg = rdev_get_drvdata(reg);
	u32 val;

	if (!anatop_reg->control_reg)
		return -ENOTSUPP;

	val = anatop_read_reg(anatop_reg->mfd, anatop_reg->control_reg);
	val = (val & ((1 << anatop_reg->vol_bit_width) - 1)) >>
		anatop_reg->vol_bit_shift;

	return val - anatop_reg->min_bit_val;
}

static struct regulator_ops anatop_rops = {
	.set_voltage_sel = anatop_set_voltage_sel,
	.get_voltage_sel = anatop_get_voltage_sel,
	.list_voltage = regulator_list_voltage_linear,
	.map_voltage = regulator_map_voltage_linear,
};

static int __devinit anatop_regulator_probe(struct platform_device *pdev)
{
	struct device *dev = &pdev->dev;
	struct device_node *np = dev->of_node;
	struct regulator_desc *rdesc;
	struct regulator_dev *rdev;
	struct anatop_regulator *sreg;
	struct regulator_init_data *initdata;
	struct anatop *anatopmfd = dev_get_drvdata(pdev->dev.parent);
	struct regulator_config config = { };
	int ret = 0;

	initdata = of_get_regulator_init_data(dev, np);
	sreg = devm_kzalloc(dev, sizeof(*sreg), GFP_KERNEL);
	if (!sreg)
		return -ENOMEM;
	sreg->initdata = initdata;
	sreg->name = kstrdup(of_get_property(np, "regulator-name", NULL),
			     GFP_KERNEL);
	rdesc = &sreg->rdesc;
	memset(rdesc, 0, sizeof(*rdesc));
	rdesc->name = sreg->name;
	rdesc->ops = &anatop_rops;
	rdesc->type = REGULATOR_VOLTAGE;
	rdesc->owner = THIS_MODULE;
	sreg->mfd = anatopmfd;
	ret = of_property_read_u32(np, "anatop-reg-offset",
				   &sreg->control_reg);
	if (ret) {
		dev_err(dev, "no anatop-reg-offset property set\n");
		goto anatop_probe_end;
	}
	ret = of_property_read_u32(np, "anatop-vol-bit-width",
				   &sreg->vol_bit_width);
	if (ret) {
		dev_err(dev, "no anatop-vol-bit-width property set\n");
		goto anatop_probe_end;
	}
	ret = of_property_read_u32(np, "anatop-vol-bit-shift",
				   &sreg->vol_bit_shift);
	if (ret) {
		dev_err(dev, "no anatop-vol-bit-shift property set\n");
		goto anatop_probe_end;
	}
	ret = of_property_read_u32(np, "anatop-min-bit-val",
				   &sreg->min_bit_val);
	if (ret) {
		dev_err(dev, "no anatop-min-bit-val property set\n");
		goto anatop_probe_end;
	}
	ret = of_property_read_u32(np, "anatop-min-voltage",
				   &sreg->min_voltage);
	if (ret) {
		dev_err(dev, "no anatop-min-voltage property set\n");
		goto anatop_probe_end;
	}
	ret = of_property_read_u32(np, "anatop-max-voltage",
				   &sreg->max_voltage);
	if (ret) {
		dev_err(dev, "no anatop-max-voltage property set\n");
		goto anatop_probe_end;
	}

	rdesc->n_voltages = (sreg->max_voltage - sreg->min_voltage)
		/ 25000 + 1;
	rdesc->min_uV = sreg->min_voltage;
	rdesc->uV_step = 25000;

	config.dev = &pdev->dev;
	config.init_data = initdata;
	config.driver_data = sreg;
	config.of_node = pdev->dev.of_node;

	/* register regulator */
	rdev = regulator_register(rdesc, &config);
	if (IS_ERR(rdev)) {
		dev_err(dev, "failed to register %s\n",
			rdesc->name);
		ret = PTR_ERR(rdev);
		goto anatop_probe_end;
	}

	platform_set_drvdata(pdev, rdev);

anatop_probe_end:
	if (ret)
		kfree(sreg->name);

	return ret;
}

static int __devexit anatop_regulator_remove(struct platform_device *pdev)
{
	struct regulator_dev *rdev = platform_get_drvdata(pdev);
	struct anatop_regulator *sreg = rdev_get_drvdata(rdev);
	const char *name = sreg->name;

	regulator_unregister(rdev);
	kfree(name);

	return 0;
}

static struct of_device_id __devinitdata of_anatop_regulator_match_tbl[] = {
	{ .compatible = "fsl,anatop-regulator", },
	{ /* end */ }
};

static struct platform_driver anatop_regulator_driver = {
	.driver = {
		.name	= "anatop_regulator",
		.owner  = THIS_MODULE,
		.of_match_table = of_anatop_regulator_match_tbl,
	},
	.probe	= anatop_regulator_probe,
	.remove	= __devexit_p(anatop_regulator_remove),
};

static int __init anatop_regulator_init(void)
{
	return platform_driver_register(&anatop_regulator_driver);
}
postcore_initcall(anatop_regulator_init);

static void __exit anatop_regulator_exit(void)
{
	platform_driver_unregister(&anatop_regulator_driver);
}
module_exit(anatop_regulator_exit);

MODULE_AUTHOR("Nancy Chen <Nancy.Chen@freescale.com>, "
	      "Ying-Chun Liu (PaulLiu) <paul.liu@linaro.org>");
MODULE_DESCRIPTION("ANATOP Regulator driver");
MODULE_LICENSE("GPL v2");
Commit	Line	Data
e3e5aff7 YCLP	1	/*
	2	* Copyright (C) 2011 Freescale Semiconductor, Inc. All Rights Reserved.
	3	*/
	4
	5	/*
	6	* This program is free software; you can redistribute it and/or modify
	7	* it under the terms of the GNU General Public License as published by
	8	* the Free Software Foundation; either version 2 of the License, or
	9	* (at your option) any later version.
	10
	11	* This program is distributed in the hope that it will be useful,
	12	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	13	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	14	* GNU General Public License for more details.
	15
	16	* You should have received a copy of the GNU General Public License along
	17	* with this program; if not, write to the Free Software Foundation, Inc.,
	18	* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
	19	*/
	20
	21	#include <linux/slab.h>
	22	#include <linux/device.h>
	23	#include <linux/module.h>
	24	#include <linux/err.h>
	25	#include <linux/io.h>
	26	#include <linux/platform_device.h>
	27	#include <linux/of.h>
	28	#include <linux/of_address.h>
	29	#include <linux/mfd/anatop.h>
	30	#include <linux/regulator/driver.h>
	31	#include <linux/regulator/of_regulator.h>
	32
	33	struct anatop_regulator {
	34	const char *name;
	35	u32 control_reg;
	36	struct anatop *mfd;
	37	int vol_bit_shift;
	38	int vol_bit_width;
	39	int min_bit_val;
	40	int min_voltage;
	41	int max_voltage;
	42	struct regulator_desc rdesc;
	43	struct regulator_init_data *initdata;
	44	};
	45
d01c3a1e	46	static int anatop_set_voltage_sel(struct regulator_dev *reg, unsigned selector)
e3e5aff7 YCLP	47	{
e3e5aff7 YCLP	48	struct anatop_regulator *anatop_reg = rdev_get_drvdata(reg);
d01c3a1e	49	u32 val, mask;
e3e5aff7 YCLP	50
	51	if (!anatop_reg->control_reg)
	52	return -ENOTSUPP;
	53
d01c3a1e	54	val = anatop_reg->min_bit_val + selector;
e3e5aff7	55	dev_dbg(&reg->dev, "%s: calculated val %d\n", __func__, val);
b09530ef RZ	56	mask = ((1 << anatop_reg->vol_bit_width) - 1) <<
	57	anatop_reg->vol_bit_shift;
	58	val <<= anatop_reg->vol_bit_shift;
	59	anatop_write_reg(anatop_reg->mfd, anatop_reg->control_reg, val, mask);
e3e5aff7 YCLP	60
	61	return 0;
	62	}
	63
	64	static int anatop_get_voltage_sel(struct regulator_dev *reg)
	65	{
	66	struct anatop_regulator *anatop_reg = rdev_get_drvdata(reg);
	67	u32 val;
	68
	69	if (!anatop_reg->control_reg)
	70	return -ENOTSUPP;
	71
b09530ef RZ	72	val = anatop_read_reg(anatop_reg->mfd, anatop_reg->control_reg);
	73	val = (val & ((1 << anatop_reg->vol_bit_width) - 1)) >>
	74	anatop_reg->vol_bit_shift;
e3e5aff7 YCLP	75
	76	return val - anatop_reg->min_bit_val;
	77	}
	78
e3e5aff7	79	static struct regulator_ops anatop_rops = {
d01c3a1e	80	.set_voltage_sel = anatop_set_voltage_sel,
e3e5aff7	81	.get_voltage_sel = anatop_get_voltage_sel,
d01c3a1e AL	82	.list_voltage = regulator_list_voltage_linear,
d01c3a1e AL	83	.map_voltage = regulator_map_voltage_linear,
e3e5aff7 YCLP	84	};
	85
	86	static int __devinit anatop_regulator_probe(struct platform_device *pdev)
	87	{
	88	struct device *dev = &pdev->dev;
	89	struct device_node *np = dev->of_node;
	90	struct regulator_desc *rdesc;
	91	struct regulator_dev *rdev;
	92	struct anatop_regulator *sreg;
	93	struct regulator_init_data *initdata;
	94	struct anatop *anatopmfd = dev_get_drvdata(pdev->dev.parent);
d914d81b	95	struct regulator_config config = { };
e3e5aff7 YCLP	96	int ret = 0;
	97
	98	initdata = of_get_regulator_init_data(dev, np);
	99	sreg = devm_kzalloc(dev, sizeof(*sreg), GFP_KERNEL);
	100	if (!sreg)
	101	return -ENOMEM;
	102	sreg->initdata = initdata;
	103	sreg->name = kstrdup(of_get_property(np, "regulator-name", NULL),
	104	GFP_KERNEL);
	105	rdesc = &sreg->rdesc;
	106	memset(rdesc, 0, sizeof(*rdesc));
	107	rdesc->name = sreg->name;
	108	rdesc->ops = &anatop_rops;
	109	rdesc->type = REGULATOR_VOLTAGE;
	110	rdesc->owner = THIS_MODULE;
	111	sreg->mfd = anatopmfd;
2f2cc27f YCLP	112	ret = of_property_read_u32(np, "anatop-reg-offset",
2f2cc27f YCLP	113	&sreg->control_reg);
e3e5aff7	114	if (ret) {
2f2cc27f	115	dev_err(dev, "no anatop-reg-offset property set\n");
e3e5aff7 YCLP	116	goto anatop_probe_end;
	117	}
	118	ret = of_property_read_u32(np, "anatop-vol-bit-width",
	119	&sreg->vol_bit_width);
	120	if (ret) {
	121	dev_err(dev, "no anatop-vol-bit-width property set\n");
	122	goto anatop_probe_end;
	123	}
	124	ret = of_property_read_u32(np, "anatop-vol-bit-shift",
	125	&sreg->vol_bit_shift);
	126	if (ret) {
	127	dev_err(dev, "no anatop-vol-bit-shift property set\n");
	128	goto anatop_probe_end;
	129	}
	130	ret = of_property_read_u32(np, "anatop-min-bit-val",
	131	&sreg->min_bit_val);
	132	if (ret) {
	133	dev_err(dev, "no anatop-min-bit-val property set\n");
	134	goto anatop_probe_end;
	135	}
	136	ret = of_property_read_u32(np, "anatop-min-voltage",
	137	&sreg->min_voltage);
	138	if (ret) {
	139	dev_err(dev, "no anatop-min-voltage property set\n");
	140	goto anatop_probe_end;
	141	}
	142	ret = of_property_read_u32(np, "anatop-max-voltage",
	143	&sreg->max_voltage);
	144	if (ret) {
	145	dev_err(dev, "no anatop-max-voltage property set\n");
	146	goto anatop_probe_end;
	147	}
	148
	149	rdesc->n_voltages = (sreg->max_voltage - sreg->min_voltage)
	150	/ 25000 + 1;
0713e6ab AL	151	rdesc->min_uV = sreg->min_voltage;
0713e6ab AL	152	rdesc->uV_step = 25000;
e3e5aff7	153
d914d81b AL	154	config.dev = &pdev->dev;
	155	config.init_data = initdata;
	156	config.driver_data = sreg;
	157	config.of_node = pdev->dev.of_node;
	158
e3e5aff7	159	/* register regulator */
d914d81b	160	rdev = regulator_register(rdesc, &config);
e3e5aff7 YCLP	161	if (IS_ERR(rdev)) {
	162	dev_err(dev, "failed to register %s\n",
	163	rdesc->name);
	164	ret = PTR_ERR(rdev);
	165	goto anatop_probe_end;
	166	}
	167
	168	platform_set_drvdata(pdev, rdev);
	169
	170	anatop_probe_end:
	171	if (ret)
	172	kfree(sreg->name);
	173
	174	return ret;
	175	}
	176
	177	static int __devexit anatop_regulator_remove(struct platform_device *pdev)
	178	{
	179	struct regulator_dev *rdev = platform_get_drvdata(pdev);
	180	struct anatop_regulator *sreg = rdev_get_drvdata(rdev);
	181	const char *name = sreg->name;
	182
	183	regulator_unregister(rdev);
	184	kfree(name);
	185
	186	return 0;
	187	}
	188
	189	static struct of_device_id __devinitdata of_anatop_regulator_match_tbl[] = {
	190	{ .compatible = "fsl,anatop-regulator", },
	191	{ /* end */ }
	192	};
	193
c0d78c23	194	static struct platform_driver anatop_regulator_driver = {
e3e5aff7 YCLP	195	.driver = {
	196	.name = "anatop_regulator",
	197	.owner = THIS_MODULE,
	198	.of_match_table = of_anatop_regulator_match_tbl,
	199	},
	200	.probe = anatop_regulator_probe,
0c09d315	201	.remove = __devexit_p(anatop_regulator_remove),
e3e5aff7 YCLP	202	};
	203
	204	static int __init anatop_regulator_init(void)
	205	{
c0d78c23	206	return platform_driver_register(&anatop_regulator_driver);
e3e5aff7 YCLP	207	}
	208	postcore_initcall(anatop_regulator_init);
	209
	210	static void __exit anatop_regulator_exit(void)
	211	{
c0d78c23	212	platform_driver_unregister(&anatop_regulator_driver);
e3e5aff7 YCLP	213	}
	214	module_exit(anatop_regulator_exit);
	215
	216	MODULE_AUTHOR("Nancy Chen <Nancy.Chen@freescale.com>, "
	217	"Ying-Chun Liu (PaulLiu) <paul.liu@linaro.org>");
	218	MODULE_DESCRIPTION("ANATOP Regulator driver");
	219	MODULE_LICENSE("GPL v2");