MIPS: c-r4k: Add r4k_on_each_cpu cache op type arg
[deliverable/linux.git] / drivers / regulator / pv88080-regulator.h
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1/*
2 * pv88080-regulator.h - Regulator definitions for PV88080
3 * Copyright (C) 2016 Powerventure Semiconductor Ltd.
4 *
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License
7 * as published by the Free Software Foundation; either version 2
8 * of the License, or (at your option) any later version.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 */
15
16#ifndef __PV88080_REGISTERS_H__
17#define __PV88080_REGISTERS_H__
18
19/* System Control and Event Registers */
20#define PV88080_REG_EVENT_A 0x04
21#define PV88080_REG_MASK_A 0x09
22#define PV88080_REG_MASK_B 0x0a
23#define PV88080_REG_MASK_C 0x0b
24
25/* Regulator Registers */
26#define PV88080_REG_BUCK1_CONF0 0x27
27#define PV88080_REG_BUCK1_CONF1 0x28
28#define PV88080_REG_BUCK1_CONF2 0x59
29#define PV88080_REG_BUCK1_CONF5 0x5c
30#define PV88080_REG_BUCK2_CONF0 0x29
31#define PV88080_REG_BUCK2_CONF1 0x2a
32#define PV88080_REG_BUCK2_CONF2 0x61
33#define PV88080_REG_BUCK2_CONF5 0x64
34#define PV88080_REG_BUCK3_CONF0 0x2b
35#define PV88080_REG_BUCK3_CONF1 0x2c
36#define PV88080_REG_BUCK3_CONF2 0x69
37#define PV88080_REG_BUCK3_CONF5 0x6c
38
39/* PV88080_REG_EVENT_A (addr=0x04) */
40#define PV88080_E_VDD_FLT 0x01
41#define PV88080_E_OVER_TEMP 0x02
42
43/* PV88080_REG_MASK_A (addr=0x09) */
44#define PV88080_M_VDD_FLT 0x01
45#define PV88080_M_OVER_TEMP 0x02
46
47/* PV88080_REG_BUCK1_CONF0 (addr=0x27) */
48#define PV88080_BUCK1_EN 0x80
49#define PV88080_VBUCK1_MASK 0x7F
50/* PV88080_REG_BUCK2_CONF0 (addr=0x29) */
51#define PV88080_BUCK2_EN 0x80
52#define PV88080_VBUCK2_MASK 0x7F
53/* PV88080_REG_BUCK3_CONF0 (addr=0x2b) */
54#define PV88080_BUCK3_EN 0x80
55#define PV88080_VBUCK3_MASK 0x7F
56
57/* PV88080_REG_BUCK1_CONF1 (addr=0x28) */
58#define PV88080_BUCK1_ILIM_SHIFT 2
59#define PV88080_BUCK1_ILIM_MASK 0x0C
60#define PV88080_BUCK1_MODE_MASK 0x03
61
62/* PV88080_REG_BUCK2_CONF1 (addr=0x2a) */
63#define PV88080_BUCK2_ILIM_SHIFT 2
64#define PV88080_BUCK2_ILIM_MASK 0x0C
65#define PV88080_BUCK2_MODE_MASK 0x03
66
67/* PV88080_REG_BUCK3_CONF1 (addr=0x2c) */
68#define PV88080_BUCK3_ILIM_SHIFT 2
69#define PV88080_BUCK3_ILIM_MASK 0x0C
70#define PV88080_BUCK3_MODE_MASK 0x03
71
72#define PV88080_BUCK_MODE_SLEEP 0x00
73#define PV88080_BUCK_MODE_AUTO 0x01
74#define PV88080_BUCK_MODE_SYNC 0x02
75
76/* PV88080_REG_BUCK2_CONF2 (addr=0x61) */
77/* PV88080_REG_BUCK3_CONF2 (addr=0x69) */
78#define PV88080_BUCK_VDAC_RANGE_SHIFT 7
79#define PV88080_BUCK_VDAC_RANGE_MASK 0x01
80
81#define PV88080_BUCK_VDAC_RANGE_1 0x00
82#define PV88080_BUCK_VDAC_RANGE_2 0x01
83
84/* PV88080_REG_BUCK2_CONF5 (addr=0x64) */
85/* PV88080_REG_BUCK3_CONF5 (addr=0x6c) */
86#define PV88080_BUCK_VRANGE_GAIN_SHIFT 0
87#define PV88080_BUCK_VRANGE_GAIN_MASK 0x01
88
89#define PV88080_BUCK_VRANGE_GAIN_1 0x00
90#define PV88080_BUCK_VRANGE_GAIN_2 0x01
91
92#endif /* __PV88080_REGISTERS_H__ */
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