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[deliverable/linux.git] / drivers / regulator / s5m8767.c
CommitLineData
9767ec7f
SK		 1/*
2 * s5m8767.c
3 *
4 * Copyright (c) 2011 Samsung Electronics Co., Ltd
5 * http://www.samsung.com
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License as published by the
9 * Free Software Foundation; either version 2 of the License, or (at your
10 * option) any later version.
11 *
12 */
13
14#include <linux/bug.h>
9767ec7f
SK		 15#include <linux/err.h>
16#include <linux/gpio.h>
17#include <linux/slab.h>
18#include <linux/module.h>
19#include <linux/platform_device.h>
20#include <linux/regulator/driver.h>
21#include <linux/regulator/machine.h>
54227bcf
SK		 22#include <linux/mfd/samsung/core.h>
23#include <linux/mfd/samsung/s5m8767.h>
9767ec7f
SK		 24
25struct s5m8767_info {
26 struct device *dev;
63063bfb 27 struct sec_pmic_dev *iodev;
9767ec7f
SK		 28 int num_regulators;
29 struct regulator_dev **rdev;
63063bfb 30 struct sec_opmode_data *opmode;
9767ec7f
SK		 31
32 int ramp_delay;
33 bool buck2_ramp;
34 bool buck3_ramp;
35 bool buck4_ramp;
36
37 bool buck2_gpiodvs;
38 bool buck3_gpiodvs;
39 bool buck4_gpiodvs;
40 u8 buck2_vol[8];
41 u8 buck3_vol[8];
42 u8 buck4_vol[8];
43 int buck_gpios[3];
c848bc85 44 int buck_ds[3];
9767ec7f
SK		 45 int buck_gpioindex;
46};
47
63063bfb 48struct sec_voltage_desc {
9767ec7f
SK		 49 int max;
50 int min;
51 int step;
52};
53
63063bfb 54static const struct sec_voltage_desc buck_voltage_val1 = {
9767ec7f
SK		 55 .max = 2225000,
56 .min = 650000,
57 .step = 6250,
58};
59
63063bfb 60static const struct sec_voltage_desc buck_voltage_val2 = {
9767ec7f
SK		 61 .max = 1600000,
62 .min = 600000,
63 .step = 6250,
64};
65
63063bfb 66static const struct sec_voltage_desc buck_voltage_val3 = {
9767ec7f
SK		 67 .max = 3000000,
68 .min = 750000,
69 .step = 12500,
70};
71
63063bfb 72static const struct sec_voltage_desc ldo_voltage_val1 = {
9767ec7f
SK		 73 .max = 3950000,
74 .min = 800000,
75 .step = 50000,
76};
77
63063bfb 78static const struct sec_voltage_desc ldo_voltage_val2 = {
9767ec7f
SK		 79 .max = 2375000,
80 .min = 800000,
81 .step = 25000,
82};
83
63063bfb 84static const struct sec_voltage_desc *reg_voltage_map[] = {
9767ec7f
SK		 85 [S5M8767_LDO1] = &ldo_voltage_val2,
86 [S5M8767_LDO2] = &ldo_voltage_val2,
87 [S5M8767_LDO3] = &ldo_voltage_val1,
88 [S5M8767_LDO4] = &ldo_voltage_val1,
89 [S5M8767_LDO5] = &ldo_voltage_val1,
90 [S5M8767_LDO6] = &ldo_voltage_val2,
91 [S5M8767_LDO7] = &ldo_voltage_val2,
92 [S5M8767_LDO8] = &ldo_voltage_val2,
93 [S5M8767_LDO9] = &ldo_voltage_val1,
94 [S5M8767_LDO10] = &ldo_voltage_val1,
95 [S5M8767_LDO11] = &ldo_voltage_val1,
96 [S5M8767_LDO12] = &ldo_voltage_val1,
97 [S5M8767_LDO13] = &ldo_voltage_val1,
98 [S5M8767_LDO14] = &ldo_voltage_val1,
99 [S5M8767_LDO15] = &ldo_voltage_val2,
100 [S5M8767_LDO16] = &ldo_voltage_val1,
101 [S5M8767_LDO17] = &ldo_voltage_val1,
102 [S5M8767_LDO18] = &ldo_voltage_val1,
103 [S5M8767_LDO19] = &ldo_voltage_val1,
104 [S5M8767_LDO20] = &ldo_voltage_val1,
105 [S5M8767_LDO21] = &ldo_voltage_val1,
106 [S5M8767_LDO22] = &ldo_voltage_val1,
107 [S5M8767_LDO23] = &ldo_voltage_val1,
108 [S5M8767_LDO24] = &ldo_voltage_val1,
109 [S5M8767_LDO25] = &ldo_voltage_val1,
110 [S5M8767_LDO26] = &ldo_voltage_val1,
111 [S5M8767_LDO27] = &ldo_voltage_val1,
112 [S5M8767_LDO28] = &ldo_voltage_val1,
113 [S5M8767_BUCK1] = &buck_voltage_val1,
114 [S5M8767_BUCK2] = &buck_voltage_val2,
115 [S5M8767_BUCK3] = &buck_voltage_val2,
116 [S5M8767_BUCK4] = &buck_voltage_val2,
117 [S5M8767_BUCK5] = &buck_voltage_val1,
118 [S5M8767_BUCK6] = &buck_voltage_val1,
119 [S5M8767_BUCK7] = NULL,
120 [S5M8767_BUCK8] = NULL,
121 [S5M8767_BUCK9] = &buck_voltage_val3,
122};
123
5ceba7ba 124static unsigned int s5m8767_opmode_reg[][4] = {
7e44bb83
SK		 125 /* {OFF, ON, LOWPOWER, SUSPEND} */
126 /* LDO1 ... LDO28 */
127 {0x0, 0x3, 0x2, 0x1}, /* LDO1 */
128 {0x0, 0x3, 0x2, 0x1},
129 {0x0, 0x3, 0x2, 0x1},
130 {0x0, 0x0, 0x0, 0x0},
131 {0x0, 0x3, 0x2, 0x1}, /* LDO5 */
132 {0x0, 0x3, 0x2, 0x1},
133 {0x0, 0x3, 0x2, 0x1},
134 {0x0, 0x3, 0x2, 0x1},
135 {0x0, 0x3, 0x2, 0x1},
136 {0x0, 0x3, 0x2, 0x1}, /* LDO10 */
137 {0x0, 0x3, 0x2, 0x1},
138 {0x0, 0x3, 0x2, 0x1},
139 {0x0, 0x3, 0x2, 0x1},
140 {0x0, 0x3, 0x2, 0x1},
141 {0x0, 0x3, 0x2, 0x1}, /* LDO15 */
142 {0x0, 0x3, 0x2, 0x1},
143 {0x0, 0x3, 0x2, 0x1},
144 {0x0, 0x0, 0x0, 0x0},
145 {0x0, 0x3, 0x2, 0x1},
146 {0x0, 0x3, 0x2, 0x1}, /* LDO20 */
147 {0x0, 0x3, 0x2, 0x1},
148 {0x0, 0x3, 0x2, 0x1},
149 {0x0, 0x0, 0x0, 0x0},
150 {0x0, 0x3, 0x2, 0x1},
151 {0x0, 0x3, 0x2, 0x1}, /* LDO25 */
152 {0x0, 0x3, 0x2, 0x1},
153 {0x0, 0x3, 0x2, 0x1},
154 {0x0, 0x3, 0x2, 0x1}, /* LDO28 */
155
156 /* BUCK1 ... BUCK9 */
157 {0x0, 0x3, 0x1, 0x1}, /* BUCK1 */
158 {0x0, 0x3, 0x1, 0x1},
159 {0x0, 0x3, 0x1, 0x1},
160 {0x0, 0x3, 0x1, 0x1},
161 {0x0, 0x3, 0x2, 0x1}, /* BUCK5 */
162 {0x0, 0x3, 0x1, 0x1},
163 {0x0, 0x3, 0x1, 0x1},
164 {0x0, 0x3, 0x1, 0x1},
165 {0x0, 0x3, 0x1, 0x1}, /* BUCK9 */
166};
167
168static int s5m8767_get_register(struct regulator_dev *rdev, int *reg,
169 int *enable_ctrl)
9767ec7f 170{
20a14b84 171 int reg_id = rdev_get_id(rdev);
7e44bb83
SK		 172 unsigned int mode;
173 struct s5m8767_info *s5m8767 = rdev_get_drvdata(rdev);
9767ec7f
SK		 174
175 switch (reg_id) {
176 case S5M8767_LDO1 ... S5M8767_LDO2:
177 *reg = S5M8767_REG_LDO1CTRL + (reg_id - S5M8767_LDO1);
178 break;
179 case S5M8767_LDO3 ... S5M8767_LDO28:
180 *reg = S5M8767_REG_LDO3CTRL + (reg_id - S5M8767_LDO3);
181 break;
182 case S5M8767_BUCK1:
183 *reg = S5M8767_REG_BUCK1CTRL1;
184 break;
185 case S5M8767_BUCK2 ... S5M8767_BUCK4:
186 *reg = S5M8767_REG_BUCK2CTRL + (reg_id - S5M8767_BUCK2) * 9;
187 break;
188 case S5M8767_BUCK5:
189 *reg = S5M8767_REG_BUCK5CTRL1;
190 break;
191 case S5M8767_BUCK6 ... S5M8767_BUCK9:
192 *reg = S5M8767_REG_BUCK6CTRL1 + (reg_id - S5M8767_BUCK6) * 2;
193 break;
194 default:
195 return -EINVAL;
196 }
197
7e44bb83
SK		 198 mode = s5m8767->opmode[reg_id].mode;
199 *enable_ctrl = s5m8767_opmode_reg[reg_id][mode] << S5M8767_ENCTRL_SHIFT;
9767ec7f
SK		 200 return 0;
201}
202
203static int s5m8767_reg_is_enabled(struct regulator_dev *rdev)
204{
205 struct s5m8767_info *s5m8767 = rdev_get_drvdata(rdev);
206 int ret, reg;
7e44bb83 207 int mask = 0xc0, enable_ctrl;
9767ec7f
SK		 208 u8 val;
209
7e44bb83 210 ret = s5m8767_get_register(rdev, &reg, &enable_ctrl);
9767ec7f
SK		 211 if (ret == -EINVAL)
212 return 1;
213 else if (ret)
214 return ret;
215
63063bfb 216 ret = sec_reg_read(s5m8767->iodev, reg, &val);
9767ec7f
SK		 217 if (ret)
218 return ret;
219
7e44bb83 220 return (val & mask) == enable_ctrl;
9767ec7f
SK		 221}
222
223static int s5m8767_reg_enable(struct regulator_dev *rdev)
224{
225 struct s5m8767_info *s5m8767 = rdev_get_drvdata(rdev);
226 int ret, reg;
7e44bb83 227 int mask = 0xc0, enable_ctrl;
9767ec7f 228
7e44bb83 229 ret = s5m8767_get_register(rdev, &reg, &enable_ctrl);
9767ec7f
SK		 230 if (ret)
231 return ret;
232
63063bfb 233 return sec_reg_update(s5m8767->iodev, reg, enable_ctrl, mask);
9767ec7f
SK		 234}
235
236static int s5m8767_reg_disable(struct regulator_dev *rdev)
237{
238 struct s5m8767_info *s5m8767 = rdev_get_drvdata(rdev);
239 int ret, reg;
7e44bb83 240 int mask = 0xc0, enable_ctrl;
9767ec7f 241
7e44bb83 242 ret = s5m8767_get_register(rdev, &reg, &enable_ctrl);
9767ec7f
SK		 243 if (ret)
244 return ret;
245
63063bfb 246 return sec_reg_update(s5m8767->iodev, reg, ~mask, mask);
9767ec7f
SK		 247}
248
249static int s5m8767_get_voltage_register(struct regulator_dev *rdev, int *_reg)
250{
0a41685f 251 struct s5m8767_info *s5m8767 = rdev_get_drvdata(rdev);
20a14b84 252 int reg_id = rdev_get_id(rdev);
9767ec7f
SK		 253 int reg;
254
255 switch (reg_id) {
256 case S5M8767_LDO1 ... S5M8767_LDO2:
257 reg = S5M8767_REG_LDO1CTRL + (reg_id - S5M8767_LDO1);
258 break;
259 case S5M8767_LDO3 ... S5M8767_LDO28:
260 reg = S5M8767_REG_LDO3CTRL + (reg_id - S5M8767_LDO3);
261 break;
262 case S5M8767_BUCK1:
263 reg = S5M8767_REG_BUCK1CTRL2;
264 break;
265 case S5M8767_BUCK2:
c848bc85 266 reg = S5M8767_REG_BUCK2DVS2;
0a41685f
AL		 267 if (s5m8767->buck2_gpiodvs)
268 reg += s5m8767->buck_gpioindex;
9767ec7f
SK		 269 break;
270 case S5M8767_BUCK3:
c848bc85 271 reg = S5M8767_REG_BUCK3DVS2;
0a41685f
AL		 272 if (s5m8767->buck3_gpiodvs)
273 reg += s5m8767->buck_gpioindex;
9767ec7f
SK		 274 break;
275 case S5M8767_BUCK4:
c848bc85 276 reg = S5M8767_REG_BUCK4DVS2;
0a41685f
AL		 277 if (s5m8767->buck4_gpiodvs)
278 reg += s5m8767->buck_gpioindex;
9767ec7f
SK		 279 break;
280 case S5M8767_BUCK5:
281 reg = S5M8767_REG_BUCK5CTRL2;
282 break;
283 case S5M8767_BUCK6 ... S5M8767_BUCK9:
284 reg = S5M8767_REG_BUCK6CTRL2 + (reg_id - S5M8767_BUCK6) * 2;
285 break;
286 default:
287 return -EINVAL;
288 }
289
290 *_reg = reg;
291
292 return 0;
293}
294
295static int s5m8767_get_voltage_sel(struct regulator_dev *rdev)
296{
297 struct s5m8767_info *s5m8767 = rdev_get_drvdata(rdev);
0a41685f 298 int reg, mask, ret;
20a14b84 299 int reg_id = rdev_get_id(rdev);
9767ec7f
SK		 300 u8 val;
301
302 ret = s5m8767_get_voltage_register(rdev, &reg);
303 if (ret)
304 return ret;
305
0a41685f 306 mask = (reg_id < S5M8767_BUCK1) ? 0x3f : 0xff;
9767ec7f 307
63063bfb 308 ret = sec_reg_read(s5m8767->iodev, reg, &val);
9767ec7f
SK		 309 if (ret)
310 return ret;
311
312 val &= mask;
313
314 return val;
315}
316
5b5e977c 317static int s5m8767_convert_voltage_to_sel(
63063bfb 318 const struct sec_voltage_desc *desc,
9767ec7f
SK		 319 int min_vol, int max_vol)
320{
5b5e977c 321 int selector = 0;
9767ec7f
SK		 322
323 if (desc == NULL)
324 return -EINVAL;
325
326 if (max_vol < desc->min || min_vol > desc->max)
327 return -EINVAL;
328
94e85a3c
AL		 329 if (min_vol < desc->min)
330 min_vol = desc->min;
331
332 selector = DIV_ROUND_UP(min_vol - desc->min, desc->step);
9767ec7f 333
5b5e977c 334 if (desc->min + desc->step * selector > max_vol)
9767ec7f
SK		 335 return -EINVAL;
336
5b5e977c 337 return selector;
9767ec7f
SK		 338}
339
df2643cf 340static inline int s5m8767_set_high(struct s5m8767_info *s5m8767)
321d2aba
AL		 341{
342 int temp_index = s5m8767->buck_gpioindex;
343
344 gpio_set_value(s5m8767->buck_gpios[0], (temp_index >> 2) & 0x1);
345 gpio_set_value(s5m8767->buck_gpios[1], (temp_index >> 1) & 0x1);
346 gpio_set_value(s5m8767->buck_gpios[2], temp_index & 0x1);
df2643cf
SK		 347
348 return 0;
321d2aba
AL		 349}
350
df2643cf 351static inline int s5m8767_set_low(struct s5m8767_info *s5m8767)
321d2aba
AL		 352{
353 int temp_index = s5m8767->buck_gpioindex;
354
355 gpio_set_value(s5m8767->buck_gpios[2], temp_index & 0x1);
356 gpio_set_value(s5m8767->buck_gpios[1], (temp_index >> 1) & 0x1);
357 gpio_set_value(s5m8767->buck_gpios[0], (temp_index >> 2) & 0x1);
df2643cf
SK		 358
359 return 0;
321d2aba
AL		 360}
361
df2643cf
SK		 362static int s5m8767_set_voltage_sel(struct regulator_dev *rdev,
363 unsigned selector)
9767ec7f
SK		 364{
365 struct s5m8767_info *s5m8767 = rdev_get_drvdata(rdev);
20a14b84 366 int reg_id = rdev_get_id(rdev);
df2643cf 367 int reg, mask, ret = 0, old_index, index = 0;
321d2aba 368 u8 *buck234_vol = NULL;
9767ec7f
SK		 369
370 switch (reg_id) {
371 case S5M8767_LDO1 ... S5M8767_LDO28:
372 mask = 0x3f;
373 break;
374 case S5M8767_BUCK1 ... S5M8767_BUCK6:
375 mask = 0xff;
321d2aba
AL		 376 if (reg_id == S5M8767_BUCK2 && s5m8767->buck2_gpiodvs)
377 buck234_vol = &s5m8767->buck2_vol[0];
378 else if (reg_id == S5M8767_BUCK3 && s5m8767->buck3_gpiodvs)
379 buck234_vol = &s5m8767->buck3_vol[0];
380 else if (reg_id == S5M8767_BUCK4 && s5m8767->buck4_gpiodvs)
381 buck234_vol = &s5m8767->buck4_vol[0];
9767ec7f
SK		 382 break;
383 case S5M8767_BUCK7 ... S5M8767_BUCK8:
384 return -EINVAL;
385 case S5M8767_BUCK9:
386 mask = 0xff;
387 break;
388 default:
389 return -EINVAL;
390 }
391
321d2aba
AL		 392 /* buck234_vol != NULL means to control buck234 voltage via DVS GPIO */
393 if (buck234_vol) {
df2643cf 394 while (*buck234_vol != selector) {
321d2aba
AL		 395 buck234_vol++;
396 index++;
397 }
398 old_index = s5m8767->buck_gpioindex;
399 s5m8767->buck_gpioindex = index;
400
401 if (index > old_index)
df2643cf 402 return s5m8767_set_high(s5m8767);
321d2aba 403 else
df2643cf 404 return s5m8767_set_low(s5m8767);
321d2aba
AL		 405 } else {
406 ret = s5m8767_get_voltage_register(rdev, &reg);
407 if (ret)
408 return ret;
409
3e701cdf 410 return sec_reg_update(s5m8767->iodev, reg, selector, mask);
321d2aba 411 }
9767ec7f
SK		 412}
413
9767ec7f
SK		 414static int s5m8767_set_voltage_time_sel(struct regulator_dev *rdev,
415 unsigned int old_sel,
416 unsigned int new_sel)
417{
418 struct s5m8767_info *s5m8767 = rdev_get_drvdata(rdev);
63063bfb 419 const struct sec_voltage_desc *desc;
20a14b84 420 int reg_id = rdev_get_id(rdev);
9767ec7f 421
9767ec7f
SK		 422 desc = reg_voltage_map[reg_id];
423
9d88fc0b 424 if ((old_sel < new_sel) && s5m8767->ramp_delay)
89e0f0e4 425 return DIV_ROUND_UP(desc->step * (new_sel - old_sel),
0f8b9c77 426 s5m8767->ramp_delay * 1000);
89e0f0e4 427 return 0;
9767ec7f
SK		 428}
429
d35aad0c 430static struct regulator_ops s5m8767_ops = {
e2eb169b 431 .list_voltage = regulator_list_voltage_linear,
9767ec7f
SK		 432 .is_enabled = s5m8767_reg_is_enabled,
433 .enable = s5m8767_reg_enable,
434 .disable = s5m8767_reg_disable,
435 .get_voltage_sel = s5m8767_get_voltage_sel,
df2643cf 436 .set_voltage_sel = s5m8767_set_voltage_sel,
9767ec7f
SK		 437 .set_voltage_time_sel = s5m8767_set_voltage_time_sel,
438};
439
e2eb169b
AL		 440static struct regulator_ops s5m8767_buck78_ops = {
441 .is_enabled = s5m8767_reg_is_enabled,
442 .enable = s5m8767_reg_enable,
443 .disable = s5m8767_reg_disable,
444};
445
65896e73
AL		 446#define s5m8767_regulator_desc(_name) { \
447 .name = #_name, \
448 .id = S5M8767_##_name, \
449 .ops = &s5m8767_ops, \
9767ec7f
SK		 450 .type = REGULATOR_VOLTAGE, \
451 .owner = THIS_MODULE, \
452}
453
e2eb169b
AL		 454#define s5m8767_regulator_buck78_desc(_name) { \
455 .name = #_name, \
456 .id = S5M8767_##_name, \
457 .ops = &s5m8767_buck78_ops, \
458 .type = REGULATOR_VOLTAGE, \
459 .owner = THIS_MODULE, \
460}
461
9767ec7f 462static struct regulator_desc regulators[] = {
65896e73
AL		 463 s5m8767_regulator_desc(LDO1),
464 s5m8767_regulator_desc(LDO2),
465 s5m8767_regulator_desc(LDO3),
466 s5m8767_regulator_desc(LDO4),
467 s5m8767_regulator_desc(LDO5),
468 s5m8767_regulator_desc(LDO6),
469 s5m8767_regulator_desc(LDO7),
470 s5m8767_regulator_desc(LDO8),
471 s5m8767_regulator_desc(LDO9),
472 s5m8767_regulator_desc(LDO10),
473 s5m8767_regulator_desc(LDO11),
474 s5m8767_regulator_desc(LDO12),
475 s5m8767_regulator_desc(LDO13),
476 s5m8767_regulator_desc(LDO14),
477 s5m8767_regulator_desc(LDO15),
478 s5m8767_regulator_desc(LDO16),
479 s5m8767_regulator_desc(LDO17),
480 s5m8767_regulator_desc(LDO18),
481 s5m8767_regulator_desc(LDO19),
482 s5m8767_regulator_desc(LDO20),
483 s5m8767_regulator_desc(LDO21),
484 s5m8767_regulator_desc(LDO22),
485 s5m8767_regulator_desc(LDO23),
486 s5m8767_regulator_desc(LDO24),
487 s5m8767_regulator_desc(LDO25),
488 s5m8767_regulator_desc(LDO26),
489 s5m8767_regulator_desc(LDO27),
490 s5m8767_regulator_desc(LDO28),
491 s5m8767_regulator_desc(BUCK1),
492 s5m8767_regulator_desc(BUCK2),
493 s5m8767_regulator_desc(BUCK3),
494 s5m8767_regulator_desc(BUCK4),
495 s5m8767_regulator_desc(BUCK5),
496 s5m8767_regulator_desc(BUCK6),
e2eb169b
AL		 497 s5m8767_regulator_buck78_desc(BUCK7),
498 s5m8767_regulator_buck78_desc(BUCK8),
65896e73 499 s5m8767_regulator_desc(BUCK9),
9767ec7f
SK		 500};
501
502static __devinit int s5m8767_pmic_probe(struct platform_device *pdev)
503{
63063bfb
SK		 504 struct sec_pmic_dev *iodev = dev_get_drvdata(pdev->dev.parent);
505 struct sec_platform_data *pdata = dev_get_platdata(iodev->dev);
c172708d 506 struct regulator_config config = { };
9767ec7f
SK		 507 struct regulator_dev **rdev;
508 struct s5m8767_info *s5m8767;
c848bc85 509 int i, ret, size, buck_init;
9767ec7f
SK		 510
511 if (!pdata) {
512 dev_err(pdev->dev.parent, "Platform data not supplied\n");
513 return -ENODEV;
514 }
515
6c4efe24
AL		 516 if (pdata->buck2_gpiodvs) {
517 if (pdata->buck3_gpiodvs || pdata->buck4_gpiodvs) {
518 dev_err(&pdev->dev, "S5M8767 GPIO DVS NOT VALID\n");
519 return -EINVAL;
520 }
521 }
522
523 if (pdata->buck3_gpiodvs) {
524 if (pdata->buck2_gpiodvs || pdata->buck4_gpiodvs) {
525 dev_err(&pdev->dev, "S5M8767 GPIO DVS NOT VALID\n");
526 return -EINVAL;
527 }
528 }
529
530 if (pdata->buck4_gpiodvs) {
531 if (pdata->buck2_gpiodvs || pdata->buck3_gpiodvs) {
532 dev_err(&pdev->dev, "S5M8767 GPIO DVS NOT VALID\n");
533 return -EINVAL;
534 }
535 }
536
9767ec7f
SK		 537 s5m8767 = devm_kzalloc(&pdev->dev, sizeof(struct s5m8767_info),
538 GFP_KERNEL);
539 if (!s5m8767)
540 return -ENOMEM;
541
542 size = sizeof(struct regulator_dev *) * (S5M8767_REG_MAX - 2);
543 s5m8767->rdev = devm_kzalloc(&pdev->dev, size, GFP_KERNEL);
544 if (!s5m8767->rdev)
545 return -ENOMEM;
546
547 rdev = s5m8767->rdev;
548 s5m8767->dev = &pdev->dev;
549 s5m8767->iodev = iodev;
550 s5m8767->num_regulators = S5M8767_REG_MAX - 2;
551 platform_set_drvdata(pdev, s5m8767);
9767ec7f
SK		 552
553 s5m8767->buck_gpioindex = pdata->buck_default_idx;
554 s5m8767->buck2_gpiodvs = pdata->buck2_gpiodvs;
555 s5m8767->buck3_gpiodvs = pdata->buck3_gpiodvs;
556 s5m8767->buck4_gpiodvs = pdata->buck4_gpiodvs;
557 s5m8767->buck_gpios[0] = pdata->buck_gpios[0];
558 s5m8767->buck_gpios[1] = pdata->buck_gpios[1];
559 s5m8767->buck_gpios[2] = pdata->buck_gpios[2];
c848bc85
SK		 560 s5m8767->buck_ds[0] = pdata->buck_ds[0];
561 s5m8767->buck_ds[1] = pdata->buck_ds[1];
562 s5m8767->buck_ds[2] = pdata->buck_ds[2];
563
9767ec7f
SK		 564 s5m8767->ramp_delay = pdata->buck_ramp_delay;
565 s5m8767->buck2_ramp = pdata->buck2_ramp_enable;
566 s5m8767->buck3_ramp = pdata->buck3_ramp_enable;
567 s5m8767->buck4_ramp = pdata->buck4_ramp_enable;
7e44bb83 568 s5m8767->opmode = pdata->opmode;
9767ec7f 569
c848bc85
SK		 570 buck_init = s5m8767_convert_voltage_to_sel(&buck_voltage_val2,
571 pdata->buck2_init,
572 pdata->buck2_init +
573 buck_voltage_val2.step);
574
938e05bf 575 sec_reg_write(s5m8767->iodev, S5M8767_REG_BUCK2DVS2, buck_init);
c848bc85
SK		 576
577 buck_init = s5m8767_convert_voltage_to_sel(&buck_voltage_val2,
578 pdata->buck3_init,
579 pdata->buck3_init +
580 buck_voltage_val2.step);
581
938e05bf 582 sec_reg_write(s5m8767->iodev, S5M8767_REG_BUCK3DVS2, buck_init);
c848bc85
SK		 583
584 buck_init = s5m8767_convert_voltage_to_sel(&buck_voltage_val2,
585 pdata->buck4_init,
586 pdata->buck4_init +
587 buck_voltage_val2.step);
588
938e05bf 589 sec_reg_write(s5m8767->iodev, S5M8767_REG_BUCK4DVS2, buck_init);
c848bc85 590
9767ec7f
SK		 591 for (i = 0; i < 8; i++) {
592 if (s5m8767->buck2_gpiodvs) {
593 s5m8767->buck2_vol[i] =
5b5e977c 594 s5m8767_convert_voltage_to_sel(
9767ec7f
SK		 595 &buck_voltage_val2,
596 pdata->buck2_voltage[i],
597 pdata->buck2_voltage[i] +
598 buck_voltage_val2.step);
599 }
600
601 if (s5m8767->buck3_gpiodvs) {
602 s5m8767->buck3_vol[i] =
5b5e977c 603 s5m8767_convert_voltage_to_sel(
9767ec7f
SK		 604 &buck_voltage_val2,
605 pdata->buck3_voltage[i],
606 pdata->buck3_voltage[i] +
607 buck_voltage_val2.step);
608 }
609
610 if (s5m8767->buck4_gpiodvs) {
611 s5m8767->buck4_vol[i] =
5b5e977c 612 s5m8767_convert_voltage_to_sel(
9767ec7f
SK		 613 &buck_voltage_val2,
614 pdata->buck4_voltage[i],
615 pdata->buck4_voltage[i] +
616 buck_voltage_val2.step);
617 }
618 }
619
c848bc85
SK		 620 if (gpio_is_valid(pdata->buck_gpios[0]) &&
621 gpio_is_valid(pdata->buck_gpios[1]) &&
622 gpio_is_valid(pdata->buck_gpios[2])) {
5febb3c9
AL		 623 ret = devm_gpio_request(&pdev->dev, pdata->buck_gpios[0],
624 "S5M8767 SET1");
625 if (ret)
626 return ret;
627
628 ret = devm_gpio_request(&pdev->dev, pdata->buck_gpios[1],
629 "S5M8767 SET2");
630 if (ret)
631 return ret;
632
633 ret = devm_gpio_request(&pdev->dev, pdata->buck_gpios[2],
634 "S5M8767 SET3");
635 if (ret)
636 return ret;
637
c848bc85
SK		 638 /* SET1 GPIO */
639 gpio_direction_output(pdata->buck_gpios[0],
640 (s5m8767->buck_gpioindex >> 2) & 0x1);
641 /* SET2 GPIO */
642 gpio_direction_output(pdata->buck_gpios[1],
643 (s5m8767->buck_gpioindex >> 1) & 0x1);
644 /* SET3 GPIO */
645 gpio_direction_output(pdata->buck_gpios[2],
646 (s5m8767->buck_gpioindex >> 0) & 0x1);
c848bc85
SK		 647 } else {
648 dev_err(&pdev->dev, "GPIO NOT VALID\n");
649 ret = -EINVAL;
650 return ret;
9767ec7f
SK		 651 }
652
5febb3c9
AL		 653 ret = devm_gpio_request(&pdev->dev, pdata->buck_ds[0], "S5M8767 DS2");
654 if (ret)
655 return ret;
c848bc85 656
5febb3c9
AL		 657 ret = devm_gpio_request(&pdev->dev, pdata->buck_ds[1], "S5M8767 DS3");
658 if (ret)
659 return ret;
c848bc85 660
5febb3c9
AL		 661 ret = devm_gpio_request(&pdev->dev, pdata->buck_ds[2], "S5M8767 DS4");
662 if (ret)
663 return ret;
c848bc85
SK		 664
665 /* DS2 GPIO */
666 gpio_direction_output(pdata->buck_ds[0], 0x0);
667 /* DS3 GPIO */
668 gpio_direction_output(pdata->buck_ds[1], 0x0);
669 /* DS4 GPIO */
670 gpio_direction_output(pdata->buck_ds[2], 0x0);
671
672 if (pdata->buck2_gpiodvs || pdata->buck3_gpiodvs ||
673 pdata->buck4_gpiodvs) {
3e701cdf 674 sec_reg_update(s5m8767->iodev, S5M8767_REG_BUCK2CTRL,
c848bc85
SK		 675 (pdata->buck2_gpiodvs) ? (1 << 1) : (0 << 1),
676 1 << 1);
3e701cdf 677 sec_reg_update(s5m8767->iodev, S5M8767_REG_BUCK3CTRL,
c848bc85
SK		 678 (pdata->buck3_gpiodvs) ? (1 << 1) : (0 << 1),
679 1 << 1);
3e701cdf 680 sec_reg_update(s5m8767->iodev, S5M8767_REG_BUCK4CTRL,
c848bc85
SK		 681 (pdata->buck4_gpiodvs) ? (1 << 1) : (0 << 1),
682 1 << 1);
683 }
9767ec7f
SK		 684
685 /* Initialize GPIO DVS registers */
686 for (i = 0; i < 8; i++) {
687 if (s5m8767->buck2_gpiodvs) {
63063bfb 688 sec_reg_write(s5m8767->iodev, S5M8767_REG_BUCK2DVS1 + i,
9767ec7f
SK		 689 s5m8767->buck2_vol[i]);
690 }
691
692 if (s5m8767->buck3_gpiodvs) {
63063bfb 693 sec_reg_write(s5m8767->iodev, S5M8767_REG_BUCK3DVS1 + i,
9767ec7f
SK		 694 s5m8767->buck3_vol[i]);
695 }
696
697 if (s5m8767->buck4_gpiodvs) {
63063bfb 698 sec_reg_write(s5m8767->iodev, S5M8767_REG_BUCK4DVS1 + i,
9767ec7f
SK		 699 s5m8767->buck4_vol[i]);
700 }
701 }
9767ec7f
SK		 702
703 if (s5m8767->buck2_ramp)
63063bfb 704 sec_reg_update(s5m8767->iodev, S5M8767_REG_DVSRAMP, 0x08, 0x08);
9767ec7f
SK		 705
706 if (s5m8767->buck3_ramp)
63063bfb 707 sec_reg_update(s5m8767->iodev, S5M8767_REG_DVSRAMP, 0x04, 0x04);
9767ec7f
SK		 708
709 if (s5m8767->buck4_ramp)
63063bfb 710 sec_reg_update(s5m8767->iodev, S5M8767_REG_DVSRAMP, 0x02, 0x02);
9767ec7f
SK		 711
712 if (s5m8767->buck2_ramp || s5m8767->buck3_ramp
713 || s5m8767->buck4_ramp) {
714 switch (s5m8767->ramp_delay) {
1af142c6 715 case 5:
63063bfb 716 sec_reg_update(s5m8767->iodev, S5M8767_REG_DVSRAMP,
1af142c6
SK		 717 0x40, 0xf0);
718 break;
719 case 10:
3e701cdf 720 sec_reg_update(s5m8767->iodev, S5M8767_REG_DVSRAMP,
1af142c6 721 0x90, 0xf0);
047ec220 722 break;
9767ec7f 723 case 25:
63063bfb 724 sec_reg_update(s5m8767->iodev, S5M8767_REG_DVSRAMP,
9767ec7f 725 0xd0, 0xf0);
047ec220 726 break;
9767ec7f 727 case 50:
63063bfb 728 sec_reg_update(s5m8767->iodev, S5M8767_REG_DVSRAMP,
9767ec7f 729 0xe0, 0xf0);
047ec220 730 break;
9767ec7f 731 case 100:
63063bfb 732 sec_reg_update(s5m8767->iodev, S5M8767_REG_DVSRAMP,
9767ec7f 733 0xf0, 0xf0);
047ec220 734 break;
9767ec7f 735 default:
63063bfb 736 sec_reg_update(s5m8767->iodev, S5M8767_REG_DVSRAMP,
9767ec7f
SK		 737 0x90, 0xf0);
738 }
739 }
740
741 for (i = 0; i < pdata->num_regulators; i++) {
63063bfb 742 const struct sec_voltage_desc *desc;
9767ec7f
SK		 743 int id = pdata->regulators[i].id;
744
745 desc = reg_voltage_map[id];
e2eb169b 746 if (desc) {
9767ec7f
SK		 747 regulators[id].n_voltages =
748 (desc->max - desc->min) / desc->step + 1;
e2eb169b
AL		 749 regulators[id].min_uV = desc->min;
750 regulators[id].uV_step = desc->step;
751 }
9767ec7f 752
c172708d
MB		 753 config.dev = s5m8767->dev;
754 config.init_data = pdata->regulators[i].initdata;
755 config.driver_data = s5m8767;
756
757 rdev[i] = regulator_register(&regulators[id], &config);
9767ec7f
SK		 758 if (IS_ERR(rdev[i])) {
759 ret = PTR_ERR(rdev[i]);
760 dev_err(s5m8767->dev, "regulator init failed for %d\n",
761 id);
762 rdev[i] = NULL;
763 goto err;
764 }
765 }
766
767 return 0;
768err:
769 for (i = 0; i < s5m8767->num_regulators; i++)
770 if (rdev[i])
771 regulator_unregister(rdev[i]);
772
773 return ret;
774}
775
776static int __devexit s5m8767_pmic_remove(struct platform_device *pdev)
777{
778 struct s5m8767_info *s5m8767 = platform_get_drvdata(pdev);
779 struct regulator_dev **rdev = s5m8767->rdev;
780 int i;
781
782 for (i = 0; i < s5m8767->num_regulators; i++)
783 if (rdev[i])
784 regulator_unregister(rdev[i]);
785
786 return 0;
787}
788
789static const struct platform_device_id s5m8767_pmic_id[] = {
790 { "s5m8767-pmic", 0},
791 { },
792};
793MODULE_DEVICE_TABLE(platform, s5m8767_pmic_id);
794
795static struct platform_driver s5m8767_pmic_driver = {
796 .driver = {
797 .name = "s5m8767-pmic",
798 .owner = THIS_MODULE,
799 },
800 .probe = s5m8767_pmic_probe,
801 .remove = __devexit_p(s5m8767_pmic_remove),
802 .id_table = s5m8767_pmic_id,
803};
804
805static int __init s5m8767_pmic_init(void)
806{
807 return platform_driver_register(&s5m8767_pmic_driver);
808}
809subsys_initcall(s5m8767_pmic_init);
810
811static void __exit s5m8767_pmic_exit(void)
812{
813 platform_driver_unregister(&s5m8767_pmic_driver);
814}
815module_exit(s5m8767_pmic_exit);
816
817/* Module information */
818MODULE_AUTHOR("Sangbeom Kim <sbkim73@samsung.com>");
819MODULE_DESCRIPTION("SAMSUNG S5M8767 Regulator Driver");
820MODULE_LICENSE("GPL");
Linux kernel - Deliverables
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