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90e7d526 K |
1 | /* |
2 | * tps65218-regulator.c | |
3 | * | |
4 | * Regulator driver for TPS65218 PMIC | |
5 | * | |
6 | * Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/ | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or | |
9 | * modify it under the terms of the GNU General Public License version 2 as | |
10 | * published by the Free Software Foundation. | |
11 | * | |
12 | * This program is distributed "as is" WITHOUT ANY WARRANTY of any | |
13 | * kind, whether expressed or implied; without even the implied warranty | |
14 | * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | * GNU General Public License version 2 for more details. | |
16 | */ | |
17 | ||
18 | #include <linux/kernel.h> | |
19 | #include <linux/module.h> | |
20 | #include <linux/device.h> | |
21 | #include <linux/init.h> | |
22 | #include <linux/err.h> | |
23 | #include <linux/platform_device.h> | |
24 | #include <linux/of_device.h> | |
25 | #include <linux/regulator/of_regulator.h> | |
26 | #include <linux/regulator/driver.h> | |
27 | #include <linux/regulator/machine.h> | |
28 | #include <linux/mfd/tps65218.h> | |
29 | ||
c0ea88b8 NK |
30 | enum tps65218_regulators { DCDC1, DCDC2, DCDC3, DCDC4, |
31 | DCDC5, DCDC6, LDO1, LS3 }; | |
90e7d526 | 32 | |
c0ea88b8 | 33 | #define TPS65218_REGULATOR(_name, _id, _type, _ops, _n, _vr, _vm, _er, _em, \ |
b9a0d359 | 34 | _cr, _cm, _lr, _nlr, _delay, _fuv, _sr, _sm) \ |
90e7d526 K |
35 | { \ |
36 | .name = _name, \ | |
37 | .id = _id, \ | |
38 | .ops = &_ops, \ | |
39 | .n_voltages = _n, \ | |
c0ea88b8 | 40 | .type = _type, \ |
90e7d526 K |
41 | .owner = THIS_MODULE, \ |
42 | .vsel_reg = _vr, \ | |
43 | .vsel_mask = _vm, \ | |
c0ea88b8 NK |
44 | .csel_reg = _cr, \ |
45 | .csel_mask = _cm, \ | |
90e7d526 K |
46 | .enable_reg = _er, \ |
47 | .enable_mask = _em, \ | |
dd648ef2 | 48 | .volt_table = NULL, \ |
90e7d526 K |
49 | .linear_ranges = _lr, \ |
50 | .n_linear_ranges = _nlr, \ | |
5ab9be42 | 51 | .ramp_delay = _delay, \ |
b9a0d359 TK |
52 | .fixed_uV = _fuv, \ |
53 | .bypass_reg = _sr, \ | |
54 | .bypass_mask = _sm, \ | |
90e7d526 K |
55 | } \ |
56 | ||
57 | #define TPS65218_INFO(_id, _nm, _min, _max) \ | |
6a5e06d9 | 58 | [_id] = { \ |
90e7d526 K |
59 | .id = _id, \ |
60 | .name = _nm, \ | |
61 | .min_uV = _min, \ | |
62 | .max_uV = _max, \ | |
63 | } | |
64 | ||
65 | static const struct regulator_linear_range dcdc1_dcdc2_ranges[] = { | |
66 | REGULATOR_LINEAR_RANGE(850000, 0x0, 0x32, 10000), | |
67 | REGULATOR_LINEAR_RANGE(1375000, 0x33, 0x3f, 25000), | |
68 | }; | |
69 | ||
70 | static const struct regulator_linear_range ldo1_dcdc3_ranges[] = { | |
71 | REGULATOR_LINEAR_RANGE(900000, 0x0, 0x1a, 25000), | |
72 | REGULATOR_LINEAR_RANGE(1600000, 0x1b, 0x3f, 50000), | |
73 | }; | |
74 | ||
75 | static const struct regulator_linear_range dcdc4_ranges[] = { | |
76 | REGULATOR_LINEAR_RANGE(1175000, 0x0, 0xf, 25000), | |
42ab0f39 | 77 | REGULATOR_LINEAR_RANGE(1600000, 0x10, 0x34, 50000), |
90e7d526 K |
78 | }; |
79 | ||
80 | static struct tps_info tps65218_pmic_regs[] = { | |
0f1d08dd | 81 | TPS65218_INFO(DCDC1, "DCDC1", 850000, 1675000), |
6a5e06d9 FB |
82 | TPS65218_INFO(DCDC2, "DCDC2", 850000, 1675000), |
83 | TPS65218_INFO(DCDC3, "DCDC3", 900000, 3400000), | |
84 | TPS65218_INFO(DCDC4, "DCDC4", 1175000, 3400000), | |
85 | TPS65218_INFO(DCDC5, "DCDC5", 1000000, 1000000), | |
86 | TPS65218_INFO(DCDC6, "DCDC6", 1800000, 1800000), | |
87 | TPS65218_INFO(LDO1, "LDO1", 900000, 3400000), | |
c0ea88b8 | 88 | TPS65218_INFO(LS3, "LS3", -1, -1), |
90e7d526 K |
89 | }; |
90 | ||
91 | #define TPS65218_OF_MATCH(comp, label) \ | |
92 | { \ | |
93 | .compatible = comp, \ | |
94 | .data = &label, \ | |
95 | } | |
96 | ||
97 | static const struct of_device_id tps65218_of_match[] = { | |
98 | TPS65218_OF_MATCH("ti,tps65218-dcdc1", tps65218_pmic_regs[DCDC1]), | |
99 | TPS65218_OF_MATCH("ti,tps65218-dcdc2", tps65218_pmic_regs[DCDC2]), | |
100 | TPS65218_OF_MATCH("ti,tps65218-dcdc3", tps65218_pmic_regs[DCDC3]), | |
101 | TPS65218_OF_MATCH("ti,tps65218-dcdc4", tps65218_pmic_regs[DCDC4]), | |
102 | TPS65218_OF_MATCH("ti,tps65218-dcdc5", tps65218_pmic_regs[DCDC5]), | |
103 | TPS65218_OF_MATCH("ti,tps65218-dcdc6", tps65218_pmic_regs[DCDC6]), | |
104 | TPS65218_OF_MATCH("ti,tps65218-ldo1", tps65218_pmic_regs[LDO1]), | |
c0ea88b8 | 105 | TPS65218_OF_MATCH("ti,tps65218-ls3", tps65218_pmic_regs[LS3]), |
c46b5295 | 106 | { } |
90e7d526 K |
107 | }; |
108 | MODULE_DEVICE_TABLE(of, tps65218_of_match); | |
109 | ||
110 | static int tps65218_pmic_set_voltage_sel(struct regulator_dev *dev, | |
111 | unsigned selector) | |
112 | { | |
113 | int ret; | |
114 | struct tps65218 *tps = rdev_get_drvdata(dev); | |
115 | unsigned int rid = rdev_get_id(dev); | |
116 | ||
117 | /* Set the voltage based on vsel value and write protect level is 2 */ | |
118 | ret = tps65218_set_bits(tps, dev->desc->vsel_reg, dev->desc->vsel_mask, | |
119 | selector, TPS65218_PROTECT_L1); | |
120 | ||
121 | /* Set GO bit for DCDC1/2 to initiate voltage transistion */ | |
122 | switch (rid) { | |
123 | case TPS65218_DCDC_1: | |
124 | case TPS65218_DCDC_2: | |
125 | ret = tps65218_set_bits(tps, TPS65218_REG_CONTRL_SLEW_RATE, | |
126 | TPS65218_SLEW_RATE_GO, | |
127 | TPS65218_SLEW_RATE_GO, | |
128 | TPS65218_PROTECT_L1); | |
129 | break; | |
130 | } | |
131 | ||
132 | return ret; | |
133 | } | |
134 | ||
135 | static int tps65218_pmic_enable(struct regulator_dev *dev) | |
136 | { | |
137 | struct tps65218 *tps = rdev_get_drvdata(dev); | |
5f986f7c | 138 | int rid = rdev_get_id(dev); |
90e7d526 K |
139 | |
140 | if (rid < TPS65218_DCDC_1 || rid > TPS65218_LDO_1) | |
141 | return -EINVAL; | |
142 | ||
143 | /* Enable the regulator and password protection is level 1 */ | |
144 | return tps65218_set_bits(tps, dev->desc->enable_reg, | |
145 | dev->desc->enable_mask, dev->desc->enable_mask, | |
146 | TPS65218_PROTECT_L1); | |
147 | } | |
148 | ||
149 | static int tps65218_pmic_disable(struct regulator_dev *dev) | |
150 | { | |
151 | struct tps65218 *tps = rdev_get_drvdata(dev); | |
5f986f7c | 152 | int rid = rdev_get_id(dev); |
90e7d526 K |
153 | |
154 | if (rid < TPS65218_DCDC_1 || rid > TPS65218_LDO_1) | |
155 | return -EINVAL; | |
156 | ||
157 | /* Disable the regulator and password protection is level 1 */ | |
158 | return tps65218_clear_bits(tps, dev->desc->enable_reg, | |
159 | dev->desc->enable_mask, TPS65218_PROTECT_L1); | |
160 | } | |
161 | ||
b9a0d359 TK |
162 | static int tps65218_pmic_set_suspend_enable(struct regulator_dev *dev) |
163 | { | |
164 | struct tps65218 *tps = rdev_get_drvdata(dev); | |
165 | unsigned int rid = rdev_get_id(dev); | |
166 | ||
167 | if (rid < TPS65218_DCDC_1 || rid > TPS65218_LDO_1) | |
168 | return -EINVAL; | |
169 | ||
170 | return tps65218_clear_bits(tps, dev->desc->bypass_reg, | |
171 | dev->desc->bypass_mask, | |
172 | TPS65218_PROTECT_L1); | |
173 | } | |
174 | ||
175 | static int tps65218_pmic_set_suspend_disable(struct regulator_dev *dev) | |
176 | { | |
177 | struct tps65218 *tps = rdev_get_drvdata(dev); | |
178 | unsigned int rid = rdev_get_id(dev); | |
179 | ||
180 | if (rid < TPS65218_DCDC_1 || rid > TPS65218_LDO_1) | |
181 | return -EINVAL; | |
182 | ||
3fb2ef11 TK |
183 | if (!tps->info[rid]->strobe) { |
184 | if (rid == TPS65218_DCDC_3) | |
185 | tps->info[rid]->strobe = 3; | |
186 | else | |
187 | return -EINVAL; | |
188 | } | |
b9a0d359 TK |
189 | |
190 | return tps65218_set_bits(tps, dev->desc->bypass_reg, | |
191 | dev->desc->bypass_mask, | |
192 | tps->info[rid]->strobe, | |
193 | TPS65218_PROTECT_L1); | |
194 | } | |
195 | ||
90e7d526 K |
196 | /* Operations permitted on DCDC1, DCDC2 */ |
197 | static struct regulator_ops tps65218_dcdc12_ops = { | |
198 | .is_enabled = regulator_is_enabled_regmap, | |
199 | .enable = tps65218_pmic_enable, | |
200 | .disable = tps65218_pmic_disable, | |
201 | .get_voltage_sel = regulator_get_voltage_sel_regmap, | |
202 | .set_voltage_sel = tps65218_pmic_set_voltage_sel, | |
203 | .list_voltage = regulator_list_voltage_linear_range, | |
204 | .map_voltage = regulator_map_voltage_linear_range, | |
5ab9be42 | 205 | .set_voltage_time_sel = regulator_set_voltage_time_sel, |
b9a0d359 TK |
206 | .set_suspend_enable = tps65218_pmic_set_suspend_enable, |
207 | .set_suspend_disable = tps65218_pmic_set_suspend_disable, | |
90e7d526 K |
208 | }; |
209 | ||
210 | /* Operations permitted on DCDC3, DCDC4 and LDO1 */ | |
211 | static struct regulator_ops tps65218_ldo1_dcdc34_ops = { | |
212 | .is_enabled = regulator_is_enabled_regmap, | |
213 | .enable = tps65218_pmic_enable, | |
214 | .disable = tps65218_pmic_disable, | |
215 | .get_voltage_sel = regulator_get_voltage_sel_regmap, | |
216 | .set_voltage_sel = tps65218_pmic_set_voltage_sel, | |
217 | .list_voltage = regulator_list_voltage_linear_range, | |
218 | .map_voltage = regulator_map_voltage_linear_range, | |
b9a0d359 TK |
219 | .set_suspend_enable = tps65218_pmic_set_suspend_enable, |
220 | .set_suspend_disable = tps65218_pmic_set_suspend_disable, | |
90e7d526 K |
221 | }; |
222 | ||
c0ea88b8 NK |
223 | static const int ls3_currents[] = { 100, 200, 500, 1000 }; |
224 | ||
225 | static int tps65218_pmic_set_input_current_lim(struct regulator_dev *dev, | |
226 | int lim_uA) | |
227 | { | |
228 | unsigned int index = 0; | |
229 | unsigned int num_currents = ARRAY_SIZE(ls3_currents); | |
230 | struct tps65218 *tps = rdev_get_drvdata(dev); | |
231 | ||
232 | while (index < num_currents && ls3_currents[index] != lim_uA) | |
233 | index++; | |
234 | ||
235 | if (index == num_currents) | |
236 | return -EINVAL; | |
237 | ||
238 | return tps65218_set_bits(tps, dev->desc->csel_reg, dev->desc->csel_mask, | |
239 | index << 2, TPS65218_PROTECT_L1); | |
240 | } | |
241 | ||
242 | static int tps65218_pmic_set_current_limit(struct regulator_dev *dev, | |
243 | int min_uA, int max_uA) | |
244 | { | |
245 | int index = 0; | |
246 | unsigned int num_currents = ARRAY_SIZE(ls3_currents); | |
247 | struct tps65218 *tps = rdev_get_drvdata(dev); | |
248 | ||
249 | while (index < num_currents && ls3_currents[index] < max_uA) | |
250 | index++; | |
251 | ||
252 | index--; | |
253 | ||
254 | if (index < 0 || ls3_currents[index] < min_uA) | |
255 | return -EINVAL; | |
256 | ||
257 | return tps65218_set_bits(tps, dev->desc->csel_reg, dev->desc->csel_mask, | |
258 | index << 2, TPS65218_PROTECT_L1); | |
259 | } | |
260 | ||
261 | static int tps65218_pmic_get_current_limit(struct regulator_dev *dev) | |
262 | { | |
263 | int retval; | |
264 | unsigned int index; | |
265 | struct tps65218 *tps = rdev_get_drvdata(dev); | |
266 | ||
267 | retval = tps65218_reg_read(tps, dev->desc->csel_reg, &index); | |
268 | if (retval < 0) | |
269 | return retval; | |
270 | ||
271 | index = (index & dev->desc->csel_mask) >> 2; | |
272 | ||
273 | return ls3_currents[index]; | |
274 | } | |
275 | ||
276 | static struct regulator_ops tps65218_ls3_ops = { | |
277 | .is_enabled = regulator_is_enabled_regmap, | |
278 | .enable = tps65218_pmic_enable, | |
279 | .disable = tps65218_pmic_disable, | |
280 | .set_input_current_limit = tps65218_pmic_set_input_current_lim, | |
281 | .set_current_limit = tps65218_pmic_set_current_limit, | |
282 | .get_current_limit = tps65218_pmic_get_current_limit, | |
283 | }; | |
284 | ||
90e7d526 K |
285 | /* Operations permitted on DCDC5, DCDC6 */ |
286 | static struct regulator_ops tps65218_dcdc56_pmic_ops = { | |
287 | .is_enabled = regulator_is_enabled_regmap, | |
288 | .enable = tps65218_pmic_enable, | |
289 | .disable = tps65218_pmic_disable, | |
b9a0d359 TK |
290 | .set_suspend_enable = tps65218_pmic_set_suspend_enable, |
291 | .set_suspend_disable = tps65218_pmic_set_suspend_disable, | |
90e7d526 K |
292 | }; |
293 | ||
294 | static const struct regulator_desc regulators[] = { | |
c0ea88b8 NK |
295 | TPS65218_REGULATOR("DCDC1", TPS65218_DCDC_1, REGULATOR_VOLTAGE, |
296 | tps65218_dcdc12_ops, 64, TPS65218_REG_CONTROL_DCDC1, | |
297 | TPS65218_CONTROL_DCDC1_MASK, TPS65218_REG_ENABLE1, | |
298 | TPS65218_ENABLE1_DC1_EN, 0, 0, dcdc1_dcdc2_ranges, | |
b9a0d359 TK |
299 | 2, 4000, 0, TPS65218_REG_SEQ3, |
300 | TPS65218_SEQ3_DC1_SEQ_MASK), | |
c0ea88b8 NK |
301 | TPS65218_REGULATOR("DCDC2", TPS65218_DCDC_2, REGULATOR_VOLTAGE, |
302 | tps65218_dcdc12_ops, 64, TPS65218_REG_CONTROL_DCDC2, | |
303 | TPS65218_CONTROL_DCDC2_MASK, TPS65218_REG_ENABLE1, | |
304 | TPS65218_ENABLE1_DC2_EN, 0, 0, dcdc1_dcdc2_ranges, | |
b9a0d359 TK |
305 | 2, 4000, 0, TPS65218_REG_SEQ3, |
306 | TPS65218_SEQ3_DC2_SEQ_MASK), | |
c0ea88b8 NK |
307 | TPS65218_REGULATOR("DCDC3", TPS65218_DCDC_3, REGULATOR_VOLTAGE, |
308 | tps65218_ldo1_dcdc34_ops, 64, | |
309 | TPS65218_REG_CONTROL_DCDC3, | |
90e7d526 | 310 | TPS65218_CONTROL_DCDC3_MASK, TPS65218_REG_ENABLE1, |
c0ea88b8 | 311 | TPS65218_ENABLE1_DC3_EN, 0, 0, ldo1_dcdc3_ranges, 2, |
b9a0d359 | 312 | 0, 0, TPS65218_REG_SEQ4, TPS65218_SEQ4_DC3_SEQ_MASK), |
c0ea88b8 NK |
313 | TPS65218_REGULATOR("DCDC4", TPS65218_DCDC_4, REGULATOR_VOLTAGE, |
314 | tps65218_ldo1_dcdc34_ops, 53, | |
315 | TPS65218_REG_CONTROL_DCDC4, | |
316 | TPS65218_CONTROL_DCDC4_MASK, TPS65218_REG_ENABLE1, | |
317 | TPS65218_ENABLE1_DC4_EN, 0, 0, dcdc4_ranges, 2, | |
b9a0d359 | 318 | 0, 0, TPS65218_REG_SEQ4, TPS65218_SEQ4_DC4_SEQ_MASK), |
c0ea88b8 NK |
319 | TPS65218_REGULATOR("DCDC5", TPS65218_DCDC_5, REGULATOR_VOLTAGE, |
320 | tps65218_dcdc56_pmic_ops, 1, -1, -1, | |
321 | TPS65218_REG_ENABLE1, TPS65218_ENABLE1_DC5_EN, 0, 0, | |
b9a0d359 TK |
322 | NULL, 0, 0, 1000000, TPS65218_REG_SEQ5, |
323 | TPS65218_SEQ5_DC5_SEQ_MASK), | |
c0ea88b8 NK |
324 | TPS65218_REGULATOR("DCDC6", TPS65218_DCDC_6, REGULATOR_VOLTAGE, |
325 | tps65218_dcdc56_pmic_ops, 1, -1, -1, | |
326 | TPS65218_REG_ENABLE1, TPS65218_ENABLE1_DC6_EN, 0, 0, | |
b9a0d359 TK |
327 | NULL, 0, 0, 1800000, TPS65218_REG_SEQ5, |
328 | TPS65218_SEQ5_DC6_SEQ_MASK), | |
c0ea88b8 NK |
329 | TPS65218_REGULATOR("LDO1", TPS65218_LDO_1, REGULATOR_VOLTAGE, |
330 | tps65218_ldo1_dcdc34_ops, 64, | |
0eada6a1 | 331 | TPS65218_REG_CONTROL_LDO1, |
90e7d526 | 332 | TPS65218_CONTROL_LDO1_MASK, TPS65218_REG_ENABLE2, |
c0ea88b8 | 333 | TPS65218_ENABLE2_LDO1_EN, 0, 0, ldo1_dcdc3_ranges, |
b9a0d359 TK |
334 | 2, 0, 0, TPS65218_REG_SEQ6, |
335 | TPS65218_SEQ6_LDO1_SEQ_MASK), | |
c0ea88b8 NK |
336 | TPS65218_REGULATOR("LS3", TPS65218_LS_3, REGULATOR_CURRENT, |
337 | tps65218_ls3_ops, 0, 0, 0, TPS65218_REG_ENABLE2, | |
338 | TPS65218_ENABLE2_LS3_EN, TPS65218_REG_CONFIG2, | |
b9a0d359 | 339 | TPS65218_CONFIG2_LS3ILIM_MASK, NULL, 0, 0, 0, 0, 0), |
90e7d526 K |
340 | }; |
341 | ||
342 | static int tps65218_regulator_probe(struct platform_device *pdev) | |
343 | { | |
344 | struct tps65218 *tps = dev_get_drvdata(pdev->dev.parent); | |
345 | struct regulator_init_data *init_data; | |
346 | const struct tps_info *template; | |
347 | struct regulator_dev *rdev; | |
348 | const struct of_device_id *match; | |
349 | struct regulator_config config = { }; | |
b9a0d359 TK |
350 | int id, ret; |
351 | unsigned int val; | |
90e7d526 K |
352 | |
353 | match = of_match_device(tps65218_of_match, &pdev->dev); | |
948838a1 | 354 | if (!match) |
90e7d526 | 355 | return -ENODEV; |
948838a1 AL |
356 | |
357 | template = match->data; | |
358 | id = template->id; | |
072e78b1 JMC |
359 | init_data = of_get_regulator_init_data(&pdev->dev, pdev->dev.of_node, |
360 | ®ulators[id]); | |
90e7d526 K |
361 | |
362 | platform_set_drvdata(pdev, tps); | |
363 | ||
364 | tps->info[id] = &tps65218_pmic_regs[id]; | |
365 | config.dev = &pdev->dev; | |
366 | config.init_data = init_data; | |
367 | config.driver_data = tps; | |
368 | config.regmap = tps->regmap; | |
d2fa87c3 | 369 | config.of_node = pdev->dev.of_node; |
90e7d526 K |
370 | |
371 | rdev = devm_regulator_register(&pdev->dev, ®ulators[id], &config); | |
372 | if (IS_ERR(rdev)) { | |
373 | dev_err(tps->dev, "failed to register %s regulator\n", | |
374 | pdev->name); | |
375 | return PTR_ERR(rdev); | |
376 | } | |
377 | ||
b9a0d359 TK |
378 | ret = tps65218_reg_read(tps, regulators[id].bypass_reg, &val); |
379 | if (ret) | |
380 | return ret; | |
381 | ||
382 | tps->info[id]->strobe = val & regulators[id].bypass_mask; | |
383 | ||
90e7d526 K |
384 | return 0; |
385 | } | |
386 | ||
387 | static struct platform_driver tps65218_regulator_driver = { | |
388 | .driver = { | |
389 | .name = "tps65218-pmic", | |
948838a1 | 390 | .of_match_table = tps65218_of_match, |
90e7d526 K |
391 | }, |
392 | .probe = tps65218_regulator_probe, | |
90e7d526 K |
393 | }; |
394 | ||
395 | module_platform_driver(tps65218_regulator_driver); | |
396 | ||
397 | MODULE_AUTHOR("J Keerthy <j-keerthy@ti.com>"); | |
398 | MODULE_DESCRIPTION("TPS65218 voltage regulator driver"); | |
399 | MODULE_ALIAS("platform:tps65218-pmic"); | |
400 | MODULE_LICENSE("GPL v2"); |